Reference signal sequence
By optimizing the frequency domain power response of DMRS sequences using π/2-BPSK modulation and a two-tap matched filter, the solution addresses the imperfections in existing 3GPP Release 16 DMRS, enhancing receiver performance and reducing complexity in 5G and 6G networks.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- NOKIA SOLUTIONS (SHANGHAI) CO LTD
- Filing Date
- 2024-12-13
- Publication Date
- 2026-06-18
AI Technical Summary
Existing communication technologies, such as those defined by 3GPP in Release 16, suffer from imperfections in the frequency domain power response of low PAPR (Peak to Average Power Ratio) sequences for DMRS, leading to non-Gaussian noise distribution and performance degradation in receivers, particularly in 5G and 6G networks.
The proposed solution involves generating a reference signal sequence through π/2-binary phase shift keying (BPSK) modulation, ensuring that odd and even elements of the frequency domain power response are substantially equal, allowing for a regular power distribution suitable for frequency domain receivers, and employing a two-tap matched filter for pre-processing.
This approach maintains a low PAPR in the time domain while optimizing the frequency domain power response, enabling improved receiver performance and reduced complexity, particularly in 5G and 6G URLLC scenarios with consistent BLER (Block Error Rate) improvements.
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Figure CN2024139376_18062026_PF_FP_ABST
Abstract
Description
REFERENCE SIGNAL SEQUENCEFIELD
[0001] Various embodiments generally relate to the field of communication, and in particular, to devices, methods, apparatuses and a computer readable storage medium for generating a reference signal sequence.BACKGROUND
[0002] A communication network can be seen as a facility that enables communications between two or more communication devices, or provides communication devices access to a data network. A mobile or wireless communication network is one example of a communication network.
[0003] Such communication networks operate in accordance with standards, such as those promulgated by 3GPP (Third Generation Partnership Project) , IEEE or ETSI (European Telecommunications Standards Institute) . Examples of such standards include the so-called 5G (5th Generation) standard or other standards promulgated by 3GPP.SUMMARY
[0004] In general, embodiments of the present disclosure provide a solution for communication, for example, for generation of a reference signal sequence, especially for generation of a low average power ratio (PAPR) demodulation reference signal (DMRS) sequence.
[0005] In a first aspect, there is provided a first device. The first device may comprise at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the first device at least to: obtain a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and transmit the reference signal sequence to a second device.
[0006] In a second aspect, there is provided a second device. The second device may comprise at least one processor; and at least one memory storing instructions that, when executed by the at least one processor, cause the second device at least to: obtain a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which the odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and receive a reference signal based on the reference signal sequence.
[0007] In a third aspect, there is provided a method. The method may comprise: obtaining a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and transmitting the reference signal sequence to a second device.
[0008] In a fourth aspect, there is provided a method. The method may comprise: obtaining a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which the odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and receiving a reference signal based on the reference signal sequence.
[0009] In a fifth aspect, there is provided an apparatus. The apparatus may comprise: means for obtaining a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and means for transmitting the reference signal sequence to a second device.
[0010] In a sixth aspect, there is provided an apparatus. The apparatus may comprise: means for obtaining a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which the odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and means for receiving a reference signal based on the reference signal sequence.
[0011] In a seventh aspect, there is provided a non-transitory computer readable medium comprising program instructions for causing an apparatus to perform at least the method according to the third to fourth aspects.
[0012] In an eighth aspect, there is provided a computer program comprising instructions, which, when executed by an apparatus, cause the apparatus at least to: obtain a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and transmit the reference signal sequence to a second device.
[0013] In a ninth aspect, there is provided a computer program comprising instructions, which, when executed by an apparatus, cause the apparatus at least to: obtain a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which the odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and receive a reference signal based on the reference signal sequence.
[0014] In a tenth aspect, there is provided a first device. The first device may comprise obtaining circuitry configured to obtain a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and transmitting circuitry configured to transmit the reference signal sequence to a second device.
[0015] In an eleventh aspect, there is provided a second device. The second device may comprise obtaining circuitry configured to obtain a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which the odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and receiving circuitry configured to receive a reference signal based on the reference signal sequence.
[0016] It is to be understood that the summary section is not intended to identify key or essential features of embodiments of the present disclosure, nor is it intended to be used to limit the scope of the present disclosure. Other features of the present disclosure will become easily comprehensible through the following description.BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Some embodiments will now be described with reference to the accompanying drawings, in which:
[0018] FIG. 1A illustrates an example of an application scenario in which some embodiments of the present disclosure may be implemented;
[0019] FIG. 1B illustrates an example of a frequency low PARR type 2 sequence power response in some solutions;
[0020] FIG. 2 illustrates an example communication process between a first device and a second device according to some embodiments of the present disclosure;
[0021] FIG. 3 illustrates a comparison of frequency low PARR type 2 sequence power responses in some solutions and that in some embodiments of the present disclosure;
[0022] FIG. 4 illustrates an example process of pre-processing at a receiver according to some embodiments of the present disclosure;
[0023] FIG. 5 illustrates an example process of generating a binary sequence according to some embodiments of the present disclosure;
[0024] FIGS. 6A and 6B illustrate performance simulations according to some solutions and that according to some embodiments of the present disclosure;
[0025] FIGS. 7A and 7B illustrate performance simulations according to some other solutions and that according to some other embodiments of the present disclosure;
[0026] FIG. 8 illustrates a flowchart of an example method implemented at a first device in accordance with some other embodiments of the present disclosure;
[0027] FIG. 9 illustrates a flowchart of an example method implemented at a second device in accordance with some other embodiments of the present disclosure;
[0028] FIG. 10 illustrates an example simplified block diagram of a device that is suitable for implementing embodiments of the present disclosure; and
[0029] FIG. 11 illustrates an example block diagram of an example computer readable medium in accordance with some embodiments of the present disclosure.
[0030] Throughout the drawings, the same or similar reference numerals represent the same or similar element.DETAILED DESCRIPTION
[0031] Principles of the present disclosure will now be described with reference to some embodiments. It is to be understood that these embodiments are described only for the purpose of illustration and help those skilled in the art to understand and implement the present disclosure, without suggesting any limitation as to the scope of the disclosure. The disclosure described herein may be implemented in various manners other than the ones described below.
[0032] In the following description and claims, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skills in the art to which the present disclosure belongs.
[0033] References in the present disclosure to “one embodiment, ” “an embodiment, ” “an embodiment, ” and the like indicate that the embodiment described may include a particular feature, structure, or characteristic, but it is not necessary that every embodiment includes the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
[0034] It may be understood that although the terms “first” , “second” , “third” , “fourth” etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and similarly, a second element could be termed a first element, without departing from the scope of embodiments. As used herein, the term “and / or” includes any and all combinations of one or more of the listed terms.
[0035] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of embodiments. As used herein, the singular forms “a” , “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” , “comprising” , “has” , “having” , “includes” and / or “including” , when used herein, specify the presence of stated features, elements, and / or components etc., but do not preclude the presence or addition of one or more other features, elements, components and / or combinations thereof. As used herein, “at least one of the following: <a list of two or more elements>” and “at least one of <a list of two or more elements>” and similar wording, where the list of two or more elements are joined by “and” or “or” , mean at least any one of the elements, or at least any two or more of the elements, or at least all the elements. Additionally, the terms “identity” , “identifier” and “identification” in the present disclosure have the same meaning and could be collectively represent by “ID” .
[0036] As used in this application, the term “circuitry” may refer to one or more or all of the following: (a) hardware-only circuit implementations (such as implementations in only analog and / or digital circuitry) and (b) combinations of hardware circuits and software, such as (as applicable) : (i) a combination of analog and / or digital hardware circuit (s) with software / firmware and (ii) any portions of hardware processor (s) with software (including digital signal processor (s) ) , software, and memory (ies) that work together to cause an apparatus, such as a mobile phone or server, to perform various functions) and (c) hardware circuit (s) and or processor (s) , such as a microprocessor (s) or a portion of a microprocessor (s) that requires software (e.g., firmware) for operation, but the software may not be present when it is not needed for operation.
[0037] This definition of circuitry applies to all uses of this term in this application, including in any claims. As a further example, as used in this application, the term circuitry also covers an implementation of merely a hardware circuit or processor (or multiple processors) or portion of a hardware circuit or processor and its (or their) accompanying software and / or firmware. The term circuitry also covers, for example and if applicable to the particular claim element, a baseband integrated circuit or processor integrated circuit for a mobile device or a similar integrated circuit in server, a cellular network device, or other computing or network device.
[0038] As used herein, the term “communication network” refers to a network following any suitable communication standards, such as new radio (NR) , long term evolution (LTE) , LTE-advanced (LTE-A) , wideband code division multiple access (WCDMA) , high-speed packet access (HSPA) , narrow band Internet of things (NB-IoT) and so on. Furthermore, the communications between a terminal device and a network device in the communication network may be performed according to any suitable generation communication protocols, including, but not limited to, the third generation (3G) , the fourth generation (4G) , 4.5G, the fifth generation (5G) communication protocols, the sixth generation (6G) communication protocols, and / or beyond. Embodiments of the present disclosure may be applied in various communication systems. Given the rapid development in communications, there will of course also be future type communication technologies and systems with which the present disclosure may be embodied. It should not be seen as limiting the scope of the present disclosure to only the aforementioned system.
[0039] As used herein, the term “network device” refers to a node in a communication network via which a terminal device accesses the network and receives services therefrom. The network device may refer to a base station (BS) or an access point (AP) , for example, a node B (NodeB or NB) , an evolved NodeB (eNodeB or eNB) , a NR NB (also referred to as a gNB) , a transmit-receive point (TRP) , a remote radio unit (RRU) , a radio header (RH) , a remote radio head (RRH) , a relay, a low power node such as a femto, a pico, an Integrated Access and Backhaul (IAB) node, a non-terrestrial network (NTN) or non-ground network device such as a satellite network device, a low earth orbit (LEO) satellite and a geosynchronous earth orbit (GEO) satellite, an aircraft network device, and so forth, depending on the applied terminology and technology. In some embodiments, radio access network (RAN) split architecture comprises a Centralized Unit (CU) and a Distributed Unit (DU) at an IAB donor node. An IAB node comprises a Mobile Terminal (IAB-MT) part that behaves like a UE toward the parent node, and a DU part of an IAB node behaves like a base station toward the next-hop IAB node.
[0040] The term “terminal device” refers to any end device that may be capable of wireless communication. By way of example rather than limitation, a terminal device may also be referred to as a communication device, user equipment (UE) , a subscriber station (SS) , a portable subscriber station, a mobile station (MS) , or an access terminal (AT) . The terminal device may include, but not limited to, a mobile phone, a cellular phone, a smart phone, voice over IP (VoIP) phones, wireless local loop phones, a tablet, a wearable terminal device, a personal digital assistant (PDA) , portable computers, desktop computer, image capture terminal devices such as digital cameras, gaming terminal devices, music storage and playback appliances, vehicle-mounted wireless terminal devices, wireless endpoints, mobile stations, laptop-embedded equipment (LEE) , laptop-mounted equipment (LME) , USB dongles, smart devices, wireless customer-premises equipment (CPE) , an Internet of things (loT) device, a watch or other wearable, a head-mounted display (HMD) , a vehicle, a drone, a medical device and applications (e.g., remote surgery) , an industrial device and applications (e.g., a robot and / or other wireless devices operating in an industrial and / or an automated processing chain contexts) , a consumer electronics device, a device operating on commercial, a relay node, an integrated access and backhaul (IAB) node, and / or industrial wireless networks, and the like. In the following description, the terms “terminal device” , “communication device” , “terminal” , “user equipment” and “UE” may be used interchangeably.
[0041] To improve cell coverage, 3GPP had introduced in release 16 (R16) low PAPR sequence Type2 for PUCCH and PUSCH pilot symbol. In R16, the low-PAPR sequence is defined by a base sequence according to: where is the length of the sequence.
[0042] Base sequences are divided into groups, where u∈ {0, 1, …, 29} is the group number and v is the base sequence number within the group, such that each group contains one base sequence (v=0) of length 1 / 2≤m / 2δ. m / 2δ is the scaling factor per PRB, e.g for PXSCH (e.g. PDSCH or PUSCH) DMRS Type1 1 / 2=m / 2δ , The sequence is defined by: n=0, …, M-1 where the definition of depends on the sequence length.
[0043] From transmitter and time domain perspective, the R16 low PAPR Type2 sequence is perfect, but from receiver and frequency domain perspective, there is imperfection caused by
[0044] In view of these analysis and considerations, a new solution is proposed in some embodiments of the present disclosure. For illustrative purposes, principles and embodiments of the present disclosure will be described below with reference to the FIGS below. However, it is to be noted that these embodiments are given to enable the skilled in the art to understand inventive concepts of the present disclosure and implement the solution as proposed herein, and not intended to limit scope of the present application in any way.
[0045] FIG. 1A illustrates an example of an application scenario in which some embodiments of the present disclosure may be implemented. An architecture (or referred to as a system or a communication system) 100 includes a first device, e.g. a transmitting device and a second device, e.g. a receiving device. It should be noted that the transmitting device not only has a transmitting function but also has a receiving function. The transmitting device may be referred to as a transmitter in some examples, and can also receive a signal or information or data if needed. The receiving device not only has a receiving function but also has a transmitting function. The receiving device may be referred to as a receiver in some examples, and can also transmit a signal or information or data if needed.
[0046] In some examples, the first device may be a network device 102, e.g. a base station, and the second device may be a terminal device 104, e.g. a UE, as shown in FIG. 1A. Alternatively, in some other examples (not shown) , the transmitting device may be a terminal device, and the receiving device may be a network device. In some examples, an example of the terminal device may be a UE. In some examples, an example of the network device may be a base station. In some examples, a reference signal may be transmitted between the transmitting device and the receiving device. The reference signal may be uplink or downlink reference signal, e.g. a DMRS in uplink or downlink.
[0047] It is to be understood that the number of network devices and terminal devices is only for the purpose of illustration without suggesting any limitations. The system 100 may include any suitable number of network devices and terminal devices adapted for implementing embodiments of the present disclosure.
[0048] Communications in the communication system 100 may be implemented according to any proper communication protocol (s) , comprising, but not limited to, cellular communication protocols of the first generation (1G) , the second generation (2G) , the third generation (3G) , the fourth generation (4G) and the fifth generation (5G) and on the like, wireless local network communication protocols such as Institute for Electrical and Electronics Engineers (IEEE) 802.11 and the like, and / or any other protocols currently known or to be developed in the future. Moreover, the communication may utilize any proper wireless communication technology, comprising but not limited to: Code Division Multiple Access (CDMA) , Frequency Division Multiple Access (FDMA) , Time Division Multiple Access (TDMA) , Frequency Division Duplex (FDD) , Time Division Duplex (TDD) , Multiple-Input Multiple-Output (MIMO) , Orthogonal Frequency Division Multiple (OFDM) , Discrete Fourier Transform spread OFDM (DFT-s-OFDM) and / or any other technologies currently known or to be developed in the future.
[0049] As mentioned above, in some solutions, the frequency domain sequence the power of is not in regular but more like randomized noise power, as shown in FIG. 1B which illustrates an example of a frequency low PARR type 2 sequence power response in some solutions.
[0050] In an OFDM system, frequency domain algorithms have been widely used in a commercial product, e.g. frequency domain channel estimation, noise estimation, MIMO equalization. Those frequency domain algorithms assume that the pilot sequence satisfies a regular or constant power property, this is one of the basic assumptions which has been recognized by industry. Otherwise, in pilot removal stage, the random power scaling will change the noise property, and result in non-Gaussian distribution. It is noted that Gaussian noise distribution is the basic rules given key receiver algorithms criteria like MMSE, Max-log-Map.
[0051] Even worse thing is, take 4PRB case for example, if happened to use u=25 , the generated frequency domain response is 0.0000 + 0.0000i, -0.0139 -0.2748i, -1.1057 + 1.3943i, 0.4082 + 0.1691i -0.1830 -0.6830i, 0.3026 -0.5913i, -1.1547 -1.1547i, -0.5913 + 0.3026i -0.6830 -0.1830i, 0.1691 + 0.4082i, 1.3943 -1.1057i, -0.2748 -0.0139i 0.0000 + 0.0000i, 0.8026 -1.0913i, 0.8943 -0.6057i, -0.4082 + 0.9856i -0.1830 -0.6830i, -0.5139 + 0.2252i, -1.1547 -1.1547i, 0.2252 -0.5139i -0.6830 -0.1830i, 0.9856 -0.4082i, -0.6057 + 0.8943i, -1.0913 + 0.8026i
[0052] Bold are 0, it means when used as pilot tones these 2 contributes purely noise to estimator. There is overall BLER performance degradation with R16 low PAPR Type2 sequence Time domain processing directly on is possible, as this does not cause random power scaling on the noise term. However, this would result in two receivers in parallel, which doubles the complexity.
[0053] In some embodiments of the present disclosure, an improved definition is provided which allows the reuse of normal (for example, existing) frequency domain receivers with little to no modification. Details of some examples of the present disclosure will be further described in the following embodiments, as shown in FIGS. 2 to 11.
[0054] FIG. 2 illustrates an example communication process 200 between a first device 202 and a second device 204 according to some embodiments of the present disclosure. In the process 200, an example of the first device 202 may be a transmitting device (or referred to as a transmitter) . An example of the second device 204 may be a receiving device (or referred to as a receiver) . As mentioned above, the transmitting device can also receive a signal or information or data if needed, and the receiving device can also transmit a signal or information or data if needed. In some example, the first device 202 may be one of a terminal device or a network device, and the second device 204 may be the other one of the terminal device or the network device. For example, the first device 202 may be one of a UE or a gNB or a 6G base station or a 6G network device. The second device 204 may be the other one of the UE or the gNB or the 6G base station or the 6G network device.
[0055] In the process 200, the first device 202 may obtain (210) a reference signal sequence 205 as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence. Odd elements of a frequency domain power response of the reference signal sequence 205 are substantially equal, and even elements of the frequency domain power response are substantially equal. In some examples, the frequency domain power response can be also referred to as power spectral density (PSD) . In some examples below, the frequency domain power response may be denoted by Pk.
[0056] The first device 202 may transmit (220) the reference signal sequence 205 to the second device 204. On the second device 204 side, the second device 204 may obtain (230) the reference signal sequence 205 as the complex-valued modulation symbols resulting from the π / 2-BPSK modulation applied to the binary sequence, and then receives (240) a reference signal based on the reference signal sequence 205.
[0057] In some examples, the second device 204 obtains (230) the reference signal sequence 205 as the complex-valued modulation symbols from the first device 202. In some examples, the second device 204 may create an ideal replica of the reference signal (obtained by the second device 204) for demodulation / estimation / reception purposes at the second device 204. In some examples, by comparing the received reference signal with its corresponding ideal replica, the second device 204 may determine how the channel has altered the signal and may apply corrections (equalization) to data symbols.
[0058] In some examples, the second device 204 may perform pre-processing based on the complex-valued modulation symbols with a two-tap matched filter. The output of the two-tap matched filter has a substantially constant power.
[0059] In some examples, the reference signal sequence 205 has a time domain peak to average power ratio (PAPR) response substantially equal to 1. In some examples, the frequency domain power response of the reference signal sequence 205 is regular so that more suitable for a frequency domain receiver. The reference signal sequence 205 being regular may refers to, as mentioned above, the odd elements of a frequency domain power response of the reference signal sequence 205 are substantially equal, and the even elements of the frequency domain power response are substantially equal. As such, comparing with some solutions mentioned above, the reference signal sequence 205 in present disclosure are optimized.
[0060] To optimize frequency domain power response may be equivalent to optimize the binary sequence. In order to optimize the binary sequence, in some examples, the binary sequence may be selected based on the some conditions. For instance, the conditions may include all elements of the frequency domain power response of the reference signal sequence 205 are larger than 0; even elements of the frequency domain power response have substantially a same value (may be referred to as a first same value) ; and odd elements of the frequency domain power responses have substantially a same value (may be referred to as a second same value) . Even elements of the frequency domain power response (denoted by Pk) having substantially a same value (i.e. the first same value) , in computer program, may be equivalent to having the variance of even elements of Pk less than a very small real value ε , e.g. 0.0001. Odd elements of the frequency domain power responses (denoted by Pk) having substantially a same value (i.e. the second same value) , in computer program, may be equivalent to having the variance of odd elements of Pk less than a very small real value ε. In some examples, the first same value may be the same as or different from the second same value.
[0061] In some examples, the binary sequence is one of a predetermined number of binary sequences associated with reference signal sequences having minimum auto correlation. In some examples, the predetermined number may be 30 in some examples as shown in Tables 1 and 2 below. Tables 1 and 2 show examples of the predetermined number of binary sequences associated with reference signal sequences having minimum auto correlation. In some examples, the predetermined number may be another value. In some examples, the order of the binary sequences in one or more of the tables below may be in an increasing auto correlation order. Alternatively, in some examples, the order of the binary sequences in one or more of the tables below may be in the decreasing auto correlation order. The increasing auto correlation order may refer to an ascending order based on values of the auto correlation. The decreasing auto correlation order may refer to a descending order based on values of the auto correlation. With the value of “u” being increased, the auto correlation value of the sequence may be increased.
[0062] Alternatively, in some examples, the order of the binary sequences in one or more of the tables below may be in the increasing value order. Alternatively, in some examples, the order of the binary sequences in one or more of the tables below may be in the decreasing value order. The increasing value order may refer to an ascending order based on values of the binary sequences. The decreasing value order may refer to a descending order based on values of the binary sequences.
[0063] Alternatively, in some examples, the order of the binary sequences in one or more of the tables below may be in a random order.
[0064] In some examples, a length of the binary sequence is an integer multiple of four. For example, the length of the binary sequence may equal to 12 or 24. In some examples, the length of the binary sequence is 24. The binary sequence denoted by b (0) ... b (23) is one of binary sequences in the following Table 1 in which u is a group number of the reference signal sequence. Table 1
[0065] In some other examples, the binary sequence denoted by b (0) ... b (23) may be one of binary sequences in a different table from the Table 1 above. In other words, for the length of the binary sequence is 24, there may be an alternative table of the Table 1 above. For example, in the alternative table of the Table 1, there may be no “u” column in the table, and the group number of the reference signal sequence is not recited in such table accordingly. In such examples, information of “u” , i.e. the group number of the reference signal sequence is not necessary in the table.
[0066] In some examples, the length of the binary sequence is 12. The binary sequence denoted by b (0) ... b (11) is one of binary sequences in the following Table 2 in which u is a group number of the reference signal sequence. Table 2
[0067] In some other examples, the binary sequence denoted by b (0) ... b (11) may be one of binary sequences in a different table from the Table 2 above. In other words, for the length of the binary sequence is 12, there may be an alternative table of the Table 2 above. For example, in the alternative table of the Table 2, there may be no “u” column in the table, and the group number of the reference signal sequence is not recited in such table accordingly. In such examples, information of “u” , i.e. the group number of the reference signal sequence is not necessary in the table.
[0068] As mentioned above, there may be an alternative table of the Table 1 and / or an alternative table of the Table 2. It should be noted that the alternative table of the Table 1 or Table 2 may be implemented in other forms, but not all of them are listed in some examples herein. For example, either a table in some other order or a table including a subset of the proposed binary sequences in some other order may be the alternative table (s) of the shown table (s) . It can be understood that the Table 1 mentioned in some examples herein may be replaced by any alternative table of the Table 1. Similarly, the Table 2 mentioned in some examples herein may be replaced by any alternative table of the Table 2.
[0069] As an example, the reference signal transmitted from the first device 202 to the second device 204 may be a demodulation reference signal (DMRS) . In some examples, the reference signal sequence 205 is used as the DMRS for a physical uplink shared channel (PUSCH) , a physical uplink control channel (PUCCH) , a physical downlink control channel (PDCCH) , or a physical downlink shared channel (PDSCH) , or any combination thereof.
[0070] In some examples, the reference signal sequence 205 equals to a base sequence denoted by corresponding to the complex-valued modulation symbols denoted by and is determined based on the following: wherein n is greater than or equals to 0 and less than or equals to a length of the binary sequence, u is a group number of the reference signal sequence, v is a base sequence number within the group, each group comprises one base sequence or v equals to 0, and M is the length of the binary sequence.
[0071] In some embodiments, the enhancement method (enhanced is denoted by ) in the present disclosure may be called “two-tap pulse shape select” . A new notation for the enhanced sequence in the present disclosure may be used, and its corresponding frequency domain response (i.e. the base sequence) As shown in FIG. 3 which illustrates a comparison of frequency low PARR type 2 sequence power responses in some solutions and that in some embodiments of the present disclosure, a frequency low PARR type 2 sequence power response in some solutions is shown as “Type2” , and an enhanced frequency low PARR type 2 sequence power response in the present disclosure is shown as “Enhanced type2” in FIG. 3. In FIG. 3, corresponding to “Type2” , the power of is not in regular but more like randomized noise power, while corresponding to “Enhanced type2” , the enhanced keeps same good time domain PAPR response as thus 1, and the frequency domain response of thus is always in a good regular shape, which can be considered as frequency domain pulse shaped. As mentioned above, may be also referred to as the base sequence.
[0072] The Type2 sequence in some solutions as mentioned above cannot fully use a matched filter method, because the output of matched filter is still with random power. While in some examples of the present disclosure, is by nature very suitable to use a matched filter in frequency domain processing that further improves performance. A simple 2-tap matched filter in frequency domain as pre-processing may be shown as FIG. 4, which illustrates an example process of pre-processing at a receiver according to some embodiments of the present disclosure. In FIG. 4, the 2-tap matched filter is part of receiver processing. The enhanced can be achieved when the sequence length is a multiple of 4, e.g. M=8, 12, 16, 24, etc.
[0073] The problem of some solutions mentioned above is due to improper optimization of the frequency domain power response, take sequence M=24 (PUSCH DMRS type1 of 4PRB, PUSCH DMRS type2 of 6PRB) for example, according to 3GPP Ts38.211 5.2.3.2, is generated from b (i) is defined in table from 5.2.3.2-4 in TS38.211. The b (i) , (i∈0, 1.. M-1) , for each u, u∈0, 1.. 29 defines the frequency power response property.
[0074] Optimizing the frequency domain power response is equivalent to optimizing the binary sequence b (i) , i∈0, 1.. M-1, (M is multiple of 4, e.g. =8, 12, 16, 24…) for each u, u∈0, 1.. 29. The proposed method in the present disclosure may be called “two-tap pulse shape select” to find wanted candidates of b (i) , as shown in FIG. 5.
[0075] FIG. 5 illustrates an example process 500 of generating a binary sequence according to some embodiments of the present disclosure. Specifically, in the process 500, a loop is started at 501. At 501, k=0. k is a loop index, and its value may be from 0 to 2M-1. M is a length of a pilot sequence defined in, for example, 3GPP TS 38.211, 5.2.3. For example, in a 2PRB case, each PRB has 6 pilot tones, so M is 2*6 = 12. At 503, it is determined whether k is less than 2M. If the result determined at 503 is “Yes” , then 505 is to be performed. Otherwise, 517 is to be performed. The loop is performed no more than 2M times. At 505, the integer k is mapped to a binary sequence denoted by bk . bk is a binary sequence generated at the loop index k. In this operation, bk (i) is obtained so that
[0076] At 507, a sequence as below is obtained: where is a time domain sequence defined in TS38.211 5.1.1 at the loop index k.
[0077] At 509, a sequence and a power response Pk is obtained as below: where is a frequency domain sequence defined in TS38.211 5.2.3 at the loop index k. Pk is a frequency domain power response of at the loop index k.
[0078] At 511, it is checked whether Pk satisfies all the three conditions (i) to (iii) below: (i) all elements of Pk are greater than 0; (ii) even elements of Pk are common, that is, even elements of the frequency domain power response denoted by Pk have substantially a same value (in computer program it is equivalent to have the variance of even elements of Pk less than a very small real value ε, e.g. 0.0001) ; and (iii) odd elements of Pk are common, that is, odd elements of the frequency domain power responses denoted by Pk have substantially a same value (in computer program it is equivalent to have the variance of odd elements of Pk less than a very small real value ε which is same described in the condition (ii) , e.g. 0.0001) . It should be noted that ε = 0.0001 is an example value used in the process 500, and in other examples, ε may equal to the other very small real value. Whether all the three conditions (i) to (iii) are satisfied, i.e. whether the following is satisfied: where Pk (2i) denotes even elements of Pk. Pk (2i+1) denotes odd elements of Pk. "Var" means variance calculation.
[0079] If all the three conditions (i) to (iii) are satisfied at 511, then 513 is to be performed, otherwise, 515 is to be performed. At 513, bk is stored as a candidate. At 515, k=k+1, so that steps 503 to 513 continue to be performed with increased k until it is increased to 2M.
[0080] At 517, a predetermined number of binary sequences associated with reference signal sequences having minimum auto correlation may be selected from stored candidates. For example, with the auto correlation value in an ascending order, 30 (an example of the predetermined number) sequences that with minimum auto correlation may be selected.
[0081] Example enhanced tables may be obtained by performing the process 500, such as Table 1 and Table 2 above. The binary sequence denoted by b (0) ... b (23) may one of the predetermined number of binary sequences in Table 1 above. In such examples, the predetermined number equals to 30. The binary sequence denoted by b (0) ... b (11) may one of the predetermined number of binary sequences in Table 2 above. In such examples, the predetermined number equals to 30.
[0082] The method, e.g. the method shown in the process 500 may be used by a computer program to generate an output. The output may be used directly by a UE / network node. For example, the UE / network node may obtain a sequence for a DM-RS as complex-valued modulations symbols resulting from π / 2-BPSK modulation applied to a binary sequence (denoted by b (i) ) , where the length of the binary sequence is M = 12 or M = 24, where the binary sequence for respective lengths denoted by M is in the tables above, and where u denotes a group number of a base sequence of the DM-RS.
[0083] FIGS. 6A and 6B illustrate performance simulations according to some solutions and that according to some embodiments of the present disclosure. FIG. 6A shows performance enhancement simulations based on the table in the present disclosure (e.g. tables determined or obtained using the method of the present disclosure) , and FIG. 6B shows performance simulations based on the table in some solutions, e.g. existing solutions mentioned above. The performance simulations are obtained based on M=12. It can be seen from FIGS. 6A and 6B that the performance enhancement simulations based on the table in the present disclosure has better consistency than the performance simulations based on the table in existing solutions.
[0084] FIGS. 7A and 7B illustrate performance simulations according to some other solutions and that according to some other embodiments of the present disclosure. FIG. 7A shows performance enhancement simulations based on the table in the present disclosure (e.g. tables determined or obtained using the method of the present disclosure) , and FIG. 7B shows performance simulations based on the table in some solutions, e.g. existing solutions mentioned above. The performance simulations are obtained based on M=24. It can be seen from FIGS. 7A and 7B that the performance enhancement simulations based on the table in the present disclosure has better consistency than the performance simulations based on the table in existing solutions.
[0085] In some embodiments of the present disclosure, the proposed method or process has many advantages. For example, for all u, e.g. u∈0, 1.. 29, the enhanced sequence by new b (i) table share above, are given the same time domain PAPR value as the above mentioned Type2 sequence while its frequency domain power response is very regular, e.g. odd elements of the frequency domain power response are substantially equal, and even elements of the frequency domain power response are substantially equal, so that it is more suitable for a frequency domain receiver. The proposed method ‘two tap pulse shape select’ and consequent new b (i) table can be applied to a sequence with length M=8, 12, 16, 24…which is very suitable to be used for PXSCH DMRS type2, as in Type2 the number of pilot sequence for a PRB is 4. It is easy to extend existing 3GPP TS 38.211 5.2.3.2 of table 5.2.3.2-2 and 5.2.3.2-4 which M∈12, 24 respectively. There are huge performance improvements in a low PAPR use case, e.g., cell edge and with traditional frequency domain receiver. There is good performance consistence for each u, e.g. u∈0, 1.. 29. It is very suitable for 5G / 6G URLLC scenarios which require 10-4 BLER.
[0086] FIG. 8 illustrates a flowchart of an example method 800 implemented at a first device in accordance with some other embodiments of the present disclosure. The first device performing the method 800 may be the first device 202. A second device mentioned in the method 800 may be the second device 204.
[0087] At block 810, the first device may obtain a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal.
[0088] At block 820, the first device may transmit the reference signal sequence to a second device.
[0089] In some embodiments, a length of the binary sequence is an integer multiple of four.
[0090] In some embodiments, a length of the binary sequence equals to 12 or 24.
[0091] In some embodiments, a length of the binary sequence is 24, and the binary sequence denoted by b (0) ... b (23) is one of binary sequences in the table 1 above in which u is a group number of the reference signal sequence.
[0092] In some embodiments, a length of the binary sequence is 12, and the binary sequence denoted by b (0) ... b (11) is one of binary sequences in the table 2 above in which u is a group number of the reference signal sequence.
[0093] In some embodiments, the binary sequence is selected based on the following conditions: all elements of the frequency domain power response of the reference signal sequence are larger than 0; even elements of the frequency domain power response have substantially a first same value; and odd elements of the frequency domain power responses have substantially a second same value.
[0094] In some embodiments, the binary sequence is one of a predetermined number of binary sequences associated with reference signal sequences having minimum auto correlation.
[0095] In some embodiments, the reference signal sequence is used as a demodulation reference signal (DMRS) for at least one of the following: a physical uplink shared channel (PUSCH) ; a physical uplink control channel (PUCCH) ; a physical downlink control channel (PDCCH) ; or a physical downlink shared channel (PDSCH) .
[0096] In some embodiments, the reference signal sequence equals to a base sequence denoted by corresponding to the complex-valued modulation symbols denoted by and is determined based on the following: wherein n is greater than or equals to 0 and less than or equals to a length of the binary sequence, u is a group number of the reference signal sequence, v is a base sequence number within the group, each group comprises one base sequence or v equals to 0, and M is the length of the binary sequence.
[0097] In some embodiments, the reference signal sequence has a time domain peak to average power ratio (PAPR) response substantially equal to 1.
[0098] In some embodiments, the first device is one of a terminal device or a network device, and the second device is the other one of the terminal device or the network device.
[0099] FIG. 9 illustrates a flowchart of an example method 900 implemented at a second device (e.g. the second device 204) in accordance with some other embodiments of the present disclosure. A first device mentioned in the method 900 may be the first device 202.
[0100] At block 910, the second device may obtain a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, in which the odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal.
[0101] At block 920, the second device may receive a reference signal based on the reference signal sequence.
[0102] In some embodiments, a length of the binary sequence is an integer multiple of four.
[0103] In some embodiments, a length of the binary sequence equals to 12 or 24.
[0104] In some embodiments, a length of the binary sequence is 24, and the binary sequence denoted by b (0) ... b (23) is one of binary sequences in the table 1 above in which u is a group number of the reference signal sequence.
[0105] In some embodiments, a length of the binary sequence is 12, and the binary sequence denoted by b (0) ... b (11) is one of binary sequences in the table 2 above in which u is a group number of the reference signal sequence.
[0106] In some embodiments, the binary sequence is selected based on the following conditions: all elements of the frequency domain power response of the reference signal sequence are larger than 0; even elements of the frequency domain power response have substantially a first same value; and odd elements of the frequency domain power responses have substantially a second same value.
[0107] In some embodiments, the binary sequence is one of a predetermined number of binary sequences associated with reference signal sequences having minimum auto correlation.
[0108] In some embodiments, the reference signal sequence is used as a demodulation reference signal (DMRS) for at least one of the following: a physical uplink shared channel (PUSCH) ; a physical uplink control channel (PUCCH) ; a physical downlink control channel (PDCCH) ; or a physical downlink shared channel (PDSCH) .
[0109] In some embodiments, the reference signal sequence equals to a base sequence denoted by corresponding to the complex-valued modulation symbols denoted by and is determined based on the following: wherein n is greater than or equals to 0 and less than or equals to a length of the binary sequence, u is a group number of the reference signal sequence, v is a base sequence number within the group, each group comprises one base sequence or v equals to 0, and M is the length of the binary sequence.
[0110] In some embodiments, the reference signal sequence has a time domain peak to average power ratio (PAPR) response substantially equal to 1.
[0111] In some embodiments, the second device may perform pre-processing based on the complex-valued modulation symbols with a two-tap matched filter, wherein the output of the two-tap matched filter has a substantially constant power.
[0112] In some embodiments, the first device is one of a terminal device or a network device, and the second device is the other one of the terminal device or the network device.
[0113] It should be noted that those embodiments described with reference FIG. 8 also apply for or could be combined with the embodiments described with reference FIG. 9, which are omitted here for brevity.
[0114] In some embodiments, an apparatus (for example, the first device 202) capable of performing the method 800 may comprise means for performing the respective steps of the method 800. The means may be implemented in any suitable form. For example, the means may be implemented in a circuitry or software module.
[0115] In some embodiments, the apparatus may comprise means for obtaining, at a first device, a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, wherein odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and means for transmitting the reference signal sequence to a second device.
[0116] In some embodiments, a length of the binary sequence is an integer multiple of four.
[0117] In some embodiments, a length of the binary sequence equals to 12 or 24.
[0118] In some embodiments, a length of the binary sequence is 24, and the binary sequence denoted by b (0) ... b (23) is one of binary sequences in the table 1 above in which u is a group number of the reference signal sequence.
[0119] In some embodiments, a length of the binary sequence is 12, and the binary sequence denoted by b (0) ... b (11) is one of binary sequences in the table 2 above in which u is a group number of the reference signal sequence.
[0120] In some embodiments, the binary sequence is selected based on the following conditions: all elements of the frequency domain power response of the reference signal sequence are larger than 0; even elements of the frequency domain power response have substantially a first same value; and odd elements of the frequency domain power responses have substantially a second same value.
[0121] In some embodiments, the binary sequence is one of a predetermined number of binary sequences associated with reference signal sequences having minimum auto correlation.
[0122] In some embodiments, the reference signal sequence is used as a demodulation reference signal (DMRS) for at least one of the following: a physical uplink shared channel (PUSCH) ; a physical uplink control channel (PUCCH) ; a physical downlink control channel (PDCCH) ; or a physical downlink shared channel (PDSCH) .
[0123] In some embodiments, the reference signal sequence equals to a base sequence denoted by corresponding to the complex-valued modulation symbols denoted by and is determined based on the following: wherein n is greater than or equals to 0 and less than or equals to a length of the binary sequence, u is a group number of the reference signal sequence, v is a base sequence number within the group, each group comprises one base sequence or v equals to 0, and M is the length of the binary sequence.
[0124] In some embodiments, the reference signal sequence has a time domain peak to average power ratio (PAPR) response substantially equal to 1.
[0125] In some embodiments, the first device is one of a terminal device or a network device, and the second device is the other one of the terminal device or the network device.
[0126] In some embodiments, the apparatus further comprises means for performing other steps in some embodiments of the method 800. In some embodiments, the means comprises at least one processor; and at least one memory including computer program code, the at least one memory and computer program code configured to, with the at least one processor, cause the performance of the apparatus.
[0127] In some embodiments, an apparatus (for example, the second device 204) capable of performing the method 900 may comprise means for performing the respective steps of the method 900. The means may be implemented in any suitable form. For example, the means may be implemented in a circuitry or software module.
[0128] In some embodiments, the apparatus may comprise means for obtaining, at a second device, a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, wherein the odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; and means for receiving a reference signal based on the reference signal sequence.
[0129] In some embodiments, a length of the binary sequence is an integer multiple of four.
[0130] In some embodiments, a length of the binary sequence equals to 12 or 24.
[0131] In some embodiments, a length of the binary sequence is 24, and the binary sequence denoted by b (0) ... b (23) is one of binary sequences in the table 1 above in which u is a group number of the reference signal sequence.
[0132] In some embodiments, a length of the binary sequence is 12, and the binary sequence denoted by b (0) ... b (11) is one of binary sequences in the table 2 above in which u is a group number of the reference signal sequence.
[0133] In some embodiments, the binary sequence is selected based on the following conditions: all elements of the frequency domain power response of the reference signal sequence are larger than 0; even elements of the frequency domain power response have substantially a first same value; and odd elements of the frequency domain power responses have substantially a second same value.
[0134] In some embodiments, the binary sequence is one of a predetermined number of binary sequences associated with reference signal sequences having minimum auto correlation.
[0135] In some embodiments, the reference signal sequence is used as a demodulation reference signal (DMRS) for at least one of the following: a physical uplink shared channel (PUSCH) ; a physical uplink control channel (PUCCH) ; a physical downlink control channel (PDCCH) ; or a physical downlink shared channel (PDSCH) .
[0136] In some embodiments, the reference signal sequence equals to a base sequence denoted by corresponding to the complex-valued modulation symbols denoted by and is determined based on the following: wherein n is greater than or equals to 0 and less than or equals to a length of the binary sequence, u is a group number of the reference signal sequence, v is a base sequence number within the group, each group comprises one base sequence or v equals to 0, and M is the length of the binary sequence.
[0137] In some embodiments, the reference signal sequence has a time domain peak to average power ratio (PAPR) response substantially equal to 1.
[0138] In some embodiments, the apparatus may further comprise means for performing pre-processing based on the complex-valued modulation symbols with a two-tap matched filter. The output of the two-tap matched filter has a substantially constant power.
[0139] In some embodiments, the first device is one of a terminal device or a network device, and the second device is the other one of the terminal device or the network device.
[0140] In some embodiments, the apparatus further comprises means for performing other steps in some embodiments of the method 900. In some embodiments, the means comprises at least one processor; and at least one memory including computer program code, the at least one memory and computer program code configured to, with the at least one processor, cause the performance of the apparatus.
[0141] FIG. 10 illustrates an example simplified block diagram of a device 1000 that is suitable for implementing embodiments of the present disclosure. The device 1000 may be provided to implement a communication device or a network element, for example, the first device 202, or the second device 204 as shown in FIG. 2. As shown, the device 1000 includes one or more processors 1010, one or more memories 1020 may couple to the processor 1010, and one or more communication modules 1040 may couple to the processor 1010.
[0142] The communication module 1040 is for bidirectional communications. The communication module 1040 has at least one antenna to facilitate communication. The communication interface may represent any interface that is necessary for communication with other network elements, for example the communication interface may be wireless or wireline to other network elements, or software based interface for communication.
[0143] The processor 1010 may be of any type suitable to the local technical network and may include one or more of the following: general purpose computers, special purpose computers, microprocessors, digital signal processors (DSPs) and processors based on multicore processor architecture, as non-limiting examples. The device 1000 may have multiple processors, such as an application specific integrated circuit chip that is slaved in time to a clock which synchronizes the main processor.
[0144] The memory 1020 may include one or more non-volatile memories and one or more volatile memories. Examples of the non-volatile memories include, but are not limited to, a read only memory (ROM) 1024, an electrically programmable read only memory (EPROM) , a flash memory, a hard disk, a compact disc (CD) , a digital video disk (DVD) , and other magnetic storage and / or optical storage. Examples of the volatile memories include, but are not limited to, a random access memory (RAM) 1022 and other volatile memories that will not last in the power-down duration. The memory 1020 may store instructions that, when executed by the processor 1010, cause the apparatus 1000 to perform any of the methods as disclosed herein.
[0145] A computer program 1030 includes computer executable instructions that are executed by the associated processor 1010. The program 1030 may be stored in the ROM 1024. The processor 1010 may perform any suitable actions and processing by loading the program 1030 into the RAM 1022.
[0146] The embodiments of the present disclosure may be implemented by means of the program so that the device 1000 may perform any process of the disclosure as discussed with reference to FIG. 1A to FIG. 9. The embodiments of the present disclosure may also be implemented by hardware or by a combination of software and hardware.
[0147] In some embodiments, the program 1030 may be tangibly contained in a computer readable medium which may be included in the device 1000 (such as in the memory 1020) or other storage devices that are accessible by the device 1000. The device 1000 may load the program 1030 from the computer readable medium to the RAM 1022 for execution. The computer readable medium may include any types of tangible non-volatile storage, such as ROM, EPROM, a flash memory, a hard disk, CD, DVD, and the like. FIG. 11 shows an example of the computer readable medium 1100 in form of CD or DVD. The computer readable medium has the program 1030 stored thereon.
[0148] Generally, various embodiments of the present disclosure may be implemented in hardware or special purpose circuits, software, logic or any combination thereof. Some aspects may be implemented in hardware, while other aspects may be implemented in firmware or software which may be executed by a controller, microprocessor or other computing device. While various aspects of embodiments of the present disclosure are illustrated and described as block diagrams, flowcharts, or using some other pictorial representations, it is to be understood that the block, apparatus, system, technique or method described herein may be implemented in, as non-limiting examples, hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or some combination thereof.
[0149] The present disclosure also provides at least one computer program product tangibly stored on a non-transitory computer readable storage medium. The computer program product includes computer-executable instructions, such as those included in program modules, being executed in a device on a target real or virtual processor, to carry out the methods 200 to 900 as described above with reference to FIG. 2 to FIG. 9. Generally, program modules include routines, programs, libraries, objects, classes, components, data structures, or the like that perform particular tasks or implement particular abstract data types. The functionality of the program modules may be combined or split between program modules as desired in various embodiments. Machine-executable instructions for program modules may be executed within a local or distributed device. In a distributed device, program modules may be located in both local and remote storage media.
[0150] Program code for carrying out methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code may execute entirely on a machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
[0151] In the context of the present disclosure, the computer program codes or related data may be carried by any suitable carrier to enable the device, apparatus or processor to perform various processes and operations as described above. Examples of the carrier include a signal, computer readable medium, and the like.
[0152] The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable medium may include but not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the computer readable storage medium would include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM) , a read-only memory (ROM) , an erasable programmable read-only memory (EPROM or Flash memory) , an optical fiber, a portable compact disc read-only memory (CD-ROM) , an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. The term “non-transitory, ” as used herein, is a limitation of the medium itself (i.e., tangible, not a signal) as opposed to a limitation on data storage persistency (e.g., RAM vs. ROM) .
[0153] Further, while operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are contained in the above discussions, these should not be construed as limitations on the scope of the present disclosure, but rather as descriptions of features that may be specific to particular embodiments. Certain features that are described in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment may also be implemented in multiple embodiments separately or in any suitable sub-combination.
[0154] Although the present disclosure has been described in languages specific to structural features and / or methodological acts, it is to be understood that the present disclosure defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.
Claims
1.A first device comprising:at least one processor; andat least one memory storing instructions that, when executed by the at least one processor, cause the first device at least to:obtain a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, wherein odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; andtransmit the reference signal sequence to a second device.2.The first device of claim 1, wherein a length of the binary sequence is an integer multiple of four.3.The first device of claim 1 or 2, wherein a length of the binary sequence equals to 12 or 24.4.The first device of any of claims 1-3, wherein a length of the binary sequence is 24, and the binary sequence denoted by b (0) ... b (23) is one of binary sequences in the following table in which u is a group number of the reference signal sequence: 5.The first device of any of claims 1-3, wherein a length of the binary sequence is 12, and the binary sequence denoted by b (0) ... b (11) is one of binary sequences in the following table in which u is a group number of the reference signal sequence: 6.The first device of any of claims 1-5, wherein the binary sequence is selected based on the following conditions:all elements of the frequency domain power response of the reference signal sequence are larger than 0;even elements of the frequency domain power response have substantially a first same value; andodd elements of the frequency domain power responses have substantially a second same value.7.The first device of any of claims 1-6, wherein the binary sequence is one of a predetermined number of binary sequences associated with reference signal sequences having minimum auto correlation.8.The first device of any of claims 1-7, wherein the reference signal sequence is used as a demodulation reference signal (DMRS) for at least one of the following:a physical uplink shared channel (PUSCH) ;a physical uplink control channel (PUCCH) ;a physical downlink control channel (PDCCH) ; ora physical downlink shared channel (PDSCH) .9.The first device of any of claims 1-8, wherein the reference signal sequence equals to a base sequence denoted by corresponding to the complex-valued modulation symbols denoted by and is determined based on the following: wherein n is greater than or equals to 0 and less than or equals to a length of the binary sequence, u is a group number of the reference signal sequence, v is a base sequence number within the group, each group comprises one base sequence or v equals to 0, and M is the length of the binary sequence.10.The first device of any of claims 1-9, wherein the reference signal sequence has a time domain peak to average power ratio (PAPR) response substantially equal to 1.11.The first device of any of claims 1-10, wherein the first device is one of a terminal device or a network device, and the second device is the other one of the terminal device or the network device.12.A second device comprising:at least one processor; andat least one memory storing instructions that, when executed by the at least one processor, cause the second device at least to:obtain a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, wherein the odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; andreceive a reference signal based on the reference signal sequence.13.The second device of claim 12, wherein a length of the binary sequence is an integer multiple of four.14.The second device of claim 12 or 13, wherein a length of the binary sequence equals to 12 or 24.15.The second device of any of claims 12-14, wherein a length of the binary sequence is 24, and the binary sequence denoted by b (0) . . . b (23) is one of binary sequences in the following table in which u is a group number of the reference signal sequence: 16.The second device of any of claims 12-15, wherein a length of the binary sequence is 12, and the binary sequence denoted by b (0) . . . b (11) is one of binary sequences in the following table in which u is a group number of the reference signal sequence: 17.The second device of any of claims 12-16, wherein the binary sequence is selected based on the following conditions:all elements of the frequency domain power response of the reference signal sequence are larger than 0;even elements of the frequency domain power response have substantially a first same value; andodd elements of the frequency domain power responses have substantially a second same value.18.The second device of any of claims 12-17, wherein the binary sequence is one of a predetermined number of binary sequences associated with reference signal sequences having minimum auto correlation.19.The second device of any of claims 12-18, wherein the reference signal sequence is used as a demodulation reference signal (DMRS) for at least one of the following:a physical uplink shared channel (PUSCH) ;a physical uplink control channel (PUCCH) ;a physical downlink control channel (PDCCH) ; ora physical downlink shared channel (PDSCH) .20.The second device of any of claims 12-19, wherein the reference signal sequence equals to a base sequence denoted by corresponding to the complex-valued modulation symbols denoted by and is determined based on the following: wherein n is greater than or equals to 0 and less than or equals to a length of the binary sequence, u is a group number of the reference signal sequence, v is a base sequence number within the group, each group comprises one base sequence or v equals to 0, and M is the length of the binary sequence.21.The second device of any of claims 12-20, wherein the reference signal sequence has a time domain peak to average power ratio (PAPR) response substantially equal to 1.22.The second device of any of claims 12-21, wherein the second device is further caused to:perform pre-processing based on the complex-valued modulation symbols with a two-tap matched filter, wherein the output of the two-tap matched filter has a substantially constant power.23.The second device of any of claims 12-22, wherein the first device is one of a terminal device or a network device, and the second device is the other one of the terminal device or the network device.24.A method comprising:obtaining, at a first device, a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, wherein odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; andtransmitting the reference signal sequence to a second device.25.A method comprising:obtaining, at a second device, a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, wherein the odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; andreceiving a reference signal based on the reference signal sequence.26.An apparatus comprising:means for obtaining, at a first device, a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, wherein odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; andmeans for transmitting the reference signal sequence to a second device.27.An apparatus comprising:means for obtaining, at a second device, a reference signal sequence as complex-valued modulation symbols resulting from π / 2-binary phase shift keying (BPSK) modulation applied to a binary sequence, wherein the odd elements of a frequency domain power response of the reference signal sequence are substantially equal, and even elements of the frequency domain power response are substantially equal; andmeans for receiving a reference signal based on the reference signal sequence.28.A computer readable medium comprising program instructions stored thereon for performing at least the method of claim 24 or 25.