Method for state switching of sidelink and interface apparatus

By introducing a state switching mechanism in the auxiliary link, the auxiliary link is switched from an active state to a sleep state according to the service status. High-level and low-level signals are used to indicate the state transition, which solves the problem of high power consumption of the auxiliary link and achieves power saving and state consistency.

WO2026124103A1PCT designated stage Publication Date: 2026-06-18HUAWEI TECH CO LTD

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
HUAWEI TECH CO LTD
Filing Date
2025-11-12
Publication Date
2026-06-18

AI Technical Summary

Technical Problem

Existing auxiliary links remain active when connected between devices, even when no data is being transmitted, leading to high power consumption.

Method used

By introducing a state switching mechanism in the auxiliary link, the auxiliary link can be switched from an active state to a sleep state according to the service status. The duration of high and low level signals is used to indicate the state transition, avoiding inconsistency between the sending and receiving sides and saving power consumption.

🎯Benefits of technology

It effectively reduces the power consumption of auxiliary links, saves equipment area and cost, and avoids the problem of inconsistent states.

✦ Generated by Eureka AI based on patent content.

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Abstract

Embodiments of the present application relate to the technical field of communications, and provide a method for state switching of a sidelink and an interface apparatus. In the present application, a first sidelink transmitter sends a first sending signal, the first sending signal being a first level signal; and a first sidelink receiver receives a first receiving signal, wherein when a preset condition is satisfied within a first preset time, a first sidelink is switched from a first state to a second state; the preset condition comprises that a duration within which the first sidelink receiver continuously receives the first receiving signal is greater than or equal to a second preset duration, and a duration within which the first sidelink transmitter starts to continuously send the first sending signal is greater than or equal to a third preset duration; and the first preset duration is a period of time starting from the time when the first sidelink transmitter sends the first sending signal. The present application can reduce power consumption of sidelinks.
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Description

Methods and interface devices for assisting link state switching

[0001] This application claims priority to Chinese Patent Application No. 202411816937.6, filed on December 9, 2024, entitled “Method and Interface Apparatus for Assisting Link State Switching”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to a method and interface device for assisting link state switching. Background Technology

[0003] Devices can be connected via cables to transmit signals, such as audio and video data and charging. To accommodate various data transmission needs, the industry has defined several types of interconnection interface specifications for device-to-device signal transmission. These interconnection interfaces typically include a main link for transmitting service information and an auxiliary link for transmitting control information. The main link channel includes multiple differential channels; based on the service requirements, one or more channels can be configured for data transmission and reception. Unused channels in the main link can be shut down to save power; channels configured for use can also enter sleep mode when there is no service transmission to save power.

[0004] However, in existing auxiliary links, if a connection is established between two configured interfaces, all channels in the auxiliary link are active, meaning the auxiliary link can send and receive data normally. However, when an auxiliary link channel is active, the system needs to provide a high-precision clock for each circuit on the auxiliary link channel, which results in high power consumption for the auxiliary link. Summary of the Invention

[0005] This application provides a method and interface device for auxiliary link state switching, which can reduce the power consumption of the auxiliary link.

[0006] To achieve the above objectives, the embodiments of this application adopt the following technical solutions.

[0007] In a first aspect, embodiments of this application provide a method for switching the state of an auxiliary link, applied to a first port, the first port including a first auxiliary link, the first auxiliary link including a first auxiliary link transmitter and a first auxiliary link receiver, the method including: the first auxiliary link transmitter transmitting a first transmission signal, the first transmission signal being a first level signal; the first auxiliary link receiver receiving the first reception signal; wherein, within a first preset time period and under preset conditions, the first auxiliary link switches from a first state to a second state; the preset conditions include: the first auxiliary link receiver continuously receiving the first reception signal for a time greater than or equal to a second preset time, and the first auxiliary link transmitter starting to continuously transmit the first transmission signal for a time greater than or equal to a third preset time; the first preset time is a period of time from the start of the first auxiliary link transmitter transmitting the first transmission signal.

[0008] In the implementation of the application, state switching refers to the transition from one state to another, also known as state jump or state transition.

[0009] The method for auxiliary link state switching provided in this application embodiment can switch between multiple states based on its own service status. For example, when there is no service transmission in the auxiliary link channel for a certain period of time, the state of the auxiliary link channel can be switched from active state to sleep state, which helps to save the power consumption of the auxiliary link channel.

[0010] Based on the first aspect, in one possible implementation, the first state is a sleep state, the second state is an active state, the first level signal is a high level signal, and the first received signal is a high level signal. When the first state is a sleep state and the second state is an active state, it can include a variety of possible implementations.

[0011] This embodiment of the application indicates the switch from sleep state to active state by driving a high level for a continuous period of time at both the transmitting and receiving ends, thus avoiding the problem of inconsistent states between the transmitting and receiving ends. Furthermore, this embodiment of the application uses the channel transmitter and receiver of the auxiliary link, and indicates the switch from sleep state to active state by utilizing a high level for the first transmitted signal and the duration of that high level, as well as a high level for the first received signal and the duration of that high level. This eliminates the need to introduce a new channel, saving equipment space and cost.

[0012] In one possible implementation, the method further includes: when a first preset time is reached but a first preset condition is not met, the first auxiliary link transmitter sends a second transmission signal, the second transmission signal being a second level signal; when the transmission duration of the second transmission signal reaches a fourth preset time, the first auxiliary link transmitter sends a first transmission signal; wherein the second level signal is a low level signal.

[0013] Under the condition that the first preset condition is met, the auxiliary link transmitter is continuously driven to a low level. After the auxiliary link transmitter has been driven to a low level for a fourth preset time, the auxiliary link transmitter is driven to a high level. This driving level design can generate a rising edge, increasing the success rate of the receiver detecting the state switch.

[0014] In one possible implementation, the method further includes: when a first preset time is reached and a first preset condition is not met, the first auxiliary link switches from a first state to a third state; wherein the third state is a disconnected state.

[0015] After the first auxiliary link switches from the first state to the second state, the method further includes: after a fifth preset time, the transmitter of the first auxiliary link sends a data signal. By setting the fifth preset time, the time difference between the state switching at both ends of the auxiliary link can be compensated.

[0016] Based on the first aspect, in one possible implementation, the first state is an active state and the second state is a sleep state; the first level signal is a low level signal and the first received signal is a low level signal. When the first state is an active state and the second state is a sleep state, it can include a variety of possible implementations.

[0017] This embodiment of the application indicates the transition from an active state to a sleep state by driving a low level for a continuous period of time at both the transmitting and receiving ends, thus avoiding the problem of inconsistent states between the transmitting and receiving ends. Furthermore, this embodiment of the application uses the transmitter and receiver of the auxiliary link, and indicates the switch from an active state to a sleep state by utilizing a low level second transmission signal and the duration of that low level, a low level second reception signal, and the duration of that low level second reception signal, without introducing a new channel, saving equipment area and cost.

[0018] In one possible implementation, the method further includes: when the first auxiliary link receiver detects the start of a burst within a first preset time period, the first auxiliary link remains in a first state, and the first auxiliary link transmitter sends a second transmission signal, the second transmission signal being a second level signal; wherein the second level signal is a high level signal.

[0019] In one possible implementation, the method further includes: when a first preset time is reached and a first preset condition is not met, the first auxiliary link remains in a first state, and the first auxiliary link transmitter sends a second transmission signal, the second transmission signal being a second level signal; wherein the second level signal is a high level signal.

[0020] In one possible implementation, the method further includes: if the duration for which the first auxiliary link transmitter continuously transmits the second transmission signal is greater than or equal to a third preset time, after a fifth preset time, the first auxiliary link transmitter transmits a data signal.

[0021] In one possible implementation, the length of the first preset time is greater than the length of the third preset time; the length of the third preset time is greater than the length of the second preset time. Specifically, the length of the first preset time when the first state is a sleep state and the second state is an active state can be the same as or different from the length of the first preset time when the first state is an active state and the second state is a sleep state; similarly, the length of the second preset time when the first state is a sleep state and the second state is an active state can be the same as or different from the length of the second preset time when the first state is an active state and the second state is a sleep state; and the length of the third preset time when the first state is a sleep state and the second state is an active state can be the same as or different from the length of the third preset time when the first state is an active state and the second state is a sleep state.

[0022] In one possible implementation, the first port further includes a first main link, wherein the first main link is used to transmit high-speed signals and the first auxiliary link is used to transmit low-speed signals.

[0023] Secondly, embodiments of this application provide a method for switching the state of an auxiliary link, applied to a second port, the second port including a second auxiliary link, the second auxiliary link including a second auxiliary link transmitter and a second auxiliary link receiver, the method including: the second auxiliary link receiver receiving a first received signal; under the condition that preset conditions are met, the second auxiliary link transmitter transmitting a first transmitted signal, the preset conditions including: the second auxiliary link receiver continuously receiving the first received signal for a time greater than or equal to a second preset time; and when the second auxiliary link transmitter starts continuously transmitting the first transmitted signal for a time that reaches a third preset time, the second auxiliary link switches from a first state to a second state.

[0024] The method for auxiliary link state switching provided in this application embodiment can switch between multiple states based on its own service status. For example, when there is no service transmission in the auxiliary link channel for a certain period of time, the state of the auxiliary link channel can be switched from active state to sleep state, which helps to save the power consumption of the auxiliary link channel.

[0025] Based on the second aspect, in one possible implementation, the first state is a sleep state and the second state is an active state; the first received signal is a high-level signal and the first transmitted signal is a high-level signal.

[0026] Based on the second aspect, in one possible implementation, the first state is an active state and the second state is a sleep state; the first received signal is a low-level signal and the first transmitted signal is a low-level signal.

[0027] Based on the second aspect, in one possible implementation, the length of the first preset time is greater than the length of the third preset time; and the length of the third preset time is greater than the length of the second preset time.

[0028] Based on the second aspect, in one possible implementation, the first port further includes a first main link, wherein the first main link is used to transmit high-speed signals and the first auxiliary link is used to transmit low-speed signals.

[0029] Thirdly, embodiments of this application provide an interface device, which includes: a transmitting module for transmitting a first transmitting signal, the first transmitting signal being a first level signal; a receiving module for receiving a first receiving signal; and a processing module for switching a first auxiliary link from a first state to a second state within a first preset time period and under preset conditions; wherein the preset conditions include: the first auxiliary link receiver continuously receiving the first receiving signal for a time greater than or equal to a second preset time, and the first auxiliary link transmitter starting to continuously transmit the first transmitting signal for a time greater than or equal to a third preset time; the first preset time is a period of time from the start of the first auxiliary link transmitter transmitting the first transmitting signal.

[0030] Fourthly, embodiments of this application provide an interface device, which includes: a receiving module for receiving a first receiving signal; a transmitting module for transmitting a first transmitting signal when preset conditions are met, the preset conditions including: the time for which a second auxiliary link receiver continuously receives the first receiving signal is greater than or equal to a second preset time; and a processing module for switching the second auxiliary link from a first state to a second state when the time for which the second auxiliary link transmitter starts continuously transmitting the first transmitting signal reaches a third preset time.

[0031] Fifthly, an interface device is provided, including a module for performing the method described in the first aspect and any of the designs of the first aspect, or the second aspect and any of the designs of the second aspect.

[0032] In a sixth aspect, an interface device is provided, the interface device including a processor and a memory, the memory being used to store computer-executable instructions, wherein when the computer-executable instructions are executed by the processor, the method described in the first aspect and any design of the first aspect, or the method described in the second aspect and any design of the second aspect, is executed.

[0033] In a seventh aspect, a computer-readable storage medium is provided, wherein computer instructions are stored therein, which, when executed on an interface device, cause the interface device to perform the method as described in the first aspect and any design of the first aspect, or the second aspect and any design of the second aspect.

[0034] Eighthly, a computer program product is provided, including computer instructions that, when executed on an interface device, cause the interface device to perform the method described in the first aspect and any design of the first aspect, or the method described in the second aspect and any design of the second aspect.

[0035] Ninth aspect, an electronic device is provided, the electronic device including the interface means of the fifth and / or sixth aspects described above.

[0036] In a tenth aspect, a chip is provided, the chip including the interface means described in the fifth and / or sixth aspects above.

[0037] It is understood that any of the electronic devices, interface devices, chips, computer-readable storage media or computer program products provided above can be applied to the corresponding methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects in the corresponding methods, and will not be repeated here.

[0038] These or other aspects of this application will become more readily apparent in the following description. Attached Figure Description

[0039] Figure 1 is a schematic diagram of the architecture of a communication system that directly connects devices according to an embodiment of this application.

[0040] Figure 2 is a schematic diagram of the basic components of an electronic device provided in an embodiment of this application.

[0041] Figure 3 is a schematic diagram of inter-interface transmission provided in an embodiment of this application.

[0042] Figure 4 is a schematic diagram of an auxiliary link structure provided in an embodiment of this application.

[0043] Figure 5 is a schematic diagram of an auxiliary link state machine provided in an embodiment of this application.

[0044] Figure 6 is a signal interaction flowchart of a data transmission method for an interface provided in an embodiment of this application.

[0045] Figure 7 is a timing diagram of an auxiliary link switching from a sleep state to an active state according to an embodiment of this application.

[0046] Figure 8 is a flowchart of a process performed by an initiating device to switch from a sleep state to other states, according to an embodiment of this application.

[0047] Figure 9 is a signal interaction flowchart of a data transmission method for an interface provided in an embodiment of this application.

[0048] Figure 10 is a timing diagram of an auxiliary link switching from an active state to a sleep state according to an embodiment of this application.

[0049] Figure 11 is a flowchart of a process performed by an initiating device to switch from an active state to a sleep state, according to an embodiment of this application.

[0050] Figure 12 is a flowchart of a receiving device switching from an active state to a sleep state according to an embodiment of this application.

[0051] Figure 13 is a schematic diagram of an interface device provided in an embodiment of this application.

[0052] Figure 14 is a schematic diagram of an interface device provided in an embodiment of this application. Detailed Implementation

[0053] The technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. In the description of the embodiments of this application, unless otherwise stated, " / " means "or," for example, A / B can mean A or B; "and / or" in this text is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, in the description of the embodiments of this application, "multiple" refers to two or more than two.

[0054] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more.

[0055] This application embodiment can be used for scenarios involving signal transmission between devices. Devices can be directly connected, or multiple devices can be connected via a routing device. Signal transmission (sending and receiving) between devices can be wired or wireless. Signal transmission between devices can be direct or via an interface device, and the signals can be transmitted to the internal processing unit of the device via its internal bus. The devices described in this application embodiment may include, but are not limited to, complete devices (i.e., electronic devices as described below), electronic components, chips, chipsets, or circuit boards equipped with chipsets. Additionally, chips may include chips with encapsulation or bare chips (dies).

[0056] Referring to Figure 1, Figure 1(a) shows a schematic diagram of the architecture of a communication system 10a that directly connects devices. Devices 101 and 102 are connected by a cable, with interface 1011 in device 101 and interface 1021 in device 102, to enable signal transmission between devices 101 and 102, such as the transmission of audio and video data and short-distance transmission of charging signals. For example, as shown in Figure 1(a), device 101 is a set-top box and device 102 is a television, with audio and video data transmitted between the interfaces of the set-top box and the television via a cable. Alternatively, device 101 may be a monitor and device 102 may be a game controller, with control information transmitted between the interfaces of the monitor and the game controller via a cable.

[0057] Figure 1(b) shows a schematic diagram of the architecture of a communication system 10b in which devices are connected via a routing device. Devices 103 to 105 are all connected to the routing device 106 via cables. Signal transmission between the interfaces of the devices can be performed through the routing device, such as the transmission of audio and video data and short-distance transmission of charging signals. In this scenario, each device's interface is connected to the interface of the routing device, and all signal transmission between device interfaces must be transmitted through the interface of the routing device. For example, device 103 is a monitor, device 104 is a set-top box, and device 105 is an audio player. The interface of the set-top box 104 transmits audio and video data to the interface of the routing device 106, and the interface of the routing device 106 transmits audio and video data to the interface of the monitor 103. Alternatively, the interface of the monitor 103 transmits audio data to the interface of the audio player 105 through the interface of the routing device 106.

[0058] In both of the aforementioned communication systems, the devices interconnected via interfaces can be various electronic devices, such as personal computers, laptops, mobile phones, digital cameras, digital televisions, audio equipment, DVD players, set-top boxes, game consoles, printers, mice, keyboards, and home appliances. The transmitted signals can be audio signals, video signals, internet data, IoT data, and charging signals, among others.

[0059] To accommodate diverse signal transmission needs, the industry has defined various interface specifications for signal transmission between devices, such as the Universal Serial Bus (USB) interface specification, the High Definition Multimedia Interface (HDMI) specification, the DisplayPort (DP) interface specification, the Unified Multimedia Interconnection (UMMI) interface specification, and the Peripheral Component Interconnect Express (PCI-Express) interface specification. Correspondingly, interfaces can be HDMI, miniHDMI, micro HDMI, Type-A, Type-B, Micro-B, and Type-C, etc.

[0060] For example, in the aforementioned short-distance transmission scenarios via cable interconnection, the connection between the set-top box / speaker and the TV, or the connection between the game console and the TV, can be made via a USB cable, following the USB interface standard; or via an HDMI cable, following the HDMI interface standard; or via a DP cable, following the DisplayPort interface standard.

[0061] Furthermore, this application embodiment also provides another interface standard that can replace the aforementioned interface standards (such as USB or HDMI interfaces): the Unified Media Interconnector (GPMI) interface, also known as the General Purpose Multiedia Interface. The GPMI interface can perform both data adaptation and transmission, and also provide charging functionality. Of course, the GPMI interface can also be other interface names; when the GPMI interface is replaced with another interface name, that other interface can be used to implement the functions of the GPMI interface in this application embodiment. The GPMI interface also supports direct device-to-device connection, or multi-device network connection (e.g., device-to-device connection via a routing device, or device-to-device connection via a docking station). A device can be any electronic device or component. When a device is an electronic device, it can be, for example, a personal computer, monitor, audio / video equipment, digital device, printer, router, game console, or in-vehicle device, and includes the GPMI interface. When a device is a component, it can be understood as any interface device (interface apparatus / interface device), and the interface device is the GPMI interface.

[0062] In this embodiment, when the device is an electronic device, the devices can be interconnected via their GPMI interfaces, similar to the scenario shown in Figure 1(a). For example, the GPMI interfaces of a set-top box and a television are interconnected via cables for signal transmission. When the device is an interface device, it can be a chip, i.e., chips can be interconnected. The chip can be an interface chip on an electronic device / cable / docking station / adapter / router. The docking station can connect to gigabit Ethernet ports, video graphics array (VGA) interfaces, HDMI, TF cards (trans-flash cards), SD cards (secure digital memory cards), charging ports, and USB ports, etc.

[0063] In this embodiment, when the device is a chip, the chip may include an interface module; that is, this application can be used in an interface module for interconnecting chips. This interface module can be understood as an IP integrated within the chip. Alternatively, the interface module can also be sold independently as a separate IP.

[0064] For example, when the chip is a system-on-chip (SoC), central processing unit (CPU), or graphics processing unit (GPU), this application can be applied to the interface modules of SoC, CPU, and GPU chips. When the chip is a small chip such as a die, the interface module can be understood as the transmitting and / or receiving circuits in the die. The chip can also be an input / output (I / O) die that only includes interface functions.

[0065] In this embodiment, when the device is an electronic device, Figure 2 shows a basic component diagram of an electronic device 20. The electronic device 20 includes an interface chip 200, which includes one or more adapters 201, one or more management control adapters 202, and an OR port 203. Alternatively, when the electronic device 20 is a routing device, the interface chip 200 only includes one or more ports 203. Each of the one or more adapters 201 can be coupled to an external component of the interface chip 200. The OR management control adapter 202 can be coupled to an external component of the interface chip 200 used for management and control. The port 203 can be coupled to a connector 204 of the electronic device 20, which is used to couple external devices of the electronic device 20. The one or more adapters 201 can be transmit / receive adapters. For example, when the adapter 201 is used for audio / video format adaptation, the adapter 201 can be an audio / video transmit / receive adapter. When the adapter 201 is used for third-party protocol adaptation, the adapter 201 can be a third-party protocol adapter.

[0066] For example, when port 203 is a downlink port, the transmitting adapter can be used to adapt the service information to be sent into service information that can be transmitted on port 203 of the interface chip, and then send the service information out through port 203. When port 203 is an uplink port, the receiving adapter 201 can be used to adapt the service information received from port 203 into service information that is processed internally by the electronic device 20 for internal processing. The management and control adapter 202 can be used to adapt control information.

[0067] Different electronic devices 20 can be combined with their basic components to form various different device types. For example, an electronic device 20 may include a source device with at least one downlink port and at least one audio / video transmission adapter, or a source device with at least one uplink port and an audio / video reception adapter, or a docking station device with at least one uplink port, at least one audio / video reception adapter, and at least one conventional audio / video interface, or a routing device with at least one downlink port and at least one uplink port, but without audio / video transmission and reception adapters, or a composite device having both uplink and downlink ports. This embodiment uses device-to-device interaction via an interface as an example, but it is not intended to limit the solution.

[0068] Based on the application scenario shown in Figure 1 and the component structure diagram of the electronic device shown in Figure 2, the interface between the two devices can include multiple link channels, thereby enabling signal transmission between the two devices through these multiple link channels, as shown in Figure 3, which is a schematic diagram of an interface provided in an embodiment of this application. In Figure 3, device A can interact with device B through the interface. The interface between device A and device B can include one or more ports, each port can include a main link (ML) and an auxiliary link (SL), and may also selectively include a power bus link (PL) and a cable information link (CL). The main link (high-speed link) is used for high-speed data transmission, such as the transmission of audio and video signals, while the auxiliary link (low-speed link) is mainly used for management and control between devices, such as device discovery, capability query, device configuration, and device control, and can also be used for low-speed data transmission and control message transmission. The cable information link can be used to transmit cable information, such as cable type and cable capability information. In some scenarios, the main link can include one or more lanes, such as 2 / 4 / 8 lanes. The more channels there are, the faster the data transmission speed. Each channel can have a transmitter and a receiver at each end. The main link can be configured with different modes based on the service requirements it carries, supporting different TX and RX combinations at both ends of the link to achieve unidirectional or bidirectional transmission. Auxiliary link channels can include one or more channels, each channel including an auxiliary link transmitter and an auxiliary link receiver.

[0069] Referring to Figure 4, which is a schematic diagram of an auxiliary link, Figure 4 schematically illustrates an auxiliary link including two channels, SL0 and SL1. The auxiliary link channels can be unidirectional, and each channel can include an auxiliary link transmitter and an auxiliary link receiver. The signal transmission directions of the two channels are different. Channel SL0, located on the device A side, can include the auxiliary link transmitter SLTX0, and channel SL1, located on the device A side, can include the auxiliary link receiver SLRX0. Similarly, auxiliary link channel SL0, located on the device B side, can include the auxiliary link transmitter SLTX1, and auxiliary link channel SL1, located on the device B side, can include the auxiliary link receiver SLRX1.

[0070] In existing auxiliary link channels, if a connection is established between device A and device B (e.g., device B is inserted into device A through an interface), the auxiliary link channel is always active. This active state means the auxiliary link can transmit and receive data normally. That is, when the auxiliary link channel is active, device A can send data to device B through the auxiliary link transmitter SLTX0 (device B receives data from device A through the auxiliary link receiver SLRX1), or device B can send data to device A through the auxiliary link transmitter SLTX1 (device A receives data from device B through the auxiliary link receiver SLRX0). Furthermore, when the auxiliary link channel is active, the system needs to provide high-precision clocks for all components on the auxiliary link channel, resulting in higher power consumption.

[0071] The method for auxiliary link state switching provided in this application embodiment can switch between multiple states based on its own service conditions. For example, when the auxiliary link channel has no service transmission for a certain period of time, the state of the auxiliary link channel can be switched from the active state to the sleep state, thereby saving power consumption of the auxiliary link channel. Based on the structural schematic diagram of the auxiliary link channel shown in Figure 4, and in conjunction with the embodiments shown in Figures 5 to 11, the method for auxiliary link state switching provided in this application embodiment will be described in more detail.

[0072] Referring to Figure 5, which is a schematic diagram of the auxiliary link state machine provided in an embodiment of this application. The device with the interface may also include a processor, such as a central processing unit or other types of dedicated processors, which can run the state machine shown in Figure 5 to control the switching of the auxiliary link state. Furthermore, the components used to run the auxiliary link state machine may include, but are not limited to, other programmable logic devices such as programmable logic controllers (PLCs). It should be noted that devices A and B shown in Figure 4 may each run the auxiliary link state machine shown in Figure 5. The auxiliary link state machine shown in Figure 5 schematically illustrates three states of the auxiliary link: disconnected state, sleep state, and active state. It can be understood that the auxiliary link channel may include more or fewer states. It should be noted that when the auxiliary link channel includes the two channels SL0 and SL1 shown in Figure 4, the states of these two channels are the same; that is, when the auxiliary link switches from one state to another, it can mean that both channels SL0 and SL1 switch from one state to another. Furthermore, the status of the auxiliary link described in the embodiments of this application may refer to the status of each component and line included in channel SL0 and channel SL1, such as including but not limited to the status of components such as auxiliary link transmitter SLTX0, auxiliary link receiver SLRX0, auxiliary link transmitter SLTX1, and auxiliary link receiver SLRX1.

[0073] In the three states shown in Figure 5, when the auxiliary link is in the disconnected state, it does not perform any work (i.e., the auxiliary link is inoperable), meaning that the various circuits and components included in the auxiliary link can be powered down as needed. When the auxiliary link is in the sleep state, the various circuits and components included in the auxiliary link are powered on, but a low-precision clock is used to drive the operating clock to reduce the power consumption of the auxiliary link; the sleep state can also be called a low-power state. In the sleep state, the auxiliary link cannot transmit or receive data. When the auxiliary link is in the active state, the various circuits and components included in the auxiliary link are powered on, and each channel on the auxiliary link can transmit and receive data normally. The operating clock of the auxiliary link is driven by a high-precision clock.

[0074] In this embodiment, after devices A and B are powered on, or after a connection is established between devices A and B (e.g., a port of device B is inserted into a port of device A), the auxiliary link can be in a sleep state. In the sleep state, several state transitions are possible: State transition one: switching from sleep state to active state. If the auxiliary link needs to perform tasks such as message transmission, it can switch from sleep state to active state. State transition two: switching from sleep state to disconnected state. In the sleep state, if the auxiliary link does not need to perform any tasks (i.e., any auxiliary link receiver does not receive an indication signal), it can switch from sleep state to disconnected state; furthermore, in the sleep state, if devices A and B are disconnected (e.g., either device A or device B is powered off, or a port of device B is unplugged from a port of device A), it can also switch from sleep state to disconnected state. In the active state, several state transitions are possible: State transition three: switching from active state to sleep state. For example, if there is no service transmission for a continuous timing period (e.g., 2 seconds), it can switch from active state to sleep state. State transition four: switching from active state to disconnected state. In the active state, if device A and device B disconnect (e.g., either device A or device B is powered off, or the port of device B is unplugged from the port of device A), the active state can switch to the disconnected state. Specifically, when the auxiliary link switches from sleep to active state, either device A or device B must meet the following conditions: the auxiliary link transmitter must continuously output a high level for a preset threshold t3, and the auxiliary link receiver must continuously receive a high level for a preset threshold t2. Conversely, when the auxiliary link switches from active to sleep state, either device A or device B must meet the following conditions: the auxiliary link transmitter must continuously output a low level for a preset threshold t6, and the auxiliary link receiver must continuously receive a low level for a preset threshold t5.

[0075] In the application documents, state switching refers to the transition from one state to another, also known as state jump or state transition. For example, switching from a sleep state to an active state is also called entering the active state from the sleep state, or that is, jumping from the sleep state to the active state; switching from an active state to a sleep state is also called entering the sleep state from the active state, or that is, jumping from the active state to the sleep state.

[0076] Based on the auxiliary link structure shown in Figure 4 and the auxiliary link state machine shown in Figure 5, this embodiment of the application takes device A shown in Figure 4 as the state switching initiator as an example, and describes in detail the process of the auxiliary link switching from a sleep state to an active state in conjunction with the interaction flow shown in Figure 6 and the timing shown in Figure 7. Figure 6 is the interaction flow 600 between the components shown in Figure 4, which includes the following steps 601 to 604. Device A and device B may contain one or more ports. In this embodiment of the application, it is described as if device A and device B contain one port, and the port communicating with port 0 of device A is port 1 of device B. In the case of multiple ports, the auxiliary link of each pair of ports can execute the following process to switch states.

[0077] Step 601: The auxiliary link transmitter SLTX0 at port 0 of device A begins to continuously transmit a first transmission signal. This first transmission signal can be, for example, a high-level transmission signal, meaning that the auxiliary link transmitter SLTX0 is continuously driven to a high level. The duration of SLTX0 remaining high does not exceed a preset time t1. As can be seen from the auxiliary link structure shown in Figure 4, the auxiliary link transmitter SLTX0 and the auxiliary link receiver SLRX1 are located on opposite sides of channel SL0. The first transmission signal transmitted by the auxiliary link transmitter SLTX0 can be detected by the auxiliary link receiver SLRX1. It can be assumed that if the auxiliary link transmitter SLTX0 transmits a high-level transmission signal, the signal received by the auxiliary link receiver SLRX1 will be a high-level reception signal; conversely, if the auxiliary link transmitter SLTX0 transmits a low-level transmission signal, the signal received by the auxiliary link receiver SLRX1 will be a low-level reception signal. Due to signal attenuation during transmission, the received signal is less than the transmitted signal; that is, a high-level reception signal is usually less than or equal to a high-level transmission signal, and a low-level reception signal is also usually less than or equal to a low-level transmission signal. Table 1 gives a typical auxiliary link channel electrical parameter value.

[0078] Table 1 Electrical Parameters of Auxiliary Links

[0079] Before the auxiliary link transmitter SLTX0 on port 0 of device A starts continuously transmitting the first transmission signal, the process further includes device A determining that the auxiliary link of port 0 enters the active state from the sleep state, such as when the auxiliary link of port 0 has a message to transmit, or for other reasons determined internally by device A (such as testing requirements).

[0080] In step 602, the auxiliary link receiver SLRX1 at port 1 of device B detects that the duration of the first received signal is greater than or equal to a preset time t2. This first received signal is a high-level received signal, meaning that the auxiliary link receiver SLRX1 at port 1 of device B detects a high level for at least the preset time t2. The auxiliary link transmitter SLTX1 at port 1 of device B then begins to continuously transmit a first transmitted signal, which can be a high-level transmitted signal, thus starting and continuously driving the auxiliary link receiver SLTX1 to a high level. As can be seen from the auxiliary link structure shown in Figure 4, the auxiliary link transmitter SLTX1 and the auxiliary link receiver SLRX0 are located on opposite sides of channel SL1. The first transmitted signal transmitted by the auxiliary link transmitter SLTX1 can be detected by the auxiliary link receiver SLRX0. It can be assumed that if the auxiliary link transmitter SLTX1 transmits a high-level transmitted signal, the signal received by the auxiliary link receiver SLRX0 will be a high-level received signal; conversely, if the auxiliary link transmitter SLTX1 transmits a low-level transmitted signal, the signal received by the auxiliary link receiver SLRX0 will be a low-level received signal. Due to signal attenuation during transmission, the received signal is less than the transmitted signal; that is, a high-level received signal is usually less than or equal to a high-level transmitted signal, and a low-level received signal is also usually less than or equal to a low-level transmitted signal. The electrical parameter values ​​for the auxiliary link channel are shown in Table 1.

[0081] Step 603: Within a preset time t1 from the start of continuously transmitting the first transmission signal from port 0 (i.e., within a preset time t1 from the start of driving the auxiliary link transmitter SLTX0 to a high level from port 0), the auxiliary link receiver SLRX0 of port 0 of device A detects that the duration of the first received signal is greater than or equal to a preset time t2, and the auxiliary link transmitter SLTX0 continuously transmits the first transmission signal for a time greater than or equal to a preset time t3. That is, the auxiliary link receiver SLRX1 of port 0 of device A detects that the high level lasts for at least a preset time t2, and the auxiliary link transmitter SLTX0 of port 0 of device A is driven to a high level for at least a preset time t3, and the auxiliary link of port 0 enters the active state.

[0082] Step 604: The auxiliary link transmitter SLTX1 of device B continuously transmits the first transmission signal for a duration greater than or equal to a preset time t3. That is, after device B drives the auxiliary link transmitter SLTX1 to be at a high level for a duration of t3, the auxiliary link of port 1 of device B enters the active state.

[0083] It should be noted that preset time t1, preset time t2, and preset time t3 all represent a period of time; and the length of preset time t1 is greater than the length of preset time t3, and the length of preset time t3 is greater than the length of preset time t2.

[0084] As can be seen from the interaction flow 600 shown in Figure 6, this embodiment of the application indicates the transition from sleep state to active state by driving a high level for a period of time on both the sending end and the receiving end, thus avoiding the problem of inconsistent states between the sending and receiving parties.

[0085] As can be seen from the interaction flow 600 shown in Figure 6 and the auxiliary link structure diagram shown in Figure 4, the embodiments of this application reuse the channel transmitter SLTX and receiver SLRX of the auxiliary link, and use the first transmission signal being high and the duration of the first transmission signal being high, the first reception signal being high and the duration of the first reception signal being high to indicate the switch from sleep state to active state. This eliminates the need to introduce new channels, saving equipment area and cost.

[0086] Based on the interaction flow shown in Figure 6, the following description uses the first transmitted signal as a high level, preset time t1 as Ttimeout_active, preset time t2 as Tslrx_active, and preset time t3 as Tsltx_active, and further describes the specific timing scenario shown in Figure 7. In addition, in the timing diagram shown in Figure 7, SLTX0 represents the level of the signal transmitted by the auxiliary link transmitter SLTX0; schematically, this signal can also represent the level of the signal received by the auxiliary link receiver SLRX1; SLRX0 represents the level of the signal received by the auxiliary link receiver SLRX0; schematically, this signal can also represent the level of the signal transmitted by the auxiliary link transmitter SLTX1; link_state0 represents the state of the auxiliary link at port 0; and link_state1 represents the state of the auxiliary link at port 1.

[0087] Based on the interaction timing shown in Figure 7, firstly, the initiating end starts and continuously drives the auxiliary link transmitter SLTX0 to a high level; secondly, the responding end detects that the auxiliary link receiver SLRX1 is continuously at a high level (Tslrx_active), and the responding end starts and continuously drives the auxiliary link transmitter SLTX1 to a high level; thirdly, the initiating end detects that the auxiliary link receiver SLRX0 is continuously at a high level (Tslrx_active), at which point the duration of the high level output by the initiating end through the auxiliary link transmitter SLTX0 has reached Tsltx_active, and the auxiliary link at port 0 switches from sleep state to active state; fourthly, the responding end continuously drives the auxiliary link transmitter SLTX1 to output a high level for a duration reaching Tsltx_active, and the auxiliary link at port 1 switches from sleep state to active state.

[0088] As can be seen from the embodiments shown in Figures 6 and 7, either device A or device B must meet the following conditions: within a preset time t1, the duration for which the auxiliary link transmitter outputs a high-level signal reaches a preset time t3, and the duration for which the auxiliary link receiver receives a high-level signal reaches a preset time t2, then the auxiliary link switches from a sleep state to an active state. However, if either device A or device B does not meet the above conditions, it can switch from a sleep state to a disconnected state. The following description, using device A as the initiator and the execution entity, along with the flowchart shown in Figure 8, illustrates the process of switching from a sleep state to an active or disconnected state. Unlike the embodiments shown in Figures 6 and 7, the embodiment shown in Figure 8 also illustrates the process of switching from a sleep state to a disconnected state. The state switching process executed by device A in Figure 8 includes steps 801 to 808.

[0089] Step 801: Start and continuously drive the auxiliary link transmitter SLTX0 to a high level.

[0090] Step 802: Within a preset time t1, detect whether the auxiliary link receiver SLRX0 receives a high level. If the auxiliary link receiver SLRX0 receives a high level within the preset time t1, proceed to step 803; if the auxiliary link receiver SLRX0 does not receive a high level within the preset time t1, proceed to step 806.

[0091] Step 803: Within a preset time t1, detect whether the duration of the high-level signal received by the auxiliary link receiver SLRX0 is greater than or equal to a preset time t2, i.e., whether SLRX0 is detected to be at a high level for at least t2 hours. If the duration of the high-level signal received by the auxiliary link receiver SLRX0 is greater than or equal to the preset time t2, proceed to step 804; if the duration of the high-level signal received by the auxiliary link receiver SLRX0 is less than the preset time t2, proceed to step 806.

[0092] Step 804: Determine whether the duration of the auxiliary link transmitter SLTX0 continuously driving a high level has reached the preset time t3. If the duration of the auxiliary link transmitter SLTX0 continuously driving a high level has reached the preset time t3, proceed to step 805; otherwise, proceed to step 806.

[0093] Step 805: Switch from sleep state to active state.

[0094] Step 806: When the preset time t1 arrives, determine the number of times steps 801 to 804 have been executed. If the number of executions is greater than or equal to the preset number n, proceed to step 807; if the number of executions is less than n, proceed to step 808. Here, n is an integer greater than or equal to 1.

[0095] If the preset number of times n equals 1, step 806 can also be: step 806a, when the preset time t1 is reached, execute step 807.

[0096] Step 807: Switch from sleep state to disconnected state.

[0097] Step 808: Start continuously driving the auxiliary link transmitter SLTX0 to a low level for a preset duration, then execute step 801.

[0098] In step 808, when the preset time t1 is reached, device A drives SLTX0 to a high level for at least t1 time. At this time, it starts to continuously drive the auxiliary link transmitter SLTX0 to a low level. After continuously driving the auxiliary link transmitter SLTX0 to a low level for Tretry_active time, step 801 is executed, that is, the auxiliary link transmitter SLTX0 is driven to a high level. This drive level design can form a rising edge, increasing the success rate of the receiver detecting the state switch.

[0099] In the state switching process shown in Figure 8 above, if steps 801 to 804 are executed once and the conditions for switching to the active state are not met (i.e., the handshake between the two devices times out), the process can be repeated multiple times (e.g., n-1 times). If the handshake still times out, the process can switch to the disconnected state. In other possible implementations, if steps 801 to 804 are executed once and the handshake times out, the process can directly switch to the disconnected state.

[0100] The embodiments shown in Figures 6 to 8 above illustrate the process of the auxiliary link switching from a sleep state to other states. It should be noted that after the auxiliary link switches from a sleep state to an active state, in order to compensate for the time difference between the state transitions of the two channels in the auxiliary link, a preset time Twait can be waited before data transmission and reception begin.

[0101] When the auxiliary link is in an active state, if no service transmission is detected for a preset duration on the timing wheel, the auxiliary link can switch from the active state to a sleep state. Based on the structure of the auxiliary link shown in Figure 4 and the auxiliary link state machine shown in Figure 5, this embodiment of the application takes device A shown in Figure 4 as the state switching initiator as an example, and describes in detail the process of the auxiliary link switching from the active state to the sleep state in conjunction with the interaction flow shown in Figure 9 and the timing shown in Figure 10. Figure 9 is the interaction flow 900 between the components shown in Figure 4, which includes the following steps 901 to 904.

[0102] Step 901: The auxiliary link transmitter SLTX0 at port 0 of device A continuously transmits a second transmission signal. This second transmission signal can be, for example, a low-level transmission signal, meaning it starts and continuously drives the auxiliary link transmitter SLTX0 to a low level. As shown in the auxiliary link structure in Figure 4, the auxiliary link transmitter SLTX0 and the auxiliary link receiver SLRX1 are located on opposite sides of channel SL0. The second transmission signal transmitted by the auxiliary link transmitter SLTX0 can be detected by the auxiliary link receiver SLRX1. It can be assumed that if the auxiliary link transmitter SLTX0 transmits a high-level transmission signal, the signal received by the auxiliary link receiver SLRX1 will be a high-level reception signal; conversely, if the auxiliary link transmitter SLTX0 transmits a low-level transmission signal, the signal received by the auxiliary link receiver SLRX1 will be a low-level reception signal. Due to signal attenuation during transmission, the received signal is less than the transmitted signal; that is, a high-level reception signal is usually less than or equal to a high-level transmission signal, and a low-level reception signal is also usually less than or equal to a low-level transmission signal. The electrical parameter values ​​of the auxiliary link channel are shown in Table 1.

[0103] In step 902, the auxiliary link receiver SLRX1 at port 1 of device B detects that the duration of the second received signal is greater than or equal to a preset time t5. That is, the auxiliary link receiver SLRX1 at port 1 of device B detects a low level for at least the preset time t5. The auxiliary link transmitter SLTX1 of device B then continuously transmits a second transmitted signal, which is a low-level transmitted signal. As can be seen from the auxiliary link structure shown in Figure 4, the auxiliary link transmitter SLTX1 and the auxiliary link receiver SLRX0 are located on opposite sides of channel SL1. The second-level transmitted signal transmitted by the auxiliary link transmitter SLTX1 can be detected by the auxiliary link receiver SLRX0. It can be assumed that if the auxiliary link transmitter SLTX1 transmits a high-level transmitted signal, the auxiliary link receiver SLRX0 will receive a high-level received signal; conversely, if the auxiliary link transmitter SLTX1 transmits a low-level transmitted signal, the auxiliary link receiver SLRX0 will receive a low-level received signal. Due to signal attenuation during transmission, the received signal is less than the transmitted signal; that is, a high-level received signal is usually less than or equal to a high-level transmitted signal, and a low-level received signal is also usually less than or equal to a low-level transmitted signal. The electrical parameter values ​​for the auxiliary link channel are shown in Table 1.

[0104] In step 902, if the auxiliary link receiver SLRX1 on port 1 of device B detects a low level for at least a preset time t5, and agrees to enter sleep mode, device B will continuously drive the auxiliary link transmitter SLTX1 to a low level. If not, it will remain in the active state and transmit and receive data normally, ending the process.

[0105] Step 903: Within a preset time t4 from the start of continuously transmitting the second transmission signal from port 0 (i.e., within a preset time t4 from the start of driving the auxiliary link transmitter SLTX0 to a low level from port 0), the auxiliary link receiver SLRX0 of port 0 of device A detects that the duration of the second received signal is greater than or equal to a preset time t5, and the auxiliary link transmitter SLTX0 continuously transmits the second transmission signal for a time greater than or equal to a preset time t6. That is, the auxiliary link receiver SLRX1 detected by port 0 of device A is at a low level for at least a preset time t5, and port 0 of device A drives the auxiliary link receiver SLTX0 to a low level for at least a preset time t6, and the auxiliary link of port 0 enters a sleep state.

[0106] Step 904: The auxiliary link transmitter SLTX1 of device B continuously transmits the second transmission signal for a duration greater than or equal to a preset time t6, and the auxiliary link of port 1 of device B enters a sleep state.

[0107] It should be noted that preset time t4, preset time t5, and preset time t6 all represent a period of time; and the length of preset time t4 is greater than the length of preset time t6, and the length of preset time t6 is greater than the length of preset time t5.

[0108] As can be seen from the interaction flow 900 shown in Figure 9, this embodiment of the application indicates the transition from the active state to the sleep state by driving both the sending end and the receiving end to a low level for a period of time, thus avoiding the problem of inconsistent states between the sending and receiving ends.

[0109] As can be seen from the interaction flow 900 shown in Figure 9 and the auxiliary link structure diagram shown in Figure 4, the embodiments of this application use the transmitter SLTX and receiver SLRX of the auxiliary link to indicate the switch from the active state to the sleep state by using the second transmit signal being low and the duration of the second transmit signal being low, the second receive signal being low and the duration of the second receive signal being low. This eliminates the need to introduce new channels and saves equipment area and cost.

[0110] Based on the interaction flow shown in Figure 9, the following description will further elaborate on the specific timing scenario shown in Figure 10, with the second transmitted signal being at a low level, preset time t4 being Ttimeout_sleep, preset time t5 being Tslrx_sleep, and preset time t6 being Tsltx_sleep. Furthermore, in the timing diagram shown in Figure 10, SLTX0 represents the level of the signal transmitted by the auxiliary link transmitter SLTX0; schematically, this signal can also represent the level of the signal received by the auxiliary link receiver SLRX1; SLRX0 represents the level of the signal received by the auxiliary link receiver SLRX0; schematically, this signal can also represent the level of the signal transmitted by the auxiliary link transmitter SLTX1; link_state0 represents the state of the auxiliary link at port 0; and link_state1 represents the state of the auxiliary link at port 1.

[0111] Based on the interaction timing shown in Figure 9, firstly, device A (i.e., the initiating end) starts and continuously drives the auxiliary link transmitter SLTX0 to a low level; secondly, device B (i.e., the responding end) detects that the auxiliary link receiver SLRX1 is continuously at a low level (Tslrx_sleep), and device B starts and continuously drives the auxiliary link transmitter SLTX1 to output a low level; thirdly, device A detects that the auxiliary link receiver SLRX0 is continuously at a low level (Tslrx_sleep), and device A continues to drive the auxiliary link transmitter SLTX0 to continuously output a low-level signal. When the duration of the continuous low-level signal output by the auxiliary link transmitter SLTX0 reaches Tsltx_sleep, the channel SL0 of the auxiliary link switches from the active state to the sleep state; fourthly, device B continuously drives the auxiliary link transmitter SLTX1 to output a low level for a duration of Tsltx_sleep, and the channel SL1 of the auxiliary link switches from the active state to the sleep state.

[0112] As can be seen from the embodiments shown in Figures 9 and 10, either device A or device B must meet the following conditions: within a preset time t4, the duration for which the auxiliary link transmitter outputs a low-level signal reaches a preset time t6, and the duration for which it receives a low-level signal from the auxiliary link receiver reaches a preset time t5, then the auxiliary link switches from the active state to the sleep state. However, if either device A or device B does not meet the above conditions, it can remain in the active state. The following describes the process of switching from the active state to the sleep state, using device A as the initiator and the execution subject as an example, in conjunction with the flowchart shown in Figure 11. The process 1100 executed by device A in Figure 11, which switches from the active state to the sleep state, includes steps 1101 to 1106.

[0113] Step 1101: Start and continuously drive the auxiliary link transmitter SLTX0 low to initiate the "enter sleep process".

[0114] Step 1102: Within a preset time t4, detect whether the duration of the low-level signal received by the auxiliary link receiver SLRX0 is greater than or equal to the preset time t5, i.e., whether the auxiliary link receiver SLRX0 is detected to be at a low level for at least t5 consecutive times. If the duration of the low-level signal received by the auxiliary link receiver SLRX0 is greater than or equal to the preset time t5, proceed to step 1103; if the duration of the low-level signal received by the auxiliary link receiver SLRX0 is less than the preset time t5, proceed to step 1106.

[0115] Step 1103: Continuously drive the auxiliary link transmitter SLTX0 to a low level. If the duration of continuously driving the auxiliary link transmitter SLTX0 to output a low level reaches a preset time t6, proceed to step 1104; otherwise, proceed to step 1106.

[0116] Step 1104: End the "Enter Sleep Process" and the auxiliary link on device A enters sleep mode from the active state.

[0117] Step 1105: Within a preset time t4, check whether the auxiliary link receiver SLRX0 receives the SOB (start of burst) signal. If the auxiliary link receiver SLRX0 receives the SOB signal, it indicates that the auxiliary link has a service to transmit, and proceed to step 1106. If the auxiliary link receiver SLRX0 does not receive the SOB signal within the preset time t4, then proceed to step 1106 when the preset time t4 expires.

[0118] Step 1106: End the "Enter Sleep Process". The auxiliary link on device A remains active, driving the auxiliary link transmitter SLTX0 to output a high level. If the continuous drive time reaches the preset time Twait, the auxiliary link can transmit and receive data normally.

[0119] In the process of switching from the active state to the sleep state, the execution process 1200 on the device B side includes steps 1201 to 1206.

[0120] Step 1201: The auxiliary link receiver SLRX1 of device B detects that SBRX1 is at a low level for a duration of t5.

[0121] Step 1202: Determine whether to agree to enter sleep mode. If you agree to switch to sleep mode, proceed to step 1203. If you do not agree to switch to sleep mode, remain in the active state and send and receive data normally.

[0122] Step 1203: Start and continuously drive the auxiliary link transmitter SLTX1 to a low level. After the duration of continuously driving SLTX1 to a low level reaches t6 (Tsltx_sleep), enter sleep mode.

[0123] It should be noted that if device A (i.e., the initiating end) initiates a "sleep entry process," it can only be terminated through the procedures shown in steps 1102 to 1106 above. It cannot be cancelled midway to avoid misalignment of the auxiliary link states on device A and device B. Furthermore, if device B (i.e., the responding end) agrees to switch to sleep mode, it will start and continuously drive the auxiliary link transmitter SLTX1 to a low level. This drive must continue for t6 (Tsltx_sleep) hours before the process can end; it cannot be cancelled midway to avoid misalignment of the transmitting and receiving states. Additionally, to avoid mismatch between the transmitting and receiving states on both sides of the auxiliary link, preferably, the length of the preset time Twait is greater than the length of (preset time t6 - preset time t5).

[0124] To ensure successful handshake between the sender and receiver on both sides of the auxiliary link and achieve state matching between the sender and receiver, this invention provides the meaning and recommended values ​​of various time parameters as shown in Table 2.

[0125] Table 2 Typical Time Parameter Values

[0126] In the embodiments described in this invention, the present application embodiments indicate the transition from an active state to a sleep state by driving both the transmitting end and the receiving end to a high level for a period of time, and indicate the transition from a sleep state to an active state by driving both the transmitting end and the receiving end to a low level for a period of time. It can be understood that the reverse is also possible, that is, the transition from an active state to a sleep state is indicated by driving both the transmitting end and the receiving end to a high level for a period of time, and so on.

[0127] It is understood that, in order to implement the functions in the above embodiments, the transmitting and receiving sides include hardware structures and / or software modules corresponding to perform each function. Those skilled in the art should readily recognize that, based on the units and method steps of the various examples described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application scenario and design constraints of the technical solution.

[0128] Figures 13 and 14 are schematic diagrams of possible interface devices provided in embodiments of this application. These interface devices can be used to implement the functions of the transmitting or receiving side in the above method embodiments, and thus can also achieve the beneficial effects of the above method embodiments. In the embodiments of this application, the interface device can be one of device 1011 or device 1021 shown in Figure 1, or one of devices 103 to 106 shown in Figure 1, or the device shown in Figure 2 above, or it can be applied to the interface module (such as a chip or chipset) of these devices. The relevant interface devices are used to implement interface data transmission, for example, they can be used to implement the GPMI interface function described above.

[0129] As shown in Figure 13, the interface device 130 includes a processing module 1310 and a transceiver module 1320. The interface device 130 is used to implement the functions of the transmitting side or the receiving side in the method embodiments shown in Figures 6, 7, 8, 9, 10, 11 and 13.

[0130] When the interface device 130 is used to implement the transmitting side functions in the method embodiments shown in Figures 6, 7, 8, 9, 10, and 11: the processing module 1310 can be used to generate a first transmitting signal, a second transmitting signal, and a data signal, and to switch the auxiliary link from a sleep state to an active state, or from an active state to a sleep state. Alternatively, the processing module 1310 can be used to generate a high-level signal or a low-level signal. The transceiver module 1320 is used to transmit the first transmitting signal, the second transmitting signal, and the data signal. Alternatively, the transceiver module 1320 can be used to transmit a high-level signal or a low-level signal.

[0131] When interface device 130 is used to implement the receiving side functions in the method embodiments shown in Figures 6, 7, 9, 10, and 13: transceiver module 1320 is used to receive a first received signal, a second received signal, or a data signal. Alternatively, transceiver module 1320 is used to receive a high-level signal or a low-level signal. Processing module 1310 is used to switch the auxiliary link from a sleep state to an active state, or from an active state to a sleep state, based on the high-level signal or the low-level signal.

[0132] For a more detailed description of the above-mentioned processing module 1310 and transceiver module 1320, please refer to the relevant descriptions in the method embodiments shown in Figures 6, 7, 8, 9, 10, 11 and 13.

[0133] As shown in Figure 14, the interface device 140 includes a processor 1410 and an interface circuit 1420. The processor 1410 and the interface circuit 1420 are coupled to each other. It is understood that the interface circuit 1420 can be a transceiver or an input / output interface. Optionally, the interface device 140 may also include a memory 1430 for storing instructions executed by the processor 1410, or storing input data required by the processor 1410 to execute instructions, or storing data generated after the processor 1410 executes instructions.

[0134] When the interface device 140 is used to implement the methods shown in Figures 6, 7, 8, 9, 10, 11, and 13, the processor 1410 is used to implement the functions of the processing module 1310, and the interface circuit 1420 is used to implement the functions of the transceiver module 1320. The interface circuit 1420 can be an interface chip or a separate IP module integrated into the interface chip.

[0135] When the interface device 140 is an interface chip applied to the transmitting side, the transmitting side interface chip implements the functions of the transmitting side in the above method embodiment. The transmitting side interface chip sends data to the receiving side, which can be understood as the data being first generated by other modules (such as source data components) in the transmitting side, and then sent by these modules to the transmitting side interface chip.

[0136] When the interface device 140 is an interface chip applied to the receiving side, the interface chip on the receiving side implements the functions of the receiving side in the above method embodiment. The interface chip on the receiving side receives data from the transmitting side, which can be understood as the data being first received by the interface chip on the receiving side, and then sent by the interface chip on the receiving side to the data processing component on the receiving side.

[0137] In this application, entity A sends information to entity B, either directly or indirectly through other entities. Similarly, entity B receives information from entity A, either directly or indirectly through other entities. Entities A and B can be the sending or receiving sides, or modules within the sending or receiving side. Data transmission and reception can be information exchange between the sending and receiving sides, such as between a source device and a destination device; data transmission and reception can also be information exchange between different modules within a single device, such as between an interface chip on the sending side and an interface chip on the receiving side.

[0138] It is understood that the processor in the embodiments of this application may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor may be a microprocessor or any conventional processor.

[0139] The method steps in the embodiments of this application can be implemented in hardware or in software instructions executable by a processor. The software instructions can consist of corresponding software modules, which can be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. The storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Alternatively, the ASIC can reside in a base station or terminal. The processor and storage medium can also exist as discrete components in a base station or terminal.

[0140] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of this application are performed entirely or partially. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user equipment, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a digital video optical disc; or it can be a semiconductor medium, such as a solid-state drive. The computer-readable storage medium may be a volatile or non-volatile storage medium, or may include both types of storage media.

[0141] In the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terminology and / or descriptions of different embodiments are consistent and can be referenced by each other. The technical features of different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0142] In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, or B exists alone, where A and B can be singular or plural. In the textual description of this application, the character " / " generally indicates that the preceding and following related objects have an "or" relationship. "Including at least one of A, B, and C" can mean: including A; including B; including C; including A and B; including A and C; including B and C; including A, B, and C.

[0143] It is understood that the various numerical designations used in the embodiments of this application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this application. The order of the process numbers described above does not imply the order of execution; the execution order of each process should be determined by its function and internal logic.

Claims

1. A method for auxiliary link state switching, applied to a first port, the first port including a first auxiliary link, the first auxiliary link including a first auxiliary link transmitter and a first auxiliary link receiver, characterized in that, include: The first auxiliary link transmitter sends a first transmission signal, which is a first level signal; The first auxiliary link receiver receives the first received signal; wherein, Under the condition that the preset conditions are met within a first preset time, the first auxiliary link switches from the first state to the second state; The preset conditions include: the time during which the first auxiliary link receiver continuously receives the first received signal is greater than or equal to a second preset time, and the time during which the first auxiliary link transmitter starts continuously transmitting the first transmitted signal is greater than or equal to a third preset time. The first preset time is a period of time starting from the moment the first auxiliary link transmitter sends the first transmission signal.

2. The method according to claim 1, characterized in that, The first state is a sleep state, the second state is an active state, the first level signal is a high level signal, and the first received signal is a high level signal.

3. The method according to claim 2, characterized in that, The method further includes: If the first preset time is reached but the first preset condition is not met, the first auxiliary link transmitter sends a second transmission signal, which is a second level signal. When the transmission duration of the second transmission signal reaches a fourth preset time, the first auxiliary link transmitter transmits the first transmission signal. The second level signal is a low level signal.

4. The method according to claim 2 or 3, characterized in that, The method further includes: If the first preset time is reached but the first preset condition is not met, the first auxiliary link switches from the first state to the third state; wherein, the third state is the disconnected state.

5. The method according to claim 2, characterized in that, After the first auxiliary link switches from the first state to the second state, the method further includes: After a fifth preset time, the first auxiliary link transmitter sends a data signal.

6. The method according to claim 1, characterized in that, The first state is an active state, and the second state is a sleep state; the first level signal is a low level signal, and the first received signal is a low level signal.

7. The method according to claim 6, characterized in that, The method further includes: If, within the first preset time period, the first auxiliary link receiver detects the start of a sudden event, the first auxiliary link maintains its first state unchanged. The first auxiliary link transmitter sends a second transmission signal, which is a second level signal; The second level signal is a high level signal.

8. The method according to claim 6, characterized in that, The method further includes: If the first preset time is reached but the first preset condition is not met, the first auxiliary link maintains its first state unchanged. The first auxiliary link transmitter sends a second transmission signal, which is a second level signal; The second level signal is a high level signal.

9. The method according to claim 7 or 8, characterized in that, The method further includes: If the duration for which the first auxiliary link transmitter continuously transmits the second transmission signal is greater than or equal to the third preset time, the first auxiliary link transmitter transmits a data signal after a fifth preset time.

10. The method according to claim 1, characterized in that, The length of the first preset time is greater than the length of the third preset time; The length of the third preset time is greater than the length of the second preset time.

11. The method according to any one of claims 1 to 10, characterized in that, The first port further includes a first main link, wherein the first main link is used to transmit high-speed signals and the first auxiliary link is used to transmit low-speed signals.

12. A method for auxiliary link state switching, applied to a second port, the second port including a second auxiliary link, the second auxiliary link including a second auxiliary link transmitter and a second auxiliary link receiver, characterized in that, include: The second auxiliary link receiver receives the first received signal; When preset conditions are met, the second auxiliary link transmitter sends a first transmission signal. The preset conditions include: the second auxiliary link receiver continuously receives the first transmission signal for a time greater than or equal to a second preset time. When the second auxiliary link transmitter starts continuously transmitting the first transmission signal for a period of time that reaches a third preset time, the second auxiliary link switches from the first state to the second state.

13. The method according to claim 12, characterized in that, The first state is a sleep state, and the second state is an active state; the first received signal is a high-level signal, and the first transmitted signal is a high-level signal.

14. The method according to claim 12, characterized in that, The first state is an active state, and the second state is a sleep state; the first received signal is a low-level signal, and the first transmitted signal is a low-level signal.

15. The method according to any one of claims 12 to 14, characterized in that, The length of the first preset time is greater than the length of the third preset time; The length of the third preset time is greater than the length of the second preset time.

16. The method according to any one of claims 12 to 15, characterized in that, The second port also includes a first main link, wherein the first main link is used to transmit high-speed signals and the first auxiliary link is used to transmit low-speed signals.

17. An interface device, characterized in that, include: The transmitting module is used to transmit a first transmitting signal, wherein the first transmitting signal is a first level signal; The receiving module is used to receive the first received signal; The processing module is configured to switch the first auxiliary link from a first state to a second state within a first preset time period and under preset conditions; wherein, The preset conditions include: the time during which the first auxiliary link receiver continuously receives the first received signal is greater than or equal to a second preset time, and the time during which the first auxiliary link transmitter starts continuously transmitting the first transmitted signal is greater than or equal to a third preset time. The first preset time is a period of time starting from the moment the first auxiliary link transmitter sends the first transmission signal.

18. An interface device, characterized in that, include: The receiving module is used to receive the first received signal; The transmitting module is used to transmit a first transmitting signal when a preset condition is met, the preset condition including: the second auxiliary link receiver continuously receives the first receiving signal for a time greater than or equal to a second preset time; The processing module is used to switch the second auxiliary link from a first state to a second state when the time for which the second auxiliary link transmitter has been continuously transmitting the first transmission signal reaches a third preset time.

19. An interface device, characterized in that, Includes modules for performing the method as described in any one of claims 1-16.

20. An interface device, characterized in that, The interface device includes a processor and a memory, the memory being used to store computer execution instructions, which, when executed by the processor, execute the method as described in any one of claims 1-16.

21. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed on the interface device, cause the interface device to perform the method as described in any one of claims 1-16.

22. A computer program product, characterized in that, Includes computer instructions that, when executed on an interface device, cause the interface device to perform the method as described in any one of claims 1-16.