Data processing method, and device

Abstract

The present application relates to the technical field of data processing. Provided are a data processing method, and a device. The method is applied to an electronic device, which runs a host system and a virtual machine system. The method comprises: in response to a trigger operation for a target video, a virtual machine system sending a memory allocation instruction to a host system, wherein the memory allocation instruction is used for instructing the host system to allocate a first target memory, and the first target memory is used for storing decoded video data; the host system allocating the first target memory on the basis of the memory allocation instruction; the host system invoking a decoder to decode video data to be decoded of the target video, so as to obtain decoded video data; the host system storing the decoded video data in the first target memory; and the host system invoking a graphics processing unit to read the decoded video data from the first target memory, and rendering the decoded video data. Therefore, the latency is effectively reduced, the video processing time is shortened, and the display frame rate of video data is improved.

Description

A data processing method and device

[0001] This application claims priority to Chinese Patent Application No. 202411852520.5, filed on December 13, 2024, entitled “A Data Processing Method and Apparatus”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of data processing technology, and in particular to a data processing method and apparatus. Background Technology

[0003] With the development of self-media technology and the increasing volume of information, video data generated by self-media can be processed using virtualization technology. Typically, electronic devices can create multiple simulated environments or dedicated resources based on a single physical hardware system. Software called a "hypervisor" can connect directly to the hardware, thereby dividing a system into distinct, independent, and secure environments, i.e., virtual machines (VMs).

[0004] In related technologies, virtual machines can use dedicated hardware to decode video data, render the decoded video data, and send it to the display to achieve playback. However, when the amount of video data is large, the entire video data decoding and playback process using the above method takes a long time. This affects the display frame rate of the video data, resulting in poor playback quality. Summary of the Invention

[0005] This application provides a data processing method and apparatus that allocates a first target memory for both decoding and rendering processes, eliminating the need for data copying during rendering. This effectively reduces latency, improves video processing time, and increases the display frame rate of video data.

[0006] To achieve the above objectives, this application adopts the following technical solution:

[0007] In a first aspect, this application provides a data processing method applied to an electronic device running a host system and a virtual machine system. The method includes:

[0008] The virtual machine system can respond to a trigger operation on the target video by sending a memory allocation instruction to the host system. The memory allocation instruction is used to instruct the host system to allocate a first target memory, which is used to store the decoded video data.

[0009] The host system can allocate the first target memory according to the memory allocation instruction.

[0010] The host system can call the decoder to decode the target video data and obtain the decoded video data.

[0011] The host system can store the decoded video data in the first target memory.

[0012] The host system can call the graphics processor to read the decoded video data from the first target memory and render the decoded video data.

[0013] Thus, in this embodiment of the application, in a scenario where a virtual machine processes the target video, the host system can allocate a first target memory for both decoding and rendering processes. This first target memory stores the decoded video data. Consequently, data copying is unnecessary during rendering; the decoded video data can be rendered directly. This effectively reduces latency, improves video processing time, and increases the display frame rate of the video data.

[0014] Furthermore, the host system can decode the target video data by calling the decoder and render the decoded video data by calling the graphics processor, eliminating the need for the processor in the electronic device to perform these processes. This results in lower processor utilization and less system load. Simultaneously, the decoder and graphics processor can process video data with high frame rates, enhancing the flexibility of video processing.

[0015] In one feasible approach, the host system creates a first memory address corresponding to the decoder and a second memory address corresponding to the graphics processor based on the first target memory.

[0016] The first memory address has a first mapping relationship with the first target memory, and the second memory address has a second mapping relationship with the first target memory.

[0017] Thus, this embodiment associates the first target memory with the decoder and the graphics processor respectively by creating a first memory address corresponding to the decoder and a second memory address corresponding to the graphics processor. This allows the decoding module corresponding to the decoder and the rendering module of the graphics processor to use the first target memory using the first and second memory addresses respectively. No data copying is required during rendering; the decoded video data can be rendered directly. This effectively reduces latency, improves video processing time, and increases the display frame rate of the video data.

[0018] In one feasible approach, the first memory address and the second memory address point to the first target memory. This allows subsequent decoding and rendering processes to utilize the first target memory using the first memory address and the second memory address, respectively. During rendering, no further data copying is required; the decoded video data can be rendered directly. This effectively reduces latency and increases the video display frame rate. Simultaneously, it lowers processor utilization and system load.

[0019] In one possible implementation, the decoder includes a graphics processor or dedicated decoding hardware.

[0020] Thus, in this embodiment of the application, the decoding process can be executed by calling the graphics processor or dedicated decoding hardware, without the need for processor execution, thereby freeing up processor resources and reducing processing occupancy.

[0021] In one possible implementation, the host system includes a decoding module and a rendering module, and the memory allocation instruction includes a first resource identifier corresponding to the target video; during the process of the host system allocating the first target memory according to the memory allocation instruction, the decoding module can allocate the first target memory according to the first resource identifier.

[0022] The first target memory corresponds to a target identifier, which is used to index the first target memory.

[0023] During the process of the host system creating the first memory address corresponding to the decoder and the second memory address corresponding to the graphics processor based on the first target memory, the decoding module can also establish a first mapping relationship based on the target identifier. The rendering module can also establish a second mapping relationship based on the target identifier.

[0024] Thus, this embodiment establishes a first mapping relationship and a second mapping relationship based on the target identifier, associating the first target memory with the decoder and the graphics processor. This facilitates the sharing of the first target memory between the decoding module corresponding to the decoder and the rendering module of the graphics processor, reducing the data copying process, effectively reducing latency, improving video processing time, and increasing the display frame rate of video data.

[0025] In one possible implementation, the host system includes a decoding module. During the process of the host system storing the decoded video data into the first target memory, the decoding module can store the decoded video data into the first target memory according to the first memory address.

[0026] In this way, during the subsequent rendering of the target video, the decoded video data can be directly retrieved from the first target memory. This eliminates the need for a data copying process, improving the display efficiency and frame rate of the target video.

[0027] In one possible implementation, the host system also includes a rendering module. During the process of the host system reading and rendering the decoded video data from the first target memory, the rendering module can read the decoded video data from the first target memory based on a second memory address. The rendering module can also render the decoded video data to obtain a rendering result.

[0028] Thus, in this embodiment, the rendering module can directly read the decoded video data from the first target memory using the second memory address and perform subsequent rendering without the need for a data copying process. The decoded video data can be directly used for subsequent rendering. This reduces the time spent displaying the target video, thereby improving the display frame rate of the target video.

[0029] In one feasible approach, before the host system renders the decoded video data, the method further includes:

[0030] The virtual machine system can send rendering instructions to the host system. These instructions include a first resource identifier and a second resource identifier corresponding to the target video. The rendering instructions instruct the host system to render the decoded video data and allocate a second target memory, which is used to store the rendering results. The host system allocates the second target memory based on the second resource identifier.

[0031] During the process of reading decoded video data from the first target memory based on the second memory address, the rendering module can also read the decoded video data from the first target memory based on the first resource identifier and the second memory address. Furthermore, the rendering module can also store the rendering result in the second target memory.

[0032] Thus, this embodiment of the application can allocate new physical memory to store the rendering results, facilitating subsequent display of the rendering results by the host system. Similarly, the graphics processor can be invoked for allocation and storage, reducing processor utilization and workload. Furthermore, during the rendering process, there is no need for data copying; the decoded video data can be directly used for subsequent rendering. This reduces the time required to display the target video, thereby increasing the display frame rate of the target video.

[0033] In one feasible approach, the method also includes:

[0034] The virtual machine system can send display instructions to the host system. The display instructions include a second resource identifier and are used to instruct the host system to display the rendering results.

[0035] The host system can read the rendering results from the second target memory based on the second resource identifier and display the rendering results.

[0036] Thus, this embodiment of the application can directly display the rendering result stored in the second target memory. During the entire display process of the target video, there is no need to perform a data copying process, reducing the time spent on internal data processing and thus reducing the display time of the target video. This allows users to see the target video faster and more stably, improving the user experience.

[0037] In one feasible approach, the method also includes:

[0038] The virtual machine system can send a decoded delete command to the host system. This decoded delete command instructs the host system to remove the first mapping relationship. The host system then removes the first mapping relationship based on the decoded delete command.

[0039] The virtual machine system can send a first render delete command to the host system, which instructs the host system to release the second mapping relationship. Based on the first render delete command, the host system releases the second mapping relationship and frees the first target memory.

[0040] Thus, after displaying the target video, this embodiment of the application can also release the first mapping relationship and the second mapping relationship, as well as the first target memory. This allows the system to have more memory to store data, improving system response speed, stability, and performance.

[0041] In one feasible approach, the method also includes:

[0042] The virtual machine system can send a second render deletion instruction to the host system. The second render deletion instruction is used to instruct the host system to release the second target memory. The host system releases the second target memory according to the second render deletion instruction.

[0043] Thus, in this embodiment, the host system can release the data stored in the second target memory. This allows the system to have more memory to store data, improving system response speed, stability, and performance.

[0044] In one possible implementation, the target identifier includes a file descriptor for the first target memory.

[0045] Secondly, embodiments of this application provide a data processing apparatus, which runs a virtual machine system and a host system.

[0046] The virtual machine system is configured to send a memory allocation instruction to the host system in response to a trigger operation on the target video. The memory allocation instruction is used to instruct the host system to allocate a first target memory, which is used to store the decoded video data.

[0047] The host system is configured to allocate the first target memory according to the memory allocation instruction.

[0048] The host system is also configured to call the decoder to decode the target video data to obtain the decoded video data.

[0049] The host system is also configured to store the decoded video data in the first target memory.

[0050] The host system is also configured to call the graphics processor to read the decoded video data from the first target memory and render the decoded video data.

[0051] Thus, in the data processing apparatus provided in this application embodiment, the host system can allocate a first target memory for both decoding and rendering processes. The first target memory stores the decoded video data. This eliminates the need for data copying during rendering, allowing direct rendering of the decoded video data. Consequently, latency is effectively reduced, video processing time is improved, and the display frame rate of the video data is increased.

[0052] Furthermore, the host system can decode the target video data by calling the decoder and render the decoded video data by calling the graphics processor, eliminating the need for the processor in the electronic device to perform these processes. This results in lower processor utilization and less system load. Simultaneously, the decoder and graphics processor can process video data with high frame rates, enhancing the flexibility of video processing.

[0053] Thirdly, embodiments of this application provide an electronic device, which includes a memory and one or more processors; the memory is coupled to the processors; wherein the memory stores computer program code, which includes computer instructions, and when the computer instructions are executed by the processor, the electronic device performs the method described in the first aspect above.

[0054] Fourthly, embodiments of this application provide a computer-readable medium storing instructions that, when executed on an electronic device, cause the electronic device to perform the method described in the first aspect above.

[0055] Fifthly, embodiments of this application provide a computer program product containing instructions that, when executed on a computer or processor, cause the computer or processor to perform the method described in the first aspect above. Attached Figure Description

[0056] Figure 1 is a schematic diagram of the system structure of an electronic device provided in an embodiment of this application;

[0057] Figure 2 is a schematic diagram of the hardware structure of a laptop computer provided in an embodiment of this application;

[0058] Figure 3 is a schematic diagram of the software structure of a laptop computer provided in an embodiment of this application;

[0059] Figure 4 is a flowchart illustrating a data processing method provided in an embodiment of this application;

[0060] Figure 5 is a schematic diagram of the interface of a target video provided in an embodiment of this application;

[0061] Figure 6 is a schematic diagram of a process for allocating a first target memory according to an embodiment of this application;

[0062] Figure 7 is a flowchart illustrating a decoding process provided in an embodiment of this application;

[0063] Figure 8 is a flowchart illustrating a rendering process provided in an embodiment of this application;

[0064] Figure 9 is a schematic diagram of the structure of a data processing device provided in an embodiment of this application. Detailed Implementation

[0065] The technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. In the description of this application, unless otherwise stated, " / " indicates that the objects before and after are in an "or" relationship. For example, A / B can represent A or B. "And / or" in this application is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone, where A and B can be singular or plural. Furthermore, in the description of this application, unless otherwise stated, "multiple" refers to two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple. In addition, in order to clearly describe the technical solutions of the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish the same or similar items with basically the same function and effect.

[0066] Those skilled in the art will understand that the terms "first," "second," etc., do not limit the quantity or order of execution, and that "first," "second," etc., are not necessarily different. Furthermore, in some embodiments of this application, words such as "exemplary" or "for example" are used to indicate that something is being described as an example, illustration, or description. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner for ease of understanding.

[0067] Furthermore, the device architecture and business scenarios described in the embodiments of this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of device architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0068] To facilitate understanding, the main terms used in this application will be explained first.

[0069] Virtualization technology is a technique that abstracts, virtualizes, and partitions hardware resources such as computing, networking, storage, and input / output (I / O) for use. Virtualization technology can effectively improve the utilization and flexibility of hardware resources.

[0070] A virtual machine (VM) is a complete computer system simulated by software, possessing full hardware system functionality and running in a completely isolated environment. When creating a VM on a physical computer, the physical computer's hard drive and memory capacity can be used as the VM's hard drive and memory capacity. Each VM has independent computing, networking, storage, and operating system resources. A VM can perform the same tasks as a physical computer (also known as a host machine). For example, a VM can include a Java Virtual Machine, a Linux Virtual Machine, or a Windows Virtual Machine.

[0071] Physical computer (also known as host machine): The physical machine that runs virtual machines, enabling resource isolation and other functions. An operating system can run on a physical computer; this can be called the host system.

[0072] Typically, in the video data decoding process of electronic devices, hardware video decoding technology can be used, which means that the video data processing, originally handled entirely by the CPU, can be handled by decoding hardware (such as a GPU). In scenarios where virtual machines process video data (such as when users play online videos or hold video conferences), both video data decoding and playback are performed by the virtual machine. The virtual machine can acquire the encoded video data, decode it using dedicated hardware, and then send the decoded video data to the display to achieve the playback process.

[0073] For example, the virtual machine creates two memory blocks (such as a first memory block and a second memory block). The first memory block stores the decoded video data, and the second memory block stores the video data to be rendered. Since the two memory blocks are independent, the decoded video data in the first memory block needs to be copied to the second memory block as the video data to be rendered. Then, the rendering device renders the video data to be rendered and sends it to the display.

[0074] In other words, during the video display process, the virtual machine needs to copy the decoded video data before sending it to the display. Therefore, when the video data volume is large, the entire video data decoding and playback process takes a long time using this method. This affects the display frame rate of the video data, resulting in poor playback quality.

[0075] To address the aforementioned problems, this application provides a data processing method applied to an electronic device running a host system and a virtual machine system. The method includes:

[0076] The virtual machine system can respond to a trigger operation targeting the target video by sending a memory allocation command to the host system. This command instructs the host system to allocate a first target memory location to store the decoded video data. The host system allocates the first target memory location according to the allocation command. Next, the host system calls the decoder to decode the target video data, obtaining the decoded video data. The host system stores the decoded video data in the first target memory. Finally, the host system calls the graphics processor to read the decoded video data from the first target memory and render it.

[0077] Thus, in this embodiment of the application, in a scenario where a virtual machine processes the target video, the host system can allocate a first target memory for both decoding and rendering processes. This first target memory stores the decoded video data. Consequently, data copying is unnecessary during rendering; the decoded video data can be rendered directly. This effectively reduces latency, improves video processing time, and increases the display frame rate of the video data.

[0078] Furthermore, the host system can decode the target video data by calling the decoder and render the decoded video data by calling the graphics processor, without requiring the processor in the electronic device to perform the above processes. This results in lower processor utilization and less system load. Simultaneously, the decoder and graphics processor can also process video data with high frame rates, improving the flexibility of video processing.

[0079] The data processing method provided in this application will be described in detail below with reference to the accompanying drawings.

[0080] This application provides an electronic device, as shown in Figure 1. The electronic device operates a host machine and a virtual machine. The host machine corresponds to a host system, and the virtual machine corresponds to a virtual machine system. The virtual machine and the host machine can adopt the same or different computer system architectures. The host machine has various physical hardware such as CPU, memory, and peripherals. The host system runs under the computing system architecture formed by these physical hardware components. The emulator runs under the host system of the host machine and can simulate virtual hardware such as virtual CPU, virtual memory, and virtual peripherals. The virtual machine system runs under the computer system architecture composed of virtual hardware. One or more host machine applications can also run on the host system, and each virtual machine application runs on the virtual machine system. Virtual machine processes can run on the host system, and virtual machine processes can also be processes of virtual machine applications or run on the virtual machine system.

[0081] In this application, virtual machines are deployed in the electronic device. This application does not limit the number of virtual machines. In some embodiments, when high-performance computing, artificial intelligence, and other services are deployed in the system, a large number of virtual machines run on the computer device. A virtual machine on one computer device can communicate with virtual machines on multiple computer devices.

[0082] In some examples, the electronic device in this application embodiment may be, but is not limited to, various types of computers. For example, the host machine may be, but is not limited to, a desktop computer, laptop computer, tablet computer, server, or other various types of computers. This application embodiment does not impose any special limitation on the specific type of the electronic device.

[0083] The operating systems installed on electronic devices include, but are not limited to, Alternatively, other operating systems may be used. Of course, electronic devices may not have an operating system installed. This application does not limit the specific type of electronic device, whether or not an operating system is installed, or the type of operating system if an operating system is installed.

[0084] Figure 2 shows a schematic diagram of the hardware structure of the electronic device provided in an embodiment of this application.

[0085] As shown in Figure 2, the electronic device may include a laptop computer. The laptop computer 100 may include: a processor 120, an external memory interface 130, an internal memory 131, a universal serial bus (USB) interface 140, a charging management module 150, a power management module 151, a battery 152, an antenna, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, and a display screen 194, etc.

[0086] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the laptop computer 100. In other embodiments of this application, the laptop computer 100 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0087] Processor 120 may include one or more processing units, such as: application processor (AP), modem processor, graphics processing unit (GPU), image signal processor (ISP), controller, memory, video codec, digital signal processor (DSP), baseband processor, and / or neural network processing unit (NPU), etc. Different processing units may be independent devices or integrated into one or more processors.

[0088] The controller can serve as the central nervous system and command center of the laptop computer 100. Based on the instruction opcode and timing signals, the controller generates operation control signals to control the fetching and execution of instructions.

[0089] The processor 120 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 120 is a cache memory. This memory can store instructions or data that the processor 120 has just used or that are used repeatedly. If the processor 120 needs to use the instruction or data again, it can retrieve it directly from the memory. This avoids repeated accesses, reduces the waiting time of the processor 120, and thus improves the efficiency of the system.

[0090] In some embodiments, the processor 120 may include one or more interfaces. Interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0091] The wireless communication function of the laptop 100 can be achieved through an antenna, a wireless communication module 160, a modem processor, and a baseband processor.

[0092] Antennas are used to transmit and receive electromagnetic wave signals. Each antenna in the laptop 100 can be used to cover one or more communication frequency bands. Different antennas can also be reused to improve antenna utilization.

[0093] In other embodiments, the antenna can be used in conjunction with a tuning switch.

[0094] The wireless communication module 160 can provide solutions for wireless communication applications on the laptop 100, including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), and infrared (IR) technologies. The wireless communication module 160 can be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via an antenna, performs frequency modulation and filtering of the electromagnetic wave signals, and sends the processed signal to the processor 120. The wireless communication module 160 can also receive signals to be transmitted from the processor 120, perform frequency modulation and amplification, and convert them into electromagnetic waves for radiation via the antenna.

[0095] The laptop computer 100 implements display functions through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, connecting the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 120 may include one or more GPUs, which execute program instructions to generate or modify display information.

[0096] Display screen 194 is used to display user interfaces, such as the video interface corresponding to the target video.

[0097] The display screen 194 includes a display panel. The display panel may be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a minimized display, a microLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the laptop computer 100 may include one or N displays 194, where N is a positive integer greater than 1.

[0098] The laptop computer 100 can achieve shooting functions through ISP, camera 193, video codec, GPU, display 194 and application processor.

[0099] The ISP (Image Signal Processor) is used to process data fed back from the camera 193. For example, when taking a picture, the shutter is opened, and light is transmitted through the lens to the camera's photosensitive element. The light signal is converted into an electrical signal, and the camera's photosensitive element transmits the electrical signal to the ISP for processing, transforming it into an image visible to the naked eye. The ISP can also perform algorithmic optimization of image noise, brightness, and skin tone. The ISP can also optimize parameters such as exposure and color temperature of the shooting scene. In some embodiments, the ISP can be set in the camera 193.

[0100] The laptop computer 100 can perform audio functions, such as music playback and recording, through an audio module 170, speakers 170A, receiver 170B, microphone 170C, headphone jack 170D, and application processor.

[0101] The electronic device provided in this application embodiment can run an operating system (OS). This operating system can be various operating systems used in industry, such as an operating system developed based on OpenHarmony, for example... Or other operating systems, such as The iOS mobile operating system; it can also be various open-source operating systems or their derivatives, such as Linux. This includes other embedded operating systems; it can also refer to future new operating systems, such as AI operating systems based on artificial intelligence. An operating system is a set of interconnected system software programs that manage and control the operation of electronic devices, utilize and run hardware and software resources, and provide public services to organize user interaction. In electronic devices, the operating system connects downwards to the physical devices at the hardware layer and upwards to provide a runtime environment for application software.

[0102] An operating system typically includes a kernel layer, a middleware layer, and an application layer. The application layer includes applications, which can include system applications and third-party applications. The middleware layer includes a suite of software providing various services to application developers, or frameworks providing services such as databases, multimedia, and graphics, or capabilities such as distributed scheduling and system scaling. For example, the middleware layer may include a framework layer and / or a system service layer. The framework layer provides application programming interfaces (APIs) and programming frameworks for applications in the application layer. The system service layer includes the system's core capabilities, providing services to applications through the framework layer. The kernel layer is the layer between hardware and software. The kernel layer may include hardware drivers and the operating system kernel. In addition to providing hardware drivers, the kernel layer also supports functions such as memory management and system process management.

[0103] The electronic devices we use in our daily lives come in various types and forms, and are applied in a wide range of scenarios. Therefore, based on the different forms and functions of electronic devices, different application scenarios, and different user needs, the operating systems used in these devices may also differ. The basic functions implemented by the electronic device provided in this application can be implemented using a general-purpose operating system or a dedicated operating system. To more clearly illustrate the implementation of the embodiments of this application under a specific operating system, the following shows... Based on the architecture, those skilled in the art can deduce the implementation of the embodiments of this application under other specific operating systems, such as... Implementation under operating systems, etc.

[0104] Figure 3 is a software structure block diagram of a laptop computer 100 according to an embodiment of this application.

[0105] The software architecture of the laptop 100 can be divided into several layers. In some embodiments, from bottom to top, these layers are: kernel layer, system service layer, framework layer, and application layer. Layers communicate with each other through software interfaces. System functions can be tailored, added, or combined at the subsystem level depending on the deployment scenario of different device forms. Each subsystem can also be tailored, added, or combined at the functional level.

[0106] The kernel layer includes the kernel abstraction layer, the kernel subsystem, and the driver subsystem.

[0107] The Kernel Abstraction Layer (KAL) provides basic kernel capabilities to upper layers by shielding the differences between multiple kernels, including but not limited to process / thread management, memory management, file system, network management, and peripheral device management.

[0108] Kernel Subsystem: Supports the selection of a suitable OS kernel for different resource-constrained devices, including but not limited to Linux kernel, HarmonyOS kernel, LiteOS (Lite Operating System), etc.

[0109] Driver Subsystem: The driver framework is the foundation for the open system hardware ecosystem, providing unified peripheral access capabilities and a framework for driver development and management. The driver framework includes: display drivers, camera drivers, audio drivers, Bluetooth drivers, sensor drivers, etc.

[0110] The system service layer comprises the core capabilities of the system, providing services to applications through the framework layer. This layer includes, but is not limited to, the following subsystems:

[0111] The system's basic capability subsystem set provides fundamental capabilities for the operation, scheduling, and migration of distributed applications across multiple devices. This set may include distributed soft bus, distributed data management, distributed task scheduling, and Ark multi-language runtime; it may also include multi-modal input subsystem, graphics subsystem, security subsystem, and AI business subsystem.

[0112] The graphics subsystem mainly includes modules such as UI components, layout, animation, fonts, input events, window management, and rendering. The graphics service provides graphics rendering and display output functions, and internally, through the rational utilization of system hardware resources, it provides a smooth and efficient display experience.

[0113] In some examples, the graphics subsystem can render the decoded video data and display the rendering results.

[0114] Basic software service subsystem set: provides public and general software services; the basic software service subsystem set may include event notification subsystem, multimedia subsystem, etc.

[0115] Enhanced software service subsystem suite: Provides differentiated enhanced software services for different devices; the enhanced software service subsystem suite may include smart screen proprietary business subsystem, wearable proprietary business subsystem, IoT proprietary business subsystem, etc.

[0116] Hardware service subsystem set: Provides hardware services; the hardware service subsystem set may include location service subsystem, user IAM (Identity and Access Management) subsystem, wearable proprietary hardware service subsystem, biometric identification subsystem, IoT proprietary hardware service subsystem, etc.

[0117] Distributed task scheduling enables distributed service management (discovery, synchronization, registration, and invocation), supporting remote startup, remote invocation, remote connection, and migration of applications across devices.

[0118] Distributed data management enables data synchronization, data storage, data sharing, and data access across all scenarios and devices.

[0119] The distributed soft bus provides communication-related capabilities for seamless interconnection between multiple devices, including: WLAN service capabilities, Bluetooth service capabilities, soft bus, inter-process communication RPC (Remote Procedure Call), and StarFlash communication capabilities.

[0120] Ark Multilingual Runtime is a unified compilation runtime platform designed to support the joint compilation and execution of multiple programming languages ​​and multiple chip platforms.

[0121] The framework layer provides application programming interfaces (APIs) and programming frameworks for applications in the application layer. The framework layer includes: the ArkUI framework (which provides a complete infrastructure for UI development of system applications, including UI functions such as components, layouts, animations, and interactive events, as well as a real-time interface preview tool), the user application framework, and the Ability framework (an Ability is a lightweight application; the Ability framework schedules and manages the operation and lifecycle of Abilities). Different devices may have different operating systems, and the APIs they support may also differ.

[0122] The HarmonyOS API is designed to support... HarmonyOS API provides a range of open capabilities for application development. It can be configured at the framework layer or independently of it. The HarmonyOS API includes the Audio API, Push API, and Account API, among others.

[0123] Applications can include system apps and extended / third-party apps. System apps can include the desktop, control bar, and settings, while extended / third-party apps can include social apps, travel apps, etc.

[0124] The following will use a laptop computer as an example to specifically describe the data processing method provided in the embodiments of this application.

[0125] Figure 4 is a flowchart illustrating a data processing method according to an embodiment of this application. As shown in Figure 4, the method may include the following steps S401-S405.

[0126] S401, The laptop computer responds to a trigger operation for the target video by allocating the first target memory corresponding to the target video.

[0127] In some embodiments of this application, users can utilize various video-related functions on the laptop, such as watching online videos using video applications, holding video conferences using video conferencing applications, editing online videos using video editing applications, and downloading online videos using video applications. The laptop responds to user input operations and executes corresponding video services.

[0128] It should be noted that the embodiments of this application do not limit the specific types of video services.

[0129] In some embodiments of this application, the laptop computer may allocate a first target memory corresponding to the target video in response to a user's triggering operation on the target video.

[0130] For example, a user can watch online videos using a video application. Referring to Figure 5(A), the user can select the video control 501 corresponding to the target video on the video application's details page and watch the target video. In response to the user's click on the video control 501, the laptop can allocate a first target memory corresponding to the target video to facilitate the subsequent display of the target video's video interface. This first target memory is used to store the decoded video data corresponding to the target video.

[0131] In some embodiments of this application, referring to Figure 6, a laptop computer may run a host system and a virtual machine system.

[0132] Specifically, in response to a trigger operation targeting the target video, the virtual machine system can send a memory allocation command to the host system. This memory allocation command instructs the host system to allocate a first target memory, which will be used to store the decoded video data. The host system can allocate the first target memory according to the memory allocation command.

[0133] Specifically, the video application in the virtual machine system can respond to a user's trigger operation for a target video by sending a memory allocation command to the host system through the front-end driver. The host system can receive the memory allocation command and, in response, allocate the first target memory.

[0134] For example, the front-end driver may include the audio / video driver in a laptop.

[0135] In some embodiments of this application, the memory allocation instruction may include a first resource identifier corresponding to the target video. The first resource identifier is used to identify the first target memory. The host system can allocate the first target memory according to the memory allocation instruction. Thus, there can be a correspondence between the first resource identifier in the memory allocation instruction and the first target memory. The resource identifier can be, for example, a surfaceid. The first resource identifier can be surfaceid: 1.

[0136] It should be noted that the aforementioned resource identifier may also include other identifiers used to identify the first target memory, such as the task identifier (contaskid), etc. This application does not limit this aspect.

[0137] In some examples, the first target memory may include physical memory.

[0138] In one possible implementation, the host system includes a decoding module. The decoding module can allocate first target memory based on a first resource identifier.

[0139] It should be noted that the embodiments of this application do not limit the allocation process of the first target memory or the specific implementation form of the first target memory.

[0140] In some embodiments of this application, during the display of a target video, the video data of the target video may include interface data and configuration parameter data for the video interface used to display the target video. The interface data refers to the data corresponding to elements displayed in the video display interface, such as image data or text data. The configuration parameter data is data not displayed in the video interface. For example, the configuration parameter data may include the target video's video identifier, source data, file size data, and resolution data, etc.

[0141] The memory allocation command can include configuration parameter data. After allocating the first target memory, the decoding module can also store the configuration parameter data corresponding to the target video into the decoding module.

[0142] Thus, the embodiments of this application can pre-allocate the first target memory so that the data in the first target memory can be used together in the subsequent decoding and rendering processes, thereby shortening the overall processing time for the target video.

[0143] In some embodiments of this application, during the process of allocating the first target memory, the host system generates a target identifier for the first target memory. The first target memory corresponds to a target identifier, which is used to index the first target memory.

[0144] The identifier used to index the first target memory includes the file descriptor (fd) of the first target memory.

[0145] In some examples, the target identifier can also be represented in other ways, such as a mapping table corresponding to the first target memory.

[0146] For example, an ordered array corresponding to the first target memory. This application does not specifically limit the implementation of the identifier used to index the first target memory.

[0147] In some examples, the target identifier may be the same as or a different identifier from the first resource identifier mentioned above, and this application embodiment does not limit this.

[0148] Thus, in this embodiment of the application, the laptop automatically generates a corresponding identifier during the creation of the first target memory, which can be used to index the first target memory. This facilitates the subsequent use of the first target memory during rendering and decoding processes, eliminating the need to copy stored data and reducing latency in the entire video processing. Consequently, the display efficiency and frame rate of the target video are improved.

[0149] In some embodiments of this application, the electronic device includes a decoder and a graphics processor.

[0150] The host system can create a first memory address corresponding to the decoder and a second memory address corresponding to the graphics processor based on the first target memory.

[0151] The first memory address has a first mapping relationship with the first target memory, and the second memory address has a second mapping relationship with the first target memory.

[0152] In some examples, the first memory address and the second memory address mentioned above can be the virtual memory address or virtual memory space corresponding to the first target memory.

[0153] The first memory address and the first target memory have a one-to-one first mapping relationship, and the second memory address and the first target memory have a one-to-one second mapping relationship.

[0154] It should be noted that the first memory address and the second memory address can also be referred to as the first virtual memory and the second virtual memory. For example, the first virtual memory can be the Vasurface memory, and the second virtual memory can be the Texture memory.

[0155] The implementation of the first mapping relationship and the second mapping relationship may include a mapping table. This application embodiment does not specifically limit the implementation of the first mapping relationship and the second mapping relationship.

[0156] In some embodiments of this application, the first memory address and the second memory address can be the same address. The first memory address and the second memory address are encapsulated into different structures so that the decoder and the graphics processor can obtain the first memory address and the second memory address, respectively.

[0157] Of course, the first memory address and the second memory address can also be different addresses. This application does not impose specific limitations on this.

[0158] Thus, this embodiment associates the first target memory with the decoder and the graphics processor respectively by creating a first memory address corresponding to the decoder and a second memory address corresponding to the graphics processor. This allows the decoding module corresponding to the decoder and the rendering module of the graphics processor to use the first target memory using the first and second memory addresses respectively. No data copying is required during rendering; the decoded video data can be rendered directly. This effectively reduces latency, improves video processing time, and increases the display frame rate of the video data.

[0159] In some embodiments of this application, the first memory address and the second memory address point to the first target memory. That is, the two virtual addresses point to the same physical address. Thus, the subsequent decoding and rendering processes utilize the first memory address and the second memory address to access the first target memory, respectively. During the rendering process, no further data copying is required; the decoded video data can be rendered directly. This effectively reduces latency and increases the display frame rate of the video data. Simultaneously, it reduces processor utilization and system load.

[0160] In some embodiments of this application, the host system can create the first memory address corresponding to the decoder and the second memory address corresponding to the graphics processor based on the first target memory through the decoding module and the rendering module, respectively.

[0161] Specifically, the decoding module can establish a first mapping relationship based on the target identifier. The rendering module can establish a second mapping relationship based on the target identifier.

[0162] In other words, the decoding module can use the target identifier of the first target memory to establish a first mapping relationship between the first target memory and the first memory address. The rendering module can use the target identifier of the first target memory to establish a second mapping relationship between the first target memory and the second memory address.

[0163] In some examples, the decoding module can allocate first target memory based on the first resource identifier, and obtain the target identifier corresponding to the first target memory. The decoding module can also create a first memory address based on the file descriptor (fd) corresponding to the first target memory. The rendering module can create a second memory address based on the file descriptor corresponding to the first target memory. In other words, there is a corresponding association between the first resource identifier, the target identifier, and the first memory address. Similarly, there is a corresponding association between the first resource identifier, the target identifier, and the second memory address.

[0164] Thus, this embodiment establishes a first mapping relationship and a second mapping relationship based on the target identifier, associating the first target memory with the decoder and the graphics processor. This facilitates the sharing of the first target memory between the decoding module corresponding to the decoder and the rendering module of the graphics processor, reducing the data copying process, effectively reducing latency, improving video processing time, and increasing the display frame rate of video data.

[0165] S402. The laptop computer calls the decoder to decode the video data to be decoded in the target video, and obtains the decoded video data.

[0166] S403, the laptop stores the decoded video data to the first target memory.

[0167] In some embodiments of this application, the laptop computer can also obtain initial data corresponding to the target video in response to a user's trigger operation on the target video. The initial data may include the video data to be decoded corresponding to the target video.

[0168] For example, to facilitate the transmission of video data, the server can encode the initial data of the target video to generate video data to be decoded. The laptop can then obtain the initial data corresponding to the target video from the server.

[0169] In some embodiments of this application, after acquiring initial data, the laptop computer can call a decoder to decode the initial data to obtain decoded video data. For example, the laptop computer can decode the video data to be decoded to obtain decoded video data. The decoder may include a graphics processor or dedicated decoding hardware.

[0170] In one possible implementation, the laptop computer can call the graphics processor to decode the video data to be decoded, thus obtaining the decoded video data.

[0171] In another possible implementation, a laptop computer can utilize dedicated decoding hardware to decode the video data to be decoded, thereby obtaining the decoded video data. This application does not limit the specific implementation of the decoder.

[0172] Thus, in this embodiment of the application, the decoding process can be executed by calling the graphics processor or dedicated decoding hardware, without the need for processor execution, thereby freeing up processor resources and reducing processing occupancy.

[0173] In some embodiments of this application, the decoding module in the host system can call the decoder to decode the video data to be decoded of the target video, and obtain the decoded video data.

[0174] For example, referring to Figure 7, the video application can obtain the video data to be decoded and send it to the decoding module through the front-end driver. The decoding module can call the decoder to decode the video data to be decoded, obtain the decoded video data, and store the decoded video data in the first target memory.

[0175] In some examples of this application, during the process of storing the decoded video data into the first target memory, the virtual machine system can send a storage instruction to the host system. This storage instruction includes the video data to be decoded and a first resource identifier. The host system can then perform decoding and storage processing based on the video data to be decoded and the first resource identifier.

[0176] Specifically, the decoding module can store the decoded video data into the first target memory based on the first memory address.

[0177] In other words, after decoding the video data to be decoded, the decoding module can find the first target memory based on the first memory address and the first mapping relationship, and store the decoded video data in the first target memory.

[0178] Therefore, in this embodiment, after decoding the video data to be decoded, the decoded video data can be stored in the first target memory via the first memory address. This allows the decoded video data to be directly retrieved from the first target memory during subsequent rendering of the target video. No data copying process is required, improving the display efficiency and frame rate of the target video.

[0179] S404: The laptop computer calls the graphics processor to read the decoded video data from the first target memory and renders the decoded video data to obtain the rendering result.

[0180] In some embodiments of this application, the host system can read the decoded video data from the first target memory and render the decoded video data to obtain a rendering result.

[0181] Specifically, the host system may also include a rendering module. The rendering module can read the decoded video data from the first target memory based on the second memory address. The rendering module can also render the decoded video data to obtain a rendering result.

[0182] Thus, in this embodiment, the rendering module can directly read the decoded video data from the first target memory using the second memory address and perform subsequent rendering without the need for a data copying process. The decoded video data can be directly used for subsequent rendering. This reduces the time spent displaying the target video, thereby improving the display frame rate of the target video.

[0183] In some embodiments of this application, after the laptop obtains the initial data of the target video, the video application in the host system can send rendering instructions to the host system through the front-end driver. The rendering instructions include a first resource identifier and a second resource identifier corresponding to the target video. The rendering instructions are used to instruct the host system to render the decoded video data and allocate a second target memory, which is used to store the rendering results.

[0184] Specifically, the rendering module receives rendering instructions. The rendering module can receive rendering instructions and, in response to these instructions, read the decoded video data from the first target memory and render the decoded video data to obtain the rendering result.

[0185] The rendering instructions may include the first resource identifier corresponding to the target video.

[0186] Referring to Figure 8, the video application can send rendering instructions to the rendering module through the front-end driver. The rendering module can read the decoded video data from the first target memory according to the first resource identifier and the second memory address.

[0187] For example, the rendering module can locate the second memory address based on the first resource identifier. The rendering module can also read the decoded video data from the first target memory based on the second memory address and render the decoded video data to obtain the rendering result.

[0188] In the process of allocating the first target memory on the laptop, the first resource identifier corresponding to the target video is already associated with the target identifier and the second memory address. The rendering module can directly use this association to determine the second memory address corresponding to the first resource identifier. In other words, the rendering module can directly use the surfaceid to find the second memory address. Then, the rendering module uses the second memory address to read the decoded video data from the first target memory and renders the decoded video data to obtain the rendering result.

[0189] In other words, the rendering module uses the second memory address and the second mapping relationship to find the first target memory and read the decoded video data from the first target memory.

[0190] Thus, in this embodiment, the rendering module can directly read the decoded video data from the first target memory using the second memory address and perform subsequent rendering without the need for a data copying process. The decoded video data can be directly used for subsequent rendering. This reduces the time spent displaying the target video, thereby improving the display frame rate of the target video.

[0191] It should be noted that the first resource identifier carried in the rendering instruction may be the same as or different from the first resource identifier carried in the memory allocation instruction and the first resource identifier in the storage instruction. This application does not impose specific limitations on this.

[0192] In some examples, the host system can allocate a second target memory based on a second resource identifier. The second target memory is used to store the rendering results.

[0193] Specifically, the rendering module can respond to rendering commands and allocate a second target memory based on a second resource identifier. This second target memory is physical memory and differs from the first target memory mentioned above. After allocating the second target memory, the rendering module can store the rendering results in it.

[0194] Thus, embodiments of this application can allocate new physical memory to store rendering results, facilitating subsequent display of the rendering results by the host system. Similarly, the graphics processor can be invoked for allocation and storage, reducing processor utilization and workload.

[0195] S405: The laptop displays the video interface of the target video based on the rendering results.

[0196] In some embodiments of this application, the host system can display the video interface of the target video based on the rendering results.

[0197] Specifically, the virtual machine system can send display instructions to the host system. These instructions include a second resource identifier and are used to instruct the host system to display the rendering results. The host system reads the rendering results from the second target memory based on the second resource identifier and then displays the results.

[0198] For example, the host system can control the display screen to show the rendering results. Referring to Figure 5(B), the display screen can show the video interface of the target video. In this way, the user can watch the target video in the video interface.

[0199] Thus, in this embodiment, the rendering result stored in the second target memory can be directly displayed. Throughout the entire display process of the target video, the laptop does not need to perform a data copying process, reducing the time spent on internal data processing and consequently reducing the display time of the target video. This allows users to see the target video faster and more stably, improving the user experience.

[0200] In some embodiments of this application, the host system may perform a process of releasing the first target memory after displaying the rendering result.

[0201] In some examples, the virtual machine system sends a decoded delete command to the host system, which instructs the host system to remove the first mapping relationship. The host system then removes the first mapping relationship based on the decoded delete command.

[0202] The decoded deletion instruction may include a first resource identifier. The host system can delete the first mapping relationship based on the first resource identifier.

[0203] In some examples, the virtual machine system sends a first render delete instruction to the host system, which instructs the host system to undo the second mapping. The host system then undoes the second mapping and releases the first target memory based on the first render delete instruction.

[0204] The first rendering deletion instruction may also include a first resource identifier. The host system can delete the second mapping relationship based on the first resource identifier. Furthermore, after deleting the first and second mapping relationships, the host system releases the data stored in the first target memory.

[0205] Thus, after displaying the target video, this embodiment of the application can also release the first mapping relationship and the second mapping relationship, as well as the first target memory. This allows the system to have more memory to store data, improving system response speed, stability, and performance.

[0206] In some embodiments of this application, the host system may perform a process of releasing the second target memory after displaying the rendering result.

[0207] In some examples, the virtual machine system sends a second render delete instruction to the host system, which instructs the host system to release the second target memory. The host system then releases the second target memory according to the second render delete instruction.

[0208] The second rendering deletion instruction can include a second resource identifier. The host system can release data stored in the second target memory based on the second resource identifier. This allows the host system to release data stored in the second target memory, freeing up more memory for data storage and improving system response speed, stability, and performance.

[0209] In some solutions, multiple embodiments of this application can be combined, and the combined solution can be implemented. Optionally, some operations in the process of each method embodiment may be combined, and / or the order of some operations may be changed. Furthermore, the execution order between the steps of each process is merely exemplary and does not constitute a limitation on the execution order between steps; other execution orders are also possible. It is not intended to indicate that the execution order is the only possible order in which these operations can be performed.

[0210] Those skilled in the art will conceive of various ways to reorder the operations described in the embodiments of this application. Furthermore, it should be noted that process details involved in one embodiment of this application are similarly applicable to other embodiments, or different embodiments can be combined.

[0211] Furthermore, some steps in the method embodiments can be equivalently replaced with other possible steps. Alternatively, some steps in the method embodiments may be optional and can be deleted in certain use cases. Or, other possible steps may be added to the method embodiments.

[0212] Furthermore, the various method embodiments can be implemented individually or in combination.

[0213] This application also provides a data processing device, as shown in Figure 9, which runs a virtual machine system and a host system.

[0214] The virtual machine system is configured to send a memory allocation instruction to the host system in response to a trigger operation on the target video. The memory allocation instruction is used to instruct the host system to allocate a first target memory, which is used to store the decoded video data.

[0215] The host system is configured to allocate the first target memory according to the memory allocation instruction.

[0216] The host system is also configured to call the decoder to decode the target video data to obtain the decoded video data.

[0217] The host system is also configured to store the decoded video data in the first target memory.

[0218] The host system is also configured to call the graphics processor to read the decoded video data from the first target memory and render the decoded video data.

[0219] This application also provides an electronic device, which includes a memory and one or more processors; the memory is coupled to the processors; wherein the memory stores computer program code, which includes computer instructions, and when the computer instructions are executed by the processor, the electronic device performs the relevant method steps in the above method embodiments.

[0220] This application also provides a communication device, which includes a memory and one or more processors; the memory is coupled to the processors; wherein the memory stores computer program code, which includes computer instructions, and when the computer instructions are executed by the processor, the communication device performs the relevant method steps in the above method embodiments.

[0221] This application also provides a computer-readable storage medium storing computer program code. When the processor executes the computer program code, the electronic device executes the relevant method steps in the above method embodiments.

[0222] This application also provides a computer program product containing instructions that, when executed on a computer or processor, cause the computer or processor to perform the relevant method steps as described in the above method embodiments.

[0223] This application also provides a chip system, including: a processor coupled to a memory, the memory being used to store programs or instructions, and when the program or instructions are executed by the processor, the chip system enables the methods in any of the above method embodiments.

[0224] Optionally, the chip system may contain one or more processors. These processors can be implemented in hardware or software. When implemented in hardware, the processor can be a logic circuit, an integrated circuit, etc. When implemented in software, the processor can be a general-purpose processor, implemented by reading software code stored in memory.

[0225] Optionally, the chip system may contain one or more memories. The memory may be integrated with the processor or disposed separately from it; this application embodiment does not limit this. For example, the memory may be a non-transient processor, such as a read-only memory (ROM), which may be integrated with the processor on the same chip or disposed separately on different chips. This application embodiment does not specifically limit the type of memory or the arrangement of the memory and processor.

[0226] For example, the chip system may be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), a central processor unit (CPU), a network processor (NP), a digital signal processor (DSP), a micro controller unit (MCU), a programmable logic device (PLD), or other integrated chips.

[0227] The electronic devices, computer storage media, or computer program products provided in this application are all used to execute the corresponding methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects in the corresponding methods provided above, and will not be repeated here.

[0228] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0229] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another apparatus, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0230] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units, located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0231] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0232] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the contributing parts, or all or part of the technical solutions, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0233] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A data processing method, characterized in that, The method is applied to an electronic device running a host system and a virtual machine system, and the method includes: In response to a trigger operation targeting the target video, the virtual machine system sends a memory allocation instruction to the host system. The memory allocation instruction instructs the host system to allocate a first target memory, which is used to store the decoded video data. The host system allocates the first target memory according to the memory allocation instruction; The host system calls the decoder to decode the video data to be decoded in the target video, and obtains the decoded video data; The host system stores the decoded video data into the first target memory; The host system calls the graphics processor to read the decoded video data from the first target memory and render the decoded video data.

2. The method according to claim 1, characterized in that, The method further includes: The host system creates a first memory address corresponding to the decoder and a second memory address corresponding to the graphics processor based on the first target memory. Wherein, the first memory address has a first mapping relationship with the first target memory, and the second memory address has a second mapping relationship with the first target memory.

3. The method according to claim 2, characterized in that, The first memory address and the second memory address point to the first target memory.

4. The method according to claim 2 or 3, characterized in that, The decoder includes a graphics processor or dedicated decoding hardware.

5. The method according to any one of claims 2-4, characterized in that, The host system includes a decoding module and a rendering module, and the memory allocation instruction includes a first resource identifier corresponding to the target video; The host system allocates the first target memory according to the memory allocation instruction, including: The decoding module allocates the first target memory according to the first resource identifier; Wherein, the first target memory corresponds to a target identifier, and the target identifier is an identifier used to index the first target memory; The host system creates a first memory address corresponding to the decoder and a second memory address corresponding to the graphics processor based on the first target memory, including: The decoding module establishes the first mapping relationship based on the target identifier; The rendering module establishes the second mapping relationship based on the target identifier.

6. The method according to any one of claims 2-5, characterized in that, The host system includes a decoding module, which stores the decoded video data into the first target memory, including: The decoding module stores the decoded video data in the first target memory according to the first memory address.

7. The method according to any one of claims 2-6, characterized in that, The host system further includes a rendering module, which reads the decoded video data from the first target memory and renders the decoded video data, including: The rendering module reads the decoded video data from the first target memory according to the second memory address; The rendering module renders the decoded video data to obtain the rendering result.

8. The method according to claim 7, characterized in that, Before the host system renders the decoded video data, the method further includes: The virtual machine system sends rendering instructions to the host system. The rendering instructions include a first resource identifier and a second resource identifier corresponding to the target video. The rendering instructions are used to instruct the host system to render the decoded video data and allocate a second target memory, which is used to store the rendering results. The host system allocates the second target memory based on the second resource identifier; The rendering module reads the decoded video data from the first target memory according to the second memory address, including: The rendering module reads the decoded video data from the first target memory based on the first resource identifier and the second memory address.

9. The method according to claim 8, characterized in that, The method further includes: The rendering module stores the rendering result in the second target memory.

10. The method according to claim 8 or 9, characterized in that, The method further includes: The virtual machine system sends a display instruction to the host system, the display instruction including the second resource identifier, the display instruction being used to instruct the host system to display the rendering result; The host system reads the rendering result from the second target memory according to the second resource identifier and displays the rendering result.

11. The method according to any one of claims 2-10, characterized in that, The method further includes: The virtual machine system sends a decoding deletion command to the host system, the decoding deletion command being used to instruct the host system to release the first mapping relationship; The host system releases the first mapping relationship according to the decoded deletion instruction; The virtual machine system sends a first rendering deletion instruction to the host system, the first rendering deletion instruction being used to instruct the host system to release the second mapping relationship; The host system releases the second mapping relationship and the first target memory according to the first rendering deletion instruction.

12. The method according to claim 11, characterized in that, The method further includes: The virtual machine system sends a second rendering deletion instruction to the host system, the second rendering deletion instruction being used to instruct the host system to release the second target memory; The host system releases the second target memory according to the second rendering deletion instruction.

13. The method according to claim 5, characterized in that, The target identifier includes the file descriptor of the first target memory.

14. A data processing apparatus, characterized in that, The data processing device runs a virtual machine system and a host system; The virtual machine system is configured to send a memory allocation instruction to the host system in response to a trigger operation for a target video. The memory allocation instruction is used to instruct the host system to allocate a first target memory, which is used to store the decoded video data. The host system is configured to allocate the first target memory according to the memory allocation instruction; The host system is also configured to call a decoder to decode the video data to be decoded of the target video, and obtain the decoded video data; The host system is also configured to store the decoded video data in the first target memory; The host system is also configured to invoke a graphics processor to read the decoded video data from the first target memory and render the decoded video data.

15. An electronic device, characterized in that, The electronic device includes a memory and one or more processors; the memory is coupled to the processors; wherein the memory stores computer program code, the computer program code including computer instructions, which, when executed by the processor, cause the electronic device to perform the method as described in any one of claims 1-13.

16. A computer-readable medium, characterized in that, The computer-readable storage medium stores instructions that, when executed on an electronic device, cause the electronic device to perform the method as described in any one of claims 1-13.

17. A computer program product, characterized in that, The computer program product includes instructions that, when executed on a computer or processor, cause the computer or processor to perform the method as described in any one of claims 1-13.

Images