An electrostatic discharge, ESD, protection device and corresponding assembly, electronic device and method
WO2026125756A1PCT designated stage Publication Date: 2026-06-18NEXPERIA BV
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- NEXPERIA BV
- Filing Date
- 2025-12-12
- Publication Date
- 2026-06-18
AI Technical Summary
⚠Technical Problem
Non-linear impedances used for ESD protection in electronics are prone to snap-back, which can lead to damage of the IC and the impedance itself, posing a risk to circuit integrity.
⚗Method used
A non-linear impedance is used in parallel with a voltage clamping structure that clamps the voltage below the snap-back threshold, preventing snap-back and protecting the IC and impedance.
🎯Benefits of technology
The combination of non-linear impedance and voltage clamping structure effectively prevents snap-back, ensuring stable operation and protecting the IC from voltage spikes.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure EP2025086942_18062026_PF_FP_ABST
Abstract
An ElectroStatic Discharge, ESD, protection device for protecting an integrated circuit, said ESD protection device comprising a non-linear impedance arranged to be connected to an integrated circuit and an external input, wherein the non-linear impedance is arranged to provide a low ohmic path at normal operation and a high ohmic path during an ESD event occurring at said external input, and comprising a voltage clamping structure positioned in parallel with the non-linear impedance, wherein the voltage clamping structure is arranged to clamp a voltage over the non-linear impedance such that a voltage over the non-linear impedance is capped at a clamping voltage.
Need to check novelty before this filing date? Find Prior Art