Display substrate and display device

Abstract

A display substrate and a display device. The display substrate comprises a base substrate, a plurality of sub-pixels, a pixel defining layer, a black matrix, and a color filter layer. In a same repeating unit, light-emitting regions of sub-pixels in two pixel groups are mirror-symmetric with respect to a first symmetry axis extending in a first direction. The black matrix comprises a plurality of black matrix openings. The color filter layer comprises a plurality of color filter patterns of different colors, covering the plurality of black matrix openings and arranged corresponding to sub-pixels of different colors. In the display substrate provided by the present disclosure, the light-emitting regions of the sub-pixels in two pixel groups in each repeating unit are mirror-symmetric with respect to the first symmetry axis, and light-emitting functional layers of two sub-pixels of the same color can be formed through one mask opening of a fine metal mask, thereby reducing the difficulty of the manufacturing process. By replacing a polarizer with a thinner color filter layer, the display substrate has better bending performance. In addition, the color filter patterns cover the black matrix openings, thereby further improving the display effect of the display substrate and reducing the power consumption of the display substrate.

Description

Display substrate and display device Technical Field

[0001] At least one embodiment of this disclosure relates to a display substrate and a display device. Background Technology

[0002] Organic light-emitting diode (OLED) displays are gradually becoming the mainstream of next-generation displays due to their advantages such as self-illumination, vibrant colors, low power consumption, and wide viewing angles. Summary of the Invention

[0003] This disclosure provides a display substrate and a display device in at least one embodiment.

[0004] At least one embodiment of this disclosure provides a display substrate, comprising: a substrate; a plurality of sub-pixels located on the substrate; each sub-pixel including a light-emitting unit, the light-emitting unit including a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer, the first electrode being located between the light-emitting functional layer and the substrate; a pixel defining layer located on the side of the first electrode away from the substrate, the pixel defining layer including a plurality of pixel openings, one sub-pixel corresponding to at least one pixel opening, at least a portion of the light-emitting functional layer being located in the pixel opening corresponding to the sub-pixel, and the pixel opening being configured to expose the first electrode; wherein, the plurality of sub-pixels are divided into a plurality of repeating units, the plurality of repeating units being along The array is arranged in a first direction and a second direction. At least one repeating unit includes two pixel groups arranged along the second direction. Each pixel group includes sub-pixels of different colors. In the same repeating unit, the light-emitting areas of the sub-pixels in the two pixel groups are mirror-symmetrical with respect to a first axis of symmetry extending along the first direction. The display substrate also includes a black matrix and a color filter layer. The black matrix is ​​located on the side of the pixel defining layer away from the substrate, and the color filter layer is located on the side of the black matrix away from the substrate. The black matrix includes a plurality of black matrix openings, and the plurality of black matrix openings and the plurality of pixel openings are arranged in a one-to-one correspondence. The color filter layer includes a plurality of color filter patterns of different colors, which cover the plurality of black matrix openings and are arranged in a corresponding manner with the different color sub-pixels.

[0005] For example, according to at least one embodiment of this disclosure, the pixel opening includes an arcuate edge.

[0006] For example, according to at least one embodiment of this disclosure, the shape of the pixel opening includes at least one of a circle, an ellipse, and a strip shape.

[0007] For example, according to at least one embodiment of the present disclosure, in the same repeating unit, the partial structure of the first electrode of the sub-pixel in two pixel groups is mirror-symmetrical with respect to the first axis of symmetry.

[0008] For example, according to at least one embodiment of this disclosure, the different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; the plurality of pixel groups in the plurality of repeating units are arranged along the first direction to form pixel rows, and the plurality of pixel rows are arranged along the second direction; each pixel row includes a first sub-pixel row and a second sub-pixel row extending along the first direction, and the first sub-pixel row and the second sub-pixel row are arranged along the second direction; the first sub-pixel row includes a plurality of first sub-pixels arranged along the first direction; the second sub-pixel row includes a plurality of second sub-pixels and a plurality of third sub-pixels alternately arranged along the first direction.

[0009] For example, according to at least one embodiment of this disclosure, the pixel opening includes a first pixel opening, a second pixel opening, and a third pixel opening, and the different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; one first sub-pixel corresponds to a plurality of first pixel openings, and the plurality of first pixel openings are arranged along the first direction; one second sub-pixel corresponds to a plurality of second pixel openings, and the plurality of second pixel openings are arranged along the second direction; one third sub-pixel corresponds to a plurality of third pixel openings, and the plurality of third pixel openings are arranged along the second direction.

[0010] For example, according to at least one embodiment of the present disclosure, the first electrode includes a main body portion and a connecting portion, the connecting portion being configured to be electrically connected to a pixel driving circuit of the sub-pixel; the pixel driving circuit being configured to drive the light-emitting unit; at least one of the sub-pixels corresponds to a plurality of pixel openings, the main body portion includes a plurality of interconnected sub-parts, the plurality of pixel openings corresponding one-to-one with the plurality of sub-parts, and the pixel openings exposing at least a portion of the sub-parts.

[0011] For example, according to at least one embodiment of the present disclosure, the display substrate further includes a signal line extending along the first direction, the signal line including one of a gate line and an initial signal line, the signal line being located between the substrate and the first electrode; the different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; the first electrode of the third sub-pixel includes a plurality of sub-parts and a sub-connection portion connecting two adjacent sub-parts, the plurality of sub-parts being spaced apart along the second direction, and in a direction perpendicular to the substrate, the signal line overlapping the spacing between two adjacent sub-parts among the plurality of sub-parts.

[0012] For example, according to at least one embodiment of the present disclosure, the display substrate further includes a data line located between the substrate and the first electrode; the different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; the first electrode of the third sub-pixel includes a plurality of sub-parts and a sub-connection portion connecting two adjacent sub-parts, the plurality of sub-parts being spaced apart along the first direction, and in a direction perpendicular to the substrate, the data line overlaps with the spacing between two adjacent sub-parts among the plurality of sub-parts.

[0013] For example, according to at least one embodiment of the present disclosure, the sub-pixel includes a pixel driving circuit configured to drive the light-emitting unit; the different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; the pixel driving circuit includes a first pixel driving circuit for the first sub-pixel, a second pixel driving circuit for the second sub-pixel, and a third pixel driving circuit for the third sub-pixel arranged sequentially in the first direction; the orthographic projection of the first pixel driving circuit on the substrate and the orthographic projection of the second pixel driving circuit on the substrate are at least partially mirror-symmetric with respect to a second axis of symmetry extending along the second direction.

[0014] For example, according to at least one embodiment of the present disclosure, the orthographic projection of the second pixel driving circuit on the substrate and the orthographic projection of the third pixel driving circuit on the substrate are at least partially mirror-symmetrical with respect to a third axis of symmetry extending along the second direction.

[0015] At least one embodiment of this disclosure provides a display substrate, comprising: a substrate; a plurality of sub-pixels located on the substrate; each sub-pixel including a pixel driving circuit and a light-emitting unit, the pixel driving circuit being configured to drive the light-emitting unit; the light-emitting unit including a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer, the first electrode being located between the light-emitting functional layer and the substrate; a pixel defining layer located on the side of the first electrode away from the substrate, the pixel defining layer including a plurality of pixel openings, one sub-pixel corresponding to at least one pixel opening, at least a portion of the light-emitting functional layer being located in the pixel opening corresponding to the sub-pixel, and the pixel opening being configured to expose the first electrode; wherein, the plurality of sub-pixels are divided into a plurality of repeating units, the plurality of repeating units being arranged in an array along a first direction and a second direction, at least one repeating unit including two pixel groups arranged along the second direction, each Each pixel group includes sub-pixels of different colors. In the same repeating unit, the light-emitting areas of the sub-pixels in two pixel groups are mirror-symmetrical with respect to a first axis of symmetry extending along the first direction. The different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel. The pixel driving circuit includes a first pixel driving circuit, a second pixel driving circuit, and a third pixel driving circuit arranged sequentially in the first direction. One of the first pixel driving circuit and the second pixel driving circuit is electrically connected to a first electrode of the first sub-pixel, and the other of the first pixel driving circuit and the second pixel driving circuit is electrically connected to a first electrode of the second sub-pixel. The third pixel driving circuit is electrically connected to the first electrode of the third sub-pixel. The orthographic projections of the first pixel driving circuit and the second pixel driving circuit on the substrate are at least partially mirror-symmetrical with respect to a second axis of symmetry extending along the second direction.

[0016] For example, according to at least one embodiment of the present disclosure, in the same repeating unit, the partial structure of the first electrode of the sub-pixel in two pixel groups is mirror-symmetrical with respect to the first axis of symmetry.

[0017] For example, according to at least one embodiment of this disclosure, the display substrate includes a metal layer located between the substrate and the first electrode, the metal layer including a plurality of power signal lines extending along a second direction and spaced apart along the first direction; the power signal lines are configured to provide a power voltage; the plurality of power signal lines include a first power signal line electrically connected to the first pixel driving circuit, a second power signal line electrically connected to the second pixel driving circuit, and a third power signal line electrically connected to the third pixel driving circuit; the minimum distance in the first direction between the orthographic projection of the first power signal line on the substrate and the orthographic projection of the second power signal line on the substrate is a first distance; the minimum distance in the first direction between the orthographic projection of the second power signal line on the substrate and the orthographic projection of the third power signal line on the substrate is a second distance; the first distance is less than the second distance.

[0018] For example, according to at least one embodiment of this disclosure, the display substrate includes a metal layer located between the substrate and the first electrode. The metal layer includes a first transition portion and a second transition portion, as well as a plurality of power signal lines. The first transition portion is electrically connected to the first pixel driving circuit, and the second transition portion is electrically connected to the second pixel driving circuit. The plurality of power signal lines extend along a second direction and are spaced apart along the first direction. The power signal lines are configured to provide a power supply voltage. The plurality of power signal lines include a first power signal line electrically connected to the first pixel driving circuit and a second power signal line electrically connected to the second pixel driving circuit. The first power signal line includes a first recess, and the second power signal line includes a second recess. The first recess and the second recess are disposed opposite to each other to form an opening region, and both the first transition portion and the second transition portion are located in the opening region.

[0019] For example, according to at least one embodiment of the present disclosure, a plurality of pixel groups in the plurality of repeating units are arranged along the first direction to form a pixel row, and a plurality of pixel rows are arranged along the second direction; in the plurality of pixel rows, a first electrode of the first sub-pixel is electrically connected to the first transition portion, and a first electrode of the second sub-pixel is electrically connected to the second transition portion.

[0020] For example, according to at least one embodiment of this disclosure, a plurality of pixel groups in the plurality of repeating units are arranged along the first direction to form a pixel row, and a plurality of pixel rows are arranged along the second direction; the plurality of pixel rows include a first pixel row and a second pixel row arranged alternately in the second direction; in the first pixel row, a first electrode of the first sub-pixel is electrically connected to the first transition portion, and a first electrode of the second sub-pixel is electrically connected to the second transition portion; in the second pixel row, a first electrode of the first sub-pixel is electrically connected to the second transition portion, and a first electrode of the second sub-pixel is electrically connected to the first transition portion.

[0021] For example, according to at least one embodiment of the present disclosure, there is a first relative positional relationship between the first transition portion and the second transition portion located in the first pixel row, and there is a second relative positional relationship between the first transition portion and the second transition portion located in the second pixel row, wherein the first relative positional relationship is different from the second relative positional relationship.

[0022] At least one embodiment of this disclosure provides a display device including the display substrate described in any of the above embodiments. Attached Figure Description

[0023] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure, and are not intended to limit this disclosure.

[0024] Figure 1 is a schematic diagram of a partial structure of a display substrate and a mask opening of a precision metal mask provided in at least one embodiment of the present disclosure.

[0025] Figure 2 is a cross-sectional schematic diagram of a display substrate provided in at least one embodiment of the present disclosure.

[0026] Figure 3 is an equivalent circuit diagram of the pixel driving circuit of the display substrate shown in Figure 1.

[0027] Figures 4A to 4H are schematic diagrams of different film layers in the substrate shown in Figure 1.

[0028] Figure 5 is a schematic diagram of a partial structure of a display substrate and the mask opening of a precision metal mask provided in at least one embodiment of the present disclosure.

[0029] Figures 6A and 6B are schematic diagrams of the film layer and signal lines of the first electrode of the display substrate provided in different examples of at least one embodiment of this disclosure.

[0030] Figure 7 is a schematic diagram of the film layer where the first electrode of the display substrate is located and the film layer where the data line is located, provided in at least one embodiment of the present disclosure.

[0031] Figure 8 is a schematic diagram of the pixel openings in a display substrate and the mask openings of a fine metal mask plate provided in another example of at least one embodiment of the present disclosure.

[0032] Figure 9 is a schematic diagram of the stacking of some film layers in the substrate shown in Figure 8.

[0033] Figure 10 is a schematic diagram of the first metal layer of a display substrate provided in at least one embodiment of the present disclosure.

[0034] Figure 11 is a schematic diagram of the second metal layer of a display substrate provided in at least one embodiment of the present disclosure.

[0035] Figure 12 is a schematic diagram of a portion of the film layer of a display substrate provided in at least one embodiment of the present disclosure. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. Based on the described embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0037] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that an element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects.

[0038] The terms "parallel," "perpendicular," and "identical" as used in this disclosure include the strictly defined meanings of "parallel," "perpendicular," and "identical," as well as terms such as "approximately parallel," "approximately perpendicular," and "approximately identical," which include a certain degree of error. Taking into account measurement and errors associated with the measurement of a specific quantity (i.e., limitations of the measurement system), they represent acceptable deviations for a specific value as determined by a person skilled in the art. In embodiments of this disclosure, "center" can include a strictly defined location at the geometric center as well as a location approximately at the center within a small area surrounding the geometric center. For example, "approximately" can mean within one or more standard deviations, or within 10% or 5% of the value.

[0039] Some OLED display substrates have polarizers on the display side to reduce the reflection of ambient light. However, polarizers are relatively thick and have low plasticity, making them difficult to use in the folded or rolled shapes of flexible OLED display substrates.

[0040] In their research, the inventors of this application discovered that Color Filter On Encapsulation (COE) technology offers more possibilities for flexible OLED products. For example, the color filter can be used to replace the polarizer, achieving anti-reflection properties in the OLED display substrate. COE technology can reduce the thickness of the display substrate, which is beneficial for improving the bending performance of the display substrate.

[0041] At least one embodiment of this disclosure provides a display substrate, including: a substrate, a plurality of sub-pixels, a pixel defining layer, a black matrix, and a color filter layer. Multiple sub-pixels are located on a substrate. Each sub-pixel includes a light-emitting unit, which includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer. The first electrode is located between the light-emitting functional layer and the substrate. A pixel defining layer is located on the side of the first electrode away from the substrate. The pixel defining layer includes multiple pixel openings, with one sub-pixel corresponding to at least one pixel opening. At least a portion of the light-emitting functional layer is located in the pixel opening corresponding to the sub-pixel, and the pixel opening is configured to expose the first electrode. The multiple sub-pixels are divided into multiple repeating units, which are arranged in an array along a first direction and a second direction. At least one repeating unit includes two pixel groups arranged along the second direction. Each pixel group includes sub-pixels of different colors. In the same repeating unit, the light-emitting areas of the sub-pixels in the two pixel groups are mirror-symmetrical with respect to a first axis of symmetry extending along the first direction. The display substrate also includes a black matrix and a color filter layer. The black matrix is ​​located on the side of the pixel defining layer away from the substrate, and the color filter layer is located on the side of the black matrix away from the substrate. The black matrix includes multiple black matrix openings, which are correspondingly arranged with the multiple pixel openings. The color filter layer includes multiple color filter patterns of different colors, which cover the multiple black matrix openings and are correspondingly arranged with the different color sub-pixels.

[0042] In at least one embodiment of the display substrate disclosed herein, in each repeating unit, the light-emitting areas of sub-pixels in two pixel groups are mirror-symmetrical with respect to a first axis of symmetry, such that light-emitting areas of the same color located on both sides of the first axis of symmetry are adjacent to each other. During the deposition of organic materials using a fine metal mask (FMM), the light-emitting functional layers of two sub-pixels of the same color can be formed through a single mask opening, reducing the difficulty of the fabrication process. Using a thinner color filter layer instead of a thicker polarizer improves the bendability of the display substrate. Furthermore, by setting the color filter pattern to cover the black matrix openings and ensuring that the black matrix openings correspond one-to-one with the pixel openings, the light extraction purity of the display substrate can be improved, as can the light extraction efficiency of the display substrate. Therefore, the display effect of the display substrate can be improved, and the power consumption of the display substrate can be reduced.

[0043] At least one embodiment of this disclosure provides a display substrate, including: a substrate, a plurality of sub-pixels, and a pixel defining layer. Multiple sub-pixels are located on a substrate. Each sub-pixel includes a pixel driving circuit and a light-emitting unit. The pixel driving circuit is configured to drive the light-emitting unit. The light-emitting unit includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer. The first electrode is located between the light-emitting functional layer and the substrate. A pixel defining layer is located on the side of the first electrode away from the substrate. The pixel defining layer includes multiple pixel openings. Each sub-pixel corresponds to at least one pixel opening. At least a portion of the light-emitting functional layer is located in the pixel opening corresponding to the sub-pixel, and the pixel opening is configured to expose the first electrode. The multiple sub-pixels are divided into multiple repeating units. The multiple repeating units are arranged in an array along a first direction and a second direction. At least one repeating unit includes two pixel groups arranged along the second direction. Each pixel group includes sub-pixels of different colors. In the same repeating unit, the light-emitting areas of the sub-pixels in the two pixel groups are mirror-symmetrical with respect to a first axis of symmetry extending along the first direction. The pixel driving circuit includes a first pixel driving circuit, a second pixel driving circuit, and a third pixel driving circuit arranged sequentially in the first direction. The orthographic projection of the first pixel driving circuit on the substrate and the orthographic projection of the second pixel driving circuit on the substrate are at least partially mirror-symmetrical with respect to a second axis of symmetry extending along the second direction.

[0044] In at least one embodiment of the display substrate disclosed herein, in each repeating unit, the light-emitting areas of sub-pixels in two pixel groups are mirror-symmetrical with respect to a first axis of symmetry, such that light-emitting areas of the same color located on both sides of the first axis of symmetry are adjacent to each other. During the deposition of organic materials using a fine metal mask (FMM), the light-emitting functional layers of two sub-pixels of the same color can be formed through a single mask opening, reducing the difficulty of the fabrication process. Setting the orthographic projection of the first pixel driving circuit on the substrate and the orthographic projection of the second pixel driving circuit on the substrate to be at least partially mirror-symmetrical with respect to a second axis of symmetry extending along a second direction is beneficial for improving the integration of the pixel driving circuit. Furthermore, the mirror symmetry of the two light-emitting areas with respect to the first axis of symmetry and the mirror symmetry of the two pixel driving circuits with respect to the second axis of symmetry facilitates the electrical connection between the first electrode of the sub-pixel and the corresponding pixel driving circuit.

[0045] At least one embodiment of this disclosure provides a display device, including the display substrate of any of the above embodiments.

[0046] The display substrate and display device are described below with reference to the accompanying drawings and through some embodiments.

[0047] Figure 1 is a schematic diagram of a portion of the structure of a display substrate and the mask opening of a precision metal mask provided in at least one embodiment of the present disclosure. Figure 2 is a cross-sectional schematic diagram of a display substrate provided in at least one embodiment of the present disclosure.

[0048] Referring to Figures 1 and 2, the display substrate includes a substrate 10, a plurality of sub-pixels 100, and a pixel defining layer 200. The plurality of sub-pixels 100 are located on the substrate 10, and each sub-pixel 100 includes a light-emitting unit 110. The light-emitting unit 110 includes a light-emitting functional layer (EML) and a first electrode 111 and a second electrode 112 located on opposite sides of the EML. The first electrode 111 is located between the EML and the substrate 10. For example, under voltage driving of the first and second electrodes, the light-emitting functional layer can emit light and achieve corresponding grayscale levels. For example, the first electrode can be an anode for transmitting a high-level voltage. For example, the second electrode can be a cathode for transmitting a low-level voltage.

[0049] For example, to achieve full-color display, multiple sub-pixels can emit light of different colors, such as red, green, and blue. For instance, Figure 1 shows that the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 each emit light of different colors. For example, the light-emitting functional layers of the first, second, and third sub-pixels are different to achieve different emitted colors.

[0050] Referring to Figures 1 and 2, the pixel defining layer 200 is located on the side of the first electrode 111 away from the substrate 10. The pixel defining layer 200 includes a plurality of pixel openings 201, and each sub-pixel 100 corresponds to at least one pixel opening 201 to define the light-emitting region M of the sub-pixel 100 through the pixel opening 201. At least a portion of the light-emitting functional layer EML is located in the pixel opening 201 corresponding to the sub-pixel 100, and the pixel opening 201 is configured to expose the first electrode 111.

[0051] Referring to Figures 1 and 2, multiple sub-pixels 100 are divided into multiple repeating units 101. Here, a repeating unit 101 refers to a pixel arrangement structure that can be formed by repeatedly arranging these repeating units 101. The multiple repeating units 101 are arranged in an array along a first direction X and a second direction Y. At least one repeating unit 101 includes two pixel groups 102 arranged along the second direction Y. For example, there may be one or more repeating units 101 that include two pixel groups 102 arranged along the second direction Y. For example, two pixel groups 102 within the same repeating unit 101 are adjacent to each other, such that there are no other pixel groups between the two pixel groups 102.

[0052] Referring to Figures 1 and 2, each pixel group 102 includes sub-pixels of different colors. For example, each pixel group 102 includes one red sub-pixel, one green sub-pixel, and one blue sub-pixel. This disclosure does not limit the number of sub-pixels included in each pixel group, as long as it facilitates full-color display using different colored sub-pixels. In the same repeating unit 101, the light-emitting areas M of the sub-pixels 100 in the two pixel groups 102 are mirror-symmetrical with respect to a first axis of symmetry A1 extending along a first direction X. For example, the first axis of symmetry A1 is located between two adjacent light-emitting areas in a second direction.

[0053] Referring to Figures 1 and 2, the display substrate further includes a black matrix 300 and a color filter layer 400. The black matrix 300 is located on the side of the pixel limiting layer 200 away from the substrate 10, and the color filter layer 400 is located on the side of the black matrix 300 away from the substrate 10. The black matrix 300 includes a plurality of black matrix openings 301, which are arranged in a one-to-one correspondence with a plurality of pixel openings 201, so that light emitted by the light-emitting unit 110 of the sub-pixel 100 can pass through the black matrix openings 301.

[0054] Referring to Figures 1 and 2, for example, the orthographic projection of each black matrix opening 301 onto the substrate 10 surrounds the orthographic projection of a pixel opening 201 onto the substrate 10. For example, the shape of the black matrix opening 301 is similar to the shape of the pixel opening 201. For example, an annular gap is formed between the orthographic projections of the black matrix opening 301 and the pixel opening 201, and the ratio of the annular gap width at different positions can be 0.9 to 1.1. For example, the annular gap width is equal at different positions.

[0055] Referring to Figures 1 and 2, the color filter layer 400 includes multiple color filter patterns 410 of different colors, covering multiple black matrix openings 301 and corresponding to different color sub-pixels. For example, the multiple color filter patterns 410 can correspond one-to-one with the multiple black matrix openings 301 and one-to-one with the different color sub-pixels. For example, one color filter pattern 410 can cover multiple black matrix openings 301 and correspond to a specific color sub-pixel. For example, the shape of the color filter pattern can be different from the shape of the light-emitting area of ​​the sub-pixel. For example, the shape of the color filter pattern can have a similar shape to the pixel opening it covers.

[0056] Referring to Figures 1 and 2, in the display substrate provided in this embodiment, in each repeating unit 101, the light-emitting areas of the sub-pixels 100 in the two pixel groups 102 are mirror-symmetrical with respect to the first axis of symmetry A1, so that the light-emitting areas of the same color on both sides of the first axis of symmetry A1 are adjacent to each other. During the deposition of organic materials using a fine metal mask (FMM), the light-emitting functional layers of two sub-pixels 100 of the same color can be formed through a single mask opening, reducing the difficulty of the fabrication process. Using a thinner color filter layer 400 instead of a thicker polarizer improves the bendability of the display substrate. Furthermore, by setting the color filter pattern 410 to cover the black matrix opening 301 and ensuring that the black matrix opening 301 corresponds one-to-one with the pixel opening 201, the light extraction purity and light extraction rate of the display substrate can be improved. Therefore, the display effect of the display substrate can be improved while reducing its power consumption.

[0057] Referring to Figure 2, in the direction Z perpendicular to the substrate 10, in addition to the light-emitting functional layer (EML) between the first electrode 111 and the second electrode 112, other functional layers may also be included. These other functional layers may include hole injection layers, hole transport layers, electron transport layers, electron injection layers, and other films. For example, at least one of these other functional layers may be a single, continuous film. For instance, the first electrodes 111 of different color sub-pixels are spaced apart from each other, and the second electrodes 112 of different color sub-pixels may be integrally formed electrodes, such as electrodes formed over an entire surface.

[0058] Figure 2 schematically simplifies the other film layers between the first electrode 111 and the substrate 10 to film layer 20. Film layer 20 may include multiple conductive layers and insulating layers located between adjacent conductive layers. For example, the multiple conductive layers may include pixel circuits electrically connected to the first electrode 111 and signal lines electrically connected to the pixel circuits. For example, the insulating layer may include organic layers, inorganic layers, and other film layers.

[0059] For example, the display substrate also includes an encapsulation layer 30 located on the side of the second electrode 112 of the sub-pixel away from the substrate 10, and a color filter layer 400 is disposed on the encapsulation layer 30 to form a COE structure. For example, other light-transmitting layers may be disposed between the color filter layer 400 and the black matrix 300.

[0060] Referring to Figure 1, in some examples, the pixel opening 201 includes a curved edge E1. A pixel opening 201 with a curved edge E1 facilitates vapor deposition and improves the pixel aperture ratio. For example, the mask opening F01 of the FMM can also have a curved edge E2. For example, setting the mask opening F01 to have a curved edge E2 can match the shape of the pixel opening 201, which facilitates the precise vapor deposition of the luminescent material onto the target location, enabling the COE process, reducing display defects caused by shape mismatch, such as uneven light emission and color deviation, and improving product yield and display quality. For example, the radius of curvature of the curved edge of the pixel opening can be the same as the radius of curvature of the curved edge of the mask opening. For example, the radius of curvature of the curved edge of the pixel opening can be smaller than the radius of curvature of the curved edge of the mask opening.

[0061] For example, when the pixel opening includes curved edges, the shape of the mask opening can also be rectangular or other polygonal, and this disclosure does not limit it.

[0062] Referring to Figures 1 and 2, for example, the black matrix opening 301 also includes curved edges, and the planar shape of the pixel opening 201 is similar to the planar shape of the black matrix opening 301. For example, when a color filter pattern 410 covers a corresponding black matrix opening 301, the planar shape of the color filter pattern 410 is similar to the planar shape of the black matrix opening 301. For example, when a color filter pattern covers multiple black matrix openings, the planar shape of the color filter pattern may differ from the planar shape of the black matrix openings.

[0063] The curved edge of the black matrix opening can reduce or even eliminate the color separation phenomenon caused by diffraction of external light at the edge of the black matrix opening, thereby improving the display effect of the display substrate. In the embodiments of this disclosure, the color separation phenomenon refers to the phenomenon that the reflected light (e.g., red, green, and blue) is separated under external light (e.g., point light source, line light source) when the display substrate is in the off state. Setting the pixel opening to match the shape of the black matrix opening, that is, setting it to include a curved edge, is beneficial to control the light-emitting area of ​​each sub-pixel, making the color mixing of the sub-pixels more accurate and reducing color deviation.

[0064] In some examples, the shape of the pixel opening includes at least one of circular, elliptical, and rectangular shapes. For example, a rectangular shape can be a rectangle. For example, a rectangular shape can be a rounded rectangle. For example, the shape of the mask opening in an FMM is similar to the shape of the pixel opening.

[0065] However, this disclosure is not limited to this. For example, the shape of the pixel opening can also be rectangular, and the shape of the mask opening of the FMM can also be rectangular. For example, the shape of the pixel opening can also be polygonal, and the shape of the mask opening of the FMM can also be polygonal.

[0066] For example, subpixels of different colors can be set to pixel openings of different shapes as needed to facilitate the close arrangement of subpixels, and while meeting the subpixel spacing requirements, the area of ​​each subpixel can be increased as much as possible, reducing the driving current of the display substrate and increasing the lifespan of the display device.

[0067] Figure 3 is an equivalent circuit diagram of the pixel driving circuit of the display substrate shown in Figure 1.

[0068] Referring to Figure 3, for example, the pixel driving circuit includes multiple switching transistors, a driving transistor T3, a first capacitor C1, and a second capacitor C2. The multiple switching transistors include: a first transistor T1, a second transistor T2, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and a seventh transistor T7.

[0069] Referring to Figure 3, for example, the gate of the driving transistor T3 is connected to the first node N1, the first electrode is connected to the second node N2, and the second electrode is connected to the third node N3. The first electrode of the second capacitor C2 is connected to the fourth node N4, and the second electrode is connected to the first node N1. The first electrode of the first capacitor C1 is connected to the fourth node N4, and the second electrode is connected to the third node N3.

[0070] Referring to Figure 3, for example, the first transistor T1 has its first electrode connected to the first initial signal terminal vinit1, its second electrode connected to the fourth node N4, and its gate connected to the third reset signal terminal Re3. The second transistor T2 has its first electrode connected to the first initial signal terminal vinit1, its second electrode connected to the first node N1, and its gate connected to the second reset signal terminal Re2. The fourth transistor T4 has its first electrode connected to the data signal terminal da, its second electrode connected to the fifth node N5, and its gate connected to the gate drive signal terminal gate. The fifth transistor T5 has its first electrode connected to the first power supply terminal vdd, its second electrode connected to the second node N2, and its gate connected to the first light-emitting control signal terminal EM1. The sixth transistor T6 has its first electrode connected to the third node N3, its second electrode connected to the first electrode of the light-emitting unit 110, and its gate connected to the second light-emitting control signal terminal EM2. The seventh transistor T7 has its first electrode connected to the second initial signal terminal vinit2, its second electrode connected to the anode of the light-emitting unit, and its gate connected to the first reset signal terminal Re1. The cathode of the light-emitting unit 110 is connected to the second power supply terminal vss.

[0071] Referring to Figure 3, for example, the first transistor T1, the second transistor T2, the driving transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 can be N-type transistors.

[0072] Figures 4A to 4H are schematic diagrams of different film layers in the substrate shown in Figure 1. Among them, Figure 4H is a stacked diagram obtained by sequentially superimposing Figures 4A to 4G.

[0073] As shown in Figures 4A to 4H, for example, the display substrate includes a first gate metal layer gate1, a second gate metal layer gate2, an active layer ZL, a third gate metal layer gate3, a first metal layer SD1, a second metal layer SD2, and a film layer AND containing the first electrode, which are sequentially stacked on the substrate.

[0074] Referring to Figures 3, 4A, and 4H, for example, the first gate metal layer gate1 may include a first conductive portion 11, a second conductive portion 12, and a first via connection portion 13, wherein the first conductive portion 11 is connected between the second conductive portion 12 and the first via connection portion 13. The first conductive portion 11 is used to form the first electrode of the first capacitor C1, and the second conductive portion 12 is used to form the first electrode of the second capacitor C2.

[0075] Referring to Figures 3, 4B, and 4H, for example, the second gate metal layer gate2 may include a third light-emitting control signal line 2EM1, a fourth light-emitting control signal line 2EM2, a fourth reset signal line 2Re1, a third conductive portion 23, a fourth conductive portion 24, a fifth conductive portion 25, a sixth conductive portion 26, and a seventh conductive portion 27. The orthogonal projections of the third light-emitting control signal line 2EM1, the fourth light-emitting control signal line 2EM2, and the fourth reset signal line 2Re1 onto the substrate extend along a first direction X. The third light-emitting control signal line 2EM1 provides the first light-emitting control signal terminal EM1 in Figure 3, the fourth light-emitting control signal line 2EM2 provides the second light-emitting control signal terminal EM2 in Figure 3, and the fourth reset signal line 2Re1 provides the first reset signal terminal Re1 in Figure 3. The sixth conductive portion 26 forms the second electrode of the first capacitor C1; the seventh conductive portion 27 forms the second electrode of the second capacitor C2.

[0076] Referring to Figures 3, 4C, and 4H, the material of the active layer ZL may include metal-oxide semiconductor materials, such as indium gallium zinc oxide (IGZO). For example, the active layer ZL can be used to fabricate the active layer of the aforementioned transistor to form the channel region of the transistor. For example, the active layer ZL may include a first active portion 71, a second active portion 72, a third active portion 73, a fourth active portion 74, a fifth active portion 75, a sixth active portion 76, a seventh active portion 77, an eighth active portion 78, a ninth active portion 79, a tenth active portion 701, an eleventh active portion 702, a twelfth active portion 703, a thirteenth active portion 704, a fourteenth active portion 705, a fifteenth active portion 706, and a sixteenth active portion 707. The first active portion 71 is used to form the channel region of the first transistor T1, the second active portion 72 is used to form the channel region of the second transistor T2; the third active portion 73 can be used to form the channel region of the driving transistor T3; the fourth active portion 74 can be used to form the channel region of the fourth transistor T4; the fifth active portion 75 can be used to form the channel region of the fifth transistor T5; the sixth active portion 76 can be used to form the channel region of the sixth transistor T6; and the seventh active portion 77 can be used to form the channel region of the seventh transistor T7. The orthogonal projection of the third light-emitting control signal line 2EM1 on the substrate can cover the orthogonal projection of the fifth active part 75 on the substrate. A portion of the structure of the third light-emitting control signal line 2EM1 can be used to form the bottom gate of the fifth transistor T5. The orthogonal projection of the fourth light-emitting control signal line 2EM2 on the substrate can cover the orthogonal projection of the sixth active part 76 on the substrate. A portion of the structure of the fourth light-emitting control signal line 2EM2 can be used to form the bottom gate of the sixth transistor T6. The orthogonal projection of the fourth reset signal line 2Re1 on the substrate can cover the orthogonal projection of the seventh active part 77 on the substrate. A portion of the structure of the fourth reset signal line 2Re1 can be used to form the bottom gate of the seventh transistor T7.

[0077] Referring to Figures 3, 4C, and 4H, for example, the orthogonal projection of the sixth conductive portion 26 on the substrate covers the orthogonal projection of the third active portion 73 on the substrate. The sixth conductive portion 26 can shield the third active portion 73 from light to reduce the influence of illumination on the characteristics of the driving transistor T3. The orthogonal projection of the third conductive portion 23 on the substrate covers the orthogonal projection of the first active portion 71 on the substrate. The third conductive portion 23 is used to form the bottom gate of the first transistor T1. The orthogonal projection of the fourth conductive portion 24 on the substrate covers the orthogonal projection of the second active portion 72 on the substrate. The fourth conductive portion 24 is used to form the bottom gate of the second transistor T2. The orthogonal projection of the fifth conductive portion 25 on the substrate covers the orthogonal projection of the fourth active portion 74 on the substrate. The fifth conductive portion 25 is used to form the bottom gate of the fourth transistor T4.

[0078] Referring to Figures 3, 4D, and 4H, for example, the third gate metal layer 3 may include a first light-emitting control signal line 3EM1, a second light-emitting control signal line 3EM2, a first reset signal line 3Re1, an eighth conductive portion 38, a ninth conductive portion 39, a tenth conductive portion 310, and an eleventh conductive portion 311. The orthographic projections of the first light-emitting control signal line 3EM1, the second light-emitting control signal line 3EM2, and the first reset signal line 3Re1 onto the substrate extend along a first direction X. The first light-emitting control signal line 3EM1 provides the first light-emitting control signal terminal EM1 in Figure 3, the second light-emitting control signal line 3EM2 provides the second light-emitting control signal terminal EM2 in Figure 3, and the first reset signal line 3Re1 provides the first reset signal terminal Re1 in Figure 3. The first light emission control signal line 3EM1 and the third light emission control signal line 2EM1 can be connected via a via in the display area or the bezel area. The second light emission control signal line 3EM2 and the fourth light emission control signal line 2EM2 can be connected via a via in the display area or the bezel area. The first reset signal line 3Re1 and the fourth reset signal line 2Re1 can be connected via a via in the display area or the bezel area.

[0079] Referring to Figures 3, 4D, and 4H, for example, the orthographic projection of the eighth conductive portion 38 onto the substrate covers the orthographic projection of the first active portion 71 onto the substrate. The eighth conductive portion 38 is used to form the top gate of the first transistor T1. The orthographic projection of the ninth conductive portion 39 onto the substrate covers the orthographic projection of the second active portion 72 onto the substrate. The ninth conductive portion 39 is used to form the top gate of the second transistor. The orthographic projection of the tenth conductive portion 310 onto the substrate covers the orthographic projection of the fourth active portion 74 onto the substrate. The tenth conductive portion 310 is used to form the top gate of the fourth transistor T4. The orthographic projection of the eleventh conductive portion 311 onto the substrate covers the orthographic projection of the third active portion 73 onto the substrate. The eleventh conductive portion 311 is used to form the top gate of the driving transistor T3. This display substrate can use the third gate metal layer as a mask to perform conductor processing on the active layer. That is, the area of ​​the active layer covered by the third gate metal layer can form the channel region of the transistor, and the area of ​​the active layer not covered by the third gate metal layer forms a conductor structure.

[0080] Referring to Figures 3, 4E, and 4H, for example, the first metal layer SD1 may include a first power supply line VDD, a gate line 500, a second reset signal line Re2, a first initial signal line Vinit1, a third reset signal line Re3, a second initial signal line Vinit2, a second power supply line 4VSS, a first bridging portion 41, a second bridging portion 42, a third bridging portion 43, a fourth bridging portion 44, a fifth bridging portion 45, a sixth bridging portion 46, a seventh bridging portion 47, and an eighth bridging portion 48. The first power line VDD, gate line 500, second reset signal line Re2, first initial signal line Vinit1, third reset signal line Re3, second initial signal line Vinit2, and second power line 4VSS are projected onto the substrate along the first direction X. The first power line VDD provides the first power supply terminal Vdd in Figure 3. The gate line 500 provides the gate drive signal terminal gate in Figure 3. The second reset signal line Re2 provides the second reset signal terminal Re2 in Figure 3. The first initial signal line Vinit1 provides the first initial signal terminal vinit1 in Figure 3. The third reset signal line Re3 provides the third reset signal terminal Re3 in Figure 3. The second initial signal line Vinit2 provides the second initial signal terminal vinit2 in Figure 3. The second power line 4VSS provides the second power supply terminal vss in Figure 3.

[0081] Referring to Figures 3, 4D, and 4H, for example, the first power line VDD is connected to the thirteenth active section 704 via a via, connecting to the first terminal of the fifth transistor T5. The gate line 500 is connected to the fifth conductive section 25 and the tenth conductive section 310 via vias, connecting the gate drive signal terminal and the bottom and top gates of the fourth transistor T4. The second reset signal line Re2 is connected to the fourth conductive section 24 and the ninth conductive section 39 via vias, connecting the second reset signal terminal and the bottom and top gates of the second transistor T2. The first initial signal line Vinit1 is connected to the ninth active section 79 via a via, connecting the first initial signal terminal and the first terminals of the second transistor T2 and the first terminal of the first transistor T1. The third reset signal line Re3 is connected to the third conductive section 23 and the eighth conductive section 38 via vias, connecting the third reset signal terminal and the bottom and top gates of the first transistor T1. The second initial signal line Vinit2 is connected to the sixteenth active section 707 via a via, connecting the second initial signal terminal and the first terminal of the seventh transistor T7. The first bridging portion 41 can be connected to the twelfth active portion 703 via a via, thereby connecting the first electrode of the fourth transistor T4. The second bridging portion 42 can be connected to the seventh conductive portion 27 and the eleventh active portion 702 via vias, respectively, thereby connecting the second electrode of the second capacitor C2 to the second electrode of the fourth transistor T4 and the second electrode of the second transistor T2. The third bridging portion 43 can be connected to the eleventh conductive portion 311 and the tenth active portion 701 via vias, respectively, thereby connecting the gate of the driving transistor T3 to the second electrode of the fourth transistor T4 and the second electrode of the second transistor T2. The fourth bridging portion 44 can be connected to the fourteenth active portion 705 and the sixth conductive portion 26 via vias, respectively, thereby connecting the second electrode of the driving transistor T3 to the second electrode of the first capacitor C1. The fifth bridging portion 45 can be connected to the first via connection portion 13 and the eighth active portion 78 via vias, respectively, thereby connecting the second electrode of the first transistor T1 to the first electrode of the first capacitor C1 and the first electrode of the second capacitor C2. The sixth bridging section 46, the seventh bridging section 47 and the eighth bridging section 48 are respectively connected to the fifteenth active section 706 through vias to connect the second electrode of the sixth transistor T6 and the second electrode of the seventh transistor T7.

[0082] Referring to Figures 3, 4D, and 4H, for example, the first bridging portion 41 can be connected to the twelfth active portion 703 via a via to connect the first electrode of the fourth transistor T4. The second bridging portion 42 can be connected to the seventh conductive portion 27 and the eleventh active portion 702 via vias to connect the second electrode of the second capacitor C2 to the second electrode of the fourth transistor T4 and the second electrode of the second transistor T2. The third bridging portion 43 can be connected to the eleventh conductive portion 311 and the tenth active portion 701 via vias to connect the gate of the driving transistor T3 to the second electrode of the fourth transistor T4 and the second electrode of the second transistor T2. The fourth bridging portion 44 can be connected to the fourteenth active portion 705 and the sixth conductive portion 26 via vias to connect the second electrode of the driving transistor T3 to the second electrode of the first capacitor C1. The fifth bridging portion 45 can be connected to the first via connection portion 13 and the eighth active portion 78 via vias to connect the second electrode of the first transistor T1 to the first electrode of the first capacitor C1 and the first electrode of the second capacitor C2. The sixth bridging section 46 is connected to the fifteenth active section 706 via a via to connect the second terminal of the sixth transistor T6 and the second terminal of the seventh transistor T7.

[0083] Referring to Figures 3, 4F, and 4H, for example, the second metal layer SD2 may include a data line 600, a power signal line 700, and a signal connection line Lx. The orthographic projections of the data line 600, power signal line 700, and signal connection line Lx on the substrate extend along the second direction Y. The signal connection line Lx is used to provide initialization signals or power signals, etc. The data line 600 is used to provide the data signal terminal da in Figure 3. The power signal line 700 is connected via a via to a second power line 4VSS that overlaps with its orthographic projection on the substrate. The power signal line 700 and the second power line 4VSS form a mesh structure at least in the display area. This mesh structure can be connected to a common cathode in the display substrate to reduce the voltage difference of the second power terminal vss at different locations on the display substrate. The common cathode in the display substrate is used to form the cathode of the light-emitting unit. The common cathode can be located on the side of the light-emitting unit 110 facing away from the substrate.

[0084] Referring to Figures 3, 4G, and 4H, the film layer AND containing the first electrode includes multiple electrode sections, including a first electrode section R, a second electrode section G, and a third electrode section B. The first electrode section R forms the first electrode of the light-emitting unit of the red sub-pixel, the second electrode section G forms the first electrode of the light-emitting unit of the green sub-pixel, and the third electrode section B forms the first electrode of the light-emitting unit of the blue sub-pixel. The electrode sections are connected via vias to the corresponding transition section 57 located in the second metal layer SD2, thereby connecting the second electrode of the sixth transistor T6 and the first electrode of the light-emitting unit. Specifically, the first pixel driving circuit 121 drives the light-emitting unit of the red sub-pixel, the second pixel driving circuit 122 drives the light-emitting unit of the green sub-pixel, and the third pixel driving circuit 123 drives the light-emitting unit of the blue sub-pixel.

[0085] Referring to Figure 4H, in some examples, sub-pixel 100 includes a pixel driving circuit 120 configured to drive the light-emitting unit 110. Different color sub-pixels include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3; for example, the first sub-pixel SP1 is a red sub-pixel, the second sub-pixel SP2 is a green sub-pixel, and the third sub-pixel SP3 is a blue sub-pixel. The pixel driving circuit 120 includes a first pixel driving circuit 121 for the first sub-pixel SP1, a second pixel driving circuit 122 for the second sub-pixel SP2, and a third pixel driving circuit 123 for the third sub-pixel SP3, arranged sequentially in the first direction X. For example, the second pixel driving circuit 122 is located between the first pixel driving circuit 121 and the third pixel driving circuit 123. For example, the first pixel driving circuit is configured to drive the light-emitting unit of the red sub-pixel, the second pixel driving circuit is configured to drive the light-emitting unit of the green sub-pixel, and the third pixel driving circuit is configured to drive the light-emitting unit of the blue sub-pixel.

[0086] In some other embodiments, the first pixel driving circuit, the second pixel driving circuit, and the third pixel driving circuit are arranged sequentially along a first direction and are not mirror-symmetrical between each other. The connection between the first electrode of each sub-pixel and the corresponding pixel driving circuit is roughly arranged on a straight line extending along the first direction. In this case, the connection between the second pixel driving circuit and the first electrode of the second sub-pixel is located directly below the first electrode of the third sub-pixel, affecting the flatness of the first electrode of the third sub-pixel.

[0087] Referring to Figures 4A to 4H, the dashed boxes schematically show the approximate areas where the first pixel driving circuit 121, the second pixel driving circuit 122, and the third pixel driving circuit 123 are located. For example, the area of ​​the pixel driving circuit within the area selected by the dashed boxes generally occupies more than 90% of the total area of ​​the pixel driving circuit.

[0088] Referring to Figures 4A to 4H, in some examples, the orthographic projection of the first pixel driving circuit 121 on the substrate 10 and the orthographic projection of the second pixel driving circuit 122 on the substrate 10 are at least partially mirror-symmetrical with respect to a second axis of symmetry A2 extending along the second direction Y. For example, the area of ​​the portion of the orthographic projection of the first pixel driving circuit 121 on the substrate 10 and the orthographic projection of the second pixel driving circuit 122 on the substrate 10 that are mirror-symmetrical along the second axis of symmetry A2 accounts for more than 90% of the total orthographic projection area.

[0089] Referring to Figures 4A to 4H, the first electrode 111R of the first sub-pixel SP1 and the first connection point RA of the first pixel driving circuit 121, and the first electrode 111G of the second sub-pixel SP2 and the second connection point GA of the second pixel driving circuit 122 are close to each other. The first electrode 111G of the second sub-pixel SP2 and the second pixel driving circuit 122 can be electrically connected with a shorter connection line, thereby avoiding the first electrode 111B of the third sub-pixel SP3, which is beneficial to the flatness of the first electrode 111B. For example, the orthographic projection of the portion of the first pixel driving circuit 121 excluding the first connection point RA and the orthographic projection of the portion of the second pixel driving circuit 122 excluding the second connection point GA on the substrate 10 are completely mirror-symmetrical with respect to the second axis of symmetry A2.

[0090] Referring to Figures 4A to 4H, in some examples, the orthographic projections of the second pixel driving circuit 122 and the third pixel driving circuit 123 on the substrate 10 are at least partially mirror-symmetrical with respect to the third axis of symmetry A3 extending along the second direction Y. This facilitates a more compact arrangement of the first pixel driving circuit 121, the second pixel driving circuit 122, and the third pixel driving circuit 123. Furthermore, due to the mirror-symmetrical arrangement, the first connection point RA and the second connection point GA are close to each other, while the second connection point GA and the third connection point BA are far apart. The space at the location of the third connection point BA is relatively large, which facilitates the electrical connection between the first electrode 111B of the third sub-pixel SP3 and the third pixel driving circuit 123.

[0091] Referring to Figure 4H, for example, the center line connecting the first electrode 111B of the third sub-pixel SP3 with the third connection point BA, the first connection point RA, and the second connection point GA of the third pixel driving circuit 123 can be approximately on a straight line extending along the first direction X, to facilitate the electrical connection between the first electrode and the corresponding pixel driving circuit. However, this disclosure is not limited to this; for example, the center line connecting one of the first and second connections with the third connection point can also be on a straight line extending along the first direction.

[0092] Figure 5 is a schematic diagram of a partial structure of a display substrate and the mask opening of a precision metal mask provided in at least one embodiment of this disclosure. The difference between the display substrate shown in Figure 5 and the display substrate shown in Figure 1 is that the first electrode structure of the sub-pixel of the display substrate shown in Figure 5 is different from that of the display substrate shown in Figure 1.

[0093] Referring to Figure 5, in some examples, in the same repeating unit 101, a portion of the structure of the first electrode 111 of the sub-pixel 100 in the two pixel groups 102 is mirror-symmetrical with respect to the first axis of symmetry A1, which facilitates the fabrication of the first electrode 111 and the connection with the corresponding pixel driving circuit. It is understood that, referring to Figure 1, depending on the layout design requirements, the first electrodes of the sub-pixels in the two pixel groups in the same repeating unit can also be set to be non-mirror-symmetrical, and this disclosure does not impose any limitations on this. For example, in conjunction with the examples described later, in the same repeating unit 101, the main body 1111 of the first electrode 111 of the sub-pixel 100 in the two pixel groups 102 is mirror-symmetrical with respect to the first axis of symmetry A1.

[0094] Referring to Figure 5, in some examples, different color subpixels include a first subpixel SP1, a second subpixel SP2, and a third subpixel SP3. For example, the first subpixel SP1 can be a red subpixel, the second subpixel SP2 can be a green subpixel, and the third subpixel SP3 can be a blue subpixel.

[0095] Referring to Figure 5, multiple pixel groups 102 in multiple repeating units 101 are arranged along a first direction X to form pixel rows 1021, and multiple pixel rows 1021 are arranged along a second direction Y. Each pixel row 1021 includes a first sub-pixel row R1 and a second sub-pixel row R2 extending along the first direction X, and the first sub-pixel row R1 and the second sub-pixel row R2 are arranged along the second direction Y. For example, each pixel row 1021 includes one row of first sub-pixel row R1 and one row of second sub-pixel row R2. For example, two adjacent pixel rows 1021 in the second direction Y are mirror symmetrical along a first axis of symmetry A1. For example, in two adjacent pixel rows 1021 in the second direction Y, the first sub-pixel row R1, the second sub-pixel row R2, the second sub-pixel row R2 and the first sub-pixel row R1 are arranged sequentially along the second direction Y. For example, two pixel rows 1021 are adjacent in the second direction Y if there are no other pixel rows between these two pixel rows 1021.

[0096] Referring to Figure 5, the first sub-pixel row R1 includes a plurality of first sub-pixels SP1 arranged along the first direction X, and the second sub-pixel row R2 includes a plurality of second sub-pixels SP2 and a plurality of third sub-pixels SP3 alternately arranged along the first direction X. For example, in two adjacent pixel rows 1021 in the second direction Y, the two first sub-pixel rows R1 are adjacent to each other, so that the light-emitting areas of the two adjacent first sub-pixels SP1 in the two first sub-pixel rows R1 in the second direction Y can be vapor-deposited within a mask opening of the FMM. In two adjacent pixel rows 1021 in the second direction Y, the two second sub-pixel rows R2 are adjacent to each other, so that the light-emitting areas of the two adjacent second sub-pixels SP2 in the two second sub-pixel rows R2 can be vapor-deposited within a mask opening of the FMM, and the third sub-pixels SP3 in the two second sub-pixel rows R2 can be vapor-deposited within a mask opening of the FMM.

[0097] Referring to Figure 5, in some examples, the pixel aperture 201 includes a first pixel aperture 2011, a second pixel aperture 2012, and a third pixel aperture 2013, and different color sub-pixels include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. One first sub-pixel SP1 corresponds to multiple first pixel apertures 2011, and the multiple first pixel apertures 2011 are arranged along a first direction X. For example, one first sub-pixel SP1 corresponds to three first pixel apertures 2011 arranged along the first direction X. By setting multiple first pixel apertures 2011, it is beneficial to increase the aperture ratio of the first sub-pixel SP1. One second sub-pixel SP2 corresponds to multiple second pixel apertures 2012, and the multiple second pixel apertures 2012 are arranged along a second direction Y. For example, one second sub-pixel SP2 corresponds to three second pixel apertures 2012 arranged along the second direction Y. By setting multiple second pixel apertures 2012, it is beneficial to increase the aperture ratio of the second sub-pixel SP2. One third sub-pixel SP3 corresponds to multiple third pixel openings 2013, which are arranged along the second direction Y. For example, one third sub-pixel SP3 corresponds to two first pixel openings 2011 arranged along the second direction Y. By setting multiple third pixel openings 2013, it is beneficial to increase the aperture ratio of the third sub-pixel SP3. It can be understood that by setting multiple pixel openings, the spacing between pixel openings (PDL gap) can be reduced, thereby increasing the aperture ratio.

[0098] For example, the size of the multiple pixel openings corresponding to each sub-pixel can be set according to the size of the first electrode corresponding to the sub-pixel. For example, if the area of ​​the first electrode of the third sub-pixel is larger than the area of ​​the first electrode of the first sub-pixel and larger than the area of ​​the first electrode of the second sub-pixel, then the third pixel opening corresponding to the third sub-pixel can be set to be larger. For example, when the shapes of the first pixel opening, the second pixel opening, and the third pixel opening are all circular, the diameter of the third pixel opening is the largest.

[0099] For example, multiple pixel openings can also be arranged in other ways, such as an array arrangement. As long as it is beneficial to improve the aperture ratio of sub-pixels, this disclosure does not limit the arrangement and shape of pixel openings.

[0100] Referring to FIG5, in some examples, the first electrode 111 includes a main body 1111 and a connecting portion 1112, the connecting portion 1112 being configured to be electrically connected to a pixel driving circuit. At least one sub-pixel 100 corresponds to a plurality of pixel openings 201. For example, each of all sub-pixels 100 corresponds to a plurality of pixel openings 201.

[0101] Referring to Figure 5, for example, the maximum size of the first pixel opening 2011 is smaller than the minimum size of the main body of the first electrode of the first sub-pixel SP1 in the second direction Y. For example, the maximum size of the second pixel opening 2012 is smaller than the minimum size of the main body of the first electrode of the second sub-pixel SP2 in the first direction X. For example, the maximum size of the third pixel opening 2013 is smaller than the minimum size of the main body of the first electrode of the third sub-pixel SP3 in the first direction X.

[0102] The difference between the film layer containing the first electrode shown in Figure 5 and the film layer containing the first electrode shown in Figure 1 is that the main body of the first electrode shown in Figure 5 includes multiple sub-parts, and the sub-parts are spaced apart from each other.

[0103] Referring to Figure 5, the main body 1111 includes a plurality of interconnected sub-parts 111a and sub-connecting parts 111b connecting adjacent sub-parts. A plurality of pixel openings 201 correspond one-to-one with the plurality of sub-parts 111a, and each pixel opening 201 exposes at least a portion of a sub-part 111a. For example, the plurality of sub-parts 111a are interconnected via sub-connecting parts 111b. By providing a plurality of sub-parts 111a and a plurality of pixel openings 201, the pixel aperture ratio requirement can be met while the spacing between adjacent sub-parts 111a allows for trace avoidance, preventing signal crosstalk. The specific arrangement of the plurality of sub-parts will be described in the examples described later.

[0104] For example, each sub-part may have multiple pixel openings, and this disclosure does not limit this. For example, the shape of the pixel openings may be circular, rectangular, or other shapes, and this disclosure does not limit this.

[0105] Figure 6A is a schematic diagram of the film layer containing the first electrode and the film layer containing the signal line of a display substrate provided in at least one embodiment of this disclosure. For example, the film layer containing the signal line shown in Figure 6A has the same structure as the first metal layer SD1 shown in Figure 4E. It should be noted that the film layer containing the first electrode shown in Figure 6A has a different structure than the film layer containing the first electrode shown in Figure 1.

[0106] Referring to FIG6A and in conjunction with FIG4E, in some examples, the display substrate further includes signal lines extending along a first direction X, the signal lines including gate lines 500 and one of initial signal lines. For example, the initial signal lines include a first initial signal line Vinit1 and a second initial signal line Vinit2. The signal lines are located between the substrate 10 and the first electrode 111. Different color sub-pixels include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. For example, FIG6A schematically shows the regions where the main body of the first electrode of the first sub-pixel SP1, the main body of the first electrode of the second sub-pixel SP2, and the main body of the first electrode of the third sub-pixel SP3 are located, indicated by dashed boxes. As shown in FIG6A, the first electrode 111 of the third sub-pixel SP3 includes a plurality of sub-parts 111a and a sub-connection portion 111b connecting two adjacent sub-parts, the plurality of sub-parts 111a being spaced apart along the second direction Y. In the direction perpendicular to the substrate 10, the second initial signal line Vinit2 in the signal lines overlaps with the spacing between two adjacent sub-parts 111a in the plurality of sub-parts 111a. The spacing between two adjacent sub-parts 111a in the second direction Y can avoid the second initial signal line Vinit2, preventing signal crosstalk between the second initial signal line Vinit2 and the first electrode 111.

[0107] It is understood that Figure 6A schematically shows two sub-sections 111a avoiding the second initial signal line Vinit2, but this disclosure is not limited thereto. For example, the shape and relative position of the two sub-sections can also be set to avoid signal lines such as the first initial signal line.

[0108] For example, in a direction perpendicular to the substrate, the signal line may not overlap with any of the sub-sections at all, or it may only partially overlap; this disclosure does not limit this.

[0109] Figure 6B schematically illustrates the relative positional relationship between the sub-parts of the first electrode and the gate line. For example, the first electrode 111 of the third sub-pixel SP3 includes a plurality of sub-parts 111a spaced apart in the second direction Y. In the direction perpendicular to the substrate, the gate line 500 overlaps with the spacing between two adjacent sub-parts 111a to avoid interference between the gate line 500 and the first electrode 111 of the third sub-pixel SP3.

[0110] Figure 7 is a schematic diagram of the film layer containing the first electrode and the film layer containing the data line of a display substrate provided in at least one embodiment of this disclosure. For example, the film layer containing the data line shown in Figure 7 has the same structure as the second metal layer SD2 shown in Figure 4F. It should be noted that the film layer containing the first electrode shown in Figure 7 has a different structure than the film layer containing the first electrode shown in Figure 6A.

[0111] Referring to FIG7 and in conjunction with FIG4F, in some examples, the display substrate further includes a data line 600 located between the substrate 10 and the first electrode 111. Different color sub-pixels include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. For example, FIG7 schematically shows the areas containing the main body of the first electrode of the first sub-pixel SP1, the main body of the first electrode of the second sub-pixel SP2, and the main body of the first electrode of the third sub-pixel SP3, indicated by dashed boxes. The first electrode 111 of the third sub-pixel SP3 includes a plurality of sub-parts 111a, which are spaced apart along a first direction X. In a direction perpendicular to the substrate 10, the data line 600 overlaps with the spacing between two adjacent sub-parts 111a. The spacing between two adjacent sub-parts 111a in the first direction X can avoid interference between the data line 600 and the first electrode 111.

[0112] For example, in a direction perpendicular to the substrate, the data lines may not overlap with multiple sub-sections at all, or they may only partially overlap; this disclosure does not limit this.

[0113] For example, as shown in Figure 5, the first electrode of each sub-pixel can include multiple sub-parts to avoid more traces by utilizing the spacing between the sub-parts. For example, considering that the first electrode area of ​​the third sub-pixel is relatively large, as shown in Figures 6A, 6B, and 7, only the first electrode in the third sub-pixel can be configured to include multiple sub-parts to simplify the manufacturing process.

[0114] Figure 8 is a schematic diagram of the pixel openings in a display substrate and the mask openings of a fine metal mask plate provided in another example of at least one embodiment of the present disclosure.

[0115] Referring to Figures 8 and 4A to 4H, this disclosure provides a display substrate including a substrate 10, a plurality of sub-pixels 100, and a pixel defining layer 200. The plurality of sub-pixels 100 are located on the substrate 10, and each sub-pixel 100 includes a pixel driving circuit 120 and a light-emitting unit 110. The pixel driving circuit 120 is configured to drive the light-emitting unit 110. The light-emitting unit 110 includes a light-emitting functional layer (EML) and a first electrode 111 and a second electrode 112 located on opposite sides of the EML. The first electrode 111 is located between the EML and the substrate 10. The pixel defining layer 200 is located on the side of the first electrode 111 away from the substrate 10. The pixel defining layer 200 includes a plurality of pixel openings 201, with each sub-pixel 100 corresponding to at least one pixel opening 201. At least a portion of the EML is located in the pixel opening 201 corresponding to the sub-pixel 100, and the pixel opening 201 is configured to expose the first electrode 111. Multiple sub-pixels 100 are divided into multiple repeating units 101, which are arranged in an array along a first direction X and a second direction Y. At least one repeating unit 101 includes two pixel groups 102 arranged along the second direction Y. Each pixel group 102 includes sub-pixels of different colors. In the same repeating unit 101, the light-emitting areas of the sub-pixels 100 in the two pixel groups 102 are mirror-symmetrical with respect to a first axis of symmetry A1 extending along the first direction X. For a detailed description of the sub-pixels 100 and the pixel defining layer 200, please refer to the foregoing examples, which will not be repeated here.

[0116] Referring to Figures 8 and 4A to 4H, the different color sub-pixels include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. The pixel driving circuit 120 includes a first pixel driving circuit 121, a second pixel driving circuit 122, and a third pixel driving circuit 123 arranged sequentially in the first direction X. One of the first pixel driving circuit 121 and the second pixel driving circuit 122 is electrically connected to the first electrode 111R of the first sub-pixel SP1, and the other of the first pixel driving circuit 121 and the second pixel driving circuit 122 is electrically connected to the first electrode 111G of the second sub-pixel SP2. The third pixel driving circuit 123 is electrically connected to the first electrode BA of the third sub-pixel SP3. The orthographic projection of the first pixel driving circuit 121 on the substrate 10 and the orthographic projection of the second pixel driving circuit 122 on the substrate 10 are at least partially mirror-symmetrical with respect to a second axis of symmetry A2 extending along the second direction Y. Detailed descriptions of the first pixel driving circuit 121, the second pixel driving circuit 122, and the third pixel driving circuit 123 can be found in the foregoing examples and will not be repeated here.

[0117] Referring to Figures 8 and 4A to 4H, in each repeating unit 101, the light-emitting areas of the sub-pixels 100 in the two pixel groups 102 are mirror-symmetrical with respect to the first axis of symmetry A1, so that the light-emitting areas of the same color on both sides of the first axis of symmetry A1 are adjacent to each other. During the evaporation of organic materials using an FMM, the light-emitting functional layers of the two sub-pixels 100 of the same color can be formed through a single mask opening, reducing the difficulty of the fabrication process. Setting the orthographic projection of the first pixel driving circuit 121 on the substrate 10 and the orthographic projection of the second pixel driving circuit 122 on the substrate 10 to be at least partially mirror-symmetrical with respect to the second axis of symmetry A2 extending along the second direction Y is beneficial for improving the integration density of the pixel driving circuit 120. Furthermore, the mirror symmetry of the two light-emitting areas with respect to the first axis of symmetry A1 and the mirror symmetry of the two pixel driving circuits 120 with respect to the second axis of symmetry A2 facilitates the electrical connection between the first electrode 111 of the sub-pixel 100 and the corresponding pixel driving circuit 120.

[0118] Referring to Figure 8, for example, the pixel opening 201 corresponding to the first sub-pixel SP1 is an elongated strip extending along the first direction X, and the pixel opening 201 corresponding to the second sub-pixel SP2 is an elongated strip extending along the second direction Y. For example, the elongated strip can be rectangular. Since the dimensions of the third sub-pixel SP3 in both the first direction X and the second direction Y are relatively large, arranging the first sub-pixel SP1 in the first sub-pixel row R1 and arranging the second sub-pixel SP2 and the third sub-pixel SP3 in the second sub-pixel row R2 can effectively utilize the space on the display substrate, which is beneficial to improving the pixel aperture ratio.

[0119] Referring to Figure 8, in some examples, in the same repeating unit 101, a portion of the structure of the first electrode 111 of the sub-pixel 100 in the two pixel groups 102 is mirror-symmetrical with respect to the first axis of symmetry A1, which facilitates the fabrication of the first electrode 111 and the connection with the corresponding pixel driving circuit. For example, the main body 1111 of the first electrode 111 of the sub-pixel 100 in the two pixel groups 102 is mirror-symmetrical with respect to the first axis of symmetry A1.

[0120] Referring to Figures 8 and 4F, in some examples, the display substrate includes a metal layer SD2 located between the substrate 10 and the first electrode 111. The metal layer SD2 includes a plurality of power signal lines 700, which extend along a second direction Y and are spaced apart along a first direction X. For example, the metal layer SD2 can be the second metal layer SD2 in the aforementioned examples, and the power signal lines 700 can be the power signal lines 700 in the aforementioned examples. The power signal lines 700 are configured to provide a power supply voltage. For example, the power signal lines 700 can be connected to a common cathode of the display substrate to reduce the voltage difference at different locations of the second power supply terminals on the display substrate. For example, the common cathode is used to form the cathode of the light-emitting unit 110.

[0121] Referring to Figures 8 and 4F, the multiple power signal lines 700 include a first power signal line 711 electrically connected to the first pixel driving circuit 121, a second power signal line 712 electrically connected to the second pixel driving circuit 122, and a third power signal line 713 electrically connected to the third pixel driving circuit 123. The minimum distance in the first direction X between the orthographic projection of the first power signal line 711 on the substrate 10 and the orthographic projection of the second power signal line 712 on the substrate 10 is a first distance D1. The minimum distance in the first direction X between the orthographic projections of the second power signal line 712 and the third power signal line 713 on the substrate 10 is a second distance D2. The first distance D1 is smaller than the second distance D2, thereby the spacing between the first power signal line 711 of the first sub-pixel SP1 and the second power signal line 712 of the second sub-pixel SP2 is smaller.

[0122] Therefore, referring to Figures 8 and 4F, based on the mirror symmetry of the first pixel driving circuit 121 and the second pixel driving circuit 122, the first power signal line 711 and the second power signal line 712 are close to each other. This facilitates the setting of the positions of the access points of the first electrode of the first sub-pixel and the first electrode of the second sub-pixel, thereby making the layout more reasonable. It can be understood that in each sub-pixel, the access point of the first electrode is the connection point between the first electrode and the corresponding pixel driving circuit. For details, please refer to the detailed description in the aforementioned examples, which will not be repeated here.

[0123] Referring to Figures 8 and 4F, in some examples, the metal layer SD2 includes a first adapter 721, a second adapter 722, and a plurality of power signal lines 700. The first adapter 721 is electrically connected to a first pixel driving circuit 121, and the second adapter 722 is electrically connected to a second pixel driving circuit 122. The plurality of power signal lines 700 extend along a second direction Y and are spaced apart along a first direction X, and the power signal lines 700 are configured to provide a power supply voltage.

[0124] Referring to Figures 8 and 4F, the multiple power signal lines 700 include a first power signal line 711 electrically connected to the first pixel driving circuit 121 and a second power signal line 712 electrically connected to the second pixel driving circuit 122. The first power signal line 711 includes a first recess 711a, and the second power signal line 712 includes a second recess 712a. The first recess 711a and the second recess 712a are disposed opposite to each other to form an opening region 700a, and both the first transition portion 721 and the second transition portion 722 are located in the opening region 700a. By placing the first adapter 721 and the second adapter 722 in the opening region 700a formed by the first power signal line 711 and the second power signal line 712, the first adapter 721 and the second adapter 722 are located close to each other in the first pixel driving circuit 121 and the second pixel driving circuit 122. This helps to shorten the trace length between the first electrode 111 and the corresponding pixel driving circuit 120, so as to realize the electrical connection between each sub-pixel 100 and the corresponding pixel driving circuit 120.

[0125] For example, referring to FIG4H, the orthographic projections of the first transition portion 721 and the second transition portion 722 on the substrate 10 are both located between the orthographic projections of the light-emitting area of ​​the second sub-pixel SP2 and the light-emitting area of ​​the third sub-pixel SP3 on the substrate. For example, the connection points of the first sub-pixel SP1 and the second sub-pixel SP2 with their respective pixel driving circuits are both located between the light-emitting areas of the second sub-pixel SP2 and the third sub-pixel SP3, which is beneficial for the electrical connection between the transition portion and the first electrode and for the arrangement of the wiring.

[0126] Figure 9 is a schematic diagram of the stacked layers of some films in the display substrate shown in Figure 8. Figure 9 shows the stacked diagram of the first metal layer SD11, the insulating layer PLN1, the second metal layer SD21, the insulating layer PLN2, and the electrode layer AND1. The first metal layer SD11 can have the same structure as the first metal layer SD1 shown in Figure 4E, the second metal layer SD21 can have the same structure as the second metal layer SD2 shown in Figure 4F, and the electrode layer AND1 can have the same structure as the film layer AND where the first electrode is located shown in Figure 4G.

[0127] Referring to Figures 8, 9, and 4A to 4H, in some examples, multiple pixel groups 102 in multiple repeating units 101 are arranged along a first direction X to form pixel rows 1021, and the multiple pixel rows 1021 are arranged along a second direction Y. In the multiple pixel rows 1021, the first electrode 111R of the first sub-pixel SP1 is electrically connected to the first transition portion 721 to be electrically connected to the first pixel driving circuit 121, the first electrode 111G of the second sub-pixel SP2 is electrically connected to the second transition portion 722 to be electrically connected to the second pixel driving circuit 122, and the first electrode 111B of the third sub-pixel SP3 is electrically connected to the third transition portion 723 to be electrically connected to the third pixel driving circuit 123. For example, in all pixel rows 1021, the first pixel driving circuit 121 is configured to drive the light-emitting unit of the first sub-pixel SP1 to emit light, the second pixel driving circuit 122 is configured to drive the light-emitting unit of the second sub-pixel SP2 to emit light, and the third pixel driving circuit 123 is configured to drive the light-emitting unit of the third sub-pixel SP3 to emit light.

[0128] Referring to Figures 8, 9, 4E, and 4F, for example, the first electrode 111R and the first adapter 721 are electrically connected at the first connection point RA through a via 01 in the insulating layer PLN2; the first electrode 111G and the second adapter 722 are electrically connected at the second connection point GA through a via 02 in the insulating layer PLN2; and the first electrode 111B and the third adapter 723 are electrically connected at the third connection point BA through a via 03 in the insulating layer PLN2.

[0129] Referring to Figures 8, 9, 4E, and 4F, for example, the first adapter 721 is electrically connected to the sixth bridging portion 46 in the first metal layer SD11 via a via 04 in the insulating layer PLN1. For example, the second adapter 722 is electrically connected to the seventh bridging portion 47 in the first metal layer SD11 via a via 05 in the insulating layer PLN1. For example, the third adapter 723 is electrically connected to the eighth bridging portion 48 in the first metal layer SD11 via a via 06 in the insulating layer PLN1.

[0130] Figure 10 is a schematic diagram of the first metal layer of a display substrate provided in at least one embodiment of the present disclosure, Figure 11 is a schematic diagram of the second metal layer of a display substrate provided in at least one embodiment of the present disclosure, and Figure 12 is a schematic diagram of a portion of the film layers of a display substrate provided in at least one embodiment of the present disclosure. Figure 12 shows a stack-up diagram of the first metal layer SD12, the insulating layer PLN01, the second metal layer SD22, the insulating layer PLN02, and the electrode layer AND2. The first metal layer SD12 has a different structure than the first metal layer SD1 shown in Figure 4E, the second metal layer SD22 has a different structure than the second metal layer SD2 shown in Figure 4F, and the electrode layer AND2 can have the same structure as the film layer AND where the first electrode is located shown in Figure 4G.

[0131] Referring to Figures 8, 10 to 12, in some examples, multiple pixel groups 102 in multiple repeating units 101 are arranged along a first direction X to form pixel rows 1021, and the multiple pixel rows 1021 are arranged along a second direction Y. The multiple pixel rows 1021 include a first pixel row R01 and a second pixel row R02 alternately arranged in the second direction Y. Different color sub-pixels include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. In the first pixel row R01, the first electrode 111R of the first sub-pixel SP1 is electrically connected to the first transition portion 721, and the first electrode 111G of the second sub-pixel SP2 is electrically connected to the second transition portion 722. In the second pixel row R02, the first electrode 111R of the first sub-pixel SP1 is electrically connected to the second transition portion 722', and the first electrode 111G of the second sub-pixel SP2 is electrically connected to the first transition portion 721'.

[0132] For example, the connection method of the first electrode, transition part, and bridging part in the first pixel row shown in Figure 12 is the same as that in the first pixel row shown in Figure 9, and will not be repeated here. For example, the first pixel row shown in Figure 12 is an odd-numbered row, and the second pixel row shown in Figure 12 is an even-numbered row. The arrangement of the pixel driving circuits of the sub-pixels in the odd-numbered pixel rows is different from that in the even-numbered pixel rows.

[0133] As shown in Figure 12, for example, in the second pixel row R02, the first electrode 111R is electrically connected to the second transition portion 722' through a via 07 in the insulating layer PLN02, and the second transition portion 722' is electrically connected to the seventh bridge portion 47' in the first metal layer SD12 through a via 07' in the insulating layer PLN01. The first electrode 111G is electrically connected to the first transition portion 721' through a via 08 in the insulating layer PLN02, and the first transition portion 721' is electrically connected to the sixth bridge portion 46' in the first metal layer SD12 through a via 08' in the insulating layer PLN1. The first electrode 111B is electrically connected to the third transition portion 723' through a via 09 in the insulating layer PLN02, and the third transition portion 723' is electrically connected to the eighth bridge portion 48' in the first metal layer SD12 through a via 09' in the insulating layer PLN01.

[0134] Therefore, referring to FIG12, in the first pixel row R01, the first pixel driving circuit 121 is configured to drive the light-emitting unit of the first sub-pixel SP1 to emit light, the second pixel driving circuit 122 is configured to drive the light-emitting unit of the second sub-pixel SP2 to emit light, and the third pixel driving circuit 123 is configured to drive the light-emitting unit of the third sub-pixel SP3 to emit light. In the second pixel row R02, the second pixel driving circuit 122' is configured to drive the light-emitting unit of the first sub-pixel SP1' to emit light, the first pixel driving circuit 121' is configured to drive the light-emitting unit of the second sub-pixel SP2' to emit light, and the third pixel driving circuit 123' is configured to drive the light-emitting unit of the third sub-pixel SP3' to emit light.

[0135] Referring to Figures 8 and 4F, the first transition portion 721 and the second transition portion 722 located in the first pixel row R01 have a first relative positional relationship, and the first transition portion 721' and the second transition portion 722' located in the second pixel row R02 have a second relative positional relationship. The first relative positional relationship is different from the second relative positional relationship. For example, referring to Figure 4F, the first transition portion 721 and the second transition portion 722 are arranged approximately diagonally upwards, intersecting the first direction X and the second direction Y, respectively. The first transition portion 721' and the second transition portion 722' are arranged approximately diagonally in the second direction Y, thereby enabling the first pixel driving circuit 122' to drive the light-emitting unit of the second sub-pixel SP2' to emit light, and the second pixel driving circuit 121' to drive the light-emitting unit of the first sub-pixel SP1' to emit light. For example, the shapes of the first transition portion 721 and the first transition portion 721' can be different, and the shapes of the second transition portion 722 and the second transition portion 722' can be different.

[0136] It is understandable that, in order to achieve connection with the corresponding transition portion, the relative positional relationship and shape of the sixth bridging portion 46' and the seventh bridging portion 47' located in the second pixel row of the first metal layer SD1 shown in FIG4E may differ from the relative positional relationship and shape of the sixth bridging portion 46 and the seventh bridging portion 47 located in the first pixel row. For example, the shape of the sixth bridging portion 46 may be similar to the shape of the seventh bridging portion 47', and the shape of the seventh bridging portion 47 may be similar to the shape of the sixth bridging portion 46', so as to facilitate the electrical connection between the first metal layer, the second metal layer, and the film layer where the first electrode is located.

[0137] However, this disclosure is not limited to this. For example, the relative positional relationship of the sixth bridging portion 46 and the seventh bridging portion 47 in the first pixel row of the first metal layer SD12 shown in FIG10 may be the same as or different from the relative positional relationship of the sixth bridging portion 46' and the seventh bridging portion 47' in the second pixel row. The shapes of the sixth bridging portion 46 and the seventh bridging portion 47 shown in FIG10 may be the same as or different from the shapes of the sixth bridging portion 46' and the seventh bridging portion 47'. For example, the relative positional relationship of the first transition portion 721 and the second transition portion 722 in the first pixel row of the second metal layer SD22 shown in FIG11 may be the same as or different from the relative positional relationship of the first transition portion 721' and the second transition portion 722' in the second pixel row. The shapes of the first transition portion 721 and the second transition portion 722 shown in FIG11 may be the same as or different from the shapes of the first transition portion 721' and the second transition portion 722'.

[0138] This disclosure provides a display device including the display substrate of any of the above examples. Since the display device according to this disclosure uses the aforementioned display substrate, it also has corresponding beneficial technical effects, which will not be elaborated further here.

[0139] For example, the display device can be an organic light-emitting diode display device or other display device, as well as any product or component with display function, such as a television, digital camera, mobile phone, watch, tablet computer, laptop computer, or navigator that includes the display device. This embodiment is not limited to this.

[0140] The following points need to be explained:

[0141] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure, and other structures can be referred to the general design.

[0142] (2) Where there is no conflict, features of the same embodiment and different embodiments of this disclosure may be combined with each other.

[0143] The above description is merely an exemplary embodiment of this disclosure and is not intended to limit the scope of protection of this disclosure, which is determined by the appended claims.

Claims

1. A display substrate, comprising: Substrate; Multiple sub-pixels are located on the substrate. Each sub-pixel includes a light-emitting unit, which includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer. The first electrode is located between the light-emitting functional layer and the substrate. A pixel defining layer is located on the side of the first electrode away from the substrate. The pixel defining layer includes a plurality of pixel openings, one sub-pixel corresponds to at least one pixel opening, at least a portion of the light-emitting functional layer is located in the pixel opening corresponding to the sub-pixel, and the pixel opening is configured to expose the first electrode. The plurality of sub-pixels are divided into a plurality of repeating units, which are arranged in an array along a first direction and a second direction. At least one repeating unit includes two pixel groups arranged along the second direction. Each pixel group includes sub-pixels of different colors. In the same repeating unit, the light-emitting areas of the sub-pixels in the two pixel groups are mirror-symmetrical with respect to a first axis of symmetry extending along the first direction. The display substrate further includes a black matrix and a color filter layer. The black matrix is ​​located on the side of the pixel defining layer away from the substrate, and the color filter layer is located on the side of the black matrix away from the substrate. The black matrix includes a plurality of black matrix openings, and the plurality of black matrix openings and the plurality of pixel openings are arranged in a one-to-one correspondence. The color filter layer includes a plurality of color filter patterns of different colors, which cover the plurality of black matrix openings and are arranged in a corresponding manner to the different color sub-pixels.

2. The display substrate according to claim 1, wherein, The pixel opening includes a curved edge.

3. The display substrate according to claim 2, wherein, The shape of the pixel opening includes at least one of the following: circular, elliptical, and elongated.

4. The display substrate according to any one of claims 1-3, wherein, In the same repeating unit, the partial structure of the first electrode of the sub-pixel in the two pixel groups is mirror-symmetric with respect to the first axis of symmetry.

5. The display substrate according to any one of claims 1-4, wherein, The different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; The plurality of pixel groups in the plurality of repeating units are arranged along the first direction to form a pixel row, and the plurality of pixel rows are arranged along the second direction; each pixel row includes a first sub-pixel row and a second sub-pixel row that extend along the first direction, and the first sub-pixel row and the second sub-pixel row are arranged along the second direction. The first sub-pixel row includes a plurality of first sub-pixels arranged along the first direction; The second sub-pixel row includes a plurality of second sub-pixels and a plurality of third sub-pixels that are alternately arranged along the first direction.

6. The display substrate according to any one of claims 1-5, wherein, The pixel opening includes a first pixel opening, a second pixel opening, and a third pixel opening, and the different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; One first sub-pixel corresponds to multiple first pixel openings, and the multiple first pixel openings are arranged along the first direction; One second sub-pixel corresponds to multiple second pixel openings, and the multiple second pixel openings are arranged along the second direction; One of the third sub-pixels corresponds to a plurality of the third pixel openings, and the plurality of the third pixel openings are arranged along the second direction.

7. The display substrate according to any one of claims 1-6, wherein, The first electrode includes a main body and a connecting part, the connecting part being configured to be electrically connected to the pixel driving circuit of the sub-pixel; the pixel driving circuit is configured to drive the light-emitting unit; At least one of the sub-pixels corresponds to a plurality of pixel openings, the main body includes a plurality of interconnected sub-parts, the plurality of pixel openings correspond one-to-one with the plurality of sub-parts, and the pixel openings expose at least a portion of the sub-parts.

8. The display substrate according to claim 7, further comprising a signal line extending along the first direction, the signal line comprising one of a gate line and an initial signal line, the signal line being located between the substrate and the first electrode; the different color sub-pixels comprising a first sub-pixel, a second sub-pixel, and a third sub-pixel; The first electrode of the third sub-pixel includes a plurality of sub-parts and a sub-connection portion connecting two adjacent sub-parts. The plurality of sub-parts are spaced apart along the second direction. In a direction perpendicular to the substrate, the signal line overlaps with the spacing between two adjacent sub-parts among the plurality of sub-parts.

9. The display substrate according to claim 7 or 8, further comprising a data line located between the substrate and the first electrode; the different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel; The first electrode of the third sub-pixel includes a plurality of sub-parts and a sub-connection portion connecting two adjacent sub-parts. The plurality of sub-parts are arranged at intervals along the first direction. In a direction perpendicular to the substrate, the data line overlaps with the interval between two adjacent sub-parts among the plurality of sub-parts.

10. The display substrate according to any one of claims 1-9, wherein, The sub-pixel includes a pixel driving circuit, which is configured to drive the light-emitting unit; the different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel. The pixel driving circuit includes a first pixel driving circuit for the first sub-pixel, a second pixel driving circuit for the second sub-pixel, and a third pixel driving circuit for the third sub-pixel arranged sequentially in the first direction. The orthographic projection of the first pixel driving circuit on the substrate and the orthographic projection of the second pixel driving circuit on the substrate are at least partially mirror-symmetric with respect to a second axis of symmetry extending along the second direction.

11. The display substrate according to claim 10, wherein, The orthographic projection of the second pixel driving circuit on the substrate and the orthographic projection of the third pixel driving circuit on the substrate are at least partially mirror-symmetric with respect to a third axis of symmetry extending along the second direction.

12. A display substrate, comprising: Substrate; Multiple sub-pixels are located on the substrate. Each sub-pixel includes a pixel driving circuit and a light-emitting unit. The pixel driving circuit is configured to drive the light-emitting unit. The light-emitting unit includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer. The first electrode is located between the light-emitting functional layer and the substrate. A pixel defining layer is located on the side of the first electrode away from the substrate. The pixel defining layer includes a plurality of pixel openings, one sub-pixel corresponds to at least one pixel opening, at least a portion of the light-emitting functional layer is located in the pixel opening corresponding to the sub-pixel, and the pixel opening is configured to expose the first electrode. The plurality of sub-pixels are divided into a plurality of repeating units, and the plurality of repeating units are arranged in an array along a first direction and a second direction. At least one repeating unit includes two pixel groups arranged along the second direction. Each pixel group includes sub-pixels of different colors. In the same repeating unit, the light-emitting areas of the sub-pixels in the two pixel groups are mirror-symmetrical with respect to a first axis of symmetry extending along the first direction. The different color sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel. The pixel driving circuit includes a first pixel driving circuit, a second pixel driving circuit, and a third pixel driving circuit arranged sequentially in the first direction. One of the first pixel driving circuit and the second pixel driving circuit is electrically connected to the first electrode of the first sub-pixel, and the other of the first pixel driving circuit and the second pixel driving circuit is electrically connected to the first electrode of the second sub-pixel. The third pixel driving circuit is electrically connected to the first electrode of the third sub-pixel. The orthographic projections of the first pixel driving circuit and the second pixel driving circuit on the substrate are at least partially mirror-symmetric with respect to a second axis of symmetry extending along the second direction.

13. The display substrate according to claim 12, wherein, In the same repeating unit, the partial structure of the first electrode of the sub-pixel in the two pixel groups is mirror-symmetric with respect to the first axis of symmetry.

14. The display substrate according to claim 12 or 13, wherein, The display substrate includes a metal layer located between the substrate and the first electrode. The metal layer includes a plurality of power signal lines that extend along the second direction and are spaced apart along the first direction. The power signal lines are configured to provide a power supply voltage. The plurality of power signal lines include a first power signal line electrically connected to the first pixel driving circuit, a second power signal line electrically connected to the second pixel driving circuit, and a third power signal line electrically connected to the third pixel driving circuit. The minimum distance in the first direction between the orthographic projection of the first power signal line on the substrate and the orthographic projection of the second power signal line on the substrate is the first distance; The minimum distance in the first direction between the orthographic projection of the second power signal line on the substrate and the orthographic projection of the third power signal line on the substrate is the second distance; The first distance is less than the second distance.

15. The display substrate according to any one of claims 12-14, wherein, The display substrate includes a metal layer located between the substrate and the first electrode. The metal layer includes a first adapter portion and a second adapter portion, as well as multiple power signal lines. The first adapter portion is electrically connected to the first pixel driving circuit, and the second adapter portion is electrically connected to the second pixel driving circuit. The plurality of power signal lines extend along the second direction and are spaced apart along the first direction; the power signal lines are configured to provide power voltage. The plurality of power signal lines include a first power signal line electrically connected to the first pixel driving circuit and a second power signal line electrically connected to the second pixel driving circuit; the first power signal line includes a first recessed portion and the second power signal line includes a second recessed portion. The first recess and the second recess are disposed opposite to each other to form an opening region, and both the first transition portion and the second transition portion are located in the opening region.

16. The display substrate according to claim 15, wherein, The plurality of pixel groups in the plurality of repeating units are arranged along the first direction to form a pixel row, and the plurality of pixel rows are arranged along the second direction; In the plurality of pixel rows, the first electrode of the first sub-pixel is electrically connected to the first transition portion, and the first electrode of the second sub-pixel is electrically connected to the second transition portion.

17. The display substrate according to claim 15, wherein, The plurality of pixel groups in the plurality of repeating units are arranged along the first direction to form a pixel row, and the plurality of pixel rows are arranged along the second direction; the plurality of pixel rows include a first pixel row and a second pixel row arranged alternately in the second direction. In the first pixel row, the first electrode of the first sub-pixel is electrically connected to the first transition portion, and the first electrode of the second sub-pixel is electrically connected to the second transition portion; In the second pixel row, the first electrode of the first sub-pixel is electrically connected to the second transition portion, and the first electrode of the second sub-pixel is electrically connected to the first transition portion.

18. The display substrate according to claim 16 or 17, wherein, There is a first relative positional relationship between the first transition portion and the second transition portion located in the first pixel row, and there is a second relative positional relationship between the first transition portion and the second transition portion located in the second pixel row. The first relative positional relationship is different from the second relative positional relationship.

19. A display device comprising the display substrate according to any one of claims 1-18.

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