Apparatus Without Intermediate Ac Conversion TRIZ Cases

A hybrid DSP-FPGA SVPWM controller cuts harmonic distortion and capacitor imbalance in multi-level diode-clamped inverters.

A two-stage isolated and non-isolated board power layout cuts line losses and improves heat dissipation for ICT service boards.

Distributed control units switch power modules by serial number and load demand to cut light-load losses, ripple, and single-point failure risk.

A resonant switched capacitor stage with a buck regulator raises battery charging rate while limiting switching loss and charger heat.

Cascaded buck-boost cells shift phases and duty cycles to regulate wide voltage ratios while reducing EMI and improving transient response.

A real-time motor drive and capacitor model predicts minimum capacitance from ripple limits to estimate DC bus capacitor remaining life.

Parallel switched-inductor legs on a common core vary inductance ratios to control DC-DC voltage conversion with lower heat loss.

Duty cycle limiting at the 0.5 threshold keeps interleaved bidirectional converters balanced in buck and boost modes while preserving voltage gain.

Adaptive switching frequency lets a solid electrolyte DC-DC converter shift between ionic and electrostatic modes to balance efficiency and power demand.

Series-charge and parallel-discharge capacitors create a fractional negative output that limits NFET leakage while maintaining safe gate bias.

Adaptive switching lets a solid electrolyte capacitor alternate between ionic and electrostatic modes to improve DC-DC conversion efficiency.

Series charge pumps replace bulky transformer boosters to generate nozzle inspection voltage in a more compact inkjet circuit.

Placing the inductor on the lower-current path cuts copper loss and switch voltage stress while preserving efficient buck, boost, and bidirectional conversion.

Capacitor voltage feedback sets a dynamic startup wait so voltage rails fully discharge after battery loss or rapid power changes.

A shared switch network reuses flying capacitors in series and parallel to create two DC outputs with lower component count and compact size.

Multiple switches, inductors, and an AC coupling capacitor enable soft switching for efficient high-ratio buck conversion with lower energy loss.

Combining active, average-difference, and droop control helps parallel power supplies share current quickly and accurately under dynamic loads.

Input current sensing and a conversion factor estimate charge pump output current accurately while avoiding sense resistor loss and calibration burden.

Different switch voltage ratings and pre-charged flying capacitors cut switching loss in a boost circuit while preserving voltage margin.

Fuse-based testing sets only the needed memory charge pumps active, cutting current drop noise while maintaining required internal voltage supply.