Digital-Analogue Convertors TRIZ Cases
- Multi-Clock DAC Combining Circuit for Image Rejection
Combining DAC outputs from different sampling clocks suppresses image signals and enables simpler low-order post-DAC filters.
- DAC Serial Interface for Non-Volatile Power-Up Output
A serial protocol lets a DAC access non-volatile and volatile memory so preprogrammed output is available immediately after power-up.
- Self-Referenced DAC Calibration for INL Precision
By comparing DAC outputs internally and feeding results to DSP logic, this case improves INL calibration precision without external references.
- DAC High-Pass Compensation for Sinc Frequency Roll-Off
A delayed, inverted current path gives a DAC high-pass compensation to flatten high-frequency response without higher power or added filter stages.
- DAC Built-In Self-Test for Dynamic Output Transition Measurement
Fixed-threshold timing lets a DAC assess output transitions and dynamic behavior on-chip without complex external test equipment.
- DAC Current Source Layout for Gradient Error Cancellation
Symmetric DAC current-cell placement cancels linear and second-order gradient errors without calibration, improving linearity and SFDR.
- Exponential DAC Current Mirror for Stable Step Uniformity
A programmable current mirror DAC replaces unstable positive feedback to keep exponential steps uniform and less sensitive to mismatch.
- High-Resolution DAC Calibration for Major Transition Glitch Control
A calibration table corrects DAC control values at major bit transitions to suppress glitches and DC errors while preserving high resolution.