A GMSK quadrature modulator

Abstract

This invention belongs to the field of communication and signal processing technology, specifically relating to a GMSK quadrature modulator. It comprises a bidirectional counter, a four-curve data table, an in-phase component processor, and a quadrature component processor, forming a quadrature modulation baseband generator. A binary symbol sequence and a system clock are input to this generator. The system clock is divided to generate a symbol frequency multiplier clock, driving the bidirectional counter to oscillate and count repeatedly. The in-phase and quadrature component processors process and generate curve selection types and curve symbols. The output of the bidirectional counter is used as the curve lookup table address. A quadrature modulation baseband signal is generated by looking up the pre-stored four-curve data table, and then input to a digital up-converter (DUC) circuit to produce a GMSK modulated signal. Compared to existing technologies, this invention is more resource-efficient, has higher accuracy, and lower spurious emissions, making it highly suitable for embedded system or programmable device design and implementation.

Description

Technical Field

[0001] This invention belongs to the field of communication and signal processing technology, and specifically relates to a GMSK quadrature modulator. Background Technology

[0002] To achieve a compact spectrum and reduce interference with adjacent channels, digital frequency modulation (FM) generally employs continuous phase modulation (CPM). General-Purpose FM, which uses Gaussian premodulation techniques, is the most widely used and offers better performance, with GMSK modulation being a typical example. GMSK typically employs techniques such as... Figure 1 The diagram shows an orthogonal balanced digital frequency modulator.

[0003] The traditional steps for generating a GMSK modulated signal are as follows: First, a rectangular pulse response of a Gaussian filter is generated. After weighted superposition of bipolar symbols, the output is integrated and the phase is accumulated. Then, a lookup table (LUT) is used to output the sine and cosine waveforms of the corresponding phases. Finally, DDS technology is used to achieve quadrature upconversion, and the signal is output to an RF power amplifier via a high-speed DAC.

[0004] The signal processing method that directly maps the associated symbol combination to the quadrature modulation baseband signal can omit signal processing steps such as Gaussian filtering and phase integration, greatly simplifying the GMSK modulator and avoiding truncation errors that may be generated by Gaussian filtering and phase integration.

[0005] When the correlation length L = 3, there are only 8 possible combinations of three adjacent correlated symbols. Therefore, 8 Gaussian filtered signals can be mapped. After integration, these 8 Gaussian filtered signals correspond to 8 phase integration paths with an initial phase of zero, such as... Figure 2 As shown. Based on the characteristics of phase continuity, a set of 8 phase integration paths located in the first quadrant can be obtained, such as... Figure 3 As shown. This set of phase integration paths is denoted as... The superscript 1 indicates the first quadrant, and the subscript j corresponds to the binary value of the associated code element combination.

[0006] right Figure 3 The eight phase integration paths shown are used to calculate the cosine and sine of the signals, respectively, to obtain the corresponding in-phase component signals. and orthogonal component signals like Figure 4 , Figure 5 As shown.

[0007] contrast Figure 4 , Figure 5 It can be observed that four of these curves can generate all in-phase and quadrature components of the first quadrant signal. These four curves are as follows: Figure 6As shown. Further analysis using the quadrant characteristics of trigonometric functions proves that the orthogonal modulation baseband signals I(t) and Q(t) in any quadrant can be derived from... and One can obtain it directly or indirectly. Indirect forms include sign reversal, order reversal, or reversal of both sign and order.

[0008] Therefore, GMSK modulation can be implemented using a quadrature modulator based on LUT (lookup table) technology, such as... Figure 7 As shown. The LUT lookup table is built based on N times the sampled values ​​of the four basic curves mentioned above. The lookup table controller needs to perform the following signal processing:

[0009] (1) Calculate the quadrant in which the current symbol integral phase is located based on the phase path;

[0010] (2) Based on the associated symbol combination and the quadrant of the integral phase, calculate and determine which of the four basic curves should be adopted for the current in-phase modulation component and quadrature modulation component respectively;

[0011] (3) Calculate and determine the curve sequence direction of the current in-phase modulation component and quadrature modulation component respectively, calculate and generate the lookup address of the LUT lookup table, and generate the amplitude of the in-phase modulation component and quadrature modulation component by looking up the table.

[0012] (4) Calculate and determine the sign bits of the current in-phase modulation component and quadrature modulation component respectively, and output the in-phase modulation component and quadrature modulation component.

[0013] Although the GMSK quadrature modulator based on LUT (Look-Up Table) technology omits signal processing steps such as Gaussian filtering and phase integration, its look-up table controller still requires processing based on the complete mapping relationships of the four basic curves in any quadrant, making its implementation somewhat complex. Some literature has also proposed methods for separating steady-state and transient phases, which simplifies the logic of the look-up table controller, but requires at least four curves each for mapping in-phase and quadrature components, doubling the memory resources, making it counterproductive. Summary of the Invention

[0014] In view of this, the present invention provides a GMSK quadrature modulator, which aims to optimize and improve the existing technology.

[0015] The technical solution of this invention is as follows:

[0016] A GMSK quadrature modulator consists of a quadrature modulation baseband generator and an up-converter (DUC) circuit, and its block diagram is shown below. Figure 8As shown. The modulator adopts a digital architecture of signal processor plus high-speed DAC. The RF power amplifier, power supply, and other components are no different from conventional designs and are omitted here. The hardware for implementing the signal processor can be an FPGA, DSP, or microcontroller, etc. Figure 8 The quadrature modulation baseband generator and the DDS, multiplier, and adder modules in the upconversion circuit can all be implemented in the signal processor. Alternatively, an upconversion can be achieved using a DAC chip with an internal NCO, where the signal processor only needs to generate the quadrature modulation baseband. If the carrier frequency is high, the signal processor can first generate the quadrature modulation baseband signal, then mix it with the intermediate frequency carrier, and finally use a DAC chip with an internal NCO to perform upconversion. The core of these architectures is the quadrature modulation baseband generator. The quadrature modulation baseband generator is implemented in the signal processor of the digital modulator. Its main input comes from the modulated symbol sequence (or data stream) at the front end of the digital modulator, and its output is connected to the upconversion (or mixing) module.

[0017] Preferably, the quadrature modulation baseband generator consists of a bidirectional counter, a four-curve data table, an in-phase component processor, and a quadrature component processor. The symbol period is T. b The binary symbol sequence to be modulated and the system clock are input to the quadrature modulation baseband generator. The system clock is divided to generate a symbol frequency multiplication clock (multiplication period T). b / N) pulse; the quadrature modulation baseband generator acquires and stores the associated 3 symbols of this symbol period, completes signal processing once within each frequency doubling clock cycle, and outputs the quadrature modulation baseband signal point by point. and

[0018] The associated 3-bit symbol is denoted as a -1 a0, a +1 , representing the binary symbols of the previous symbol period, the current symbol period, and the next symbol period currently stored by the quadrature modulation baseband generator, respectively. -1 a0, a +1 It can be used as a bit in Boolean operations.

[0019] During initialization, the previous cycle symbol of the first symbol is the same as the first symbol; when the modulator stops, the next cycle symbol is defaulted to 0.

[0020] Preferably, the bidirectional counter counts the frequency-doubling clock pulses in a controllable direction, changing the counting direction according to the odd-even order of the code sequence to be modulated. Odd-numbered code elements are counted down from N-1 to 0, while even-numbered code elements are counted up from 1 to N.

[0021] During initialization, the bidirectional counter is initialized to N, with the first code element in odd order.

[0022] Preferably, the four-curve data table contains four types of curve data, selected from a set of quadrature modulation baseband signals with phase paths located in the first quadrant, obtained by sampling at a sampling rate N and digital quantization.

[0023] The four curves are as follows:

[0024]

[0025] in:

[0026] n∈[0,N]

[0027] For a set of phase integration paths corresponding to different combinations of associated symbols, the superscript 1 indicates the first quadrant, and the subscript j corresponds to the binary value of the associated symbol combination.

[0028] Theoretically, the four curves in BT b Choosing any value greater than 0 will satisfy the following requirements:

[0029] S0(0)=S2(0)=sin(0)

[0030] S1(0)=S3(0)=sin(δ)

[0031] S0(N)=S3(N)=cos(0)

[0032] S1(N)=S2(N)=cos(δ)

[0033] Where δ is the phase change value caused by intersymbol interference, and is related to BT. b The correlation reflects the effect of the Gaussian filter on the modulation phase and the continuity of the phase path.

[0034] Through sampling and digital quantization, each curve contains N+1 data points, using a fixed number of points, stored in a data memory with a starting address interval of (N+1).

[0035] If 16-bit specific-point quantization is used, in order to meet the requirement of independent resolution among the four quantized values ​​corresponding to sin(0) (i.e., 0x0000), sin(δ), cos(0) (i.e., 0x7FFF), and cos(δ), respectively, BT b Any value between 0.01 and 30 can be selected, which is sufficient to meet the practical requirements of GMSK modulation.

[0036] The four curve types are numbered 0, 1, 2, and 3 respectively, and are represented by two binary bits, with the high-order bit denoted as c1 and the low-order bit as c0. c1 and c0 can be used as bits for Boolean operations.

[0037] Preferably, the in-phase component processor consists of a curve type selector and a processing unit. Its inputs are a correlated 3-symbol signal, a frequency-multiplied clock pulse, and a bidirectional counter; its output is an in-phase component signal. The curve type selector generates the curve type number of the in-phase component for the current symbol period. The processing unit generates the lookup table address, the in-phase component symbol, and the last lookup table data record. During initialization, the in-phase component symbol is initially positive, and the last lookup table data record is initially set to the cos(0) quantization value.

[0038] Preferably, the quadrature component processor consists of a curve type selector and a processing unit. Its inputs are associated 3-symmetric symbols, a frequency-multiplied clock pulse, and a bidirectional counter; its output is quadrature component signals. The curve type selector generates the curve type number for the quadrature component in the current symbol period. The processing unit generates the lookup table address, the quadrature component symbol, and the last lookup table data record. During initialization, the initial value of the quadrature component symbol is equal to the first symbol value, and the initial value of the last lookup table data record is the sin(0) quantized value.

[0039] Preferably, the in-phase component processor and the quadrature component processor each include a curve type selector, and they operate independently. During the high level of the frequency multiplication clock pulse, the curve type selector selects the curve type according to the following logic:

[0040] (1) When all three associated symbols are the same, the curve type should be S0(n);

[0041] (2) When the preceding and following symbols of this symbol are the same, but the current symbol is different from the preceding and following symbols, the curve type should be S1(n).

[0042] (3) When the preceding and following symbols of this symbol are different, and the table lookup data record at the end of the preceding symbol period recorded by the processing unit is not equal to the cos(0) or sin(δ) quantization value, the curve type is selected as S2(n).

[0043] (4) When the preceding and following symbols of this symbol are different, and the data record at the end of the preceding symbol period recorded by the processing unit is equal to the quantized value of cos(0) or sin(δ), the curve type is selected as S3(n).

[0044] The bit f indicates whether the lookup data record at the end of the previous symbol period of the processing unit is true if it is equal to cos(0) or sin(δ) quantization value. f = 1 indicates true, and f = 0 indicates false.

[0045] The curve type selection can be achieved by generating a curve type number through the following logical operations:

[0046]

[0047] Preferably, the in-phase component processor and the quadrature component processor each contain a processing unit, and each operates independently. The processing unit performs the following processing:

[0048] (1) During the high level of the frequency multiplication clock pulse, query the lookup table data record at the end of the previous symbol period. If it is equal to the sin(0) quantization value (i.e. 0), the symbol of this symbol period is the inverse of the symbol of the previous symbol period; otherwise, the symbol of this symbol period is equal to the symbol of the previous symbol period. Based on whether the lookup table data record at the end of the previous symbol period is equal to the cos(0) or sin(δ) quantization value, assign a value to bit f.

[0049] (2) During the high level of the frequency multiplication clock pulse, the first address of the lookup table of the four curve data table is generated by multiplying the curve type number generated by the curve type selector by (N+1).

[0050] (3) During the low level of the frequency multiplication clock pulse, the in-phase component processor processing unit adds the lookup table start address to the bidirectional counter output to generate the in-phase component lookup table address; the quadrature component processor processing unit adds N to the lookup table start address and subtracts the bidirectional counter output to generate the quadrature component lookup table address.

[0051] (4) Obtain the lookup data from the four curve data table according to the lookup address, and record the lookup data when the bidirectional counter is equal to 0 or N, as the last lookup data record for the next query;

[0052] (5) Add a sign bit to the table lookup data output;

[0053] (6) Cycle (1) to (5).

[0054] The advantages of this invention are: simple implementation, resource saving, high reliability, and ease of implementation using small-scale signal processors or processing units. It supports high sampling rates; the higher the sampling rate, the more ideal the modulator characteristics, eliminating the need for subsequent low-pass filters to eliminate spurious signals. Attached Figure Description

[0055] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0056] Figure 1 GMSK Quadrature Modulator Principle

[0057] Figure 2 The initial phase of the symbol combination mapping is the zero-phase path (BT). b =0.3)

[0058] Figure 3 First Quadrant Phase Path (BT) of Symbol Combination Mapping b =0.3)

[0059] Figure 4 The first quadrant in-phase component signal I(t)(BT) mapped by symbol combination b =0.3)

[0060] Figure 5 The first quadrant orthogonal component signal Q(t)(BT) mapped by symbol combination b =0.3)

[0061] Figure 6 Four basic curves (BT) b =0.3)

[0062] Figure 7 Block diagram of GMSK quadrature modulator based on LUT technology

[0063] Figure 8 GMSK quadrature modulator principle block diagram of the present invention Detailed Implementation

[0064] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0065] The following specific examples illustrate the implementation of this disclosure. Those skilled in the art can easily understand other advantages and effects of this disclosure from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. This disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this disclosure. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0066] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this disclosure, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using other structures and / or functionalities besides one or more of the aspects set forth herein.

[0067] It should also be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this disclosure. The illustrations only show the components related to this disclosure and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0068] Furthermore, specific details are provided in the following description to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the described aspects can be practiced without these specific details.

[0069] This invention is used to implement a GMSK quadrature modulator. Before introducing the specific implementation scheme, it is necessary to first introduce the characteristics of the GMSK quadrature modulator.

[0070] When the association length L = 3, the quadrature modulation baseband signal can be directly obtained from the combination of three adjacent associated symbols through the mapping relationship. This allows us to use LUT technology to simplify and optimize the design of the GMSK quadrature modulator. This mapping relationship is shown in Table 1.

[0071] Table 1. Mapping Table of Correlated Symbol Combinations and Quadrature Modulation Baseband Signals

[0072]

[0073] in, express Signals that are sequentially reversed on the timeline.

[0074] According to this mapping table, the quadrature modulation baseband signals I(t) and Q(t) in any quadrant can be obtained from... and One of the methods is to obtain the information directly or indirectly. Indirect methods include sign reversal, sequence reversal, or reversal of both sign and sequence. Using this mapping table, a GMSK quadrature modulator can be implemented using LUT technology.

[0075] Taking the symbol sequence 0010111100 as an example, let's illustrate how to use... Figure 7 The principle of how the GMSK modulator generates quadrature modulated baseband signals is shown.

[0076] Assuming the initial phase is 0, and the preceding periodic symbols of the first symbol are the same as the first symbol, then based on the symbol combination and its corresponding phase changes, the start and end phases of the current symbol can be obtained through phase accumulation. This allows us to determine the quadrant in which the current symbol's phase path lies, and then, according to the table above, we can find the corresponding quadrature modulation baseband signal type. Using the above method, we can derive the following: When BT... b When N=0.5 and N=10, the mapping relationship between the symbol sequence, baseband signal and four curves in the quadrature modulation baseband signal waveform of the symbol sequence 0010111100 is shown in Table 2.

[0077] Table 2 shows the signal processing results of the lookup controller for the symbol sequence 0010111100.

[0078]

[0079] In one embodiment of the present invention, a GMSK quadrature modulator is provided, comprising a quadrature modulation baseband generator and a digital upconversion circuit;

[0080] The quadrature modulation baseband generator is responsible for converting the symbol sequence to be modulated into quadrature in-phase and quadrature component signals, which are then input into the digital up-conversion circuit to complete carrier modulation and generate GMSK modulated signals.

[0081] The binary symbol sequence and system clock are input to the quadrature modulation baseband generator; the system clock is divided to generate symbol frequency multiplication clock pulses to drive the bidirectional counter to oscillate and count in the parity order of the symbol sequence to be modulated;

[0082] The in-phase component processor and the quadrature component processor, based on the associated symbol combinations in the sampled binary symbol sequence and the curve continuity reflected by the previous processing result, generate the current curve selection type and the current curve symbol.

[0083] Using the bidirectional counter output as the lookup address of the current curve, the quadrature in-phase and quadrature component signals are output point by point by looking up the pre-stored four-curve data table.

[0084] The in-phase and quadrature component signals are input to the digital upconverter circuit, which generates the GMSK modulated signal.

[0085] In one embodiment, the quadrature modulation baseband generator consists of a bidirectional counter, a four-curve data table, an in-phase component processor, and a quadrature component processor;

[0086] The symbol period is Tb After the binary code sequence to be modulated and the system clock are input into the quadrature modulation baseband generator, the system clock is divided to generate a frequency multiplication period of T. b / N symbol frequency multiplication clock pulse; the quadrature modulation baseband generator completes signal processing once within each frequency multiplication clock cycle, outputting quadrature in-phase component signals point by point. and orthogonal component signals

[0087] In one embodiment, the bidirectional counter counts the frequency-doubling clock pulses in a controllable direction, changing the counting direction according to the parity order of the code sequence to be modulated; the odd-numbered code elements of the code sequence to be modulated are counted down from N-1 to 0; the even-numbered code elements of the code sequence to be modulated are counted up from 1 to N.

[0088] In one embodiment, the four-curve data table contains four types of curves, each containing N+1 points of data. The four curves are denoted as S0(n), S1(n), S2(n), and S3(n), respectively. The four curves are stored in a data memory with a starting address interval of N+1 using fixed-point numbers. The curve type numbers of the four curves are 0, 1, 2, and 3, respectively.

[0089] The four curves are selected from a set of quadrature modulated baseband signals with phase paths located in the first quadrant, obtained by sampling at a sampling rate of N and digital quantization; the data of the four selected curves meet the following requirements:

[0090] S0(0)=S2(0)=sin(0)

[0091] S1(0)=S3(0)=sin(δ)

[0092] S0(N)=S3(N)=cos(0)

[0093] S1(N)=S2(N)=cos(δ)

[0094] Where δ is the phase change value caused by intersymbol interference, and is related to BT. b The correlation is used to reflect the effect of the Gaussian filter on the modulation phase.

[0095] In one embodiment, the in-phase component processor comprises a curve type selector and a processing unit. Its inputs are adjacent preceding symbols, the current symbol, and the following symbol, as well as the outputs of a frequency-doubling clock pulse and a bidirectional counter. The output is an in-phase component signal.

[0096] The curve type selector generates the curve type number for the in-phase component of the current symbol period.

[0097] The processing unit generates lookup table addresses, in-phase component symbols, and end lookup table data records.

[0098] In one embodiment, the quadrature component processor comprises a curve type selector and a processing unit. Its inputs are adjacent preceding symbols, the current symbol, and the following symbols, as well as the outputs of a frequency-doubling clock pulse and a bidirectional counter. The output is the quadrature component signal.

[0099] The curve type selector of the orthogonal component processor generates the curve type number of the orthogonal component in the current symbol period;

[0100] The processing unit generates lookup table addresses, orthogonal component symbols, and end lookup table data records.

[0101] In one embodiment, one curve type selector is provided in both the in-phase component processor and the quadrature component processor, and each operates independently.

[0102] The curve type selector selects the curve type according to the following logic during the high level of the frequency multiplication clock pulse:

[0103] When the adjacent preceding code, current code, and following code are all the same, the curve type is selected as S0(n), and the curve type number is 0.

[0104] When the current symbol and the following symbol are the same, but the current symbol is different from the previous symbol and the following symbol, the curve type is selected as S1(n), and the curve type number is 1.

[0105] When the current symbol is different from the following symbol, and the data record at the end of the previous symbol period recorded by the processing unit is not equal to the cos(0) or sin(δ) quantization value, the curve type is selected as S2(n), and the curve type number is 2.

[0106] When the current symbol is different from the following symbol, and the data record at the end of the previous symbol period recorded by the processing unit is equal to the quantized value of cos(0) or sin(δ), the curve type is selected as S3(n), and the curve type number is 3.

[0107] In one embodiment, one processing unit is provided in both the in-phase component processor and the quadrature component processor, and each operates independently. The processing unit performs the following processing:

[0108] During the high level of the frequency multiplication clock pulse, if the lookup table data record at the end of the previous symbol period is equal to the sin(0) quantization value, the symbol of this symbol period is the inverse of the symbol of the previous symbol period; otherwise, the symbol of this symbol period is equal to the symbol of the previous symbol period.

[0109] During the high level of the frequency multiplication clock pulse, the lookup start address of the four-curve data table is generated by multiplying the curve type number generated by the curve type selector by (N+1).

[0110] During the low level of the frequency multiplication clock pulse, the in-phase component processor processing unit adds the lookup table start address to the bidirectional counter output to generate the in-phase component lookup table address; the quadrature component processor processing unit adds N to the lookup table start address and subtracts the bidirectional counter output to generate the quadrature component lookup table address.

[0111] Retrieve the lookup data from the four curve data table according to the lookup address, and record the lookup data when the bidirectional counter is equal to 0 or N, as the last lookup data record for the next query;

[0112] Add a sign bit to the output of the lookup table data.

[0113] The following uses the symbol sequence 0010111100 as an example to introduce the specific implementation scheme of the present invention.

[0114] The GMSK quadrature modulator in this embodiment of the invention consists of a quadrature modulation baseband generator and an up-conversion (DUC) circuit, such as... Figure 8 As shown. The modulator adopts a hardware architecture of a signal processor plus a high-speed DAC. The RF power amplifier, power supply, and other components are no different from conventional designs and are omitted here. The hardware for implementing the signal processor can be an FPGA, DSP, or microcontroller, etc. Figure 8 The quadrature modulation baseband generator and the DDS, multiplier, and adder modules in the upconversion circuit can all be implemented in the signal processor. Alternatively, an internal DAC chip with an integrated NCO can be used for upconversion, requiring only the signal processor to generate the quadrature modulation baseband. If the carrier frequency is high, the signal processor can first generate the quadrature modulation baseband signal, then mix it with the intermediate frequency carrier, and finally use an internal DAC chip with an integrated NCO for upconversion. The core of all these architectures is the quadrature modulation baseband generator.

[0115] The quadrature modulation baseband generator consists of a bidirectional counter, a four-curve data table, an in-phase component processor, and a quadrature component processor. The symbol period is T. b The binary code sequence to be modulated, a k The quadrature modulation baseband generator takes the system clock clk as input and divides the system clock to generate a symbol frequency multiplication clock (multiplication period T). b / N) pulse; at the rising edge of the frequency multiplication clock pulse, the quadrature modulation baseband generator acquires and saves the associated 3 symbols of the current symbol period.

[0116] The associated 3-bit symbol is denoted as a -1 a0, a +1 , representing the binary symbols of the previous symbol period, the current symbol period, and the next symbol period currently stored by the quadrature modulation baseband generator, respectively. -1 a0, a +1 It can be used as a bit in Boolean operations.

[0117] The bidirectional counter counts the frequency-multiplying clock pulses in a controllable direction, changing the counting direction according to the odd-even order of the code sequence to be modulated. Odd-numbered code elements are counted down from N-1 to 0, while even-numbered code elements are counted up from 1 to N.

[0118] Get BT b =0.5, N=10, the original data of the four curves were sampled from... and The corresponding binary curve type numbers are 00B, 01B, 10B, and 11B, respectively. The original data of the four curves are quantized digitally using hexadecimal fixed-point decimals and stored in the data storage, as shown in Table 3.

[0119] Table 3 shows the data for the four curves when N=10.

[0120]

[0121] During initialization, the preceding cycle symbol of the first symbol is the same as the first symbol; the initial value of the bidirectional counter is N (i.e., 10), and the first symbol is in odd order; the initial value of the in-phase component channel symbol is positive (i.e., 0), and the initial value of the last lookup table data record is cos(0) quantization value (i.e., 0x7FFF); the initial value of the quadrature component channel symbol is equal to the first symbol value (i.e., 0), and the initial value of the last lookup table data record is sin(0) quantization value (i.e., 0x0000). When the modulator stops, the next cycle symbol is defaulted to 0.

[0122] The in-phase component processor consists of a curve type selector and a processing unit. It generates the curve type number and curve symbol by associating 3 symbols and looking up table data records at the end of the previous symbol period. Then, it calculates the lookup table address by multiplying the curve type number by (N+1) and adding the value of the bidirectional counter. The signal processing process of the in-phase component processor can be shown in Table 4.

[0123] Table 4 shows the in-phase component signal processing procedure for the symbol sequence 0010111100.

[0124]

[0125]

[0126] Similarly, the quadrature component processor consists of a curve type selector and a processing unit. It generates the curve type number and curve symbol by associating 3 symbols and looking up table data records at the end of the previous symbol period. Then, it calculates the lookup table address by multiplying the curve type number by (N+1), adding N, and subtracting the bidirectional counter value. The signal processing process of the quadrature component processor can be shown in Table 5.

[0127] Table 5. Signal processing procedure of the quadrature component processor for the symbol sequence 0010111100.

[0128]

[0129] By sequentially looking up the tables according to the lookup addresses obtained by the in-phase component processor and the quadrature component processor, and adding symbols, the quadrature modulation baseband signals I(t) and Q(t) can be obtained. The results are consistent with those in Table 2 above, which verifies the effectiveness of this embodiment.

[0130] By inputting I(t) and Q(t) into the DUC, a GMSK modulated signal can be generated. The DUC can be (but is not limited to) a high-speed DAC chip with an internal NCO, such as the DAC5686 or DAC3482 from TI.

[0131] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A GMSK quadrature modulator, characterized in that: Includes a quadrature modulation baseband generator and a digital upconversion circuit; The quadrature modulation baseband generator is responsible for converting the symbol sequence to be modulated into quadrature in-phase and quadrature component signals, which are then input into the digital up-conversion circuit to complete carrier modulation and generate GMSK modulated signals. The binary symbol sequence and system clock are input to the quadrature modulation baseband generator; The system clock is divided to generate a symbol frequency multiplier clock pulse, which drives a bidirectional counter to oscillate and count in the odd-even order of the symbol sequence to be modulated. The in-phase component processor and the quadrature component processor, based on the associated symbol combinations in the sampled binary symbol sequence and the curve continuity reflected by the previous processing result, generate the current curve selection type and the current curve symbol. Using the bidirectional counter output as the lookup address of the current curve, the quadrature in-phase and quadrature component signals are output point by point by looking up the pre-stored four-curve data table. The in-phase and quadrature component signals are input to the digital upconverter circuit, which generates the GMSK modulated signal.

2. The GMSK quadrature modulator according to claim 1, characterized in that, The quadrature modulation baseband generator consists of a bidirectional counter, a four-curve data table, an in-phase component processor, and a quadrature component processor. The symbol period is T b After the binary code sequence to be modulated and the system clock are input into the quadrature modulation baseband generator, the system clock is divided to generate a frequency multiplication period of T. b / N symbol frequency multiplication clock pulse; The quadrature modulation baseband generator completes signal processing once per frequency multiplication clock cycle, outputting quadrature in-phase component signals point by point. and orthogonal component signals 3. The GMSK quadrature modulator according to claim 2, characterized in that: The bidirectional counter counts the frequency-doubling clock pulses in a controllable direction, changing the counting direction according to the odd-even order of the code sequence to be modulated; the odd-numbered code elements of the code sequence to be modulated are counted down from N-1 to 0; the even-numbered code elements of the code sequence to be modulated are counted up from 1 to N.

4. The GMSK quadrature modulator according to claim 2, characterized in that: The four-curve data table contains four types of curves, each containing N+1 data points. The four curves are denoted as S0(n), S1(n), S2(n), and S3(n), respectively. The four curves are stored in a data memory with a starting address interval of N+1 using fixed-point numbers. The curve type numbers of the four curves are 0, 1, 2, and 3, respectively. The four curves are selected from a set of quadrature modulated baseband signals with phase paths located in the first quadrant, obtained by sampling at a sampling rate of N and digital quantization; the data of the four selected curves meet the following requirements: S0(0)=S2(0)=sin(0) S1(0)=S3(0)=sin(δ) S0(N)=S3(N)=cos(0) S1(N)=S2(N)=cos(δ) Where δ is the phase change value caused by intersymbol interference, and is related to BT. b The correlation is used to reflect the effect of the Gaussian filter on the modulation phase.

5. The GMSK quadrature modulator according to claim 2, characterized in that: The in-phase component processor consists of a curve type selector and a processing unit. Its inputs are adjacent preceding symbols, the current symbol, and the following symbols, as well as the output of a frequency multiplication clock pulse and a bidirectional counter. Its output is the in-phase component signal. The curve type selector generates the curve type number for the in-phase component of the current symbol period. The processing unit generates lookup table addresses, in-phase component symbols, and end lookup table data records.

6. The GMSK quadrature modulator according to claim 2, characterized in that: The quadrature component processor consists of a curve type selector and a processing unit. Its inputs are adjacent preceding symbols, the current symbol, and the following symbols, as well as the output of a frequency-doubling clock pulse and a bidirectional counter. Its output is the quadrature component signal. The curve type selector of the orthogonal component processor generates the curve type number of the orthogonal component in the current symbol period; The processing unit generates lookup table addresses, orthogonal component symbols, and end lookup table data records.

7. The GMSK quadrature modulator according to claim 5 or 6, characterized in that, One curve type selector is set in both the in-phase component processor and the quadrature component processor, and each operates independently. The curve type selector selects the curve type according to the following logic during the high level of the frequency multiplication clock pulse: When the adjacent preceding code, current code, and following code are all the same, the curve type is selected as S0(n), and the curve type number is 0. When the current symbol and the following symbol are the same, but the current symbol is different from the previous symbol and the following symbol, the curve type is selected as S1(n), and the curve type number is 1. When the current symbol is different from the following symbol, and the data record at the end of the previous symbol period recorded by the processing unit is not equal to the cos(0) or sin(δ) quantization value, the curve type is selected as S2(n), and the curve type number is 2. When the current symbol is different from the following symbol, and the data record at the end of the previous symbol period recorded by the processing unit is equal to the quantized value of cos(0) or sin(δ), the curve type is selected as S3(n), and the curve type number is 3.

8. The GMSK quadrature modulator according to claim 5 or 6, characterized in that, One processing unit is provided in each of the in-phase component processor and the quadrature component processor, and each operates independently. The processing unit performs the following processing: During the high level of the frequency multiplication clock pulse, if the lookup table data record at the end of the previous symbol period is equal to the sin(0) quantization value, the symbol of this symbol period is the inverse of the symbol of the previous symbol period; otherwise, the symbol of this symbol period is equal to the symbol of the previous symbol period. During the high level of the frequency multiplication clock pulse, the lookup start address of the four-curve data table is generated by multiplying the curve type number generated by the curve type selector by (N+1). During the low level of the frequency multiplication clock pulse, the in-phase component processor processing unit adds the lookup table start address to the bidirectional counter output to generate the in-phase component lookup table address; the quadrature component processor processing unit adds N to the lookup table start address and subtracts the bidirectional counter output to generate the quadrature component lookup table address. Retrieve the lookup data from the four curve data table according to the lookup address, and record the lookup data when the bidirectional counter is equal to 0 or N, as the last lookup data record for the next query; Add a sign bit to the lookup table data output.

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