Method for PDCCH buffer management

Abstract

The invention relates to a method for PDCCH buffer management. A method of enhancing physical downlink control channel (PDCCH) detection reliability is described, wherein the PDCCH may be repeatedly transmitted with different beams. The method uses soft combination in which a user equipment (UE) combines soft bits from each repetition with combined soft bits used to jointly decode PDCCH repetitions. To support the soft combination, the UE needs to buffer the soft bits. The buffering method includes determining what contributes to the buffering, including the case where one of linked search sets (SSs) is discarded, what a contribution in a linked SS set pair is, how to determine the duration of a buffer count, and how the UE reports its maximum buffer size capability. A priority rule may be used in the PDCCH decoding using the SS set pair where the required buffer size exceeds the UE maximum buffer size, where the priority is based on SS type, serving cell index, SS set ID, and / or control channel resource set (CORESET) ID.

Description

Background Art Technical Field

[0001] Various aspects may generally relate to the field of wireless communications. Summary of the invention

[0002] Aspects of the methods described herein include a user equipment (UE). The UE includes a radio frequency (RF) receiver configured to receive a first physical downlink control channel (PDCCH) signal and a second PDCCH signal from a base station, the second PDCCH signal being a repetition of the first PDCCH signal and being transmitted from the base station via a beam different from the beam of the first PDCCH signal, the first PDCCH signal and the second PDCCH signal sharing the same control channel element (CCE) aggregation level and starting candidate index, the first PDCCH signal and the second PDCCH signal being configured by the base station to use two linked search space (SS) sets. The UE also includes a processing circuit coupled to the RF receiver, the processing circuit being configured to blindly decode the first PDCCH signal and the second PDCCH signal by obtaining corresponding soft bits from the first PDCCH signal and the second PDCCH signal. The UE also includes a buffer coupled to the processing circuit and configured to buffer corresponding soft bits for a duration. In addition, the processing circuit is configured to combine corresponding soft bits to jointly decode the first PDCCH signal and the second PDCCH signal.

[0003] Aspects of the method also include a method comprising the following steps: receiving, by a user equipment (UE) from a base station, a first physical downlink control channel (PDCCH) signal and a second PDCCH signal, the second PDCCH signal being a repetition of the first PDCCH signal and being transmitted from the base station via a beam different from the beam of the first PDCCH signal, the first PDCCH signal and the second PDCCH signal sharing the same control channel element (CCE) aggregation level and starting candidate index, the first PDCCH signal and the second PDCCH signal being configured by the base station to use two linked search space (SS) sets. The method also includes the step of blindly decoding the first PDCCH signal and the second PDCCH signal by obtaining corresponding soft bits from the first PDCCH signal and the second PDCCH signal. In addition, the method includes the step of buffering the corresponding soft bits for a duration by a buffer. The method also includes the step of combining the corresponding soft bits to jointly decode the first PDCCH signal and the second PDCCH signal.

[0004] Aspects of the methods described herein include a base station. The base station includes a radio frequency (RF) transceiver configured to receive an indication of a maximum supported buffer size of a user equipment (UE). The base station also includes a processing circuit coupled to the RF transceiver, the processing circuit configured to generate a first physical downlink control channel (PDCCH) signal and a second PDCCH signal, the second PDCCH signal being a repetition of the first PDCCH signal, the first PDCCH signal and the second PDCCH signal sharing the same control channel element (CCE) aggregation level and starting candidate index, the first PDCCH signal and the second PDCCH signal being configured to use two linked search space (SS) sets. The processing circuit in the base station is also configured to adjust the scheduling of the first PDCCH signal or the second PDCCH signal, or to adjust the priority of the two linked SS sets based on the indication of the maximum supported buffer size. The RF transceiver of the base station is also configured to transmit the first physical downlink control channel (PDCCH) signal and the second PDCCH signal to the UE.

[0005] Aspects of the method also include a method comprising the step of receiving, by a base station, an indication of a maximum supported buffer size of a user equipment (UE). The method also includes the step of generating a first physical downlink control channel (PDCCH) signal and a second PDCCH signal, the second PDCCH signal being a repetition of the first PDCCH signal, the first PDCCH signal and the second PDCCH signal sharing the same control channel element (CCE) aggregation level and starting candidate index, the first PDCCH signal and the second PDCCH signal being configured to use two linked search space (SS) sets. The method also includes the step of adjusting the scheduling of the first PDCCH signal or the second PDCCH signal or adjusting the priority of the two linked SS sets based on the indication of the maximum supported buffer size. The method also includes the step of transmitting the first physical downlink control channel (PDCCH) signal and the second PDCCH signal to the UE.

[0006] The present invention is provided for the purpose of illustrating some aspects only, so as to provide an understanding of the subject matter described herein. Therefore, the above-mentioned features are only examples and should not be understood as narrowing the scope or essence of the subject matter in the present disclosure. Other features, aspects and advantages of the present disclosure will become apparent from the following detailed description, drawings and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and enable those skilled in the relevant art to make and use the present disclosure.

[0008] Figure 1An example system implementing a mechanism for buffering soft bits for PDCCH blind decoding in accordance with some aspects of the present disclosure is shown.

[0009] Figure 2 A block diagram of an example system 200 implementing an electronic device that buffers soft bits for PDCCH blind decoding according to some aspects of the present disclosure is shown.

[0010] Figure 3 Possible PDCCH locations 310 on a time-frequency grid are shown, with time slots shown on the time axis and bandwidth portions shown on the frequency axis, in accordance with aspects of the present disclosure.

[0011] Figure 4 Two linked SS set pairs are shown in accordance with some aspects of the present disclosure.

[0012] Figure 5 Two linked SS sets supporting aggregation levels of 4 and 8 are shown in accordance with aspects of the present disclosure.

[0013] Figure 6 The duration of linked SS set pairs is shown in accordance with some aspects of the present disclosure.

[0014] Figure 7 A flow chart of a method 700 for buffering soft bits for PDCCH blind decoding in accordance with aspects of the present disclosure is shown.

[0015] Figure 8 An exemplary computer system for implementing some aspects or portions thereof.

[0016] The present disclosure is described with reference to the accompanying drawings. In the drawings, generally, the same reference numerals represent the same or functionally similar elements. In addition, generally, the leftmost digit of a reference numeral identifies the drawing in which the reference numeral first appears. DETAILED DESCRIPTION

[0017] Figure 1An example system for implementing a mechanism for buffering soft bits for PDCCH blind decoding according to some aspects of the present disclosure is shown. The exemplary system 100 is provided for illustrative purposes only and is not intended to limit the disclosed aspects. The system 100 may include, but is not limited to, network nodes (e.g., base stations such as eNBs) 101 and 103 and electronic devices (e.g., UEs) 105. The electronic device 105 (hereinafter referred to as UE 105) may be configured to operate based on a variety of wireless communication technologies. These technologies may include, but are not limited to, technologies based on the third generation partnership project (3GPP) standard. For example, the UE 105 may be configured to operate using the 3GPP standard. The UE 105 may include, but is not limited to: wireless communication devices, smart phones, laptops, desktop computers, tablet computers, personal assistants, monitors, televisions, wearable devices, Internet of Things (IoT), communication devices of vehicles, etc. The network node 101 (referred to herein as a base station) may include a node configured to operate based on a variety of wireless communication technologies (such as, but not limited to, technologies based on the 3GPP standard).

[0018] According to some aspects, UE 105 and base stations 101 and 103 are configured to implement a mechanism for UE 105, and UE is used to buffer soft bits for PDCCH blind decoding. In certain aspects, UE 105 is configured to buffer soft bits for PDCCH blind decoding. According to some aspects, UE 105 can be connected to base station 101 (e.g., serving cell) using carrier 107 and can communicate with it, and UE 105 buffers soft bits for PDCCH blind decoding from the carrier.

[0019] According to some aspects, UE 105 may measure one or more carriers (eg, carrier 107) used to communicate with base station 101 (eg, serving cell) to perform buffering of soft bits for PDCCH blind decoding.

[0020] Figure 2 A block diagram of an example system 200 of an electronic device for implementing buffering soft bits for PDCCH blind decoding according to some aspects of the present disclosure is shown. System 200 can be any electronic device (e.g., base station 101, UE 105) in the electronic devices of system 100. System 200 includes a processor 210, one or more transceivers 220a-220n, a communication infrastructure 240, a memory 250, an operating system 252, an application 254, and an antenna 260. The system shown is provided as an exemplary portion of system 200, and system 200 may include other circuits and subsystems. In addition, although the system of system 200 is shown as separate components, aspects of the present disclosure may include any combination of these components, fewer components, or more components.

[0021] The memory 250 may include random access memory (RAM) and / or cache, and may include control logic components (e.g., computer software) and / or data. The memory 250 may include other storage devices or memories, such as, but not limited to, a hard drive and / or a removable storage device / unit. In various embodiments, a buffer (temporary data storage area) may be part of the memory 250. According to some examples, an operating system 252 may be stored in the memory 250. The operating system 252 may manage data transmission from the memory 250 and / or one or more application programs 254 to the processor 210 and / or one or more transceivers 220a-220n. In some examples, the operating system 252 maintains one or more network protocol stacks (e.g., an Internet protocol stack, a cellular protocol stack, etc.) that may include multiple logical layers. At the corresponding layer of the protocol stack, the operating system 252 includes a control mechanism and a data structure to perform functions associated with the layer.

[0022] According to some examples, applications 254 may be stored in memory 250. Applications 254 may include applications (e.g., user applications) used by wireless system 200 and / or a user of wireless system 200. Applications in applications 254 may include applications such as, but not limited to, radio streaming, video streaming, remote control, and / or other user applications.

[0023] The system 200 may also include a communication infrastructure 240. The communication infrastructure 240 provides, for example, communication between the processor 210, one or more transceivers 220a-220n, and the memory 250. In some implementations, the communication infrastructure 240 may be a bus.

[0024] Processor 210 , together with instructions stored in memory 250 , performs operations that enable system 200 of system 100 to implement mechanisms for performing buffering of soft bits for PDCCH blind decoding, as described herein.

[0025] According to some aspects, one or more transceivers 220a-220n transmit and receive communication signals supporting a mechanism for performing buffering of soft bits for PDCCH blind decoding, and may be coupled to antenna 260. Antenna 260 may include one or more antennas that may be the same or different types. One or more transceivers 220a-220n allow system 200 to communicate with other devices that may be wired and / or wireless. In some examples, one or more transceivers 220a-220n may include processors, controllers, radio components, sockets, plugs, buffers, and similar circuits / devices for connecting to a network and communicating on the network. According to some examples, one or more transceivers 220a-220n may include one or more circuits for connecting to a wired network and / or a wireless network and communicating on a wired network and / or a wireless network.

[0026] According to some aspects, one or more transceivers 220a-220n may include a cellular subsystem, a WLAN subsystem, and / or a Bluetooth subsystem. TM Subsystems, each of which includes its own radio transceiver and protocol, as will be understood by those skilled in the art based on the discussion provided herein. In some implementations, one or more of the transceivers 220a-220n may include more or fewer systems for communicating with other devices.

[0027] In some examples, one or more transceivers 220a-220n may include one or more circuits (including a WLAN transceiver) to enable connection and communication via a WLAN network (such as, but not limited to, a network based on the standards described in IEEE 802.11). Additionally, or alternatively, one or more transceivers 220a-220n may include one or more circuits (including a WLAN transceiver) to enable connection and communication via a WLAN network (such as, but not limited to, a network based on the standards described in IEEE 802.11). TM Protocol, Bluetooth TM Low Energy Protocol or Bluetooth TM One or more circuits for connection and communication with low energy long range protocols (including Bluetooth TM For example, the transceiver 220n may include a Bluetooth TM Transceiver.

[0028] In addition, one or more transceivers 220a-220n may include one or more circuits (including cellular transceivers) for connecting to and communicating on a cellular network. Cellular networks may include, but are not limited to, 3G / 4G / 5G networks such as Universal Mobile Telecommunications System (UMTS), Long Term Evolution (LTE), etc. For example, one or more transceivers 220a-220n may be configured to operate in accordance with one or more of Rel-15, Rel-16, Rel-17, or other 3GPP standards.

[0029] According to some aspects, processor 210 alone or in combination with computer instructions stored in memory 250 and / or one or more transceivers 220a-220n implements buffering of soft bits for PDCCH blind decoding, as discussed herein. For example, transceiver 220a may receive a first carrier (e.g., Figure 1 In this example, transceiver 220a and / or transceiver 220b can buffer soft bits (e.g., Figure 1 109). Additionally, or alternatively, the wireless system 200 may include a transceiver configured to operate on different carriers. According to some examples, the processor 210 may be configured to control a transceiver to switch between different carriers. Although the operations discussed herein are discussed with respect to the processor 210, it is noted that the processor 210 may implement these operations alone or in combination with computer instructions stored in the memory 250 and / or one or more transceivers 220a-220n.

[0030] Overview of PDCCH decoding in wireless communication systems

[0031] The Physical Downlink Control Channel (PDCCH) is a control channel that carries control signals to support mobile wireless communication systems. When describing the wireless resources used in mobile wireless communication systems, a resource element (RE) is the smallest unit of the time-frequency grid and consists of one subcarrier in the frequency domain and one OFDM symbol in the time domain. A resource element group (REG) is a resource block, where one resource block contains 12 REs in the frequency domain and one OFDM symbol in the time domain. A REG packet consists of multiple REGs, where the packet size is indicated by the parameter "L" provided through the RRC signal. A control channel element (CCE) is a combination of multiple REGs, where the number of REGs in a CCE is different. Finally, the aggregation level (AL) indicates the number of CCEs allocated to the PDCCH and is predefined as shown in Table 1 below.

[0032] Returning to the PDCCH, the user equipment (UE) or mobile device initially does not know the exact location in the time-frequency grid where the PDCCH is being brought. Therefore, at a high level, the UE or mobile device is faced with blind decoding candidate PDCCHs transmitted from the network. In this blind decoding, the UE knows the range that may carry the PDCCH. Within this range, the UE attempts to decode the PDCCH using multiple parameter values ​​in a trial-and-error method.

[0033] In Release 15 of the 3GPP technical specification, the UE can decode the PDCCH based on the configuration of the search space (SS) and the control channel resource set (CORESET). Because there are multiple aggregation levels, the device can have multiple search spaces in which decoding attempts are made. In particular, there can be multiple search spaces using the same CORESET. The details of the SS and CORESET are configured by RRC signaling. The SS information provides the time slot and starting symbol index through the following two parameters: monitoringSlotPeriodicityAndOffset and monitoringSymbolsWithinSlot. Similarly, the CORESET information provides frequency resources, symbol duration, and transmission and configuration indication (TCI) through the following three parameters: frequencyDomainResources, duration, and tci-StatesPDCCH-ToAddList / tci-StatesPDCCH-ToReleaseList. TCI indicates beam-related information, which can also be updated by the MAC control element (CE).

[0034] Figure 3 Possible PDCCH locations 310 on a time-frequency grid according to aspects of the present disclosure are shown, with time slots shown on the time domain axis and bandwidth portions shown on the frequency axis. As described above, possible PDCCH locations 310 are identified by the UE based on the SS and its associated CORESET. The frequency location, number of symbols, and TCI state of the PDCCH location 310 are configured by the CORESET, and the number of symbols of the PDCCH location 310 is configured by the CORESET. The time slot and starting symbol index are configured by the SS.

[0035] In addition to the time-frequency grid position, the UE shall also detect the control channel element (CCE) position of the PDCCH candidate within the configured time / frequency resources. For the PDCCH scheduling SIB1, the candidate CCE aggregation and CCE number are predefined as shown in Table 1 below:

[0036] Table 1

[0037] CCE aggregation level Number of candidates 4 4 8 2 16 1

[0038] For other types of PDCCH, the candidate CCE aggregation level is configured by the following parameter: nrofCandidates.

[0039] For each PDCCH candidate m_(s,n_CI), the possible CCEs can be calculated as follows, and the interpretation of each variable is defined in Section 10.1 of the 3GPP technical specification TS 38.214:

[0040]

[0041] In summary, in Release 15, for a UE, the process is that it has to blindly try to decode CCEs with different CCE aggregation levels until the process correctly decodes the PDCCH.

[0042] Now turn to Release 17 of the 3GPP technical specification, and in order to improve PDCCH reliability, PDCCH can be transmitted repeatedly with different beams. In this release, a base station (e.g., gNB) can configure two linked SS sets, and these two SS sets can be associated with different CORESETs. Note that in the linked SS set, the linked PDCCH candidates (PDCCH repetitions) should share the same CCE aggregation level and starting candidate index. In this case, there can be two detection schemes: a repetition scheme and a soft combining scheme.

[0043] In the first detection scheme, the repetition scheme, the UE detects each repetition independently, and if one of the PDCCHs is successfully decoded, the PDCCH may be considered "detected".

[0044] In the second detection scheme, the soft combining scheme, the UE combines the soft bits obtained from each repetition and uses the combined soft bits for channel decoding to jointly decode the PDCCH repetitions. Therefore, in this scheme, this will require the UE to buffer the soft bits for the linked candidates. However, in the soft combining scheme, in order to support soft combining, the UE needs to buffer the soft bits. This again poses a challenge - the UE memory (e.g., memory 250, of which the buffer may be a part) may be limited so that the UE cannot buffer a large number of soft bits. For example, if Figure 4 As shown on the time-frequency grid in , the UE needs to buffer soft bits to decode all linked PDCCH candidates in a linked SS set pair. Figure 4 Two linked pairs of SS sets are shown: SS1 (410) and SS3 (430) and SS2 (420) and SS4 (440), in accordance with some aspects of the present disclosure.

[0045] In addition to the above challenges, the following aspects need to be addressed when managing the soft bit buffer for PDCCH during PDCCH repetition detection: (a) UEs configured in carrier aggregation (CA) operation with multiple component carriers (CCs); (b) dropping one of the linked SS sets due to overbooking, QCL-TypeD conflict handling, overlap with SSB, overlap with rate matching resources, overlap with semi-static / dynamic UL symbols, or PRACH; (c) different UE reception scenarios; and (d) buffer occupancy duration. Each of these aspects is discussed below.

[0046] Regarding CA operation, the following options may be provided to support a buffer that supports a soft bit combining method. In option 1, the buffer is incremented (or counted) per component carrier (CC) or bandwidth part (BWP). In the present disclosure, the term "increment" or "count" refers to whether the contribution is included in the buffer (i.e., taken into account) during the soft decoding process. In option 2, the buffer is incremented across CCs in the frequency band. In the third option, option 3, the buffer is incremented across CCs in the frequency band combination. In the fourth option, option 4, the buffer is incremented across CCs in the frequency range (FR). In the fifth option, option 5, the buffer is incremented per UE. In the last option, option 6, the UE may report how to increment the buffer as per UE capability in CA operation.

[0047] If the UE is capable of supporting multiple options from Option 1 to Option 5, an RRC parameter may be introduced to select one of these available options.

[0048] Regarding more complex multi-transmission / reception point (multi-TRP) operations based on multiple downlink control information (multi-DCI), the following options may be provided to support the soft bit combining method. In the first option, Option 1, the buffer is incremented per TRP-CORESET associated with the same CORESETPoolIndex parameter. In the second option, Option 2, the buffer is incremented across TRPs. In the third option, Option 3, whether the buffer is incremented per TRP or across TRPs may be reported as a UE capability. Note that if the UE supports multiple options from Option 1 to Option 2, an RRC parameter may be introduced to select one option.

[0049] Regarding the case where one of the linked SS sets is dropped, the following options are provided to address this situation. In the first option, Option 1, the buffer for the linked SS set is still incremented. In the second option, Option 2, the buffer for the linked SS set is not incremented. In the third option, Option 3, whether the buffer is incremented depends on predefined rules, such as whether the dropped linked SS is still counted in blind detection (BD) or the reason for the drop, such as overbooking, QCL-TypeD conflict handling, overlap with SSB, overlap with rate matching resources, overlap with semi-static / dynamic UL symbols, or PRACH. In the fourth option, Option 4, whether the buffer is incremented depends on whether the dropped linked SS is reported by the UE capability or configured by higher layer signaling.

[0050] For buffer counting of linked SS set pairs, the following options are provided. In the first option, Option 1, the buffer receives or counts contributions from all linked PDCCH candidates. In the second option, Option 2, the buffer counts the maximum total number of REs per CCE aggregation level. In the third option, Option 3, whether to use Option 1 or Option 2 is configured by UE capability reporting or by higher layer signaling.

[0051] Figure 5 Two linked SS sets supporting aggregation levels of 4 and 8 (i.e., AL={4,8}) according to aspects of the present disclosure are shown. In the first illustrated option, Option 1, the buffer counts soft bits to decode PDCCH candidate pairs 1, 2, and 3 for aggregation level (AL)=4 (search sets SS1 (510) and SS2 (520)) and PDCCH candidate pair 1 for AL=8 (search sets SS1 (530) and SS2 (540)). This assumes that the UE uses parallel decoding for each PDCCH candidate pair.

[0052] For option 2, the buffer counts soft bits to decode only the PDCCH in CCEs 1 - 12. This assumes that soft bits can be shared for PDCCH candidates with overlapping CCEs.

[0053] For the duration of the buffer count of the linked SS set pair, the following options are provided. In the first option, Option 1, the duration starts from the first symbol of the SS set that starts earlier and stops after K symbols after the last symbol of the SS set that ends later. In the second option, Option 2, the duration starts from the last symbol of the SS set that ends earlier and stops after K symbols after the last symbol of the SS set that ends later. The parameter K may be predefined or reported by the UE capability or configured by higher layer signaling (e.g., RRC signaling). Figure 6These two options are shown in accordance with aspects of the present disclosure. The symbol sequence (610) shows two durations. In option 1, and K equals 2, the duration starts at symbol 1 and ends at symbol index 11, which is two symbols after the last symbol of the earlier ended SS set. In option 2, and K equals 2, the duration starts at symbol 4 (after the last symbol of the earlier ended SS set) and ends at symbol index 11, which is two symbols after the last symbol of the earlier ended SS set.

[0054] In addition to the above buffer counting (or incrementing) rules, the UE can report the maximum buffer size that it can support as the UE capability. If the UE does not support soft combining, it does not report this UE capability. Alternatively, the maximum buffer size can be predefined, and the UE only needs to report whether it supports soft combining. Whether the UE supports soft combining can be determined by a separate UE capability report or by a BD counting rule. For example, if the UE reports BD=2, it does not support soft combining; if the UE reports BD=3, it supports soft combining. Alternatively, the maximum number of linked SS set pairs that overlap in the time domain can be predefined or reported by the UE capability. The duration of the linked SS set pairs is counted based on the above options, such as Figure 6 shown.

[0055] After determining the maximum buffer size, the following options are provided. In the first option, Option 1, gNB scheduling should avoid the situation where the required buffer size exceeds the maximum buffer size. In the second option, Option 2, there is no restriction on scheduling and the UE can change the PDCCH reception scheme. If the required buffer size exceeds the maximum buffer size, a priority rule can be introduced for SS set pairs, which is determined by SS type, serving cell index, SS set ID and / or CORESET ID. In one example, the priority can be determined by SS type (CSS>USS) and then by serving cell index and associated SS set or CORESET ID (lowest ID>highest ID).

[0056] For low priority SS set pairs, there are at least three options. In the first option, option 1, the UE discards these pairs to meet the buffer size requirement. In the second option, option 2, the UE applies selective decoding to receive these pairs to meet the buffer size requirement. In the third option, option 3, whether to use option 1 or 2 can be reported by the UE capability or configured by the base station (e.g., gNB). The interpretation of the decoded DCI and BD counts can be based on the assumption of single PDCCH or multiple PDCCH repetitions. As an extension, options 1 / 2 / 3 may only apply to some linked PDCCH candidates from low priority SS set pairs, and the priority of the linked PDCCH candidates is determined by the candidate index and AL. In one example, the priority is first counted based on the AL (larger AL < lower AL) and then counted based on the candidate index (low > high).

[0057] Figure 7 A flow chart of a method 700 for buffering soft bits for PDCCH blind decoding according to various aspects of the present disclosure is shown. Step 710 includes receiving, by a radio frequency (RF) receiver in a user equipment (UE), a first physical downlink control channel (PDCCH) signal and a second PDCCH signal from a base station, the second PDCCH signal being a repetition of the first PDCCH signal and being sent from the base station via a beam different from that of the first PDCCH signal, the first PDCCH signal and the second PDCCH signal sharing the same control channel element (CCE) aggregation level and starting candidate index, the first PDCCH signal and the second PDCCH signal being configured by the base station to use two linked search space (SS) sets. In other words, the first PDCCH signal is sent from the base station via the first beam, and the second PDCCH signal is sent from the base station via the second beam.

[0058] Step 720 includes blindly decoding, by a processing circuit coupled to the RF receiver, the first PDCCH signal and the second PDCCH signal by obtaining corresponding soft bits from the first PDCCH signal and the second PDCCH signal.

[0059] Step 730 includes buffering, by a buffer coupled to the processing circuit, the corresponding soft bits for a duration.

[0060] Finally, step 740 includes combining, by the processing circuit, the corresponding soft bits to jointly decode the first PDCCH signal and the second PDCCH signal.

[0061] For example, one or more computer systems such as Figure 8 The computer system 800 shown is used to implement various aspects. The computer system 800 can be any well-known computer capable of performing the functions described herein, such as Figure 1 Device 101, 103, 105 or Figure 2Device 200. Computer system 800 includes one or more processors (also referred to as central processing units or CPUs), such as processor 804. Processor 804 is connected to a communication infrastructure 806 (e.g., a bus). Computer system 800 also includes user input / output devices 803, such as a monitor, keyboard, pointing device, etc., that communicate with communication infrastructure 806 through user input / output interface 802. Computer system 800 also includes main memory or primary storage 808, such as random access memory (RAM). Main memory 808 may include one or more levels of cache. Main memory 808 has control logic (e.g., computer software) and / or data stored therein.

[0062] The computer system 800 may also include one or more secondary storage devices or memories 810. The secondary storage 810 may include, for example, a hard disk drive 812 and / or a removable storage device or drive 814. The removable storage drive 814 may be a floppy disk drive, a tape drive, an optical drive, an optical storage device, a tape backup device, and / or any other storage device / drive.

[0063] The removable storage drive 814 may interact with a removable storage unit 818. The removable storage unit 818 includes a computer usable or readable storage device having computer software (control logic) and / or data stored thereon. The removable storage unit 818 may be a floppy disk, a magnetic tape, a compact disk, a DVD, an optical storage disk, and / or any other computer data storage device. The removable storage drive 814 reads and / or writes from the removable storage unit 818 in a well-known manner.

[0064] According to some aspects, secondary memory 810 may include other devices, means, or other methods for allowing computer programs and / or other instructions and / or data to be accessed by computer system 800. Such devices, means, or other methods may include, for example, a removable storage unit 822 and an interface 820. Examples of removable storage unit 822 and interface 820 may include a program cartridge and cartridge interface (such as those found in video game devices), a removable memory chip (such as an EPROM or PROM) and associated socket, a memory stick and USB port, a memory card and associated memory card slot, and / or any other removable storage unit and associated interface.

[0065] The computer system 800 may also include a communication or network interface 824. The communication interface 824 enables the computer system 800 to communicate and interact with any combination of remote devices, remote networks, remote entities, etc. (individually and collectively referenced by reference number 828). For example, the communication interface 824 may allow the computer system 800 to communicate with a remote device 828 via a communication path 826, which may be wired and / or wireless and may include any combination of a LAN, a WAN, the Internet, etc. Control logic and / or data may be transmitted to and from the computer system 800 via the communication path 826.

[0066] The operations in the foregoing aspects can be implemented in various configurations and architectures. Thus, some or all of the operations in the foregoing aspects may be performed in hardware, software, or in both hardware and software. In some aspects, a tangible, non-transient device or article includes a tangible, non-transient computer-usable or readable medium on which a control logic component (software) is stored, also referred to herein as a computer program product or program storage device. This includes, but is not limited to, a computer system 800, a main memory 808, an auxiliary memory 810, and removable storage units 818 and 822, as well as tangible articles embodying any combination of the foregoing. Such control logic, when executed by one or more data processing devices (such as a computer system 800), causes such data processing devices to operate as described herein.

[0067] Based on the teachings contained in this disclosure, it will be apparent to those skilled in the relevant art how to use Figure 8 The various aspects of the present disclosure may be made and used with data processing devices, computer systems, and / or computer architectures other than those shown. In particular, the various aspects may operate with software, hardware, and / or operating system implementations other than those described herein.

[0068] It should be understood that the Detailed Description section, rather than the Summary and Abstract sections, is intended to be used to interpret the claims. The Summary and Abstract sections may set forth one or more but not all exemplary aspects of the present disclosure as contemplated by the inventors, and thus are not intended to limit the present disclosure or the appended claims in any way.

[0069] Although the present disclosure has been described herein with reference to exemplary aspects of exemplary fields and applications, it should be understood that the present disclosure is not limited thereto. Other aspects and modifications are possible and are within the scope and essence of the present disclosure. For example, and without limiting the generality of this paragraph, the various aspects are not limited to the software, hardware, firmware and / or entities shown in the figures and / or described herein. In addition, the various aspects (whether or not explicitly described herein) have significant practicality for fields and applications outside the examples described herein.

[0070] Various aspects have been described herein with the aid of functional building blocks that illustrate the implementation of specific functions and their relationships. For ease of description, the boundaries of these functional building blocks have been arbitrarily defined herein. Alternative boundaries may be defined as long as the specified functions and relationships (or their equivalents) are properly performed. In addition, alternative aspects may perform functional blocks, steps, operations, methods, etc., in an order different from that described herein.

[0071] References herein to "one aspect," "aspects," "exemplary aspects," or similar phrases indicate that the described aspects may include particular features, structures, or characteristics, but each aspect may not necessarily include the particular features, structures, or characteristics. Furthermore, such wordings do not necessarily refer to the same aspect. Furthermore, when particular features, structures, or characteristics are described in conjunction with one aspect, it is within the knowledge of those skilled in the relevant art to incorporate these features, structures, or characteristics into other aspects, whether or not explicitly mentioned or described herein. The breadth and scope of the present disclosure should not be limited by any of the above-described exemplary aspects, but should be limited only in accordance with the following claims and their equivalents.

[0072] As described above, various aspects of the present technology may include collecting and using data available from various sources, thereby (for example) improving or enhancing functionality. The present disclosure contemplates that, in some instances, these collected data may include personal information data that uniquely identifies or can be used to contact or locate a specific person. Such personal information data may include demographic data, location-based data, phone numbers, email addresses, Twitter IDs, home addresses, data or records related to the user's health or fitness level (e.g., vital sign measurements, medication information, exercise information), date of birth, or any other identifying information or personal information. The present disclosure recognizes that the use of such personal information data in the present technology can be used to benefit users.

[0073] The present disclosure envisions that entities responsible for collecting, analyzing, disclosing, transmitting, storing or otherwise using such personal information data will comply with established privacy policies and / or privacy practices. Specifically, such entities should implement and adhere to privacy policies and practices that are recognized as meeting or exceeding industry or government requirements for maintaining the privacy and security of personal information data. Such policies should be easily accessible to users and should be updated as the collection and / or use of data changes. Personal information from users should be collected for the legitimate and reasonable purposes of the entity and not shared or sold outside of these legitimate uses. In addition, such collection / sharing should only be done after receiving the user's informed consent. In addition, such entities should consider taking any necessary steps to defend and safeguard access to such personal information data and ensure that others who have access to personal information data comply with their privacy policies and processes. In addition, such entities may subject themselves to third-party assessments to demonstrate their compliance with widely accepted privacy policies and practices. In addition, policies and practices should be adjusted to specific types of personal information data collected and / or accessed, and to applicable laws and standards that include specific considerations of jurisdiction. For example, in the United States, the collection or access of certain health data may be governed by federal and / or state laws, such as the Health Insurance Portability and Accountability Act (HIPAA), while health data in other countries may be subject to other regulations and policies and should be handled accordingly. Therefore, different privacy practices should be maintained in each country for different types of personal data.

[0074] Regardless of the foregoing, the present disclosure also contemplates that users selectively block various aspects of the use or access to personal information data. That is, the present disclosure contemplates that hardware elements and / or software elements may be provided to prevent or block access to such personal information data. For example, the present technology may be configured to allow users to selectively participate in "opt-in" or "opt-out" of collecting personal information data at any time during (for example) registration for a service or thereafter. In addition to providing "opt-in" and "opt-out" options, the present disclosure contemplates providing notifications related to access or use of personal information. For example, a user may be notified that their personal information data will be accessed when downloading an application, and then be reminded again just before the personal information data is accessed by the application.

[0075] In addition, it is an object of the present disclosure that personal information data should be managed and processed to minimize the risk of unintentional or unauthorized access or use. Risks can be minimized by limiting data collection and deleting data once it is no longer needed. In addition, and when applicable, including in certain health-related applications, data de-identification can be used to protect the privacy of users. De-identification can be facilitated by removing specific identifiers (e.g., date of birth, etc.), controlling the amount or specificity of stored data (e.g., collecting location data at the city level rather than at the address level), controlling how data is stored (e.g., aggregating data between users), and / or other methods when appropriate.

[0076] Thus, while the present disclosure may broadly cover the use of personal information data to implement one or more of the various disclosed aspects, the present disclosure also contemplates that various aspects may be implemented without access to such personal information data. That is, various aspects of the present technology will not fail to function properly due to the lack of all or part of such personal information data.

Claims

1. A user equipment (UE), the UE comprising: a radio frequency (RF) receiver configured to receive a first physical downlink control channel (PDCCH) signal and a second PDCCH signal from a base station, the second PDCCH signal being a repetition of the first PDCCH signal and being transmitted from the base station via a beam different from a beam of the first PDCCH signal, the first PDCCH signal and the second PDCCH signal sharing the same control channel element (CCE) aggregation level and starting candidate index, the first PDCCH signal and the second PDCCH signal being configured by the base station to use two linked search space (SS) sets; a processing circuit coupled to the RF receiver, the processing circuit configured to blindly decode the first PDCCH signal and the second PDCCH signal by obtaining corresponding soft bits from the first PDCCH signal and the second PDCCH signal; a buffer coupled to the processing circuit and configured to buffer the corresponding soft bits for a duration, and The processing circuit is further configured to combine corresponding soft bits to jointly decode the first PDCCH signal and the second PDCCH signal.

2. The UE of claim 1, wherein the buffer increments using one of a per component carrier (CC), a per bandwidth part (BWP), a CC count across frequency bands, a CC count across frequency band combinations, a CC count across frequency ranges (FRs), or a per UE count.

3. The UE according to claim 1, wherein the UE participates in a multi-transmit reception point (multi-TRP) operation based on multiple downlink control information (DCI), and the buffer is incremented by a per-TRP control channel resource set (CORESET) associated with the same CORESETPoolIndex or counted across TRPs.

4. The UE of claim 1, wherein one of the linked SS sets is dropped due to one of overbooking, QCL-Type D conflict handling, SSB overlap, rate matching resource overlap, overlap with semi-static / dynamic uplink (UL) symbols, or a physical random access channel (PRACH). 5 . The UE of claim 1 , wherein the buffer is incremented based on all linked PDCCH candidates, or the buffer is incremented based on a maximum total number of resource elements (REs) per CCE aggregation level.

6. The UE of claim 1, wherein the duration of the buffer starts from a first symbol of an earliest SS set and stops at a last symbol of a later ending SS set after K symbols.

7. The UE of claim 1, wherein the duration of the buffer starts from the last symbol of the earliest SS set and stops at the last symbol of the later ending SS set after K symbols.

8. The UE of claim 1, wherein the UE reports an indication of a maximum supported buffer size.

9. The UE of claim 8, wherein the scheduling from the base station avoids a buffer queue exceeding the maximum supported buffer size.

10. The UE of claim 8, wherein a priority rule for incrementing the buffer is based on a type of SS, a serving cell index, a set ID of the SS, or an ID of the CORESET.

11. The UE of claim 8, wherein the processing circuit is further configured to discard at least one low priority SS set pair to accommodate the maximum supported buffer size. 12 . The UE of claim 8 , wherein the processing circuit is further configured to selectively decode at least one low priority SS set pair to accommodate the maximum supported buffer size.

13. The UE of claim 8, wherein the processing circuit is further configured to discard or selectively decode at least one low priority SS set pair based on a reporting capability of the UE or based on a configuration transmitted by the base station.

14. A method comprising: Receiving, by a user equipment (UE), a first physical downlink control channel (PDCCH) signal and a second PDCCH signal from a base station, the second PDCCH signal being a repetition of the first PDCCH signal and being sent from the base station via a beam different from a beam of the first PDCCH signal, the first PDCCH signal and the second PDCCH signal sharing the same control channel element (CCE) aggregation level and starting candidate index, the first PDCCH signal and the second PDCCH signal being configured by the base station to use two linked search space (SS) sets; blindly decoding the first PDCCH signal and the second PDCCH signal by obtaining corresponding soft bits from the first PDCCH signal and the second PDCCH signal; The corresponding soft bits are buffered by a buffer for a duration, and The corresponding soft bits are combined to jointly decode the first PDCCH signal and the second PDCCH signal.

15. The method of claim 14, wherein the buffer increments using one of per component carrier (CC), per bandwidth part (BWP), across CCs in a band, across CCs in a band combination, across CCs in a frequency range (FR), or per UE.

16. The method of claim 14, wherein the UE participates in a multi-transmit-receive point (multi-TRP) operation based on multiple downlink control information (DCI), and the buffer is incremented by a per-TRP control channel resource set (CORESET) associated with the same CORESETPoolIndex or counted across TRPs.

17. The method of claim 14, wherein one of the linked SS sets is dropped due to one of overbooking, QCL-Type D conflict handling, SSB overlap, rate matching resource overlap, overlap with semi-static / dynamic uplink (UL) symbols, or a physical random access channel (PRACH).

18. The method of claim 14, wherein the buffer is incremented based on all linked PDCCH candidates, or the buffer is incremented based on a maximum total number of resource elements (REs) per CCE aggregation level.

19. The method of claim 14, wherein the duration of the buffer starts from a first symbol of an earliest SS set and stops at a last symbol of a later ending SS set after K symbols.

20. The method of claim 14, wherein the duration of the buffer starts from the last symbol of the earliest SS set and stops at the last symbol of the later ending SS set K symbols later.

21. The method of claim 14, wherein the UE reports an indication of a maximum supported buffer size.

22. The method of claim 21, wherein scheduling from the base station avoids buffering queues exceeding the maximum supported buffer size.

23. The method of claim 21, wherein a priority rule for incrementing the buffer is based on a type of SS, a serving cell index, a set ID of the SS, or an ID of the CORESET.

24. The method of claim 21, further comprising discarding at least one low priority SS set pair to accommodate the maximum supported buffer size.

25. The method of claim 21, further comprising selectively decoding at least one low priority SS set pair to accommodate the maximum supported buffer size.

26. The method of claim 21, further comprising discarding or selectively decoding at least one low priority SS set pair based on a reporting capability of the UE or based on a configuration transmitted by the base station.

27. A base station, comprising: a radio frequency (RF) transceiver configured to receive an indication of a maximum supported buffer size of a user equipment (UE); a processing circuit coupled to the RF transceiver and configured to generate a first physical downlink control channel (PDCCH) signal and a second PDCCH signal, the second PDCCH signal being a repetition of the first PDCCH signal, the first PDCCH signal and the second PDCCH signal sharing a same control channel element (CCE) aggregation level and a starting candidate index, the first PDCCH signal and the second PDCCH signal being configured to use two linked search space (SS) sets; The processing circuit is further configured to adjust scheduling of the first PDCCH signal or the second PDCCH signal, or to adjust priorities of the two linked SS sets based on the indication of the maximum supported buffer size; and The RF transceiver is also configured to transmit the first physical downlink control channel (PDCCH) signal and a second PDCCH signal to the UE.

28. The base station of claim 27, wherein the processing circuit adjusts the priority based on a type of SS, a serving cell index, a set ID of the SS, or an ID of the CORESET.

29. A method comprising: receiving, by a base station, an indication of a maximum supported buffer size of a user equipment (UE); Generate a first physical downlink control channel (PDCCH) signal and a second PDCCH signal, wherein the second PDCCH signal is a repetition of the first PDCCH signal, the first PDCCH signal and the second PDCCH signal share the same control channel element (CCE) aggregation level and starting candidate index, and the first PDCCH signal and the second PDCCH signal are configured to use two linked search space (SS) sets; adjusting scheduling of the first PDCCH signal or the second PDCCH signal, or adjusting priorities of the two linked SS sets based on the indication of the maximum supported buffer size; as well as The first physical downlink control channel (PDCCH) signal and the second PDCCH signal are transmitted to the UE.

30. The method of claim 29, wherein the priority is adjusted based on a type of SS, a serving cell index, a set ID of the SS, or an ID of the CORESET.

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