CMOS-MEMS flow and gas thermal conductivity integrated sensor and preparation method and application thereof

Abstract

The invention provides a CMOS-MEMS (Complementary Metal Oxide Semiconductor-Micro-Electro-Mechanical System) flow and gas thermal conductivity integrated sensor as well as a preparation method and application thereof, and belongs to the field of sensors. The thermal insulation structure is designed between the thermal flow sensor and the gas thermal conductivity sensor, so that external thermal interference and thermal interference among different internal sensors are reduced, related thermophysical parameters of gas are detected at the same time, the flow is corrected, and the detection accuracy is improved. And the performance of the flow sensor is further improved so as to meet the requirements of flow detection and gas parameter detection in a more complex environment. When the sensor is prepared, a Post-CMOS (Complementary Metal Oxide Semiconductor) process without a mask is adopted, so that a complicated photoetching step is avoided, and the post-processing efficiency of the whole Post-CMOS is greatly improved. According to the sensor disclosed by the invention, a CMOS-MEMS (Complementary Metal Oxide Semiconductor-Micro-Electro-Mechanical System) process of monolithic integration and integrated preparation molding of various sensors is realized through reasonable process design.

Description

Technical Field

[0001] The present invention relates to the field of sensors, and in particular to a CMOS-MEMS flow and gas thermal conductivity integrated sensor and a preparation method and application thereof. Background Art

[0002] MEMS thermal flow sensors measure flow through the principle of heat exchange, without the need to convert physical quantities such as pressure, making the test process relatively simple. This type of sensor is sensitive to tiny flow changes and can accurately detect low-flow gas changes. Its high accuracy and good repeatability enable it to provide stable test results.

[0003] MEMS gas thermal conductivity sensors use the principle of heat transfer to detect the thermal conductivity of gas, and can be used to analyze gas composition, such as hydrogen detection, toxic and harmful gas detection, and monitoring and controlling gas composition. MEMS gas thermal conductivity sensors are the same as calorimetric flow sensors, both of which work through heat transfer.

[0004] At present, most flow sensors or gas thermal conductivity sensors based on the principle of heat exchange can only detect flow or gas thermal conductivity respectively. Since the working principle of thermal sensors is to detect the heat distribution under different detection environments through the heat transfer effect, thereby reflecting the temperature change in the detection area and its influence on the resistance value, and finally converting it into an electrical signal (such as voltage), this principle makes it easy for the flow rate to interfere with the heat removal effect when detecting thermal conductivity. Similarly, during the flow detection process, the difference in thermal conductivity of different gases will cause the detection resistor of the flow rate sensor to be affected by the heat transfer generated by the heating resistor, resulting in temperature deviation at the detection position, thereby affecting the resistance value and the output electrical signal, and ultimately causing errors in the test results. Therefore, how to reduce the mutual influence between the two sensors through reasonable design has become a key issue that needs to be solved urgently. Summary of the invention

[0005] The present invention provides a CMOS-MEMS flow and gas thermal conductivity integrated sensor and a preparation method and application thereof. The sensor of the present invention integrates a gas flow sensor and a gas thermal conductivity sensor, reduces the mutual influence between the gas flow sensor and the gas thermal conductivity sensor through a heat insulation structure, and simultaneously prepares the gas flow sensor and the gas thermal conductivity sensor using a Post-CMOS process.

[0006] The present invention provides a CMOS-MEMS flow and gas thermal conductivity integrated sensor, comprising a substrate 1, a silicon dioxide structure layer 2 located on the substrate, and a circuit part;

[0007] In a direction parallel to the bottom surface of the substrate, the silicon dioxide structure layer 2 includes a first silicon dioxide structure layer, a second silicon dioxide structure layer and a third silicon dioxide structure layer; the first silicon dioxide structure layer and the third silicon dioxide structure layer are located on both sides of the silicon dioxide structure layer; the second silicon dioxide structure layer includes a suspended part and a non-suspended part; the non-suspended part is in contact with the substrate;

[0008] A first PAD region and a first metal via embedded in the first silicon dioxide structure layer; the first PAD region includes a plurality of metal layers; the first metal via penetrates other metal layers except the top metal layer in the first PAD region;

[0009] An ambient temperature sensing resistor 7 embedded in the first silicon dioxide structure layer and the third silicon dioxide structure layer;

[0010] A first cavity 9 formed by the first silicon dioxide layer, the suspended portion of the second silicon dioxide layer, the non-suspended portion of the second silicon dioxide layer and the substrate;

[0011] a gas thermal conductivity sensor 8 suspended in the first cavity 9;

[0012] A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer, and the plurality of first through holes connect the first cavity 9 with the outside, so that the gas to be measured enters the first cavity 9 and contacts with the gas thermal conductivity sensor 8;

[0013] A heat insulation structure 10 located in the second silicon dioxide structural layer;

[0014] The second silicon dioxide structure layer, the third silicon dioxide structure layer and the substrate form a second cavity 6, and the second cavity 6 is communicated with the outside;

[0015] In the second cavity 6, a first thermistor 3, a flow sensor heating resistor 4 and a second thermistor 5 are suspended in sequence in the direction from the first silicon dioxide structure layer to the third silicon dioxide structure layer;

[0016] A second PAD region and a second metal via embedded in the third silicon dioxide structure layer; the second PAD region includes a plurality of metal layers; the second metal via penetrates other metals except the top metal in the second PAD region;

[0017] Leads are respectively connected to the first PAD area and the second PAD area.

[0018] Preferably, the ambient temperature sensing resistor 7 is a ring structure.

[0019] Preferably, the thermal insulation structure 10 comprises a metal structure layer embedded in the suspended portion and the non-suspended portion;

[0020] The thermal insulation structure 10 further includes a third metal via, and the third metal via passes through the metal structure layer of the non-suspended portion to the substrate 1 .

[0021] Preferably, when the number of the metal structure layers is ≥2, the thermal insulation structure 10 further includes a fourth metal via between adjacent metal structure layers in the suspended portion, the metal structure layers are parallel to the bottom of the substrate and adjacent metal structure layers are arranged at intervals.

[0022] Preferably, the substrate 1 has a first pit and a second pit; the first pit is located between the first silicon dioxide layer and the second silicon dioxide layer, and the second pit is located between the second silicon dioxide structure layer and the third silicon dioxide structure layer;

[0023] The first pit, the first silicon dioxide layer and the second silicon dioxide layer form a first cavity 9;

[0024] The second pit, the second silicon dioxide structure layer and the third silicon dioxide structure layer form a second cavity 6 .

[0025] Preferably, the number of thermistors in the first thermistor 3 and the second thermistor 5 are 2 respectively.

[0026] Preferably, the first thermistor 3, the flow sensor heating resistor 4, and the second thermistor 5 are respectively wrapped by silicon dioxide.

[0027] Preferably, the sensor further comprises:

[0028] A passivation layer is located on the silicon dioxide structure layer 2 .

[0029] The present invention also provides a method for preparing the sensor described in the above technical solution, comprising the following steps:

[0030] (a) providing a CMOS die, wherein the CMOS die comprises a substrate 1, a silicon dioxide structure layer 2 located on the substrate, and a circuit portion;

[0031] In a direction parallel to the bottom surface of the substrate, the silicon dioxide structure layer 2 includes a first silicon dioxide structure layer, a second silicon dioxide structure layer and a third silicon dioxide structure layer; the first silicon dioxide structure layer and the third silicon dioxide structure layer are located on both sides of the silicon dioxide structure layer; the second silicon dioxide structure layer includes a suspended part and a non-suspended part; the non-suspended part is in contact with the substrate;

[0032] A first PAD region and a first metal via embedded in the first silicon dioxide structure layer; the first PAD region includes a plurality of metal layers; the first metal via penetrates other metal layers except the top metal layer in the first PAD region;

[0033] An ambient temperature sensing resistor 7 embedded in the first silicon dioxide structure layer and the third silicon dioxide structure layer;

[0034] A gas thermal conductivity sensor 8 located below the suspended portion and on the surface of the substrate 1;

[0035] A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer, the plurality of first through holes connect the gas thermal conductivity sensor 8 with the outside, and the plurality of first through holes are blocked by sacrificial metal;

[0036] The space between the gas thermal conductivity sensor 8 and the suspended portion of the second silicon dioxide structure layer is blocked by a sacrificial metal;

[0037] A heat insulation structure 10 located in the second silicon dioxide structural layer;

[0038] In the direction from the first silicon dioxide structure layer to the third silicon dioxide structure layer, a first thermistor 3, a flow sensor heating resistor 4, and a second thermistor 5 are sequentially arranged; the first thermistor 3, the flow sensor heating resistor 4, and the second thermistor 5 are blocked above by sacrificial metal; the first thermistor 3, the flow sensor heating resistor 4, and the second thermistor 5 are located between the second silicon dioxide structure layer and the third silicon dioxide structure, and above the silicon substrate;

[0039] The flow sensor heating resistor 4 is located above the first thermistor 3 and the second thermistor 5 and is provided with a silicon dioxide layer; second through holes are respectively provided between the second silicon dioxide structure layer and the first thermistor 3, between the first thermistor 3 and the heating resistor 4, between the heating resistor 4 and the second thermistor 5, and between the second thermistor 5 and the third silicon dioxide structure layer, which are channels for etching the substrate;

[0040] A second PAD region and a second metal via embedded in the third silicon dioxide structure layer; the second PAD region includes a plurality of metal layers; the second metal via penetrates other metals except the top metal in the second PAD region;

[0041] A sacrificial metal located above the first PAD region and the second PAD region respectively, and a third through hole connecting the sacrificial metal and the top of the sensor;

[0042] A sacrificial silicon dioxide structure layer is provided between the top metal in the first PAD region and the second PAD region and the sacrificial metal, and is used as a mask for the first PAD region and the second PAD region to prevent the first PAD region and the second PAD region from being etched away when the sacrificial metal is etched;

[0043] (b) removing all sacrificial metals of the CMOS die by wet etching;

[0044] (c) etching the substrate between the second silicon dioxide structure layer and the third silicon dioxide structure layer in the chip obtained in step (b) by DRIE to form a groove;

[0045] (d) etching the sacrificial silicon dioxide on the chip obtained in step (c) by RIE to expose the metal PAD;

[0046] (e) etching the substrate in the chip obtained in step (d) by isotropic dry etching with XeF2, so that the first thermistor 3, the flow sensor heating resistor 4, the second thermistor 5 and the gas thermal conductivity sensor 8 are suspended;

[0047] (f) bonding the first metal PAD region and the second metal PAD region in the chip obtained in step (e) to wires to obtain the sensor.

[0048] The present invention also provides application of the sensor described in the above technical solution or the sensor prepared by the preparation method described in the above technical solution in measuring gas flow and gas thermal conductivity.

[0049] The present invention designs a heat insulation structure in the thermal flow sensor and the gas thermal conductivity sensor and forms a through hole between the first silica structure layer, the second silica structure layer and the gas thermal conductivity sensor 8, thereby reducing the external thermal interference to the flow sensor and the thermal interference between different internal sensors, obtaining more accurate gas thermal physical parameters and realizing the decoupling of the flow parameters, providing a suitable sensor basis for subsequent compensation work, improving the performance of the gas flow sensor, and meeting the needs of flow detection and gas parameter detection in more complex environments: different gases have different heat transfer capabilities, and the gas flow sensor reflects the flow through heat distribution. The actual heat transfer capability of the gas is analyzed by the gas thermal conductivity sensor, and then the flow is corrected.

[0050] The sensor of the present invention has small volume and high integration, and has the potential to be used as a small-sized, multifunctional special sensor.

[0051] The present invention designs sacrificial metal, PAD area, and metal patterns of thermal insulation structure in the CMOS bare chip, and accurately patterns the first thermistor 3, the flow sensor heating resistor 4, the second thermistor 5, the ambient temperature sensor resistor 7, and the gas thermal conductivity sensor 8 (defining its position, shape, size and other parameters through the layout), so that the components required for the device can be etched in a non-destructive manner, reducing the photolithography steps, and finally, by adopting the DRIE anisotropic silicon etching method and the XeF2 isotropic silicon etching method, a sensor using a suspended structure is formed, which avoids complex photolithography steps, greatly improves the efficiency of the entire Post-CMOS post-processing, and greatly reduces the cost of the sensor. The sensor of the present invention realizes the monolithic integration of multiple sensors and the integrated preparation of the CMOS-MEMS process through reasonable process design. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 Flow chart of preparing the sensor for Example 1;

[0053] Figure 2 is a schematic diagram of the three-dimensional structure of one of the sensors of the present invention;

[0054] Figure 3 A schematic top view of a flow sensor portion of the present invention;

[0055] Figure 4 A schematic top view of a thermal conductivity sensor portion of the present invention;

[0056] Figure 5 A schematic side view of a thermal conductivity sensor portion of the present invention;

[0057] Figure 6 Schematic diagram of the cross section of the sensor in Example 1. DETAILED DESCRIPTION

[0058] The present invention provides a CMOS-MEMS flow and gas thermal conductivity integrated sensor, comprising a substrate 1, a silicon dioxide structure layer 2 located on the substrate, and a circuit part;

[0059] In a direction parallel to the bottom surface of the substrate, the silicon dioxide structure layer 2 includes a first silicon dioxide structure layer, a second silicon dioxide structure layer and a third silicon dioxide structure layer; the first silicon dioxide structure layer and the third silicon dioxide structure layer are located on both sides of the silicon dioxide structure layer; the second silicon dioxide structure layer includes a suspended part and a non-suspended part; the non-suspended part is in contact with the substrate;

[0060] A first PAD region and a first metal via embedded in the first silicon dioxide structure layer; the first PAD region includes a plurality of metal layers; the first metal via penetrates other metal layers except the top metal layer in the first PAD region;

[0061] An ambient temperature sensing resistor 7 embedded in the first silicon dioxide structure layer and the third silicon dioxide structure layer;

[0062] A first cavity 9 formed by the first silicon dioxide layer, the suspended portion of the second silicon dioxide layer, the non-suspended portion of the second silicon dioxide layer and the substrate;

[0063] a gas thermal conductivity sensor 8 suspended in the first cavity 9;

[0064] A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer, and the plurality of first through holes connect the first cavity 9 with the outside, so that the gas to be measured enters the first cavity 9 and contacts with the gas thermal conductivity sensor 8;

[0065] A heat insulation structure 10 located in the second silicon dioxide structural layer;

[0066] The second silicon dioxide structure layer, the third silicon dioxide structure layer and the substrate form a second cavity 6, and the second cavity 6 is communicated with the outside;

[0067] In the second cavity 6, a first thermistor 3, a flow sensor heating resistor 4 and a second thermistor 5 are suspended in sequence in the direction from the first silicon dioxide structure layer to the third silicon dioxide structure layer;

[0068] A second PAD region and a second metal via embedded in the third silicon dioxide structure layer; the second PAD region includes a plurality of metal layers; the second metal via penetrates other metals except the top metal in the second PAD region;

[0069] Leads are respectively connected to the first PAD area and the second PAD area.

[0070] The sensor provided by the present invention comprises a substrate 1, and the material of the substrate 1 is preferably a silicon wafer;

[0071] The sensor provided by the present invention comprises a silicon dioxide structure layer 2 located on the substrate; in a direction parallel to the bottom surface of the substrate, the silicon dioxide structure layer comprises a first silicon dioxide structure layer, a second silicon dioxide structure layer and a third silicon dioxide structure layer; the first silicon dioxide structure layer and the third silicon dioxide structure layer are located on both sides of the silicon dioxide structure layer; the second silicon dioxide structure layer comprises a suspended part and a non-suspended part; the non-suspended part is in contact with the substrate;

[0072] The sensor provided by the present invention preferably further comprises: a passivation layer located on the silicon dioxide structure layer 2 .

[0073] The sensor provided by the present invention includes a first PAD area and a first metal via embedded in the first silicon dioxide structure layer; the first PAD area includes several metal layers; the first metal via runs through other metal layers except the top metal layer in the first PAD area; the metal in the metal layer is preferably aluminum; the number of metal layers in the first PAD area is preferably 5, and adjacent metal layers in the first PAD area are preferably separated by silicon dioxide in the first silicon dioxide structure layer.

[0074] The sensor provided by the present invention comprises an ambient temperature sensing resistor 7 embedded in the first silicon dioxide structure layer and the third silicon dioxide structure layer; the material of the ambient temperature sensing resistor 7 is preferably polysilicon. The ambient temperature sensing resistor 7 is preferably a ring structure, preferably located below or to the side of the first PAD area and the second PAD area.

[0075] The sensor provided by the present invention comprises a first cavity 9 formed by the first silicon dioxide layer, the suspended part of the second silicon dioxide layer, the non-suspended part of the second silicon dioxide layer and the substrate; the substrate 1 preferably has a first pit, and the first pit is located between the first silicon dioxide layer and the second silicon dioxide layer; the first pit preferably forms a first cavity 9 with the first silicon dioxide layer and the second silicon dioxide layer;

[0076] The sensor provided by the present invention includes a gas thermal conductivity sensor 8 suspended in the first cavity 9; the gas thermal conductivity sensor 8 is preferably provided with a through hole, and the through hole is connected to the plurality of first through holes; the through hole is preferably realized by a fold of the gas thermal conductivity sensor 8.

[0077] In the present invention, a plurality of first through holes are arranged between the first silicon dioxide structure layer and the second silicon dioxide structure layer, and the plurality of first through holes connect the first cavity 9 with the outside, so that the gas to be measured enters the first cavity 9 and contacts the gas thermal conductivity sensor 8. The plurality of first through holes can also be used to remove the sacrificial metal of the suspended part of the gas thermal conductivity sensor 8 and the second silicon dioxide structure layer in the CMOS bare chip.

[0078] The sensor provided by the present invention includes a thermal insulation structure 10 located in the second silicon dioxide structure layer; the thermal insulation structure 10 preferably includes a metal structure layer embedded in the suspended part and the non-suspended part, and the thermal insulation structure 10 preferably also includes a third metal via, and the third metal via passes through the metal structure layer of the non-suspended part to the substrate 1; when the number of the metal structure layers is ≥2, the thermal insulation structure 10 preferably also includes a fourth metal via of the adjacent metal structure layer in the suspended part, and the metal structure layer is parallel to the bottom of the substrate and the adjacent metal structure layers are arranged at intervals; the thermal insulation structure 10 is used to reduce external thermal interference and thermal interference between different internal sensors, so as to achieve physical isolation and decoupling.

[0079] In the present invention, the second silicon dioxide structure layer preferably surrounds the gas thermal conductivity sensor 8 on all sides and on top.

[0080] The sensor provided by the present invention comprises a second cavity 6 formed by the second silicon dioxide structure layer, the third silicon dioxide structure layer and the substrate, and the second cavity 6 is communicated with the outside; the substrate 1 preferably further comprises a second pit, the second pit is located between the second silicon dioxide structure layer and the third silicon dioxide structure layer; the second pit preferably forms a cavity 6 with the second silicon dioxide structure layer and the third silicon dioxide structure layer;

[0081] The sensor provided by the present invention comprises a first thermistor 3, a flow sensor heating resistor 4 and a second thermistor 5 suspended in sequence in the direction from the first silicon dioxide structure layer to the third silicon dioxide structure layer in the second cavity 6; the flow sensor heating resistor 4 is located between the first thermistor 3 and the second thermistor 5; the first thermistor (3), the flow sensor heating resistor (4) and the second thermistor (5) are preferably respectively wrapped by silicon dioxide; there are gaps between the first thermistor 3 and the flow sensor heating resistor 4 and between the flow sensor heating resistor 4 and the second thermistor 5; the number of thermistors in the first thermistor 3 and the second thermistor 5 is preferably 2 respectively.

[0082] The first thermistor 3, the flow sensor heating resistor 4, the second thermistor 5 and the ambient temperature sensing resistor 7 form a thermal flow sensor;

[0083] The sensor provided by the present invention includes a second PAD area and a second metal via embedded in the third silicon dioxide structure layer; the second PAD area includes a plurality of metal layers; the second metal via runs through other metal layers except the top metal layer in the second PAD area; the metal in the metal layer is preferably aluminum; the number of metal layers in the second PAD area is preferably 5, and adjacent metal layers in the second PAD area are preferably separated by silicon dioxide in the third silicon dioxide structure layer.

[0084] The sensor provided by the present invention comprises leads respectively connected to the first PAD area and the second PAD area;

[0085] The sensor provided by the present invention includes a circuit part.

[0086] The sensor part adopts a suspended structure, which has the advantages of fast response speed and low heat dissipation.

[0087] The present invention also provides a method for preparing the sensor described in the above technical solution, comprising the following steps:

[0088] (a) providing a CMOS die, wherein the CMOS die comprises a substrate 1, a silicon dioxide structure layer 2 located on the substrate, and a circuit portion;

[0089] In a direction parallel to the bottom surface of the substrate, the silicon dioxide structure layer 2 includes a first silicon dioxide structure layer, a second silicon dioxide structure layer and a third silicon dioxide structure layer; the first silicon dioxide structure layer and the third silicon dioxide structure layer are located on both sides of the silicon dioxide structure layer; the second silicon dioxide structure layer includes a suspended part and a non-suspended part; the non-suspended part is in contact with the substrate;

[0090] A first PAD region and a first metal via embedded in the first silicon dioxide structure layer; the first PAD region includes a plurality of metal layers; the first metal via penetrates other metal layers except the top metal layer in the first PAD region;

[0091] An ambient temperature sensing resistor 7 embedded in the first silicon dioxide structure layer and the third silicon dioxide structure layer;

[0092] A gas thermal conductivity sensor 8 located below the suspended portion and on the surface of the substrate 1;

[0093] A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer, the plurality of first through holes connect the gas thermal conductivity sensor 8 with the outside, and the tops of the plurality of first through holes are blocked by sacrificial metal;

[0094] The space between the gas thermal conductivity sensor 8 and the suspended portion of the second silicon dioxide structure layer is blocked by a sacrificial metal;

[0095] A heat insulation structure 10 located in the second silicon dioxide structural layer;

[0096] In the direction from the first silicon dioxide structure layer to the third silicon dioxide structure layer, a first thermistor 3, a flow sensor heating resistor 4 and a second thermistor 5 are sequentially arranged between the second silicon dioxide structure layer and the third silicon dioxide structure layer;

[0097] The space between the second silicon dioxide structure layer and the third silicon dioxide structure layer, the first thermistor 3, the flow sensor heating resistor 4 and the top of the second thermistor 5 are blocked by sacrificial metal;

[0098] The first thermistor 3, the flow sensor heating resistor 4 and the second thermistor 5 are located between the second silicon dioxide structure layer and the third silicon dioxide structure and above the silicon substrate;

[0099] The flow sensor heating resistor 4 is located above the first thermistor 3 and the second thermistor 5 and is provided with a silicon dioxide layer; second through holes are respectively provided between the second silicon dioxide structure layer and the first thermistor 3, between the first thermistor 3 and the heating resistor 4, between the heating resistor 4 and the second thermistor 5, and between the second thermistor 5 and the third silicon dioxide structure layer, which are channels for etching the substrate;

[0100] A second PAD region and a second metal via embedded in the third silicon dioxide structure layer; the second PAD region includes a plurality of metal layers; the second metal via penetrates other metals except the top metal in the second PAD region;

[0101] A sacrificial metal located above the first PAD region and the second PAD region respectively, and a third through hole connecting the sacrificial metal and the top of the sensor;

[0102] A sacrificial silicon dioxide structure layer is provided between the top metal in the first PAD region and the sacrificial metal in the second PAD region, which is used to protect the first PAD region and the second PAD region and prevent the first PAD region and the second PAD region from being etched away when the sacrificial metal is etched;

[0103] (b) removing all sacrificial metals of the CMOS die by wet etching;

[0104] (c) etching the substrate between the second silicon dioxide structure layer and the third silicon dioxide structure layer in the chip obtained in step (b) by DRIE to form a groove;

[0105] (d) etching the sacrificial silicon dioxide on the chip obtained in step (c) by RIE to expose the metal PAD;

[0106] (e) etching the substrate in the chip obtained in step (d) by isotropic dry etching with XeF2, so that the first thermistor 3, the flow sensor heating resistor 4, the second thermistor 5 and the gas thermal conductivity sensor 8 are suspended;

[0107] (f) bonding the first metal PAD region and the second metal PAD region in the chip obtained in step (e) to wires to obtain the sensor.

[0108] Figure 2 is a schematic diagram of the three-dimensional structure of one of the sensors of the present invention;

[0109] Figure 3 A schematic top view of a flow sensor portion of the present invention;

[0110] Figure 4 A schematic top view of a thermal conductivity sensor portion of the present invention;

[0111] Figure 5 FIG. 1 is a side view of a thermal conductivity sensor portion of the present invention.

[0112] The present invention also provides application of the sensor described in the above technical solution or the sensor prepared by the preparation method described in the above technical solution in measuring gas flow and gas thermal conductivity.

[0113] In the present invention, the application preferably includes:

[0114] The sensor is attached to a carrier, and the leads of the sensor are connected to an external signal processing module to simultaneously detect the gas flow and gas thermal conductivity in the environment; the signal received by the signal processing module is determined by the change of resistance value or voltage value, and the relationship between different signals is analyzed and correction compensation is performed.

[0115] In the present invention, the carrier preferably includes a PCB board.

[0116] The CMOS-MEMS flow and gas thermal conductivity integrated sensor provided by the present invention, its preparation method and application are described in detail below in conjunction with the embodiments, but they should not be understood as limiting the protection scope of the present invention.

[0117] The gas thermal conductivity sensor 8 and the first thermistor 3 , the flow sensor heating resistor 4 and the second thermistor 5 are suspended in the cavity through a cantilever beam sensing structure.

[0118] Example 1

[0119] Step (a): using a 0.18um 1P6M CMOS semiconductor process, forming the structure required for the sensor on a silicon wafer at one time: a silicon substrate layer 1 and a silicon dioxide structure layer 2, wherein the silicon dioxide structure layer 2 is disposed above the silicon substrate layer 1;

[0120] The silicon dioxide structure layer 2 includes: PAD regions arranged at both ends and a gas flow sensor region, a heat insulation structure and a gas thermal conductivity sensor region arranged in the center;

[0121] The silicon dioxide material and the metal material are arranged in an overlapping manner in the PAD region, and the metal via runs through the first metal layer to the fifth metal layer; a reasonable metal layer pattern and metal via are designed in the PAD region, so that the space between the sixth metal layer and the fifth metal layer is filled with silicon dioxide material, so that when the metal is etched, a natural mask of the PAD region is formed to protect its structure; in the gas flow sensor region: the heating resistor 4 and the first thermistor 3 and the second thermistor 5 distributed on both sides of the heating resistor 4, the heating resistor 4 and the first thermistor 3 and the second thermistor 5 are placed in the silicon dioxide material; a reasonable polysilicon layer pattern is designed in the gas flow sensor region to form the heating resistor and the upstream resistor and the downstream thermistor of the flow sensor; a reasonable first metal layer pattern and metal via are designed in the gas flow sensor region, so that a thin layer of silicon dioxide material is retained above the heating resistor and the first thermistor 3 and the second thermistor 4, forming a natural mask for the heating resistor and the first thermistor and the second thermistor, and at the same time, the via passes directly through the silicon substrate, becoming a channel for subsequent silicon etching, forming a cavity 6;

[0122] The temperature sensor 7 is placed in the silicon dioxide layer above the silicon substrate and does not need to be suspended.

[0123] The thermal conductivity sensor is a gas thermal conductivity sensor 8, which is placed in the silicon dioxide material and in contact with the substrate; and a metal layer is provided between the gas thermal conductivity sensor 8 and the silicon dioxide layer above;

[0124] The thermal insulation structure is above the gas thermal conductivity sensor, and transfers the heat impact caused by the external environment thermal changes and the heating resistor part of the flow sensor to the silicon substrate through the metal thermal conductive layer, and will not be removed during the entire manufacturing process. The thermal insulation structure is composed of a metal structure layer, which is placed in the silicon dioxide structure layer, surrounds the thermal conductivity sensor structure on all sides and above, and is connected to the silicon substrate through metal vias.

[0125] Step (b): wet etching (H 2 SO 4 :H 2 O 2 =3:1 ratio of etching solution) to remove the excess metal structure layer of the chip obtained in step 1, and etch for 10 minutes in a 90°C environment, and repeatedly observe to decide whether to extend the etching time;

[0126] Step (c): etching the silicon substrate of the chip obtained in step (b) by DRIE, and performing high aspect ratio silicon dry etching based on fluorine-based gas on the silicon substrate by deep reactive ion etching to form a trench structure;

[0127] Step (d): using fluorine-based gas to perform high aspect ratio silicon dry etching on the silicon substrate by reactive ion etching (RIE) using the chip obtained in step (c) to form a trench structure; performing silicon dioxide etching to expose the metal PAD;

[0128] Step (e): performing XeF2 isotropic dry etching on the chip obtained in step (d), wherein the isotropic etching method can be used to etch on both sides and the bottom, thereby removing silicon material from under the silicon dioxide layer and releasing the sensor suspension structure;

[0129] Step (f): Wire bonding is performed on the chip obtained in step (e) to complete the preparation of a CMOS-MEMS monolithic integrated flow and thermal conductivity sensor.

[0130] Figure 1 Flow chart for preparing the sensor for Example 1.

[0131] Figure 6 This is a schematic cross-sectional view of the sensor of Example 1: 1-silicon substrate; 2-silicon dioxide structural layer; 3-first thermistor; 4-flow sensor heating resistor; 5-second thermistor; 6-flow sensor cavity structure; 7-ambient temperature sensing resistor; 8-gas thermal conductivity sensor; 9-thermal conductivity sensor cavity structure; 10-thermal insulation structure.

[0132] The sensor prepared in Example 1 is composed of the following components:

[0133] Substrate 1, wherein the material of the substrate 1 is a silicon wafer;

[0134] A silicon dioxide structure layer 2 is located on the substrate; in a direction parallel to the bottom surface of the substrate, the silicon dioxide structure layer is divided into a first silicon dioxide structure layer, a second silicon dioxide structure layer and a third silicon dioxide structure layer; the first silicon dioxide structure layer and the third silicon dioxide structure layer are located on both sides of the silicon dioxide structure layer; the second silicon dioxide structure layer is divided into a suspended part and a non-suspended part; the non-suspended part is in contact with the substrate;

[0135] A first PAD region and a first metal via are embedded in the first silicon dioxide structural layer; the first PAD region contains a plurality of metal layers; the first metal via penetrates other metal layers except the top metal layer in the first PAD region; the metal in the metal layer is aluminum; the number of metal layers in the first PAD region is 5, and adjacent metal layers in the first PAD region are separated by silicon dioxide in the first silicon dioxide structural layer.

[0136] The ambient temperature sensing resistor 7 is embedded in the first silicon dioxide structure layer and the third silicon dioxide structure layer; the ambient temperature sensing resistor 7 is made of polysilicon. The ambient temperature sensing resistor 7 is a ring structure and is located below the first PAD area and the second PAD area.

[0137] The first silicon dioxide layer, the suspended part of the second silicon dioxide layer, the non-suspended part of the second silicon dioxide layer and the substrate form a first cavity 9; the substrate 1 has a first pit, and the first pit is located between the first silicon dioxide layer and the second silicon dioxide layer; the first pit preferably forms a first cavity 9 with the first silicon dioxide layer and the second silicon dioxide layer;

[0138] A gas thermal conductivity sensor 8 suspended in the first cavity 9; the gas thermal conductivity sensor 8 is folded back to obtain a through hole, and the through hole is connected to the plurality of first through holes;

[0139] A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer, and the plurality of first through holes connect the first cavity 9 with the outside, so that the gas to be measured enters the first cavity 9 and contacts with the gas thermal conductivity sensor 8;

[0140] A heat-insulating structure 10 located in the second silicon dioxide structural layer; the heat-insulating structure 10 includes a multi-layer metal structural layer embedded in the suspended portion and the non-suspended portion, and the heat-insulating structure 10 also includes a third metal via, and the third metal via passes through the metal structural layer of the non-suspended portion to the substrate 1;

[0141] The thermal insulation structure 10 further includes a fourth metal via of adjacent metal structure layers in the suspended portion, wherein the metal structure layers are parallel to the bottom of the substrate and adjacent metal structure layers are arranged at intervals;

[0142] The second silicon dioxide structure layer surrounds the gas thermal conductivity sensor 8 on all sides and on the top.

[0143] The second silicon dioxide structure layer, the third silicon dioxide structure layer and the substrate form a second cavity 6, and the second cavity 6 is communicated with the outside; the substrate 1 has a second pit, and the second pit is located between the second silicon dioxide structure layer and the third silicon dioxide structure layer; the second pit and the second silicon dioxide structure layer and the third silicon dioxide structure layer form a cavity 6;

[0144] In the second cavity 6, a first thermistor 3, a flow sensor heating resistor 4, and a second thermistor 5 are suspended in sequence in the direction from the first silicon dioxide structure layer to the third silicon dioxide structure layer; the flow sensor heating resistor 4 is located between the first thermistor 3 and the second thermistor 5; gaps are provided between the first thermistor 3 and the flow sensor heating resistor 4, and between the flow sensor heating resistor 4 and the second thermistor 5; the number of thermistors in the first thermistor 3 and the second thermistor 5 is 2 respectively;

[0145] A second PAD region and a second metal via are embedded in the third silicon dioxide structure layer; the second PAD region includes a plurality of metal layers; the second metal via penetrates other metal layers except the top metal layer in the second PAD region; the metal in the metal layer is aluminum; the number of metal layers in the second PAD region is 5, and adjacent metal layers in the second PAD region are preferably separated by silicon dioxide in the third silicon dioxide structure layer.

[0146] Leads connected to the first PAD area and the second PAD area respectively;

[0147] Circuit part and passivation layer.

[0148] The present invention utilizes a 0.18um 1P6M process to design a sensor structure at one time, including a silicon substrate layer 1 and a silicon dioxide structure layer 2, as well as various functional components contained in the silicon dioxide structure layer, and then obtains a CMOS-MEMS monolithic integrated flow and thermal conductivity sensor with a suspended structure and thinning processing through a post-CMOS process without a MASK.

[0149] Different from the preparation method of ordinary CMOS-MEMS integrated sensors, the present invention innovatively proposes a preparation method of a CMOS-MEMS monolithic integrated flow and thermal conductivity sensor:

[0150] Different from ordinary calorimetric flow sensors, the present invention utilizes CMOS technology, a combination of dry etching and wet etching to thin and precisely pattern the sensing structure, and finally uses DRIE anisotropic silicon etching method and XeF2 isotropic silicon etching method to form a MASK-free thermal flow sensor using a suspended structure.

[0151] Different from ordinary thermal conductivity sensors, the present invention utilizes the multi-metal layer characteristics of the CMOS process and designs the metal sacrificial layer to form a cavity. Due to the use of the release hole structure, for example Figure 4 , Figure 5The vertical metal release hole structure shown in the figure leads directly from the top silicon dioxide layer to the thermal conductivity device cavity of the bottom layer, and has a very small size, for example, a size of 0.22 microns. The release hole is surrounded by a silicon dioxide layer, and only a small part of the top hole is exposed for ventilation, so that the cavity of the thermal conductivity structure is blocked by the upper silicon dioxide layer. The thermal insulation structure, for example Figure 4 , Figure 5 As shown, heat is conducted through metal layers M2 to M6 and metal vias connecting them, and connected to metal heat-conducting structures placed around and connected to the silicon substrate through metal vias. The thermal insulation structure allows external thermal disturbances and thermal disturbances that may be generated by the heating components of the flow sensor to be transferred to the substrate silicon through the metal layer, reducing the impact on the thermal conductivity sensor. The design of the release hole and the thermal insulation structure can reduce the impact of airflow and the external environment on the heat dissipation of the structure, temperature distribution, and the final output of resistance or voltage.

[0152] The flow sensor, thermal conductivity sensor and thermal insulation structure are compatible with each other in the process and can be integrated through reasonable layout distribution. Since the present invention adopts an integrated CMOS processing technology and a post-processing process without MASK to manufacture the sensor and the suspended structure, the sensor has the advantages of good stability and fast response.

[0153] The present invention proposes a design and processing method for a CMOS-MEMS monolithic integrated flow and gas thermal conductivity sensor, which realizes the integration of multiple functional sensors on a single chip. Through integrated design and simplified processing technology, the manufacturing cost of the sensor is significantly reduced. This invention not only greatly improves the energy utilization rate, but also has the advantages of high stability, high sensitivity, low heat dissipation and low hysteresis. The single-chip integrated flow and gas thermal conductivity sensor has the characteristics of small size and high integration, which effectively solves the problems of excessive volume and poor adaptability caused by simple stacking of traditional single-function sensors. In addition, this invention overcomes the defects of existing gas flow and gas thermal conductivity sensors such as low energy utilization, high cost, large heat dissipation, limited sensitivity and response speed, and at the same time has the advantages of low cost, simple preparation process and easy mass production.

[0154] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A CMOS-MEMS flow and gas thermal conductivity integrated sensor, characterized in that: It comprises a substrate (1), a silicon dioxide structure layer (2) located on the substrate, and a circuit part; In a direction parallel to the bottom surface of the substrate, the silicon dioxide structure layer (2) comprises a first silicon dioxide structure layer, a second silicon dioxide structure layer and a third silicon dioxide structure layer; the first silicon dioxide structure layer and the third silicon dioxide structure layer are located on both sides of the silicon dioxide structure layer; the second silicon dioxide structure layer comprises a suspended portion and a non-suspended portion; the non-suspended portion is in contact with the substrate; A first PAD region and a first metal via embedded in the first silicon dioxide structure layer; the first PAD region includes a plurality of metal layers; the first metal via penetrates other metal layers except the top metal layer in the first PAD region; An ambient temperature sensing resistor (7) embedded in the first silicon dioxide structure layer and the third silicon dioxide structure layer; A first cavity (9) enclosed by the first silicon dioxide layer, the suspended portion of the second silicon dioxide layer, the non-suspended portion of the second silicon dioxide layer and the substrate; a gas thermal conductivity sensor (8) suspended in the first cavity (9); A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer, the plurality of first through holes connecting the first cavity (9) with the outside, so that the gas to be measured enters the first cavity (9) and contacts with the gas thermal conductivity sensor (8); A heat insulation structure (10) located in the second silicon dioxide structural layer; The second silicon dioxide structural layer, the third silicon dioxide structural layer and the substrate form a second cavity (6), and the second cavity (6) is communicated with the outside; In the second cavity (6), a first thermistor (3), a flow sensor heating resistor (4) and a second thermistor (5) are suspended in sequence in a direction from the first silicon dioxide structure layer to the third silicon dioxide structure layer; A second PAD region and a second metal via embedded in the third silicon dioxide structure layer; the second PAD region includes a plurality of metal layers; the second metal via penetrates other metals except the top metal in the second PAD region; Leads are respectively connected to the first PAD area and the second PAD area.

2. The sensor according to claim 1, characterized in that The ambient temperature sensing resistor (7) is a ring structure.

3. The sensor according to claim 1, characterized in that The heat insulation structure (10) comprises a metal structure layer embedded in the suspended part and the non-suspended part; The thermal insulation structure (10) further comprises a third metal via, wherein the third metal via passes through the metal structure layer of the non-suspended part and reaches the substrate (1).

4. The sensor according to claim 3, characterized in that When the number of the metal structure layers is ≥2, the thermal insulation structure (10) further comprises a fourth metal via of adjacent metal structure layers in the suspended portion, the metal structure layers are parallel to the bottom of the substrate and adjacent metal structure layers are arranged at intervals.

5. The sensor according to claim 1, characterized in that The substrate (1) has a first pit and a second pit; the first pit is located between the first silicon dioxide layer and the second silicon dioxide layer, and the second pit is located between the second silicon dioxide structure layer and the third silicon dioxide structure layer; The first pit, the first silicon dioxide layer and the second silicon dioxide layer form a first cavity (9); The second pit, the second silicon dioxide structure layer and the third silicon dioxide structure layer form a second cavity (6).

6. The sensor according to claim 1, characterized in that The number of thermistors in the first thermistor (3) and the second thermistor (5) is two respectively.

7. The sensor according to claim 1, characterized in that The first thermistor (3), the flow sensor heating resistor (4), and the second thermistor (5) are respectively wrapped in silicon dioxide.

8. The sensor according to claim 1, characterized in that The sensor also includes: A passivation layer is located on the silicon dioxide structure layer (2).

9. The method for preparing the sensor according to any one of claims 1 to 8, characterized in that: The following steps are involved: (a) providing a CMOS die, the CMOS die comprising a substrate (1), a silicon dioxide structure layer (2) located on the substrate, and a circuit portion; In a direction parallel to the bottom surface of the substrate, the silicon dioxide structure layer (2) comprises a first silicon dioxide structure layer, a second silicon dioxide structure layer and a third silicon dioxide structure layer; the first silicon dioxide structure layer and the third silicon dioxide structure layer are located on both sides of the silicon dioxide structure layer; the second silicon dioxide structure layer comprises a suspended portion and a non-suspended portion; the non-suspended portion is in contact with the substrate; A first PAD region and a first metal via embedded in the first silicon dioxide structure layer; the first PAD region includes a plurality of metal layers; the first metal via penetrates other metal layers except the top metal layer in the first PAD region; An ambient temperature sensing resistor (7) embedded in the first silicon dioxide structure layer and the third silicon dioxide structure layer; a gas thermal conductivity sensor (8) located below the suspended portion and on the surface of the substrate (1); A plurality of first through holes are provided between the first silicon dioxide structural layer and the second silicon dioxide structural layer, the plurality of first through holes connect the gas thermal conductivity sensor (8) with the outside, and the plurality of first through holes are blocked by sacrificial metal; The space between the gas thermal conductivity sensor (8) and the suspended portion of the second silicon dioxide structure layer is blocked by a sacrificial metal; A heat insulation structure (10) located in the second silicon dioxide structural layer; A first thermistor (3), a flow sensor heating resistor (4) and a second thermistor (5) are sequentially arranged in a direction from the first silicon dioxide structure layer to the third silicon dioxide structure layer; the first thermistor (3), the flow sensor heating resistor (4) and the second thermistor (5) are blocked above by sacrificial metal; the first thermistor (3), the flow sensor heating resistor (4) and the second thermistor (5) are located between the second silicon dioxide structure layer and the third silicon dioxide structure and above the silicon substrate; The flow sensor heating resistor (4) is provided with a silicon dioxide layer above the first thermistor (3) and the second thermistor (5); second through holes are provided between the second silicon dioxide structure layer and the first thermistor (3), between the first thermistor (3) and the heating resistor (4), between the heating resistor (4) and the second thermistor (5), and between the second thermistor (5) and the third silicon dioxide structure layer, respectively, which are channels for etching the substrate; A second PAD region and a second metal via embedded in the third silicon dioxide structure layer; the second PAD region includes a plurality of metal layers; the second metal via penetrates other metals except the top metal in the second PAD region; A sacrificial metal located above the first PAD region and the second PAD region respectively, and a third through hole connecting the sacrificial metal and the top of the sensor; A sacrificial silicon dioxide structure layer is provided between the top metal in the first PAD region and the sacrificial metal in the second PAD region, which is used to protect the first PAD region and the second PAD region and prevent the first PAD region and the second PAD region from being etched away when the sacrificial metal is etched; (b) removing all sacrificial metals of the CMOS die by wet etching; (c) etching the substrate between the second silicon dioxide structure layer and the third silicon dioxide structure layer in the chip obtained in step (b) by DRIE to form a groove; (d) etching the sacrificial silicon dioxide on the chip obtained in step (c) by RIE to expose the metal PAD; (e) etching the substrate in the chip obtained in step (d) by isotropic dry etching with XeF2, so that the first thermistor (3), the flow sensor heating resistor (4), the second thermistor (5) and the gas thermal conductivity sensor (8) are suspended; (f) bonding the first metal PAD region and the second metal PAD region in the chip obtained in step (e) to wires to obtain the sensor.

10. Use of the sensor according to any one of claims 1 to 8 or the sensor prepared by the preparation method according to claim 9 in measuring gas flow and gas thermal conductivity.

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