Optimization method of Shor algorithm based on data flow grouping linear transformation

Abstract

The invention discloses an optimization method of a Shor algorithm based on data flow grouping linear transformation. The method comprises the steps of determining an initial quantum circuit according to a to-be-processed target problem based on a Shor algorithm; thirdly, calculating an initial base vector of the initial quantum circuit according to a modulus index operator in the initial quantum circuit, and determining a quantum base vector data stream; then, according to the quantum-based vector data stream, a target quantum-based vector group is determined. And finally, according to the target quantum base vector group and the target quantum gate, determining a target quantum circuit so as to optimize the Shor algorithm. Therefore, by analyzing the base vector evolution of the initial quantum circuit, determining the quantum base vector data stream, obtaining the target quantum base vector group from the quantum base vector data stream, and replacing complex operation with the target quantum gate, the complexity of the quantum circuit of the Shor algorithm modular exponential operation is reduced, so that the quantum circuit adapts to the hardware limitation of the current quantum computer.

Description

Technical Field

[0001] This application relates to the field of quantum computing, and more particularly, to an optimization method for Shor's algorithm based on data stream grouped linear transformation. Background Art

[0002] Based on the unique physical properties of qubits such as quantum superposition and quantum entanglement, quantum computing exhibits significant theoretical advantages over classical computing paradigms when dealing with specific complex problems. In related technologies, Shor's algorithm transforms prime factorization into a periodicity detection problem through quantum computing and uses quantum Fourier transform to accelerate the periodicity solution exponentially. However, due to the performance limitations of current quantum computers, it is often difficult to use Shor's algorithm to solve prime factorization problems with high complexity. Summary of the Invention

[0003] This application provides an optimization method for Shor's algorithm based on data stream grouped linear transformation.

[0004] An embodiment of this application provides an optimization method for Shor's algorithm based on data stream grouped linear transformation. The method includes: Based on the Shor's algorithm, determine an initial quantum circuit according to the target problem to be processed; According to the modular exponentiation operator in the initial quantum circuit, calculate the initial basis vectors of the initial quantum circuit to determine the quantum basis vector data stream; Determine a target quantum basis vector group according to the quantum basis vector data stream; Determine a target quantum circuit according to the target quantum basis vector group and the target quantum gates to optimize the Shor's algorithm.

[0005] In this way, based on the Shor's algorithm, the computer device determines an initial quantum circuit according to the target problem to be processed. Then, the computer device calculates the initial basis vectors of the initial quantum circuit according to the modular exponentiation operator in the initial quantum circuit to determine the quantum basis vector data stream. Then, the computer device determines a target quantum basis vector group according to the quantum basis vector data stream. Finally, the computer device determines a target quantum circuit according to the target quantum basis vector group and the target quantum gates to optimize the Shor's algorithm. In this way, by analyzing the evolution of the basis vectors of the initial quantum circuit, the quantum basis vector data stream is determined, and the target quantum basis vector group is obtained from the quantum basis vector data stream. Then, the complex operations in the target quantum basis vector group are replaced with target quantum gates, reducing the quantum circuit complexity of the modular exponentiation operation of the Shor's algorithm and making it adapt to the hardware limitations of current quantum computers.

[0006] In some embodiments, the step of based on the Shor's algorithm, determining an initial quantum circuit according to the target problem to be processed, includes: Based on the Shor algorithm, a basis is determined according to the target problem, and the basis is relatively prime to the integer to be factored in the target problem and less than the integer to be factored. According to the target problem, the number of phase qubits is determined, and the number of phase qubits is used to record the phase information generated by running the Shor algorithm. According to the target problem, the number of operation qubits is determined, and the number of operation qubits is used to record the quantum state information generated by running the modular exponentiation operator. According to the basis, the number of phase qubits, and the number of operation qubits, the initial quantum circuit is determined.

[0007] In this way, the computer device determines a basis according to the target problem, and the basis is relatively prime to the integer to be factored in the target problem and less than the integer to be factored. Then, the computer device determines the number of phase qubits according to the target problem, and the number of phase qubits is used to record the phase information generated by running the Shor algorithm. Next, the computer device determines the number of operation qubits according to the target problem, and the number of operation qubits is used to record the quantum state information generated by running the modular exponentiation operator. Finally, the computer device determines the initial quantum circuit according to the basis, the number of phase qubits, and the number of operation qubits. In this way, the quantization mapping of the Shor algorithm is realized through parametric design. While ensuring mathematical correctness, the resource consumption is controlled within the range that the quantum computer can bear, and a foundation is laid for subsequent optimization.

[0008] In some embodiments, the determining the initial quantum circuit according to the basis, the number of phase qubits, and the number of operation qubits includes: Determine the modular exponentiation operator according to the basis, the number of phase qubits, and the integer to be factored. Determine the initial quantum circuit according to the basis, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator.

[0009] In this way, the computer device determines the modular exponentiation operator according to the basis, the number of phase qubits, and the integer to be factored. Then, the computer device determines the initial quantum circuit according to the basis, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator. In this way, through rigorous number theory transformation, it is ensured that the initial quantum circuit correctly maps the theoretical framework of the Shor algorithm mathematically, avoiding decomposition anomalies caused by parameter errors.

[0010] In some embodiments, the method further includes: Determine the temporary quantum circuit according to the base, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator; Adjust the operation order of the modular exponentiation operator according to the commutativity of the operation of the modular exponentiation operator in the temporary quantum circuit, and determine the initial quantum circuit.

[0011] In this way, the computer device determines a temporary quantum circuit according to the base, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator. Then, the computer device adjusts the operation order of the modular exponentiation operator according to the commutativity of the operation of the modular exponentiation operator in the temporary quantum circuit, and determines the initial quantum circuit. In this way, by using the commutativity of the operation of the modular exponentiation operator, the operation order of the modular exponentiation operator is adjusted, so that the subsequent determined quantum basis vector group can be serially executed according to the quantum basis vector data stream order, reducing the number of parallel quantum gate operations.

[0012] In some embodiments, the calculating the initial basis vectors of the initial quantum circuit according to the modular exponentiation operator in the initial quantum circuit to determine a quantum basis vector data stream includes: Calculate the first basis vector of the current stage according to the modular exponentiation operator for the initial basis vector; Calculate the second basis vector of the next stage according to the modular exponentiation operator for the first basis vector; Determine the quantum basis vector data stream according to the first basis vector and the second basis vector.

[0013] In this way, the computer device calculates the initial basis vector according to the modular exponentiation operator to determine the first basis vector of the current stage. Then, the computer device calculates the first basis vector according to the modular exponentiation operator to determine the second basis vector of the next stage. Finally, the computer device determines the quantum basis vector data stream according to the first basis vector and the second basis vector. In this way, through the change of the basis vector in each stage, the evolution path of the modular exponentiation operation can be intuitively analyzed, which is convenient for subsequent optimization of the quantum circuit.

[0014] In some embodiments, the determining the target quantum basis vector group according to the quantum basis vector data stream includes: Based on a preset recognition rule, recognize the quantum basis vector data stream to determine the existence of a linear relationship in the quantum basis vector data stream; According to the existence of the linear relationship, determine a first sub-vector group and a second sub-vector group from the quantum basis vector data stream, where the first sub-vector group is used to indicate a linear quantum basis vector group that can be mapped through linear transformation, and the second sub-vector group is used to indicate a non-linear quantum basis vector group that cannot be mapped through linear transformation; Determine the target quantum basis vector group according to the first sub-vector group.

[0015] In this way, based on the preset recognition rule, the computer device recognizes the quantum basis vector data stream, and determines the existence of the linear relationship of the quantum basis vector data stream. Then, according to the existence of the linear relationship, the computer device determines a first sub-vector group and a second sub-vector group from the quantum basis vector data stream, where the first sub-vector group is used to indicate the linear quantum basis vector group that can be mapped through linear transformation, and the second sub-vector group is used to indicate the non-linear quantum basis vector group that cannot be mapped through linear transformation. Finally, the computer device determines the target quantum basis vector group according to the first sub-vector group. In this way, through linear relationship recognition and grouping isolation, the complexity of modular exponentiation operations is reduced, thereby breaking through the hardware performance limitations of current quantum computers.

[0016] In some embodiments, the determining the target quantum basis vector group according to the first sub-vector group includes: Determine the target quantum basis vector group according to the periodicity of the first sub-vector group.

[0017] In this way, the computer device determines the target quantum basis vector group according to the periodicity of the first sub-vector group. In this way, the modular exponentiation operation is transformed from successive high-complexity multiplications into cyclic linear transformations, and only the quantum basis vectors within one period need to be processed, reducing the complexity of the quantum circuit.

[0018] In some embodiments, the method further includes: Determine the target quantum basis vector group according to the auxiliary quantum bit and the second sub-vector group.

[0019] In this way, the computer device determines the target quantum basis vector group according to the auxiliary quantum bit and the second sub-vector group. In this way, through the auxiliary bit, the non-linear problem is transformed into a hybrid process of linear operations and conditional controls, enabling the quantum basis vectors of the second sub-vector group to be mapped to the target basis vector group.

[0020] In some embodiments, the determining the target quantum basis vector group according to the auxiliary quantum bit and the second sub-vector group includes: Determine the number of bits of the auxiliary quantum bit according to the second sub-vector group; According to the auxiliary quantum bit and the number of bits, perform a splitting process on the second sub-vector group to determine the target quantum basis vector group.

[0021] In this way, the computer device determines the number of qubits of the auxiliary qubits according to the second sub-vector group. Then, the computer device splits the second sub-vector group according to the auxiliary qubits and the number of qubits to determine the target quantum basis vector group. In this way, through the dynamic determination of the number of auxiliary bits and the splitting process of the second sub-vector group, the efficient processing of the second sub-vector group is realized, and finally, together with the first sub-vector group, the target quantum basis vector group is formed for subsequent optimization of the quantum circuit.

[0022] In some embodiments, the determining the target quantum circuit according to the target quantum basis vector group and the target quantum gate includes: Replacing the modular exponentiation operator in the target quantum basis vector group with the target quantum gate to determine the target quantum circuit.

[0023] In this way, the computer device replaces the modular exponentiation operator in the target quantum basis vector group with the target quantum gate to determine the target quantum circuit. In this way, by replacing the modular exponentiation operator in the target quantum basis vector group with the target quantum gate, the theoretical logic of the Shor algorithm is transformed into a gate sequence executable by hardware, realizing the optimization of the Shor algorithm.

[0024] Additional aspects and advantages of the embodiments of the present application will be given in part in the following description, will become apparent in part from the following description, or will be understood through the practice of the embodiments of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The above and / or additional aspects and advantages of the present application will become apparent and understandable from the description of the embodiments in conjunction with the following drawings, in which: Figure 1 is one of the flow diagrams of the optimization method of the Shor algorithm according to the embodiments of the present application; Figure 2 is a schematic diagram of a controlled swap gate according to the embodiments of the present application; Figure 3 is one of the schematic diagrams of the quantum circuit of the Shor algorithm according to the embodiments of the present application; Figure 4 is a schematic diagram of the initial quantum circuit according to the embodiments of the present application; Figure 5 is another flow diagram of the optimization method of the Shor algorithm according to the embodiments of the present application; Figure 6 is yet another flow diagram of the optimization method of the Shor algorithm according to the embodiments of the present application; Figure 7 is still another flow diagram of the optimization method of the Shor algorithm according to the embodiments of the present application; Figure 8It is the second schematic diagram of the quantum circuit of the Shor algorithm according to the embodiment of the present application; Figure 9 It is the fifth schematic diagram of the flow of the optimization method of the Shor algorithm according to the embodiment of the present application; Figure 10 It is the first schematic diagram of the quantum circuit for implementing the modular exponentiation operation function according to the embodiment of the present application; Figure 11 It is the second schematic diagram of the quantum circuit for implementing the modular exponentiation operation function according to the embodiment of the present application; Figure 12 It is the third schematic diagram of the quantum circuit for implementing the modular exponentiation operation function according to the embodiment of the present application; Figure 13 It is the fourth schematic diagram of the quantum circuit for implementing the modular exponentiation operation function according to the embodiment of the present application; Figure 14 It is the sixth schematic diagram of the flow of the optimization method of the Shor algorithm according to the embodiment of the present application; Figure 15 It is the seventh schematic diagram of the flow of the optimization method of the Shor algorithm according to the embodiment of the present application; Figure 16 It is the eighth schematic diagram of the flow of the optimization method of the Shor algorithm according to the embodiment of the present application; Figure 17 It is the ninth schematic diagram of the flow of the optimization method of the Shor algorithm according to the embodiment of the present application; Figure 18 It is the schematic diagram of the introduction of auxiliary bits according to the embodiment of the present application; Figure 19 It is the tenth schematic diagram of the flow of the optimization method of the Shor algorithm according to the embodiment of the present application. Detailed implementation manners

[0026] The following details the implementation manners of the present application. The examples of the implementation manners are shown in the drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The implementation manners described below by referring to the drawings are exemplary only for explaining the implementation manners of the present application and should not be construed as a limitation on the implementation manners of the present application.

[0027] Based on the unique physical properties of qubits - quantum superposition and quantum entanglement, quantum computing exhibits significant theoretical advantages over classical computing paradigms when dealing with specific complex problems. Different from classical bits that can only represent two discrete states of 0 or 1, a single qubit can be in and The entanglement between multiple quantum bits can form a high-dimensional correlated state, which makes quantum computing have a natural parallel information processing capability. In the field of classical computing, the computational complexity of many complex problems, such as the prime factorization of large integers, increases exponentially with the increase of the value, making it difficult for classical computers to solve them within a reasonable time. Quantum computing, with its unique physical properties, has shown great potential in solving prime factorization problems.

[0028] Among the related technologies, Shor's algorithm is an important achievement in the field of quantum computing and has a milestone significance. It cleverly transforms the prime factorization problem, which is extremely challenging in classical computing, into a periodicity detection problem. Specifically, for a given integer N to be factored, Shor's algorithm first randomly selects an integer a that is coprime with N, and then solves the function through quantum computing. Once the period r is found, the prime factors of N can be efficiently decomposed using number theory.

[0029] In this process, the inverse quantum Fourier transform (IQFT) plays a key role, which can exponentially accelerate the periodic solution process. The classical algorithm solution cycle often needs to traverse a large number of possible values, which has extremely high time complexity. The quantum Fourier transform, with the help of quantum superposition and entanglement characteristics, can process a large amount of information at the quantum state level at the same time, thereby greatly shortening the calculation time.

[0030] However, despite the huge theoretical advantages of Shor's algorithm, its practical application still faces many challenges due to the performance of current quantum computers. It is often difficult to use Shor's algorithm to solve the high-complexity prime factorization problem. Current quantum computers, especially noisy intermediate-scale quantum (NISQ) devices, have problems such as limited number of quantum bits, short coherence time, and high gate operation error rate. These factors make it difficult for quantum computers to accurately maintain the superposition and entanglement characteristics of quantum states when running Shor's algorithm, and are easily interfered by noise, resulting in errors in calculation results.

[0031] For example, the Shor algorithm requires a large number of qubits to construct phase registers and operation registers to achieve high-precision cycle detection. When faced with the problem of prime factorization with higher complexity, the number of qubits required will increase dramatically, and the number of qubits in current quantum computers is far from meeting the requirements. At the same time, the entanglement operation between qubits requires extremely high precision, and any tiny error may be magnified during the calculation process, resulting in failure of the final result.

[0032] Based on the above questions, please refer to Figure 1, an embodiment of the present application provides an optimization method for Shor's algorithm based on data stream grouped linear transformation. The method includes: 01: Based on Shor's algorithm, determine an initial quantum circuit according to the target problem to be processed; 02: Calculate the initial basis vectors of the initial quantum circuit according to the modular exponentiation operator in the initial quantum circuit to determine the quantum basis vector data stream; 03: Determine the target quantum basis vector group according to the quantum basis vector data stream; 04: Determine the target quantum circuit according to the target quantum basis vector group and the target quantum gates to optimize Shor's algorithm.

[0033] An embodiment of the present application also provides a computer device, including a memory and a processor. The optimization method for Shor's algorithm based on data stream grouped linear transformation in the embodiment of the present application can be implemented by the computer device in the embodiment of the present application. Specifically, a computer program is stored in the memory, and the processor is used to determine an initial quantum circuit based on Shor's algorithm according to the target problem to be processed. And calculate the initial basis vectors of the initial quantum circuit according to the modular exponentiation operator in the initial quantum circuit to determine the quantum basis vector data stream. The processor is also used to determine the target quantum basis vector group according to the quantum basis vector data stream. And determine the target quantum circuit according to the target quantum basis vector group and the target quantum gates to optimize Shor's algorithm.

[0034] An embodiment of the present application also provides a quantum circuit optimization device. The optimization method for Shor's algorithm based on data stream grouped linear transformation in the embodiment of the present application can be implemented by the quantum circuit optimization device in the embodiment of the present application. Specifically, the quantum circuit simulation device includes a determination module. The determination module is used to determine an initial quantum circuit based on Shor's algorithm according to the target problem to be processed. And calculate the initial basis vectors of the initial quantum circuit according to the modular exponentiation operator in the initial quantum circuit to determine the quantum basis vector data stream. The determination module is also used to determine the target quantum basis vector group according to the quantum basis vector data stream. And determine the target quantum circuit according to the target quantum basis vector group and the target quantum gates to optimize Shor's algorithm.

[0035] Specifically, Shor's algorithm refers to a classical algorithm in the field of quantum computing, which can utilize the characteristics of quantum computing to solve the problem of large integer prime factorization that is difficult for classical computers to efficiently complete. The key of Shor's algorithm is to transform the prime factorization problem into a periodicity detection problem and achieve exponential acceleration by means of quantum superposition and inverse quantum Fourier transform (IQFT) of quantum computing.

[0036] A quantum circuit is a tool for quantum computing, used to transform an abstract quantum algorithm into a sequence of physical operations that can be executed on quantum computing hardware. Its essence is a graphical model that describes the evolution process of qubits (quantum bits). It is similar to the logic circuit in a classical computer, but the operating objects are qubits with the characteristics of quantum superposition and quantum entanglement.

[0037] A qubit (quantum bit) refers to the basic unit of a quantum circuit and is the carrier of quantum information. It can be in , and its superposition state.

[0038] Quantum gates refer to the basic operation units in quantum computing. They are mathematical operations that perform specific transformations on the states of qubits. Their essence is a unitary transformation acting on quantum states, satisfying reversibility and probability conservation, and are used to construct quantum circuits to achieve the logical functions of quantum algorithms.

[0039] The controlled-swap gate (CSWAP gate) is an important quantum gate in quantum computing. It belongs to the category of controlled gates and determines whether to perform a swap operation by introducing a control bit. The controlled-swap gate usually acts on three qubits, including one control bit and two target bits. Among them, the control bit refers to the qubit in a quantum logic gate that controls the states of other qubits (controlled bits). Only when the control bit is in a specific state (usually the ground state ), the states of the controlled bits will change. The control bit itself does not change its state during the operation. It only determines whether to perform an operation on the controlled bits. The controlled bits are the qubits in a quantum logic gate that are affected by the control bit. When the control bit is in a specific state, the controlled bits will perform specific quantum operations, such as bit flipping, phase flipping, etc. The state change of the controlled bits depends on the state of the control bit and the specific quantum logic gate operation. Suppose the controlled-swap gate is 1-controlled. Then the logic of the controlled-swap gate can be described as: when the control bit is , swap the quantum states of the two target bits; when the control bit is , the quantum states of the two target bits remain unchanged. Please refer to Figure 2 , Figure 2 for the schematic diagram of the controlled-swap gate. Among them, the controlled-swap gate is a 1-controlled controlled-swap gate. The solid dot above is the control bit, and the crossed lines below are the target bits.

[0040] The target problem refers to the computational problem that Shor's algorithm aims at, namely the problem of factoring large integers into prime factors. That is, given a large integer N (usually the product of two prime numbers), find its prime factors p and q (i.e., N = p×q, and p, q ≠ 1 or N). In the traditional method, the steps to solve the target problem using Shor's algorithm are as follows: First, input the composite number N to be factored. Next, select a random integer a that satisfies 1 < a < N and gcd(a, N) = 1. Then, solve the period r of the function , that is, the smallest positive integer r that satisfies . If the period r is even and , then and are likely to be non-trivial factors (i.e., prime factors) of N. In the process of solving the function , a superposition state can be prepared through a quantum register, where x can take multiple integer values simultaneously (such as 0, 1, 2, , to achieve parallel calculation of all possible values of f(x). Moreover, the superposition state can also be operated through the inverse quantum Fourier transform to transform the period information of the function from the time domain to the frequency domain, so as to quickly extract the probability amplitude information of the period r. Finally, after obtaining an estimated value of the period r through quantum computing, use classical algorithms (such as continued fraction expansion) to accurately calculate r, and combine number theory methods to factor out the prime factors of N.

[0041] The initial quantum circuit is a combination of quantum gates designed based on the principle of Shor's algorithm to solve the problem of factoring large integers into prime factors (the target problem). It directly corresponds to the mathematical logic of the algorithm and is the starting point for subsequent optimization. The initial quantum circuit includes a quantum register, an inverse quantum Fourier transform module, and a modular exponentiation module.

[0042] Among them, the quantum register includes a phase register and an operation register. The phase register is used to store the phase information of the inverse quantum Fourier transform. In Shor's algorithm, by performing the inverse Fourier transform operation on the phase register, the target information in the phase register can be transformed from the phase to the basis vector, so as to convert the period information encoded in the phase register into a measurable probability distribution for subsequent processing. When performing the controlled modular exponentiation operation, each bit of the phase register serves as a control bit to control the modular exponentiation operation on the operation register. Through different combinations of bits, different exponentiation power modulo operations on the data in the operation register are realized. The operation register is used to store the intermediate and final results of the modular exponentiation operation. Its initial state is usually set to a specific value, and in most cases it is (i.e., the binary representation of ). During the execution of Shor's algorithm, the operation register continuously updates the data stored in it under the control of the phase register. In the controlled modular exponentiation stage, according to the control of each bit of the phase register, the data in the operation register will perform corresponding modular exponentiation operations. The inverse quantum Fourier transform module is used to extract the period information. The modular exponentiation module is used to calculate .

[0043] The modular exponentiation operator refers to the quantum circuit module that implements the function . It is the core component of the initial quantum circuit and essentially converts classical modular exponentiation into quantum reversible operations.

[0044] The initial basis vector refers to the initial quantum state basis vector of the operation register, which is the input starting point of modular exponentiation and is used to deduce the subsequent quantum state evolution path. The initial basis vector is always , and does not change with the target problem.

[0045] The quantum basis vector data stream refers to the evolution path of the basis vectors of the quantum state of the operation register, that is, starting from the initial basis vector , a sequence of superposition states of basis vectors generated after each modular exponentiation operation. It should be noted that the quantum basis vector data stream takes the numerical transformation law of the basis vectors as the core, rather than aiming to implement a fixed function (different from the traditional functional flow design).

[0046] The target quantum basis vector group refers to the set of basis vectors extracted from the quantum basis vector data stream that actually participate in the transformation. It can serve as the actual input and output state set of modular exponentiation, replacing the full-space basis vectors in the traditional scheme and reducing the number of transformation pairs to be processed.

[0047] The target quantum gate refers to a simple quantum gate used to replace the original modular exponentiation operator. It is designed based on the linear relationship of the basis vector group and can replace the traditional high-complexity multiplication gate, converting modular exponentiation into a low-depth linear transformation combination, thereby reducing the circuit complexity and adapting to the hardware limitations of current quantum computers.

[0048] First, the computer device constructs a basic quantum circuit for solving the target problem to be processed according to the mathematical principle of Shor's algorithm, that is, the initial quantum circuit, including the phase register, the operation register, and the modular exponentiation module.

[0049] Subsequently, the computer device starts from the initial basis vector of the operation register and deduces the sequence of superposition states of basis vectors after each operation of the modular exponentiation operator through the mathematical relationship of modular exponentiation to form a quantum basis vector data stream.

[0050] Next, obtain the set of basis vectors actually participating in the transformation from the quantum basis vector data stream, and determine the target quantum basis vector group.

[0051] Finally, the computer device designs a simple quantum gate combination for the linear relationship of the target basis vector group, determines the target quantum gate, and determines the target quantum circuit according to the target quantum gate and the target quantum basis vector group to optimize the Shor algorithm.

[0052] The following takes the integer factorization of 21 = 3×7 as an example to illustrate the optimization method of the Shor algorithm based on data stream grouped linear transformation provided by the embodiments of the present application. Please refer to Figure 3 , Figure 3 which is the schematic diagram of the quantum circuit of the Shor algorithm. Among them, to are quantum bits. The horizontal line folded below is the operation register, which is used to store the intermediate and final results of the modular exponentiation operation. Its initial state is usually set to a specific value, and in most cases it is . IQFT refers to the inverse quantum Fourier transform module. U represents the controlled U gate. In the quantum circuit, the modular exponentiation operation is usually implemented by a series of controlled U gates, and each controlled U gate corresponds to operations. The t in the superscript of U represents the number of quantum bits of the phase register. M identifies the measurement operation.

[0053] From Figure 3 it can be seen that in quantum computing, the modular exponentiation operation (that is, calculating , corresponding to the exponential operation of the U gate) is the core step of quantum algorithms such as the Shor algorithm. For the exponent x (assuming it is an n-qubit number), each of its bits (a total of t = n bits) needs to control the execution of the modular operation, and the processing of each quantum bit involves two multiplication operations. Therefore, the total number of multiplications for t operations is approximately 4n^2 (including additional operations such as modular reduction). Since the quantum circuit complexity of a single multiplication operation is O(n^2) (such as a multiplier based on the Toffoli gate), the total arithmetic operation complexity is O(n^4).

[0054] First, the computer device constructs an initial quantum circuit for solving the integer factorization of 21 = 3×7 according to the mathematical principle of the Shor algorithm.

[0055] Subsequently, starting from the initial basis vector of the operation register, through the mathematical relationship of the modular exponentiation operation (selecting the base a = 2, and the value range of x is to ), deduce the sequence of basis vector superposition states after each step of the modular exponentiation operator operation to form a quantum basis vector data stream.

[0056] Next, obtain the set of basis vectors actually participating in the transformation from the quantum basis vector data stream, and determine the target quantum basis vector group.

[0057] Finally, the computer device designs a simple quantum gate combination for the linear relationship of the target basis vector group, determines the target quantum gate, and determines the target quantum circuit according to the target quantum gate and the target quantum basis vector group to optimize the Shor algorithm.

[0058] In summary, in the optimization method of the Shor algorithm based on data stream grouping linear transformation provided by the embodiments of the present application, based on the Shor algorithm, the computer device determines the initial quantum circuit according to the target problem to be processed. Next, the computer device calculates the initial basis vectors of the initial quantum circuit according to the modular exponentiation operator in the initial quantum circuit to determine the quantum basis vector data stream. Then, the computer device determines the target quantum basis vector group according to the quantum basis vector data stream. Finally, the computer device determines the target quantum circuit according to the target quantum basis vector group and the target quantum gate to optimize the Shor algorithm. In this way, by analyzing the evolution of the basis vectors of the initial quantum circuit, the quantum basis vector data stream is determined, the target quantum basis vector group is obtained from the quantum basis vector data stream, and the complex operation is replaced by the target quantum gate, reducing the quantum circuit complexity of the modular exponentiation operation of the Shor algorithm and making it adapt to the hardware limitations of the current quantum computer.

[0059] Please refer to Figure 5 , in some embodiments, step 01 (based on the Shor algorithm, determine the initial quantum circuit according to the target problem to be processed) includes: 011: Based on the Shor algorithm, determine the basis according to the target problem; 012: Determine the number of phase qubits according to the target problem; 013: Determine the number of operation qubits according to the target problem; 014: Determine the initial quantum circuit according to the basis, the number of phase qubits, and the number of operation qubits.

[0060] In some embodiments, the determination module is further configured to determine the basis based on the Shor algorithm according to the target problem. And determine the number of phase qubits according to the target problem. The determination module is further configured to determine the number of operation qubits according to the target problem. And determine the initial quantum circuit according to the basis, the number of phase qubits, and the number of operation qubits.

[0061] In some embodiments, the processor is further configured to determine a base based on the Shor algorithm according to the target problem, and determine the number of phase qubits according to the target problem. The processor is further configured to determine the number of operation qubits according to the target problem, and determine an initial quantum circuit according to the base, the number of phase qubits, and the number of operation qubits.

[0062] Specifically, in the Shor algorithm, the base refers to a positive integer a that is relatively prime to the integer N to be factored and less than N (i.e., 1 < a < N and gcd(a, N) = 1). The base is the core input of the modular exponentiation operation and is used to construct a periodic function. . The Shor algorithm analyzes the period r of this function through the inverse quantum Fourier transform (IQFT), and then uses number theory knowledge to factor N. It should be noted that the randomness of the base affects the algorithm efficiency, and in practical applications, multiple bases are usually randomly selected to ensure successful factorization.

[0063] The number of phase qubits refers to the number of qubits used to store the phase information of the period measurement result in the Shor algorithm, usually denoted as t. These qubits form a phase register. In the quantum circuit, the phase qubits are initialized to a superposition state through Hadamard gates, then entangled with the operation qubits through the modular exponentiation circuit, and finally the period information is encoded as a phase (i.e., the argument of the quantum state) through QFT. Moreover, the number t of phase qubits directly determines the accuracy of the period measurement: the larger t is, the higher the resolution of the measurement result, and it is easier to deduce the true period r through classical algorithms.

[0064] The number of operation qubits refers to the number of qubits used to perform the modular exponentiation operation (i.e., calculate . It forms an operation register, usually denoted as n (n is the number of bits of the integer N to be factored, i.e., ). The operation qubits are used to store the intermediate results of the modular exponentiation operation (such as the value of ), and their quantum states evolve step by step along with the modular exponentiation circuit. Moreover, each operation qubit corresponds to a binary digit of the value, and iterative calculations of the value are realized through operations such as controlled gates (such as controlled multiplication gates) and SWAP gates.

[0065] It should be noted that the base is an input parameter of the algorithm and determines the periodic function to be analyzed; the number t of phase qubits and the number n of operation qubits are hardware parameters for circuit design, corresponding to the phase measurement accuracy and the numerical representation accuracy respectively. In the initial quantum circuit design, n needs to be determined according to the size of N, t needs to be determined according to the expected period r, and a suitable base a needs to be selected. The three together determine the scale of the quantum circuit and the feasibility of the algorithm.

[0066] Thus, the computer device determines a base according to the target problem. The base is relatively prime to the integer to be decomposed in the target problem and less than the integer to be decomposed. Next, the computer device determines the number of phase qubits according to the target problem. The number of phase qubits is used to record the phase information generated by running the Shor algorithm. Then, the computer device determines the number of operation qubits according to the target problem. The number of operation qubits is used to record the quantum state information generated by running the modular exponentiation operator. Finally, the computer device determines the initial quantum circuit according to the base, the number of phase qubits, and the number of operation qubits. In this way, the quantization mapping of the Shor algorithm is realized through parametric design. While ensuring mathematical correctness, the resource consumption is controlled within the range that can be tolerated by the quantum computer, and a foundation for subsequent optimization is laid.

[0067] Please refer to Figure 6 , in some embodiments, step 014 (determining the initial quantum circuit according to the base, the number of phase qubits, and the number of operation qubits) includes: 0141: Determine the modular exponentiation operator according to the base, the number of phase qubits, and the integer to be decomposed; 0142: Determine the initial quantum circuit according to the base, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator.

[0068] In some embodiments, the determination module is further configured to determine the modular exponentiation operator according to the base, the number of phase qubits, and the integer to be decomposed, and to determine the initial quantum circuit according to the base, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator.

[0069] In some embodiments, the processor is further configured to determine the modular exponentiation operator according to the base, the number of phase qubits, and the integer to be decomposed, and to determine the initial quantum circuit according to the base, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator.

[0070] Specifically, the construction of the modular exponentiation operator depends on the base a, the number of phase qubits t, and the integer to be decomposed N. The modular exponentiation operator is equivalent to the modular exponentiation operation in the classical algorithm (such as the fast power algorithm), but realizes parallel computing through quantum gate operations. It can utilize the quantum superposition state and can calculate the corresponding values of multiple x simultaneously. , which is the key to the exponential acceleration achieved by the Shor algorithm.

[0071] After determining the modular exponentiation operator, the computer device determines the initial quantum circuit according to the base, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator.

[0072] Thus, the computer device determines the modular exponentiation operator according to the base, the number of phase qubits, and the integer to be factored. Then, the computer device determines the initial quantum circuit according to the base, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator. In this way, through rigorous number-theoretic transformation, it is ensured that the initial quantum circuit mathematically correctly maps the theoretical framework of Shor's algorithm, avoiding decomposition anomalies caused by parameter errors.

[0073] Please refer to Figure 7 , in some embodiments, the method further includes: 0143: determining a temporary quantum circuit according to the base, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator; 0144: adjusting the operation order of the modular exponentiation operator according to the operation commutativity of the modular exponentiation operator in the temporary quantum circuit to determine the initial quantum circuit.

[0074] In some embodiments, the determination module is further configured to determine a temporary quantum circuit according to the base, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator. And adjust the operation order of the modular exponentiation operator according to the operation commutativity of the modular exponentiation operator in the temporary quantum circuit to determine the initial quantum circuit.

[0075] In some embodiments, the processor is further configured to determine a temporary quantum circuit according to the base, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator. And adjust the operation order of the modular exponentiation operator according to the operation commutativity of the modular exponentiation operator in the temporary quantum circuit to determine the initial quantum circuit.

[0076] Specifically, the temporary quantum circuit is an unoptimized quantum circuit directly constructed according to the basic parameters of the target problem (base, number of phase qubits, number of operation qubits, modular exponentiation operator), and its structure only reflects the mathematical mapping of the parameters without considering the optimization of the operation order.

[0077] Operation commutativity means that two quantum gates A and B satisfy AB = BA, that is, the operation order can be exchanged without affecting the final quantum state. For example, two single-qubit gates acting on different qubits must commute.

[0078] The initial quantum circuit here refers to the optimized circuit obtained by adjusting the order of the modular exponentiation operator in the temporary circuit by using operation commutativity. While maintaining the modular exponentiation operation function, the circuit structure is optimized.

[0079] Please refer to Figure 3 and Figure 8 , Figure 8 is a schematic diagram of the quantum circuit of Shor's algorithm. Since Figure 3The controlled modular exponentiation operations among them commute with each other. Therefore, we can move the controlled modular exponentiation operations forward and backward arbitrarily to form a quantum circuit as shown in Figure 8 which is equivalent to the quantum circuit shown in Figure 3 and Figure 8 . In the above content, Figure 3 is a temporary quantum circuit, Figure 8 is the initial quantum circuit.

[0080] In this way, the computer device determines a temporary quantum circuit according to the basis, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator. Then, the computer device adjusts the operation order of the modular exponentiation operator according to the commutativity of the operations of the modular exponentiation operator in the temporary quantum circuit to determine the initial quantum circuit. In this way, by using the commutativity of the operations of the modular exponentiation operator to adjust the operation order of the modular exponentiation operator, the subsequent determined quantum basis vector group can be serially executed according to the quantum basis vector data stream order, reducing the number of parallel quantum gate operations.

[0081] Please refer to Figure 9 . In some embodiments, step 02 (calculating the initial basis vectors of the initial quantum circuit according to the modular exponentiation operator in the initial quantum circuit to determine the quantum basis vector data stream) includes: 021: Calculating the initial basis vectors according to the modular exponentiation operator to determine the first basis vectors at the current stage; 022: Calculating the first basis vectors according to the modular exponentiation operator to determine the second basis vectors at the next stage; 023: Determining the quantum basis vector data stream according to the first basis vectors and the second basis vectors.

[0082] In some embodiments, the determining module is further configured to calculate the initial basis vectors according to the modular exponentiation operator to determine the first basis vectors at the current stage. And calculate the first basis vectors according to the modular exponentiation operator to determine the second basis vectors at the next stage. And determine the quantum basis vector data stream according to the first basis vectors and the second basis vectors.

[0083] In some embodiments, the processor is further configured to calculate the initial basis vectors according to the modular exponentiation operator to determine the first basis vectors at the current stage. And calculate the first basis vectors according to the modular exponentiation operator to determine the second basis vectors at the next stage. And determine the quantum basis vector data stream according to the first basis vectors and the second basis vectors.

[0084] Specifically, the first basis vectors refer to the output basis vectors of the modular exponentiation operation at the current stage, that is, the results after the initial basis vectors are subjected to one modular exponentiation operation.

[0085] The second basis vector refers to the output basis vector of the next-stage modular exponentiation operation, that is, the result after the first basis vector undergoes modular exponentiation again.

[0086] The quantum basis vector data stream refers to the sequence of basis vectors generated by successive modular exponentiation operations starting from the initial basis vector and their superposition relationships, reflecting the evolution path of data in the operation register.

[0087] Continuing the above example, please refer to Figure 8 , in the integer factorization of 21 = 3×7, the mathematical relationship of modular exponentiation (selecting the base a = 2, and the value range of x is to ). Then, the function implemented by the first module is , and its calculation result is 4. That is to say, when the control bit = 1, the result output by the controlled operation is the binary string corresponding to 4, that is . Therefore, the quantum state obtained after executing the controlled is . Therefore, implements the transformation from to , which can be completed using a simple data flow line represented by a swap gate as shown in Figure 10 , that is, swapping the third bit and the fifth bit; note that the control bit of is not included here. In the actual implementation of the quantum circuit, a control bit needs to be added to the circuit shown in Figure 10 , and the same applies hereinafter, so it will not be elaborated.

[0088] Next, the second step is to execute the controlled , and its inputs include and . In fact, the state contains The quantum state of the bit state is . According to the different values of the control bit , the quantum state evolves into . That is to say, when the control bit is 0, no transformation occurs, and it is still 00001 and 00100; while when the control bit is 1, 00001 undergoes transformation to 10000, and 00100 undergoes transformation to 00001. This is the transformation that needs to be completed, not just one, but two. As shown in Figure 11As shown, this circuit completes the synchronous transformation of these two basis vectors.

[0089] Subsequently, the third step is executed , similar to the above two steps. At this time , it is necessary to synchronously pass 1, 4, and 16 respectively through , , and transform them into 4, 16, and 1. The circuit is as shown in Figure 12 .

[0090] Then, the fourth step is executed . Similarly, 1, 4, and 16 pass through , , and are transformed into 16, 1, and 4. The circuit is as shown in Figure 13 .

[0091] Next, the fifth to seventh steps are executed respectively , and . Their circuits are respectively the same as Figure 12 , Figure 13 , Figure 12 , with the only difference being the control bit positions, as shown in Figure 3 .

[0092] Finally, the last step is executed . 1, 4, and 16 are respectively transformed into 2, 8, and 11. It should be noted that the above Figure 10 , Figure 11 , Figure 12 and Figure 13 are all schematic diagrams of quantum circuits for implementing the modular exponentiation operation function. Among them, the solid circles represent 1 control.

[0093] In this way, the computer device calculates the initial basis vectors according to the modular exponentiation operator to determine the first basis vector in the current stage. Then, the computer device calculates the first basis vector according to the modular exponentiation operator to determine the second basis vector in the next stage. Finally, the computer device determines the quantum basis vector data stream based on the first basis vector and the second basis vector. In this way, through the phased change of the basis vectors, the evolution path of the modular exponentiation operation can be visually analyzed, facilitating the subsequent optimization of the quantum circuit.

[0094] Please refer to Figure 14 . In some embodiments, step 03 (determining the target quantum basis vector group according to the quantum basis vector data stream) includes: 031: Based on a preset recognition rule, recognize the quantum basis vector data stream to determine the existence of the linear relationship of the quantum basis vector data stream; 032: Determine a first sub-vector group and a second sub-vector group from the quantum basis vector data stream according to the existence of a linear relationship; 033: Determine a target quantum basis vector group according to the first sub-vector group.

[0095] In some embodiments, the determining module is further configured to identify the quantum basis vector data stream based on a preset identification rule to determine the existence of a linear relationship in the quantum basis vector data stream. And determine a first sub-vector group and a second sub-vector group from the quantum basis vector data stream according to the existence of the linear relationship. And determine a target quantum basis vector group according to the first sub-vector group.

[0096] In some embodiments, the processor is further configured to identify the quantum basis vector data stream based on a preset identification rule to determine the existence of a linear relationship in the quantum basis vector data stream. And determine a first sub-vector group and a second sub-vector group from the quantum basis vector data stream according to the existence of the linear relationship. And determine a target quantum basis vector group according to the first sub-vector group.

[0097] Specifically, the preset identification rule refers to the standard for judging whether there is a linear relationship between quantum basis vectors in the quantum basis vector data stream, including bit swapping, small coefficient multiplication / addition, and periodic transformation, etc. Among them, bit swapping means that the binary string corresponding to the quantum basis vector can directly swap bit positions through a swap gate. Small coefficient multiplication / addition means that the value of the quantum basis vector satisfies y = (kx + b) mod N (k is a small integer, such as 2, 4, etc.; b is a constant). Periodic transformation means that the quantum basis vector forms a closed loop after linear transformation, such as → → → .

[0098] A linear relationship refers to a relationship in which quantum basis vectors can be mapped through linear algebraic operations (such as matrix transformation, linear combination in vector space) through a preset identification rule.

[0099] The existence of a linear relationship refers to the result of judging the linear relationship between adjacent basis vector pairs in the quantum basis vector data stream, which is used to determine the basis vector grouping strategy.

[0100] The first sub-vector group refers to a set of basis vectors in the quantum basis vector data stream that can be mapped through linear transformation, that is, there is an explicit linear relationship (such as bit swapping, small coefficient multiplication / addition, etc.) between the basis vectors within the group, and the transformation can be realized through simple quantum gates (such as swap gates and adders).

[0101] The second sub-vector group refers to the set of basis vectors in the quantum basis vector data stream that cannot be mapped through linear transformation, that is, there is no obvious linear relationship between the basis vectors within the group, and auxiliary bits or complex conditional gates need to be introduced for processing.

[0102] The target quantum basis vector group includes the first sub-vector group and the processed second sub-vector group. There is a linear relationship within the target quantum basis vector group, and the linear relationship between different target quantum basis vector groups does not exist or is not obvious.

[0103] First, based on the preset recognition rule, identify the existence of the linear relationship. Then, according to the linear relationship, determine the first sub-vector group and the second sub-vector group. Finally, according to the first sub-vector group, determine the target quantum basis vector group.

[0104] Continuing the above example, in the integer factorization of 21 = 3×7, the linear transformations from 1, 4, 16 to 4, 16, 1 or from 1, 4, 16 to 16, 1, 4 realized in the first step to the seventh step have very obvious periodic characteristics and can be achieved through simple bit transformations. The circuit only requires swap gates, and the conventional compilation function can be efficiently completed.

[0105] In this way, based on the preset recognition rule, the computer device identifies the quantum basis vector data stream and determines the existence of the linear relationship of the quantum basis vector data stream. Then, according to the existence of the linear relationship, the computer device determines the first sub-vector group and the second sub-vector group from the quantum basis vector data stream, where the first sub-vector group is used to indicate the non-linear quantum basis vector group that can be mapped through linear transformation, and the second sub-vector group is used to indicate the non-linear quantum basis vector group that cannot be mapped through linear transformation. Finally, the computer device determines the target quantum basis vector group according to the first sub-vector group. In this way, by identifying the linear relationship and grouping isolation, the complexity of the modular exponentiation operation is reduced, thereby breaking through the hardware performance limitations of the current quantum computer.

[0106] Please refer to Figure 15 In some embodiments, step 033 (determine the target quantum basis vector group according to the first sub-vector group) includes: 0331: Determine the target quantum basis vector group according to the periodicity of the first sub-vector group.

[0107] In some embodiments, the determination module is further configured to determine the target quantum basis vector group according to the periodicity of the first sub-vector group.

[0108] In some embodiments, the processor is further configured to determine the target quantum basis vector group according to the periodicity of the first sub-vector group.

[0109] Specifically, the periodicity of the first sub-vector group means that the numerical values of the basis vectors in the first sub-vector group show regular repetition as the operator index i increases under modular exponentiation operations. In the above example, starting from (i = 1), the numerical values of the basis vectors have a cycle of "4 → 16 → 4 → 16".

[0110] The target quantum basis vector group includes the set of basis vectors within one period determined after detecting the periodicity of the first sub-vector group, that is, the quantum basis vectors with periodicity. Only all the basis vectors within one period need to be retained, and the repeated cyclic states are ignored. In this way, using the periodicity, cyclic quantum gates (such as the cyclic application of the swap gate) can be designed, and the same set of gates can act repeatedly on the basis vectors within the period, replacing the traditional successive multiplication gates.

[0111] In this way, the computer device determines the target quantum basis vector group according to the periodicity of the first sub-vector group. In this way, the modular exponentiation operation is transformed from successive high-complexity multiplications into a cyclic linear transformation, and only the quantum basis vectors within one period need to be processed, reducing the complexity of the quantum circuit.

[0112] Please refer to Figure 16 , in some embodiments, the method further includes: 034: Determine the target quantum basis vector group according to the auxiliary qubit and the second sub-vector group.

[0113] In some embodiments, the determining module is further configured to determine the target quantum basis vector group according to the auxiliary qubit and the second sub-vector group.

[0114] In some embodiments, the processor is further configured to determine the target quantum basis vector group according to the auxiliary qubit and the second sub-vector group.

[0115] Specifically, continuing with the above example, in the integer factorization of 21 = 3 × 7, in the last step, 1, 4, 16 are respectively transformed into 2, 8, 11. However, 11 has no obvious linear relationship with 2, 8, so 2, 8, 11 are assigned to the second sub-vector group. For such a non-linear quantum basis vector group that cannot be mutually mapped through linear transformation, we need to introduce an auxiliary qubit to introduce non-linear operations (such as measurement, quantum gate combinations under classical feedback control) to indirectly process.

[0116] Ancillary qubits refer to additional qubits introduced in quantum computing to assist in specific operations (such as non-linear transformations, quantum error correction, state preparation, etc.). They do not directly participate in the target calculation themselves, but achieve indirect control through interaction with the target qubits. The interaction between the ancillary qubits and the target qubits includes classical feedback control, quantum state preparation and conversion, etc. Classical feedback control means that after measuring the ancillary qubits, different quantum gate operations are applied to the quantum states of the second sub-vector group according to the measurement results (classical information) to achieve non-linear transformation effects. Quantum state preparation and conversion means using the ancillary qubits as catalysts to convert the states of the second sub-vector group into the target basis vector group through protocols such as entanglement swapping and quantum teleportation.

[0117] In this way, the computer device determines the target quantum basis vector group based on the ancillary qubits and the second sub-vector group. In this way, through the ancillary qubits, the non-linear problem is transformed into a hybrid process of linear operations and conditional control, enabling the quantum basis of the second sub-vector group to be mapped to the target basis vector group.

[0118] Please refer to Figure 17 , in some embodiments, step 034 (determining the target quantum basis vector group based on the ancillary qubits and the second sub-vector group) includes: 0341: Determine the number of qubits of the ancillary qubits according to the second sub-vector group; 0342: Perform a splitting process on the second sub-vector group according to the ancillary qubits and the number of qubits to determine the target quantum basis vector group.

[0119] In some embodiments, the determination module is further configured to determine the number of qubits of the ancillary qubits according to the second sub-vector group, and perform a splitting process on the second sub-vector group according to the ancillary qubits and the number of qubits to determine the target quantum basis vector group.

[0120] In some embodiments, the processor is further configured to determine the number of qubits of the ancillary qubits according to the second sub-vector group, and perform a splitting process on the second sub-vector group according to the ancillary qubits and the number of qubits to determine the target quantum basis vector group.

[0121] Specifically, the number of qubits of the ancillary qubits is dynamically determined by the characteristics of the second sub-vector group (such as the number of basis vectors m in the group and the complexity of the non-linear mapping), and generally satisfies the number of qubits of the ancillary qubits = .

[0122] The splitting process refers to using the ancillary qubits to split the second sub-vector group into multiple small-dimensional sub-groups, and there is a linear relationship within these small-dimensional sub-groups.

[0123] It should be noted that in some embodiments, it is also necessary to perform conditional separation on the first sub-vector group and the second sub-vector group, that is, through the state of the auxiliary qubit (such as or ), as a "conditional switch", to control the quantum gate to act only on the first sub-vector group (linear basis vector group) or the second sub-vector group (nonlinear basis vector group), so as to isolate the transformation operations of the two groups and avoid cross-interference.

[0124] Please refer to Figure 18 , Figure 18 for the schematic diagram of introducing the auxiliary bit, where the solid circle represents 1 control and the hollow circle represents 0 control. Continuing with the above example, in the integer factorization of 21 = 3×7, the first sub-vector group → → and the second sub-vector group → achieve conditional separation through 1 auxiliary bit. That is, when the auxiliary bit is , the swap gate acts on the linear group to complete the → → cyclic transformation. When the auxiliary bit is , the controlled multiplication gate acts on the non-linear group to complete the → transformation.

[0125] In this way, the computer device determines the number of bits of the auxiliary qubit according to the second sub-vector group. Then, the computer device performs splitting processing on the second sub-vector group according to the auxiliary qubit and the number of bits to determine the target quantum basis vector group. In this way, through the dynamic determination of the number of auxiliary bits and the splitting processing of the second sub-vector group, the efficient processing of the second sub-vector group is realized, and finally, together with the first sub-vector group, it constitutes the target quantum basis vector group for subsequent optimization of the quantum circuit.

[0126] Please refer to Figure 19 , in some embodiments, step 04 (determining the target quantum circuit according to the target quantum basis vector group and the target quantum gate) includes: 041: Replace the modular exponentiation operator in the target quantum basis vector group with the target quantum gate to determine the target quantum circuit.

[0127] In some embodiments, the confirmation module is further configured to replace the modular exponentiation operator in the target quantum basis vector group with the target quantum gate to determine the target quantum circuit.

[0128] In some embodiments, the processor is further configured to replace the modular exponentiation operator in the target quantum basis vector group with the target quantum gate to determine the target quantum circuit.

[0129] Specifically, a target quantum circuit refers to a sequence of quantum gate operations that can be directly executed on actual quantum hardware (such as superconducting quantum chips, photonic quantum devices, etc.) after optimization.

[0130] A target quantum gate refers to a simple quantum gate that can be implemented in quantum computing hardware, including swap gates, controlled-NOT gates, and the like.

[0131] The computer device replaces the modular exponentiation operator in the target quantum basis vector group with a target quantum gate to determine the target quantum circuit.

[0132] In this way, the computer device replaces the modular exponentiation operator in the target quantum basis vector group with a target quantum gate to determine the target quantum circuit. Thus, by replacing the modular exponentiation operator in the target quantum basis vector group with a target quantum gate, the theoretical logic of the Shor algorithm is transformed into a gate sequence executable by hardware, realizing the optimization of the Shor algorithm.

[0133] This application also provides a computer-readable storage medium containing a computer program. When the computer program is executed by one or more processors, one or more processors are caused to execute the method of this application.

[0134] It can be understood that the computer program includes computer program code. The computer program code can be in the form of source code, object code, executable file, or some intermediate form, etc. The computer-readable storage medium can include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disc, computer memory, read-only memory (ROM), random access memory (RAM), and software distribution media, etc.

[0135] In the description of this specification, the descriptions referring to terms such as "specifically", "further", "specially", "understandably", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiments or examples are included in at least one embodiment or example of this application. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0136] Any process or method description, whether in a flowchart or otherwise described herein, can be understood to represent a module, segment, or portion of code including one or more executable instructions for implementing a specific logical function or process. The scope of the preferred embodiments of the present application includes additional implementations, where functions may be performed in a substantially simultaneous manner or in a reverse order according to the functions involved, rather than in the order shown or discussed. This should be understood by those skilled in the art to which the embodiments of the present application pertain.

[0137] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting the present application. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present application.

Claims

1. An optimization method for Shor's algorithm based on data stream grouped linear transformation, characterized in that The method includes: Based on the Shor algorithm, an initial quantum circuit is determined according to the target problem to be processed; According to the modular exponentiation operator in the initial quantum circuit, the initial basis vectors of the initial quantum circuit are calculated to determine a quantum basis vector data stream; According to the quantum basis vector data stream, a target quantum basis vector group is determined; According to the target quantum basis vector group and target quantum gates, a target quantum circuit is determined to optimize the Shor algorithm.

2. The method according to claim 1, characterized in that, The step of based on the Shor algorithm, determining an initial quantum circuit according to the target problem to be processed includes: Based on the Shor algorithm, according to the target problem, a basis is determined, and the basis is relatively prime to the integer to be factored in the target problem and less than the integer to be factored; According to the target problem, the number of phase qubits is determined, and the number of phase qubits is used to record the phase information generated by running the Shor algorithm; According to the target problem, the number of operation qubits is determined, and the number of operation qubits is used to record the quantum state information generated by running the modular exponentiation operator; According to the basis, the number of phase qubits, and the number of operation qubits, the initial quantum circuit is determined.

3. The method according to claim 2, wherein The step of determining the initial quantum circuit according to the basis, the number of phase qubits, and the number of operation qubits includes: According to the basis, the number of phase qubits, and the integer to be factored, the modular exponentiation operator is determined; According to the basis, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator, the initial quantum circuit is determined.

4. The method according to claim 3, wherein The method further includes: According to the basis, the number of phase qubits, the number of operation qubits, and the modular exponentiation operator, a temporary quantum circuit is determined; According to the commutativity of the operations of the modular exponentiation operator in the temporary quantum circuit, the operation order of the modular exponentiation operator is adjusted to determine the initial quantum circuit.

5. The method according to claim 1, wherein The step of according to the modular exponentiation operator in the initial quantum circuit, calculating the initial basis vectors of the initial quantum circuit to determine a quantum basis vector data stream includes: According to the modular exponentiation operator, the initial basis vectors are calculated to determine the first basis vectors at the current stage; According to the modular exponentiation operator, the first basis vectors are calculated to determine the second basis vectors at the next stage; According to the first basis vectors and the second basis vectors, the quantum basis vector data stream is determined.

6. The method according to claim 1, characterized in that, The step of according to the quantum basis vector data stream, determining a target quantum basis vector group includes: Based on a preset recognition rule, the quantum basis vector data stream is recognized to determine the existence situation of the linear relationship of the quantum basis vector data stream; According to the existence situation of the linear relationship, from the quantum basis vector data stream, a first sub-vector group and a second sub-vector group are determined, where the first sub-vector group is used to indicate a linear quantum basis vector group that can be mapped through linear transformation, and the second sub-vector group is used to indicate a non-linear quantum basis vector group that cannot be mapped through linear transformation; Determine the target quantum basis vector group according to the first sub-vector group.

7. The method according to claim 6, wherein The determining of the target quantum basis vector group according to the first sub-vector group includes: Determine the target quantum basis vector group according to the periodicity of the first sub-vector group.

8. The method according to claim 6, characterized in that, The method further includes: Determine the target quantum basis vector group according to the auxiliary quantum bit and the second sub-vector group.

9. The method according to claim 8, wherein, The determining of the target quantum basis vector group according to the auxiliary quantum bit and the second sub-vector group includes: Determine the number of bits of the auxiliary quantum bit according to the second sub-vector group; Perform a splitting process on the second sub-vector group according to the auxiliary quantum bit and the number of bits to determine the target quantum basis vector group.

10. The method according to claim 1, wherein The determining of the target quantum circuit according to the target quantum basis vector group and the target quantum gate includes: Replace the modular exponentiation operator in the target quantum basis vector group with the target quantum gate to determine the target quantum circuit.

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