A bidirectional amplifier and electronic device

Abstract

The application provides a bidirectional amplifier and electronic equipment, comprising a low-noise amplification module, a power amplification module and a multiplex matching network module, the multiplex matching network module comprising a three-coil transformation unit, a first switch and a second switch; the first switch and the second switch switch the second winding and the third winding in the three-coil transformation unit to be in-phase coupled according to a sending voltage signal, and switch the second winding and the third winding to be anti-phase coupled according to a receiving voltage signal, so as to realize high isolation of the bidirectional amplifier sending signal, power additional efficiency of a high-frequency output signal and high gain and low noise of a receiving signal. Since the first switch and the second switch are both embedded into the three-coil transformation unit, no additional chip area is occupied, so that the advantages of high area efficiency and low cost are achieved.

Description

Technical Field

[0001] This invention relates to the field of radio frequency circuits, and more particularly to a bidirectional amplifier and an electronic device. Background Technology

[0002] Currently, millimeter-wave communication has attracted much attention due to its widely available bandwidth, which allows for higher information transmission rates. However, millimeter-wave communication faces the challenge of significant transmission loss. Phased array technology, through the coordinated operation of multiple transceiver units, controls the phase and amplitude of the signal in each unit, achieving focused and directional control of the antenna beam. This concentrates the transmitted and received energy in a specific direction, effectively overcoming the path loss inherent in millimeter-wave communication. As a key component of the phased array, the millimeter-wave transceiver front-end directly impacts the performance of the entire system.

[0003] Since the single-pole double-throw switch commonly used in traditional transceiver front-ends introduces losses and occupies additional circuit area, in order to overcome the impact of the single-pole double-throw switch, existing technologies usually choose transformer matching networks to achieve the switching of transceiver modes and impedance matching.

[0004] However, existing transformer matching networks can lead to poor isolation of bidirectional amplifiers in signal transmission mode, which in turn reduces the power-added efficiency of the transmitter amplifier. Summary of the Invention

[0005] To solve the above-mentioned technical problems, the present invention provides a bidirectional amplifier and an electronic device, which achieves high isolation of the bidirectional amplifier's transmitted signal and high gain and low noise of the received signal without occupying additional chip area.

[0006] According to a first aspect of the present invention, a bidirectional amplifier is provided, comprising:

[0007] A low-noise amplifier module is used to amplify the signal received by the antenna, and the low-noise amplifier module includes a first-stage common-grid differential amplifier unit.

[0008] A power amplifier module is used to amplify the signal output by the antenna, and the power amplifier module includes a two-stage common-source differential amplifier unit;

[0009] The multiplexing matching network module includes a three-coil transformer unit, a first switch, and a second switch. The first winding of the three-coil transformer unit is connected to an antenna. The first end of the second winding of the three-coil transformer unit is connected to the source of the first common-gate transistor in the first-stage common-source differential amplifier unit and the drain of the first common-source transistor in the second-stage common-source differential amplifier unit. The second end of the second winding is connected to the source of the second common-gate transistor in the first-stage common-source differential amplifier unit and the drain of the second common-source transistor in the second-stage common-source differential amplifier unit. The first switch switches the first common-gate transistor according to the transmitted voltage signal. The gate is connected to the first end of the third winding in the three-coil transformer unit. The two switches connect the gate of the second common-gate transistor to the second end of the third winding according to the transmitted voltage signal, so that the second winding and the third winding are coupled in phase. The first switch also connects the gate of the first common-gate transistor to the second end of the third winding according to the received voltage signal. The second switch also connects the gate of the second common-gate transistor to the first end of the third winding according to the received voltage signal, so that the second winding and the third winding are coupled in reverse phase. Both the first switch and the second switch are embedded in the three-coil transformer unit.

[0010] Optionally, the first switch includes a first switching transistor and a second switching transistor; the first end of the first switching transistor and the first end of the second switching transistor are both connected to the gate of the first common-gate transistor, the second end of the first switch is connected to the first end of the third winding, and the second end of the second switch is connected to the second end of the third winding; the second switch includes a third switching transistor and a fourth switching transistor, the first end of the third switching transistor and the first end of the fourth switching transistor are both connected to the gate of the first common-gate transistor, the second end of the third switch is connected to the first end of the third winding, and the second end of the fourth switch is connected to the second end of the third winding;

[0011] Both the first and fourth switches are turned off according to the transmitted voltage signal, and both the second and third switches are turned on according to the transmitted voltage signal; both the first and fourth switches are turned on according to the received voltage signal, and both the second and third switches are turned off according to the received voltage signal.

[0012] Optionally, the on-resistance of the first switch and the fourth switch is equal to the off-resistance of the second switch and the third switch.

[0013] Optionally, the low-noise amplification module includes a first input matching unit, a first-stage common-grid differential amplification unit, a first-stage inter-stage matching unit, a second-stage common-source differential amplification unit, and a first output matching unit connected in series.

[0014] The first input matching unit is equivalent to the multiplexed matching network module;

[0015] The first-stage common-grid differential amplifier unit is used to amplify the signal input from the antenna in one stage, and output the amplified signal to the first-stage inter-matching unit.

[0016] The first interstage matching unit is used to perform impedance matching on the first-stage amplified signal and output the first-stage amplified signal after impedance matching to the second-stage common-source differential amplifier unit.

[0017] The secondary common-source differential amplifier unit is used to amplify the primary amplified signal output by the first inter-stage matching unit in a secondary manner, and output the amplified signal to the first output matching unit;

[0018] The first output matching unit is used to perform output impedance matching on the secondary amplified signal output by the secondary common-source differential amplifier unit.

[0019] Optionally, the first-stage common-gate differential amplifier unit includes a first common-gate transistor and a second common-gate transistor; the drain of the first common-gate transistor is connected to the first terminal of the first-stage inter-stage matching unit, and the drain of the second common-gate transistor is connected to the second terminal of the first-stage inter-stage matching unit.

[0020] The first interstage matching unit includes a first transformer, a first capacitor, and a second capacitor; the first end of the primary winding of the first transformer serves as the first end of the first interstage matching unit, and the second end of the primary winding serves as the second end of the first interstage matching unit; the first capacitor is connected between the first end of the primary winding and the first end of the secondary winding of the first transformer, and the second capacitor is connected between the second end of the primary winding and the second end of the secondary winding.

[0021] The secondary common-source differential amplifier unit includes a third common-source transistor, a fourth common-source transistor, a third capacitor, and a fourth capacitor. The gate of the third common-source transistor is connected to the first terminal of the secondary winding. The sources of both the third and fourth common-source transistors are connected to ground. The drain of the third common-source transistor is connected to the second terminal of the third capacitor. The second terminal of the third capacitor is connected to the gate of the fourth common-source transistor. The gate of the third common-source transistor is also connected to the second terminal of the second capacitor. The drain of the fourth common-source transistor is connected to the second terminal of the fourth capacitor. The first terminal of the fourth capacitor is connected to the gate of the third common-source transistor.

[0022] The first output matching unit includes a second transformer. The first end of the primary winding of the second transformer is connected to the second end of the third capacitor, the second end of the primary winding is connected to the second end of the fourth capacitor, the first end of the secondary winding of the second transformer outputs the second-stage amplified signal, and the second end of the secondary winding is connected to ground.

[0023] Optionally, the first common-gate transistor and the second common-gate transistor are both PMOS transistors; the third common-source transistor and the fourth common-source transistor are both NMOS transistors.

[0024] Optionally, the power amplification module includes a second input matching unit, a first-stage common-source differential amplification unit, a second-stage inter-stage matching unit, a second-stage common-source differential amplification unit, and a second output matching unit connected in series.

[0025] The second input matching unit is used to perform input impedance matching on the signal to be amplified, and outputs the impedance-matched signal to be amplified to the first-stage common-source differential amplifier unit;

[0026] The first-stage common-source differential amplifier unit is used to amplify the impedance-matched signal in the first stage and output the amplified signal to the second-stage inter-matching unit.

[0027] The second-stage inter-stage matching unit is used to perform impedance matching on the first-stage amplified signal and output the impedance-matched first-stage amplified signal to the second-stage common-source differential amplifier unit.

[0028] The secondary common-source differential amplifier unit is used to perform secondary amplification on the impedance-matched primary amplified signal and output the secondary amplified signal;

[0029] The second output matching unit is equivalent to the multiplexed matching network module.

[0030] Optionally, the second input matching unit includes a third transformer, the first end of the primary winding of the third transformer is connected to the signal to be amplified, and the second end of the primary winding is connected to ground; the secondary winding of the third transformer outputs the impedance-matched signal to be amplified.

[0031] The first-stage common-source differential amplifier unit includes a fifth capacitor, a sixth capacitor, a fifth common-source transistor, and a sixth common-source transistor. The first terminal of the fifth capacitor is connected to the gate of the sixth common-source transistor, and the second terminal of the fifth capacitor is connected to the drain of the fifth common-source transistor. The first terminal of the sixth capacitor is connected to the gate of the fifth common-source transistor, and the second terminal of the sixth capacitor is connected to the drain of the sixth common-source transistor. The gate of the fifth common-source transistor is also connected to the first terminal of the primary winding of the third transformer. The sources of both the fifth and sixth common-source transistors are connected to ground. The gate of the sixth common-source transistor is connected to the second terminal of the primary winding.

[0032] The second-stage matching unit includes a fourth transformer. The first end of the primary winding of the fourth transformer is connected to the drain of the fifth common-source transistor, and the second end of the primary winding is connected to the drain of the sixth common-source transistor. The secondary winding of the fourth transformer outputs the impedance-matched first-stage amplified signal to the second-stage common-source differential amplifier unit.

[0033] The secondary common-source differential amplifier unit includes: a seventh capacitor, an eighth capacitor, a first common-source transistor, and a second common-source transistor; the first terminal of the seventh capacitor is connected to the gate of the sixth common-source transistor, the second terminal of the seventh capacitor is connected to the drain of the first common-source transistor, the first terminal of the eighth capacitor is connected to the gate of the first common-source transistor, and the second terminal of the eighth capacitor is connected to the drain of the second common-source transistor; the gate of the first common-source transistor is connected to the first terminal of the secondary winding of the fourth transformer, and the sources of the first and second common-source transistors are both connected to ground; the gate of the second common-source transistor is connected to the second terminal of the secondary winding.

[0034] Optionally, the first common-source transistor, the second common-source transistor, the third common-source transistor, and the fourth common-source transistor are all NMOS transistors.

[0035] According to a second aspect of the present invention, an electronic device is provided, comprising the bidirectional amplifier provided in the first aspect of the present invention.

[0036] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0037] In the bidirectional amplifier provided by this invention, a low-noise amplification module amplifies the signal received by the antenna, a power amplification module amplifies the signal output by the antenna, and a three-coil transformer unit in the multiplexing matching network module is used as the input matching network of the low-noise amplification module and the output matching network of the power amplification module, thereby constructing a complete bidirectional amplifier structure. Since a switch connects the gate of the first common-gate transistor to the first end of the third winding in the three-coil transformer unit according to the transmitted voltage signal, and a second switch connects the gate of the second common-gate transistor to the second end of the third winding according to the transmitted voltage signal, so that the second winding and the third winding are in-phase coupled, it ensures that both the first and second common-gate transistors are turned off in the signal transmission mode of the bidirectional amplifier, thereby improving the isolation and power-added efficiency of the power amplification module in the signal transmission mode. Furthermore, since the first switch also connects the gate of the first common-gate transistor to the second end of the third winding according to the received voltage signal, and the second switch also connects the gate of the second common-gate transistor to the first end of the third winding according to the received voltage signal, so that the second winding and the third winding are in-phase coupled, it ensures high gain and low noise of the low-noise amplification module in the signal reception mode. Finally, since both the first and second switches are embedded in the three-coil transformer unit, they do not occupy additional chip area, thus offering advantages in high area efficiency and low cost. In summary, the bidirectional amplifier of this invention, without occupying additional chip area, not only improves the isolation of the power amplifier module in signal transmission mode and the power-added efficiency of the high-frequency output signal, but also ensures high gain and low noise of the low-noise amplifier module in signal reception mode. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0039] Figure 1 A schematic diagram of the circuit structure of an embodiment of a bidirectional amplifier;

[0040] Figure 2 Schematic diagram of the circuit structure of the bidirectional amplifier provided in this embodiment Figure 1 ;

[0041] Figure 3 Schematic diagram of the circuit structure of the bidirectional amplifier provided in this embodiment Figure 2 ;

[0042] Figure 4 Schematic diagram of the circuit structure of the bidirectional amplifier provided in this embodiment Figure 3 ;

[0043] Figure 5 The waveforms of the gate-source voltage of the first common-gate transistor provided in this embodiment when the second and third windings are in different coupling states;

[0044] Figure 6 A waveform diagram showing the power-added efficiency of the signal when the second and third windings are in the same-phase coupling state, as provided in this embodiment;

[0045] Figure 7 Schematic diagram of the circuit structure of the bidirectional amplifier provided in this embodiment Figure 4 ;

[0046] Figure 8 This is a three-dimensional structural diagram of the multiplexing matching network module provided in this embodiment;

[0047] Figure 9 Waveforms of multiple parameters in the low-noise amplification module provided in this embodiment Figure 1 ;

[0048] Figure 10 The second diagram shows the waveforms of multiple parameters in the low-noise amplification module provided in this embodiment. Detailed Implementation

[0049] As described in the background section, existing transformer matching networks degrade the isolation of bidirectional amplifiers in signal transmission mode, leading to a decrease in the power-added efficiency of the transmitting amplifier. The problems with the existing technology are explained below:

[0050] Figure 1 This is a schematic diagram of the circuit structure of an embodiment of a bidirectional amplifier.

[0051] Please refer to Figure 1 The bidirectional amplifier includes a three-coil transformer 310, a low-noise amplifier 110, and a power amplifier 210.

[0052] The low-noise amplifier 110 amplifies and outputs the signal received by the antenna. The low-noise amplifier 110 includes a first input matching network, a first-stage common-gate differential amplifier 111, a first-stage inter-stage matching network 112, a second-stage common-source differential amplifier 113, and a first output matching network 114. The first-stage common-gate differential amplifier 111 includes a first common-gate PMOS transistor p1 and a second common-gate PMOS transistor p2. The drain of the first common-gate PMOS transistor p1 is connected to the first terminal of the first-stage inter-stage matching network 112, and the drain of the second common-gate PMOS transistor p2 is connected to the second terminal of the first-stage inter-stage matching network 112. The second-stage common-source differential amplifier 113 is specifically an NNOS common-source differential amplifier with a neutralizing capacitor. The first-stage inter-stage matching network 112 and the first output matching network 114 are both conventional transformers.

[0053] The power amplifier 210 is used to amplify the signal that needs to be output through the antenna and output by the antenna. The power amplifier 210 includes a second output matching network, a second-stage common-source differential amplifier 211, a second-stage interstage matching network 212, a first-stage common-source differential amplifier 213, and a second input matching network 214. The second-stage common-source differential amplifier 211 includes a first common-source NMOS transistor n1, a second common-source NMOS transistor n2, a first common-source capacitor c1, and a second common-source capacitor c2. The sources of the first common-source NMOS transistor n1 and the second common-source NMOS transistor n2 are both connected to ground. The gate of the first common-source NMOS transistor n1 is connected to the first end of the second-stage interstage matching network 212, and the gate of the second common-source NMOS transistor n2 is connected to the second end of the second-stage interstage matching network 212. The first common-source capacitor C1 is connected between the drain of the first common-source NMOS transistor n1 and the gate of the second common-source NMOS transistor n2, and the second common-source capacitor C2 is connected between the drain of the second common-source NMOS transistor n2 and the gate of the first common-source NMOS transistor n1. The first-stage common-source differential amplifier 213 is specifically an NNOS common-source differential amplifier with a neutralizing capacitor. The second-stage inter-stage matching network 212 and the second input matching network 214 are both conventional transformers.

[0054] The three-coil transformer 310 is a multiplexed structure of the first input matching network and the second output matching network. The three-coil transformer 310 includes a first winding l1, a second winding l2, and a third winding l3 that share the same magnetic core structure. The first winding l1 is connected to the antenna. The first end of the second winding l2 is connected to the source of the first common-gate PMOS transistor p1 and the drain of the first common-source NMOS transistor n1, respectively. The second end of the second winding l2 is connected to the source of the second common-gate PMOS transistor p2 and the drain of the second common-source NMOS transistor n2, respectively. The first end of the third winding l3 is connected to the gate of the second common-gate PMOS transistor p2, and the second end of the third winding l3 is connected to the gate of the first common-gate PMOS transistor p1, so that the second winding l2 and the third winding l3 are in an anti-phase coupling state.

[0055] When the antenna receives an external input signal, the power amplifier stops working, and the low-noise amplifier 110 filters and amplifies the signal input to the antenna. Since the second winding l2 and the third winding l3 are in an anti-phase coupling state, the high gain and low noise of the low-noise amplifier 110 are ensured.

[0056] The problem with this scheme is that when a signal needs to be transmitted externally via the antenna, the power amplifier amplifies the internal signal to be output and then outputs it through the antenna. At this time, the low-noise amplifier 110 should stop working; that is, the first common-gate PMOS transistor p1 and the second common-gate PMOS transistor p2 should be turned off to ensure the transmission isolation of the power amplifier. Although at this time, the gate voltages of the first common-gate PMOS transistor p1 and the second common-gate PMOS transistor p2 will be greater than their source voltages due to the DC voltage difference (for example, the gate voltage of the first common-gate PMOS transistor p1 is 2.2V, while the source voltage is 1.1V), this would turn off the first common-gate PMOS transistor p1. However, because the second winding l2 and the third winding l3 are in an anti-phase coupling state, the gate voltage of the first common-gate PMOS transistor p1 decreases with the output signal of the power amplifier, and the source voltage of the first common-gate PMOS transistor p1 increases with the output signal of the power amplifier. Ultimately, the source voltage of the first common-gate PMOS transistor p1 becomes greater than the gate voltage, causing the first common-gate PMOS transistor p1 to be turned on in signal transmission mode, and the second common-gate PMOS transistor p2 is similarly turned on. The turning on of the first common-gate PMOS transistor p1 and the second common-gate PMOS transistor p2 is equivalent to connecting a small resistor in parallel with the drain of the first common-source NMOS transistor n1 and the drain of the second common-source NMOS transistor n2, respectively. This severely degrades the transmission efficiency of the signals output from the drains of the first common-source NMOS transistor n1 and the second common-source NMOS transistor n2, thereby greatly reducing the power output power of the power amplifier.

[0057] In view of this, the technical solution of the present invention provides a novel bidirectional amplifier, including a low-noise amplification module, a power amplification module, and a multiplexing matching network module. The multiplexing matching network module includes a three-coil transformer unit, a first switch, and a second switch. The first and second switches switch the second and third windings of the three-coil transformer unit in-phase coupling according to the transmitted voltage signal, and switch the second and third windings in-phase coupling according to the received voltage signal, thereby achieving high isolation of the transmitted signal and high gain and low noise of the received signal. Furthermore, since the first and second switches are both embedded in the three-coil transformer unit, they do not occupy additional chip area, offering advantages of high area efficiency and low cost. In summary, the bidirectional amplifier of the present invention, without occupying additional chip area, not only improves the isolation and power-added efficiency of the power amplification module in signal transmission mode, but also ensures high gain and low noise of the low-noise amplification module in signal reception mode.

[0058] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0059] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0060] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0061] Figure 2 Schematic diagram of the circuit structure of the bidirectional amplifier provided in this embodiment Figure 1 . Figure 3 Schematic diagram of the circuit structure of the bidirectional amplifier provided in this embodiment Figure 2 .

[0062] Please refer to Figure 2 The bidirectional amplifier provided in this embodiment includes a low-noise amplification module 10, a power amplification module 20, and a multiplexing matching network module 30.

[0063] The low-noise amplifier module 10 amplifies the signal received by the antenna and outputs it to the subsequent equipment, while the power amplifier module 20 stops working. The low-noise amplifier module 10, starting from the first input matching unit, includes a first input matching unit, a first-stage common-grid differential amplifier unit 11, a first-stage inter-stage matching unit 12, a second-stage common-source differential amplifier unit 13, and a first output matching unit 14 connected in series.

[0064] Please refer to Figure 2 and Figure 3 Specifically, as a first-stage amplification structure of the low-noise amplification module 10, the first-stage common-gate differential amplification unit 11 is used to amplify the signal input from the antenna and output the amplified signal to the first-stage inter-stage matching unit 12. Further, the first-stage common-gate differential amplification unit 11 includes a first common-gate transistor P1 and a second common-gate transistor P2. The drain of the first common-gate transistor P1 is connected to the first terminal of the first-stage inter-stage matching unit 12, and the drain of the second common-gate transistor P2 is connected to the second terminal of the first-stage inter-stage matching unit 12. In this embodiment, both the first common-gate transistor P1 and the second common-gate transistor P2 are PMOS transistors.

[0065] Please continue to refer to this. Figure 2 and Figure 3 Specifically, the first-stage matching unit 12 is used to perform impedance matching on the first-stage amplified signal output from the first-stage common-gate differential amplifier unit 11, and outputs the impedance-matched first-stage amplified signal to the second-stage common-source differential amplifier unit 13. Further, the first-stage matching unit 12 includes a first transformer Ts1, a first capacitor C1, and a second capacitor C2; the first end of the primary winding of the first transformer Ts1 serves as the first end of the first-stage matching unit 12, and the second end of the primary winding serves as the second end of the first-stage matching unit 12. The first capacitor C1 is connected between the first end of the primary winding and the first end of the secondary winding of the first transformer Ts1, and the second capacitor C2 is connected between the second end of the primary winding and the second end of the secondary winding.

[0066] Please continue to refer to this. Figure 2 and Figure 3Specifically, the secondary common-source differential amplifier unit 13 is used to perform secondary amplification on the primary amplified signal output from the primary inter-stage matching unit 12, and outputs the amplified signal to the primary output matching unit 14. Further, the secondary common-source differential amplifier unit 13 includes a third common-source transistor N3, a fourth common-source transistor N4, a third capacitor C3, and a fourth capacitor C4; the gate of the third common-source transistor N3 is connected to the first terminal of the secondary winding of the first transformer Ts1; the sources of the third common-source transistor N3 and the fourth common-source transistor N4 are both connected to ground; the drain of the third common-source transistor N3 is connected to the second terminal of the third capacitor C3; the second terminal of the third capacitor C3 is connected to the gate of the fourth common-source transistor N4; the gate of the third common-source transistor N3 is also connected to the second terminal of the second capacitor C2; the drain of the fourth common-source transistor N4 is connected to the second terminal of the fourth capacitor C4; the first terminal of the fourth capacitor C4 is connected to the gate of the third common-source transistor N3. In this embodiment, both the third common-source transistor N3 and the fourth common-source transistor N4 are NMOS transistors.

[0067] Please continue to refer to this. Figure 2 and Figure 3 Specifically, the first output matching unit 14 is used to perform output impedance matching on the amplified signal output by the second-stage common-source differential amplifier unit 13. Further, the first output matching unit 14 includes a second transformer Ts2. The first end of the primary winding of the second transformer Ts2 is connected to the second end of the third capacitor C3, and the second end of the primary winding is connected to the second end of the fourth capacitor C4. The first end of the secondary winding of the second transformer Ts2 outputs the second-stage amplified signal, and the second end of the secondary winding is connected to ground.

[0068] The power amplifier module 20 amplifies the signal that needs to be output through the antenna and outputs it through the antenna, while the low-noise amplifier module 10 stops working at this time. The power amplifier module 20 includes, starting from the second input matching unit 24, a first-stage common-source differential amplifier unit 23, a second-stage inter-stage matching unit 22, a second-stage common-source differential amplifier unit 21, and a second output matching unit connected in series.

[0069] Please continue to refer to this. Figure 2 and Figure 3 Specifically, the second input matching unit 24 is used to perform input impedance matching on the signal to be amplified, and outputs the impedance-matched signal to the first-stage common-source differential amplifier unit 23. Further, the second input matching unit 24 includes a third transformer Ts2, with the first end of the primary winding of the third transformer Ts2 connected to the signal to be amplified, and the second end of the primary winding connected to ground; the secondary winding of the third transformer Ts2 outputs the impedance-matched signal to be amplified.

[0070] Please continue to refer to this. Figure 2 and Figure 3Specifically, the first-stage common-source differential amplifier unit 23 is used to amplify the impedance-matched signal to be amplified in one stage, and outputs the amplified signal to the second-stage inter-matching unit 22. Further, the first-stage common-source differential amplifier unit 23 includes a fifth capacitor C5, a sixth capacitor C6, a fifth common-source transistor N5, and a sixth common-source transistor N6; the first terminal of the fifth capacitor C5 is connected to the gate of the sixth common-source transistor N6, and the second terminal of the fifth capacitor C5 is connected to the drain of the fifth common-source transistor N5; the first terminal of the sixth capacitor C6 is connected to the gate of the fifth common-source transistor N5, and the second terminal of the sixth capacitor C6 is connected to the drain of the sixth common-source transistor N6; the gate of the fifth common-source transistor N5 is also connected to the first terminal of the primary winding of the third transformer Ts2, and the sources of both the fifth common-source transistor N5 and the sixth common-source transistor N6 are connected to ground; the gate of the sixth common-source transistor N6 is connected to the second terminal of the primary winding. In this embodiment, both the fifth common-source transistor N5 and the sixth common-source transistor N6 are NMOS transistors.

[0071] Please continue to refer to this. Figure 2 and Figure 3 Specifically, the second-stage matching unit 22 is used to perform impedance matching on the first-stage amplified signal and output the impedance-matched first-stage amplified signal to the second-stage common-source differential amplifier unit 21. Further, the second-stage matching unit 22 includes a fourth transformer Ts4. The first end of the primary winding of the fourth transformer Ts4 is connected to the drain of the fifth common-source transistor N5, and the second end of the primary winding is connected to the drain of the sixth common-source transistor N6. The secondary winding of the fourth transformer Ts4 outputs the impedance-matched first-stage amplified signal to the second-stage common-source differential amplifier unit 21.

[0072] Please continue to refer to this. Figure 2 and Figure 3 Specifically, the secondary common-source differential amplifier unit 21 is used to perform secondary amplification on the impedance-matched primary amplified signal and output the secondary amplified signal. Further, the secondary common-source differential amplifier unit includes: a seventh capacitor C7, an eighth capacitor C8, a first common-source transistor N1, and a second common-source transistor N2; the first terminal of the seventh capacitor C7 is connected to the gate of the sixth common-source transistor N6, and the second terminal of the seventh capacitor C7 is connected to the drain of the first common-source transistor N1; the first terminal of the eighth capacitor C8 is connected to the gate of the first common-source transistor N1, and the second terminal of the eighth capacitor C8 is connected to the drain of the second common-source transistor N2; the gate of the first common-source transistor N1 is connected to the first terminal of the secondary winding of the fourth transformer Ts4, and the sources of both the first and second common-source transistors N1 and N2 are connected to ground; the gate of the second common-source transistor N2 is connected to the second terminal of the secondary winding. In this embodiment, both the first and second common-source transistors N1 and N2 are NMOS transistors.

[0073] The multiplexing matching network module 30 is equivalent to the first input matching unit, performing input impedance matching on the signal input to the antenna and outputting it to the first-stage common-gate differential amplifier unit 11. Simultaneously, the multiplexing matching network module 30 is also equivalent to the second output matching unit, performing output impedance matching on the second-stage amplified signal output from the second-stage common-source differential amplifier unit 21 and outputting it through the antenna. Therefore, the multiplexing matching network module 30 simultaneously multiplexes as both the first input matching unit and the second output matching unit. The multiplexing matching network module 30 includes a three-coil transformer unit, a first switch SW1, and a second switch SW2.

[0074] Please continue to refer to this. Figure 2 and Figure 3 Specifically, the three-coil transformer unit includes a first winding L1, a second winding L2, and a third winding L3; the first winding L1 is connected to the antenna; the first end of the second winding L2 is connected to the source of the first common-gate transistor P1 and the drain of the first common-source transistor N1, respectively, and the second end of the second winding L2 is connected to the source of the second common-gate transistor P2 and the drain of the second common-source transistor N2, respectively; the first end of the third winding L3 is connected to the second end of the first switch SW1 and the second end of the second switch SW2, respectively, and the second end of the third winding L3 is connected to the third end of the first switch SW1 and the third end of the second switch SW2, respectively.

[0075] The first terminal of the first switch SW1 is connected to the gate of the first common gate transistor P1, and the first terminal of the second switch SW2 is connected to the gate of the second common gate transistor P2.

[0076] Please refer to Figure 4 When an antenna output signal is required, i.e., the bidirectional amplifier is in signal transmission mode, the external controller inputs a transmission voltage signal to the first switch SW1 and the second switch SW2. The first switch SW1 connects its first terminal to its second terminal according to the transmission voltage signal, so that the gate of the first common gate transistor P1 is connected to the first terminal of the third winding L3. The second switch SW2 connects its first terminal to its third terminal according to the transmission voltage signal, so that the gate of the second common gate transistor P2 is connected to the second terminal of the third winding L3.

[0077] At this time, the second winding L2 and the third winding L3 are in a state of in-phase coupling, so that the gate voltage and source voltage of the first common-gate transistor P1 and the second common-gate transistor P2 are in a state of in-phase change. For example, if the gate voltage increases due to the AC voltage, the source voltage also increases; if the gate voltage decreases due to the AC voltage, the source voltage also decreases. Furthermore, because the gate-source voltage of the first common-gate transistor P1 will be less than the turn-on threshold voltage of the PMOS transistor in signal transmission mode due to the inherent DC voltage difference (for example, the source voltage of the first common-gate transistor P1 is 1.1V, and the gate voltage is 2.2V), both the gate-source voltage of the first common-gate transistor P1 and the gate-source voltage of the second common-gate transistor P2 will be stably lower than their respective turn-on threshold voltages when the bidirectional amplifier is in signal transmission mode. This ensures that both the first common-gate transistor P1 and the second common-gate transistor P2 are turned off when the bidirectional amplifier is in signal transmission mode, thereby greatly improving the isolation of the power amplifier module 20.

[0078] Taking the first common-gate transistor P1 as an example, please refer to... Figure 5 When the bidirectional amplifier is in signal transmission mode, Figure 5 The dashed line represents the gate-source voltage waveform of the first common-gate transistor P1 when the second winding L2 and the third winding L3 are in anti-phase coupling; the solid line represents the gate-source voltage waveform of the first common-gate transistor P1 when the second winding L2 and the third winding L3 are in in-phase coupling. Figure 5 As can be seen, when the second winding L2 and the third winding L3 are in an anti-phase coupling state, the maximum value of the gate-source voltage of the first common-gate transistor P1 will reach more than 1.5V, thus causing the first common-gate transistor P1 to be turned on. However, when the second winding L2 and the third winding L3 are in a non-phase coupling state, the maximum value of the gate-source voltage of the first common-gate transistor P1 is only 0.2V, thus ensuring that the first common-gate transistor P1 is turned off.

[0079] When the antenna output signal is required, in addition to the first common gate transistor P1 and the second common gate transistor P2 being turned off, the third common source transistor N3 and the fourth common source transistor N4 also need to be turned off. Therefore, the bias connected to the secondary winding of the first transformer Ts1 is set to ground.

[0080] In addition, please refer to Figure 6 , Figure 6The solid line represents the power-added efficiency (PEP) of the signal as a function of frequency when the second winding L2 and the third winding L3 are in phase coupling. The dashed line represents the PEP of the signal as a function of frequency when the second winding L2 and the third winding L3 are in phase coupling. It is clear from the figures that when the transmitted signal is at a high frequency, the PEP of the signal corresponding to the dashed line decreases significantly with increasing frequency, while the PEP of the signal corresponding to the solid line remains stable with increasing frequency. Therefore, it can be seen that in the bidirectional amplifier's signal transmission mode, this embodiment effectively stabilizes the PEP of the high-frequency output signal by setting the second winding L2 and the third winding L3 to a phase coupling state through the first switch SW1 and the second switch SW2.

[0081] The reason why the anti-phase coupling of the second winding L2 and the third winding L3 degrades the power-added efficiency of the high-frequency output signal is that this anti-phase coupling causes the first common-gate transistor P1 and the second common-gate transistor P2 to conduct. The conduction of the first common-gate transistor P1 and the second common-gate transistor P2 is equivalent to connecting a small resistor in parallel at the output of the two-stage common-source differential amplifier unit. As the frequency of the transmitted signal increases, the small parallel resistor greatly increases the signal attenuation, thus severely degrading the power-added efficiency of the signal to be transmitted.

[0082] Please refer to Figure 7 When the antenna receives a signal, i.e. the bidirectional amplifier is in signal receiving state, the external controller inputs the received voltage signal to the first switch SW1 and the second switch SW2. The first switch SW1 connects its first terminal to its third terminal according to the received voltage signal, so that the gate of the first common gate transistor P1 is connected to the second terminal of the third winding L3; the second switch SW2 connects its first terminal to its second terminal according to the received voltage signal, so that the gate of the second common gate transistor P2 is connected to the first terminal of the third winding L3.

[0083] At this time, the second winding L2 and the third winding L3 are in an anti-phase coupling state, so that the gate voltage and source voltage of the first common-gate transistor P1 and the second common-gate transistor P2 are both in an anti-phase state. For example, the gate voltage of the first common-gate transistor P1 is biased at 0.47V, while the source of the first common-gate transistor P1 is connected to a power supply of 1.1V, so that the source-gate voltage of the first common-gate transistor P1 is greater than the transistor's turn-on voltage, thereby turning on the first common-gate transistor P1. The second common-gate transistor P2 is also turned on in the same way. At the same time, the bias voltage connected to the secondary winding of the first transformer Ts1 is 0.49V.

[0084] To ensure the isolation of the low-noise amplifier module 10 when the bidirectional amplifier is in signal receiving mode, all common-source transistors in the power amplifier module 20 must be turned off. Therefore, the secondary winding of the fourth transformer Ts4 is biased to ground, thereby turning off the first common-source transistor N1, the second common-source transistor, the fifth common-source transistor N5, and the sixth common-source transistor N6.

[0085] Please refer to Figure 8 ,from Figure 8 It is evident that in the actual structure, the first switch SW1 and the second switch SW2 are both embedded in the three-coil transformer unit, i.e., the three-coil transformer, thus eliminating the need to occupy additional chip area, thereby improving the utilization rate of chip area and reducing circuit cost.

[0086] Specifically, the first switch SW1 includes a first switch transistor SW1 and a second switch transistor SW2. The first terminals of both SW1 and SW2 are connected to the gate of the first common-gate transistor P1. The second terminal of SW1 is connected to the first terminal of the third winding L3, and the second terminal of SW2 is connected to the second terminal of the third winding L3. The second switch SW2 includes a third switch transistor and a fourth switch transistor. The first terminals of both the third and fourth switches are connected to the gate of the first common-gate transistor P1. The second terminal of the third switch transistor is connected to the first terminal of the third winding L3, and the second terminal of the fourth switch transistor is connected to the second terminal of the third winding L3.

[0087] When the bidirectional amplifier is in signal receiving mode, both the first switch SW1 and the fourth switch are turned off according to the transmitted voltage signal, while both the second switch SW2 and the third switch are turned on according to the transmitted voltage signal. When the bidirectional amplifier is in signal transmitting mode, both the first switch SW1 and the fourth switch are turned on according to the received voltage signal, while both the second switch SW2 and the third switch are turned off according to the received voltage signal.

[0088] To avoid worsening the noise of the received signal in the low-noise amplifier module 10, it is necessary to set up large-sized second switch SW2 and third switch to reduce their on-resistance; at the same time, small-sized first switch SW1 and fourth switch are set up to increase their off-resistance.

[0089] However, if the dimensions of the second switch SW2 and the third switch are set too large, their turn-off impedance will be less than the on-resistance of the first switch SW1 and the fourth switch. This will prevent the second winding L2 and the third winding L3 from being in-phase coupled, thus preventing the first common-gate transistor P1 and the second common-gate transistor P2 from being turned off when the bidirectional amplifier is in signal transmission mode. If the dimensions of the first switch SW1 and the fourth switch are set too small, their on-resistance will be too large, which will also cause problems with the isolation of the power amplifier module 20.

[0090] Therefore, in order to balance the received noise of the low-noise amplifier module 10 and the isolation of the power amplifier module 20, the on-resistance of the first switch SW1 and the fourth switch can be set to be equal to the off-resistance of the second switch SW2 and the third switch.

[0091] Please refer to Figure 9 and Figure 10 , Figure 9 This is a waveform diagram showing how various parameters change with frequency when the first switch SW1 and the second switch SW2 are not embedded in the three-coil transformer unit and the low-noise amplifier is working. Figure 10 This is a waveform diagram showing how various parameters change with frequency when the first switch SW1 and the second switch SW2 are embedded in the three-coil transformer unit and the low-noise amplifier is working. Figure 9 and Figure 10 In the diagram, S21 is used to characterize the gain of the low-noise amplifier module; NF (Noise Figure) is used to characterize the received noise; and S11 and S12 together are used to characterize the signal transmission loss.

[0092] from Figure 9 and Figure 10 It can be clearly seen that embedding the first switch SW1 and the second switch SW2 in the three-coil transformer unit only degrades the receiving noise of the low-noise amplifier module 10 by 0.5dB, while keeping the gain unchanged. Therefore, the low noise and high gain of the low-noise amplifier module 10 are guaranteed.

[0093] In summary, the bidirectional amplifier provided in this embodiment switches the coupling state of the second and third windings in the three-coil transformer unit by using the first and second switches embedded in the three-coil transformer unit, depending on the signal receiving mode and the signal transmitting mode. This not only improves the isolation of the power amplifier module in the signal transmitting mode and the power-added efficiency of the high-frequency output signal, but also ensures the high gain and low noise of the low-noise amplifier module in the signal receiving mode, without occupying additional chip area.

[0094] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A bidirectional amplifier, characterized in that, include: A low-noise amplifier module is used to amplify the signal received by the antenna, and the low-noise amplifier module includes a first-stage common-grid differential amplifier unit. A power amplifier module is used to amplify the signal output by the antenna, and the power amplifier module includes a two-stage common-source differential amplifier unit; The multiplexing matching network module includes a three-coil transformer unit, a first switch, and a second switch. The first winding of the three-coil transformer unit is connected to an antenna. The first end of the second winding of the three-coil transformer unit is connected to the source of the first common-gate transistor in the first-stage common-source differential amplifier unit and the drain of the first common-source transistor in the second-stage common-source differential amplifier unit. The second end of the second winding is connected to the source of the second common-gate transistor in the first-stage common-source differential amplifier unit and the drain of the second common-source transistor in the second-stage common-source differential amplifier unit. The first switch switches the first common-gate transistor according to the transmitted voltage signal. The gate is connected to the first end of the third winding in the three-coil transformer unit. The two switches connect the gate of the second common-gate transistor to the second end of the third winding according to the transmitted voltage signal, so that the second winding and the third winding are coupled in phase. The first switch also connects the gate of the first common-gate transistor to the second end of the third winding according to the received voltage signal. The second switch also connects the gate of the second common-gate transistor to the first end of the third winding according to the received voltage signal, so that the second winding and the third winding are coupled in reverse phase. Both the first switch and the second switch are embedded in the three-coil transformer unit.

2. The bidirectional amplifier according to claim 1, characterized in that, The first switch includes a first switching transistor and a second switching transistor; the first end of the first switching transistor and the first end of the second switching transistor are both connected to the gate of the first common-gate transistor, the second end of the first switch is connected to the first end of the third winding, and the second end of the second switch is connected to the second end of the third winding; the second switch includes a third switching transistor and a fourth switching transistor, the first end of the third switching transistor and the first end of the fourth switching transistor are both connected to the gate of the first common-gate transistor, the second end of the third switch is connected to the first end of the third winding, and the second end of the fourth switch is connected to the second end of the third winding; Both the first and fourth switches are turned off according to the transmitted voltage signal, and both the second and third switches are turned on according to the transmitted voltage signal; both the first and fourth switches are turned on according to the received voltage signal, and both the second and third switches are turned off according to the received voltage signal.

3. The bidirectional amplifier according to claim 2, characterized in that, The on-resistance of the first switch and the fourth switch is equal to the off-resistance of the second switch and the third switch.

4. The bidirectional amplifier according to claim 1, characterized in that, The low-noise amplification module includes a first input matching unit, a first-stage common-grid differential amplification unit, a first-stage inter-stage matching unit, a second-stage common-source differential amplification unit, and a first output matching unit connected in series. The first input matching unit is equivalent to the multiplexed matching network module; The first-stage common-grid differential amplifier unit is used to amplify the signal input from the antenna in one stage, and output the amplified signal to the first-stage inter-matching unit. The first interstage matching unit is used to perform impedance matching on the first-stage amplified signal and output the first-stage amplified signal after impedance matching to the second-stage common-source differential amplifier unit. The secondary common-source differential amplifier unit is used to amplify the primary amplified signal output by the first inter-stage matching unit in a secondary manner, and output the amplified signal to the first output matching unit; The first output matching unit is used to perform output impedance matching on the secondary amplified signal output by the secondary common-source differential amplifier unit.

5. The bidirectional amplifier according to claim 4, characterized in that, The first-stage common-gate differential amplifier unit includes a first common-gate transistor and a second common-gate transistor; the drain of the first common-gate transistor is connected to the first terminal of the first-stage inter-matching unit, and the drain of the second common-gate transistor is connected to the second terminal of the first-stage inter-matching unit. The first interstage matching unit includes a first transformer, a first capacitor, and a second capacitor; the first end of the primary winding of the first transformer serves as the first end of the first interstage matching unit, and the second end of the primary winding serves as the second end of the first interstage matching unit; the first capacitor is connected between the first end of the primary winding and the first end of the secondary winding of the first transformer, and the second capacitor is connected between the second end of the primary winding and the second end of the secondary winding. The secondary common-source differential amplifier unit includes a third common-source transistor, a fourth common-source transistor, a third capacitor, and a fourth capacitor. The gate of the third common-source transistor is connected to the first terminal of the secondary winding. The sources of both the third and fourth common-source transistors are connected to ground. The drain of the third common-source transistor is connected to the second terminal of the third capacitor. The second terminal of the third capacitor is connected to the gate of the fourth common-source transistor. The gate of the third common-source transistor is also connected to the second terminal of the second capacitor. The drain of the fourth common-source transistor is connected to the second terminal of the fourth capacitor. The first terminal of the fourth capacitor is connected to the gate of the third common-source transistor. The first output matching unit includes a second transformer. The first end of the primary winding of the second transformer is connected to the second end of the third capacitor, the second end of the primary winding is connected to the second end of the fourth capacitor, the first end of the secondary winding of the second transformer outputs the second-stage amplified signal, and the second end of the secondary winding is connected to ground.

6. The bidirectional amplifier according to claim 5, characterized in that, The first common-gate transistor and the second common-gate transistor are both PMOS transistors; the third common-source transistor and the fourth common-source transistor are both NMOS transistors.

7. The bidirectional amplifier according to claim 1, characterized in that, The power amplification module includes a second input matching unit, a first-stage common-source differential amplification unit, a second-stage inter-stage matching unit, a second-stage common-source differential amplification unit, and a second output matching unit connected in series. The second input matching unit is used to perform input impedance matching on the signal to be amplified, and outputs the impedance-matched signal to be amplified to the first-stage common-source differential amplifier unit; The first-stage common-source differential amplifier unit is used to amplify the impedance-matched signal in the first stage and output the amplified signal to the second-stage inter-matching unit. The second-stage inter-matching unit is used to perform impedance matching on the first-stage amplified signal and output the impedance-matched first-stage amplified signal to the second-stage common-source differential amplifier unit. The secondary common-source differential amplifier unit is used to perform secondary amplification on the impedance-matched primary amplified signal and output the secondary amplified signal; The second output matching unit is equivalent to the multiplexed matching network module.

8. The bidirectional amplifier according to claim 7, characterized in that, The second input matching unit includes a third transformer, the first end of the primary winding of the third transformer is connected to the signal to be amplified, and the second end of the primary winding is connected to ground; the secondary winding of the third transformer outputs the impedance-matched signal to be amplified. The first-stage common-source differential amplifier unit includes a fifth capacitor, a sixth capacitor, a fifth common-source transistor, and a sixth common-source transistor. The first terminal of the fifth capacitor is connected to the gate of the sixth common-source transistor, and the second terminal of the fifth capacitor is connected to the drain of the fifth common-source transistor. The first terminal of the sixth capacitor is connected to the gate of the fifth common-source transistor, and the second terminal of the sixth capacitor is connected to the drain of the sixth common-source transistor. The gate of the fifth common-source transistor is also connected to the first terminal of the primary winding of the third transformer. The sources of both the fifth and sixth common-source transistors are connected to ground. The gate of the sixth common-source transistor is connected to the second terminal of the primary winding. The second-stage matching unit includes a fourth transformer. The first end of the primary winding of the fourth transformer is connected to the drain of the fifth common-source transistor, and the second end of the primary winding is connected to the drain of the sixth common-source transistor. The secondary winding of the fourth transformer outputs the impedance-matched first-stage amplified signal to the second-stage common-source differential amplifier unit. The secondary common-source differential amplifier unit includes: a seventh capacitor, an eighth capacitor, a first common-source transistor, and a second common-source transistor; The first terminal of the seventh capacitor is connected to the gate of the sixth common-source transistor, the second terminal of the seventh capacitor is connected to the drain of the first common-source transistor, the first terminal of the eighth capacitor is connected to the gate of the first common-source transistor, and the second terminal of the eighth capacitor is connected to the drain of the second common-source transistor; the gate of the first common-source transistor is connected to the first terminal of the secondary winding of the fourth transformer, and the sources of the first common-source transistor and the second common-source transistor are both connected to ground; the gate of the second common-source transistor is connected to the second terminal of the secondary winding.

9. The bidirectional amplifier according to claim 8, characterized in that, The first common-source transistor, the second common-source transistor, the fifth common-source transistor, and the sixth common-source transistor are all NMOS transistors.

10. An electronic device, characterized in that, Includes the bidirectional amplifier as described in any one of claims 1 to 9.

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