EtherCAT slave station gateway for semiconductor temperature control equipment
By designing an EtherCAT slave gateway for semiconductor temperature control equipment, efficient data transmission between the semiconductor production equipment host and the Chiller was achieved, solving protocol compatibility issues, improving the real-time performance of data transmission and system stability, and meeting the high precision and high stability requirements of semiconductor production.
Patent Information
- Application Number
- CN202511641334.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-11
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2045-11-11
AI Technical Summary
There are protocol compatibility issues between existing semiconductor temperature control equipment and main production equipment, resulting in data transmission delays and reduced reliability, making it difficult to meet microsecond-level response requirements. Furthermore, traditional conversion equipment has low hardware integration and poor software scalability, making it unable to adapt to the personalized communication needs of different models of temperature control equipment.
Design an EtherCAT slave gateway for semiconductor temperature control equipment. The architecture adopts a hardware and software layer working together. The hardware layer integrates power supply, master control, Ethernet communication and EtherCAT slave module. The software layer adopts a layered embedded software system to realize efficient data transmission between the semiconductor production equipment host and the Chiller.
It improves the real-time performance and accuracy of data transmission, enhances the stability and maintainability of the system, adapts to the high precision and stability requirements of temperature control in semiconductor production, and improves production quality and efficiency.
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Figure CN121098666A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of automation control technology, and in particular to an EtherCAT slave gateway for semiconductor temperature control equipment. Background Technology
[0002] In semiconductor manufacturing, temperature control accuracy directly impacts product quality and production yield. Semiconductor temperature control equipment (such as chillers), as critical auxiliary equipment, needs to maintain real-time data interaction with the main production equipment to achieve precise temperature regulation. With the development of industrial automation technology, the EtherCAT protocol, due to its high real-time performance, high bandwidth, and distributed control capabilities, has become one of the mainstream standards for industrial Ethernet communication and is widely used in equipment interconnection in precision manufacturing fields such as semiconductors.
[0003] However, existing semiconductor temperature control equipment mostly uses traditional protocols such as Modbus for communication, which presents protocol compatibility issues with master production equipment based on the EtherCAT protocol. This necessitates complex intermediate conversion devices for data exchange, increasing system deployment costs and causing data transmission delays and reduced reliability due to multiple conversion stages, making it difficult to meet the microsecond-level response requirements of semiconductor production for temperature control. Furthermore, traditional conversion devices are often single-function designs with low hardware integration and poor software scalability, failing to adapt to the personalized communication needs of different temperature control equipment models, thus causing inconvenience for system maintenance and upgrades. Therefore, developing an EtherCAT slave gateway specifically designed for semiconductor temperature control equipment to solve protocol compatibility issues and improve communication efficiency and flexibility has become an urgent need in the industry. Summary of the Invention
[0004] In view of this, embodiments of this application provide an EtherCAT slave gateway for semiconductor temperature control equipment, which enables data transmission between the host of semiconductor production equipment and the Chiller based on the EtherCAT protocol, improving the real-time performance, accuracy and system maintainability of data transmission, and adapting to the high precision and high stability requirements of temperature control in semiconductor production.
[0005] The technical solution of this application embodiment is implemented as follows: This application provides an EtherCAT slave gateway for semiconductor temperature control equipment. The gateway includes a hardware layer and a software layer. The hardware layer is an embedded semiconductor industrial equipment communication gateway, which includes a power supply module, a master control module, an Ethernet communication module, an EtherCAT slave module, and a 24V input / output port module. The software layer is an embedded software system with a layered architecture, which includes an application layer, a protocol layer, and a hardware abstraction layer. The hardware layer and the software layer work together to realize data transmission between the semiconductor production equipment host and the semiconductor temperature control equipment (Chiller) based on the EtherCAT protocol.
[0006] The embodiments of this application have the following beneficial effects: Through a collaborative architecture design of hardware and software layers, efficient data interaction based on the EtherCAT protocol is achieved between the semiconductor manufacturing equipment host and the temperature control device (chiller). The hardware layer integrates core modules such as power supply, main control, Ethernet communication, EtherCAT slave stations, and 24V input / output ports, meeting the stable operation requirements in industrial environments. The software layer adopts a layered design of application layer, protocol layer, and hardware abstraction layer, achieving functional decoupling and flexible expansion. This architecture effectively solves the problem of insufficient compatibility between traditional temperature control devices and industrial Ethernet systems, providing reliable communication support for real-time temperature monitoring and precise control in semiconductor manufacturing processes. It not only improves the real-time performance and accuracy of data transmission between devices but also enhances system stability and maintainability, laying a crucial foundation for improving the quality and efficiency of semiconductor product manufacturing. Attached Figure Description
[0007] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0008] Figure 1 This is a hardware structure diagram provided in the embodiments of this application; Figure 2 This is a software structure diagram provided in the embodiments of this application; Figure 3 This is a schematic diagram of the data transmission flow provided in the embodiments of this application. Detailed Implementation
[0009] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. It should be understood that the accompanying drawings in this application are for illustrative and descriptive purposes only and are not intended to limit the scope of protection of this application. Furthermore, it should be understood that the schematic drawings are not drawn to scale. The flowcharts used in this application illustrate operations implemented according to some embodiments of this application. It should be understood that the operations in the flowcharts may not be implemented in sequence, and steps without logical contextual relationships may be reversed or implemented simultaneously. In addition, those skilled in the art, guided by the content of this application, may add one or more other operations to the flowcharts, or remove one or more operations from the flowcharts.
[0010] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0011] Furthermore, the described embodiments are merely some, not all, of the embodiments of this application. The components of the embodiments of this application described and illustrated herein can typically be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
[0012] In the following description, the terms "first, second, third" are used merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that "first, second, third" may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.
[0013] It should be noted that the term "comprising" will be used in the embodiments of this application to indicate the presence of the features declared thereafter, but does not exclude the addition of other features.
[0014] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application and is not intended to limit this application.
[0015] See Figure 1 and Figure 2 , Figure 1This is a hardware structure diagram provided in the embodiments of this application. Figure 2 This is a software structure diagram provided in the embodiments of this application, such as... Figure 1 and Figure 2 As shown in the figure, this application provides an EtherCAT slave gateway for semiconductor temperature control equipment. The gateway includes a hardware layer and a software layer. The hardware layer is an embedded semiconductor industrial equipment communication gateway, which includes a power supply module, a master control module, an Ethernet communication module, an EtherCAT slave module, and a 24V input / output port module. The software layer is an embedded software system with a layered architecture, which includes an application layer, a protocol layer, and a hardware abstraction layer. The hardware layer and the software layer work together to realize data transmission between the semiconductor production equipment host and the semiconductor temperature control equipment (Chiller) based on the EtherCAT protocol.
[0016] The above embodiments define the basic structure and core functions of an EtherCAT slave gateway for semiconductor temperature control equipment. This gateway serves as a communication bridge between the semiconductor manufacturing equipment host and the semiconductor temperature control equipment (chiller), employing a hardware and software collaborative architecture.
[0017] The hardware layer adopts the form of an embedded semiconductor industrial equipment communication gateway, which integrates a power supply module to ensure equipment operation, a main control module responsible for data processing, an Ethernet communication module to realize network connection, a slave module that supports the EtherCAT protocol, and a 24V input and output port module to meet industrial control requirements.
[0018] The software layer adopts a layered architecture design, with the application layer implementing business logic processing, the protocol layer implementing communication protocol conversion, and the hardware abstraction layer implementing software and hardware interaction, ensuring that the functions of each layer are clear and easy to maintain.
[0019] The above method solves the problem of efficient data transmission between semiconductor temperature control equipment and the host based on the EtherCAT protocol, providing reliable communication assurance for temperature control in the semiconductor manufacturing process.
[0020] In some embodiments, the power supply module is a DC24V power supply module, which provides 24V DC power to the entire hardware system and converts it into 3.3V power required by the chips on the board; the main control module includes a system clock unit, a storage unit, a communication interface unit, and a GPIO control unit. The system clock unit provides a system clock signal, the storage unit includes Flash and RAM memories, the communication interface unit processes various communication protocols, and the GPIO control unit controls general-purpose input / output ports.
[0021] Here, the power supply module adopts a DC 24V power supply design, which conforms to the general power supply standard for industrial equipment and can provide a stable 24V DC power supply for the entire hardware system. At the same time, the module has a power conversion function, which can convert the 24V power supply to the 3.3V power supply required by the chips on the board, meeting the power supply needs of different components.
[0022] The main control module, as the core processing unit of the gateway, integrates a system clock unit, a storage unit, a communication interface unit, and a GPIO control unit. The system clock unit provides a stable clock signal for the entire system, ensuring coordinated operation of all modules. The storage unit includes Flash and RAM memories, used for program storage and temporary data processing, respectively. The communication interface unit handles various communication protocols and performs data format conversion. The GPIO control unit controls general-purpose input / output ports to meet the control requirements of external devices.
[0023] The above methods ensure the stability and reliability of the gateway hardware system, providing a fundamental guarantee for the normal operation of the entire gateway.
[0024] In some embodiments, the Ethernet communication module is provided with an RJ45 physical interface and an Ethernet chip. The RJ45 physical interface is used to implement network connection, and the Ethernet chip is used to process the Ethernet communication protocol. The EtherCAT slave module is provided with an RJ45 physical interface, an EtherCAT slave chip, an EEPROM chip, and a slave ID unit. The RJ45 physical interface is used for network connection, the EtherCAT slave chip is used to implement EtherCAT slave function, the EEPROM chip is used to store configuration information, and the slave ID unit is used to manage slave identifiers. The 24V input / output port module includes 16 input ports and 8 output ports. The 16 input ports are used to receive 16 24V digital input signals, and the 8 output ports are used to provide 8 24V digital output control.
[0025] Here, the Ethernet communication module is equipped with an RJ45 physical interface and an Ethernet chip. The RJ45 interface enables physical-level network connectivity, while the Ethernet chip is responsible for handling the Ethernet communication protocol, ensuring that the gateway can transmit data via Ethernet.
[0026] The EtherCAT slave module is the core component for implementing EtherCAT communication functions. It includes an RJ45 physical interface for EtherCAT network connection, an EtherCAT slave chip to implement slave functions, an EEPROM chip to store device configuration information, and a slave ID unit to manage slave identifiers, ensuring accurate identification and communication in a multi-device network.
[0027] The 24V input / output port module provides 16 input ports and 8 output ports. This port configuration can meet the general control requirements of semiconductor temperature control equipment. The 16 input ports are used to receive 24V digital input signals from external devices, while the 8 output ports are used to provide 24V digital output control signals to external devices.
[0028] The above methods enable the gateway to adapt to the communication and control needs of industrial environments, ensuring the accuracy and real-time performance of data transmission.
[0029] In some embodiments, the application layer includes a device management module, a data processing module, and a communication management module; the device management module is responsible for hardware ID management, device configuration, and status monitoring; the data processing module is used for unit conversion, data verification, and cache management; the communication management module is used for managing object dictionaries, PDO mappings, and SDO instruction control; the protocol layer includes the EtherCAT slave protocol and the Modbus TCP protocol. The EtherCAT slave protocol is used to implement industrial Ethernet communication, including state machine management, CoE service, and data exchange control functions. The Modbus TCP protocol is used to provide support for standard industrial communication protocols and is responsible for message encoding and parsing; the hardware abstraction layer includes the STM32 HAL driver, peripheral driver, and interrupt management. The STM32 HAL driver is a hardware abstraction interface based on the STM32 microcontroller. The peripheral driver is used to drive GPIO and timers. The interrupt management is used to handle hardware interrupts and event responses.
[0030] Here, the application layer, as the top layer of the software system, includes a device management module, a data processing module, and a communication management module. The device management module is responsible for hardware ID management, device configuration, and status monitoring to ensure normal device operation; the data processing module handles unit conversion, data verification, and cache management to ensure data accuracy and validity; and the communication management module manages the object dictionary, PDO mapping, and SDO command control to achieve efficient communication data processing.
[0031] The protocol layer implements the communication protocol processing functions, including the EtherCAT slave protocol and the Modbus TCP protocol. The EtherCAT slave protocol implements industrial Ethernet communication, including state machine management, CoE service, and data exchange control functions; the Modbus TCP protocol provides support for standard industrial communication protocols, is responsible for message encoding and parsing, and enables the gateway to communicate with devices that support the Modbus protocol.
[0032] The hardware abstraction layer enables interaction between software and hardware, and includes the STM32 HAL driver, peripheral drivers, and interrupt management. The STM32 HAL driver is a hardware abstraction interface based on the STM32 microcontroller, simplifying hardware operation; the peripheral drivers are used to drive peripherals such as GPIO and timers; and interrupt management is used to handle hardware interrupts and event responses, improving the real-time performance of the system.
[0033] The layered architecture design of the software layers described above makes each layer functionally independent, which facilitates software development, maintenance and upgrades, while improving the reliability and scalability of the system.
[0034] In some embodiments, an object dictionary is also included, which includes slave basic information, device identification information, timestamp, PDO index address, input Chiller data list, output Chiller data list, Chiller configuration data, Chiller operation information, Chiller alarm information, manufacturer-defined information, and object data and dictionary addresses corresponding to Chiller commands. The dictionary address for the slave station's basic information is 0x1000–0x100F, used to describe the device's basic attributes and version information; the dictionary address for the device identification information is 0x1018, which is a standard Identity object, including the manufacturer ID, product code, version number, and serial number; the dictionary address for the timestamp is 0x10F8, used to record the device's local time or synchronization timestamp; the PDO index address includes RxPDO Mapping and TxPDO Mapping, the dictionary address for RxPDO Mapping is 0x1600–0x19FF, used to define the slave station's received process data mapping, and TxPDO... The mapping dictionary addresses are 0x1A00–0x1BFF, used to define the slave station's data mapping process; the input Chiller data list dictionary addresses are 0x6000–0x6FFF, serving as the source of Chiller measurement and status read-only data mapping process; the output Chiller data list dictionary addresses are 0x7000–0x7FFF, serving as the source of control settings and command process data sent to Chiller; and the Chiller configuration data dictionary addresses are 0x8000–0x8FFF, used to store device configurations and parameters, and includes backup functionality. The system includes: power-off retention function; the dictionary address for the Chiller operation information is 0x9000–0x9FFF, used to store operation statistics and diagnostic information; the dictionary address for the Chiller alarm information is 0xF380–0xF3FF, representing semiconductor SDP alarms and error object families; the dictionary address for the manufacturer-defined information is 0xF500–0xF9F, used to store manufacturer and firmware identifiers, serial numbers, device names, and module lists; and the dictionary address for the Chiller instructions is 0xFBF0–0xFFFF, representing management and maintenance command objects, with read / write callbacks to ensure process and verification.
[0035] Here, the object dictionary contains various types of object data and their corresponding dictionary addresses, including slave basic information, device identification information, timestamps, PDO index addresses, input Chiller data lists, output Chiller data lists, Chiller configuration data, Chiller operation information, Chiller alarm information, manufacturer-defined information, and Chiller commands.
[0036] The slave station's basic information (0x1000–0x100F) describes the device's basic attributes and version information; the device identification information (0x1018) is a standard Identity object containing the manufacturer ID, product code, version number, and serial number, used for device identification; the timestamp (0x10F8) records the device's local time or synchronization timestamp; the PDO index address includes RxPDO Mapping (0x1600–0x19FF) and TxPDO. Mapping (0x1A00–0x1BFF) is used to define the process data mapping for receiving and sending data from the slave station; the input Chiller data list (0x6000–0x6FFF) is the source of process mapping for Chiller measurement and status read-only data; the output Chiller data list (0x7000–0x7FFF) is the source of process data for control settings and commands sent to Chiller; Chiller configuration data (0x8000–0x8FFF) is used to store device configuration and parameters, and has backup and power-loss retention functions; Chiller operation information (0x9000–0x9FFF) is used to store operation statistics and diagnostic information; Chiller alarm information (0xF380–0xF3FF) is the semiconductor SDP alarm and error object family; vendor-defined information (0xF500–0xF9F) is used to store vendor and firmware identification information; and Chiller commands (0xFBF0–0xFFFF) are management and maintenance command objects.
[0037] The aforementioned object dictionary enables standardized management and efficient interaction of device data, allowing different devices to accurately understand and process data, thus improving system compatibility and communication efficiency.
[0038] In some embodiments, the EtherCAT slave gateway of the semiconductor temperature control device adopts dynamic resource configuration. This dynamic resource configuration is based on dynamic binding and mapping configuration reading and caching of module indexes. At startup, based on the number of modules and predefined index rules, it automatically calculates and binds the RxPDOs, TxPDOs, and their process data objects for each module to achieve zero-copy access to homogeneous multi-modules. During runtime, it reads the currently effective PDO allocation and mapping, parses the index, sub-index, and bit width of each mapping item into a unified structure, and caches it. When TxPDO combinations are used for input data reporting, they are configured according to the current TxPDO allocation order. The system iterates through the mapping items, performs bit-level accumulation and byte-aligned packing on Boolean / status bits, performs fast offset copying on analog quantities and fixed-length fields, and prioritizes packing critical health states such as exceptions and latched exceptions. When RxPDO parsing is used to output commands, it parses the input frame according to the current RxPDO allocation order, writes back Boolean / bit control quantities precisely by bitmask, and writes back analog quantities and fixed-length fields by object dictionary offset. Based on bit-level packing compression, it uses the pre-parsing cache of the mapping structure to reduce the computational overhead within the loop, and prioritizes high-frequency / critical fields through sequential layout. After the master station modifies the PDO allocation and mapping through SDO, it automatically refreshes the cache and performs combination and parsing immediately according to the new mapping, while being compatible with the default TxPDO mapping.
[0039] Here, dynamic resource configuration adopts an architecture of "dynamic binding of module index + reading and caching of mapping configuration". At startup, based on the number of modules and predefined index rules, it automatically calculates and binds the RxPDO, TxPDO and their process data objects of each module, realizing zero-copy access of homogeneous multi-modules and reducing the overhead of data transmission.
[0040] During runtime, the currently active PDO allocations and mappings are read, and the "index, sub-index, and bit width" of each mapping item are parsed into a unified structure and cached to improve data processing speed. During TxPDO assembly (input data reporting), mapping items are traversed according to the current TxPDO allocation order. Bit-level accumulation and byte-aligned packing are performed on Boolean / status bits, and analog and fixed-length fields are quickly copied by offset. Critical health states such as exceptions and latch anomalies are prioritized for packing, ensuring timely reporting of important data. During RxPDO parsing (output command issuance), the input frame is parsed according to the current RxPDO allocation order. Boolean / bit control values are precisely written back by bitmask, and analog and fixed-length fields are written back by object dictionary offset, ensuring accurate command execution.
[0041] Meanwhile, bit-level packing compression is introduced, and pre-parsing caching of the mapping structure is used to reduce computational overhead within loops. Sequential layout prioritizes high-frequency / critical fields, further improving efficiency. When the main station modifies PDO allocation and mapping via SDO, the algorithm can automatically refresh the cache and immediately perform combination and parsing according to the new mapping, while remaining compatible with the default TxPDO mapping, thus improving the system's flexibility and adaptability.
[0042] The application of dynamic resource configuration described above enables the gateway to flexibly configure resources according to actual needs, thereby improving data transmission efficiency and system response speed.
[0043] In some embodiments, a hardware ID lock is also included. The underlying hardware ID secure storage area provides a unique device identifier and has read-only or one-time programmable attributes. The authentication and key negotiation logic of the middle layer triggers the authentication process when the master station establishes a connection or switches to a critical state. The slave station reads the device ID and authentication materials from the hardware secure area, participates in the random challenge issued by the master station, and generates a one-time response so that the master station can verify the response according to the agreed verification rules and key materials. The upper-layer session-level security binding and access control establish a master-slave security binding relationship after successful authentication. The binding content includes the master station identifier, session key derivation parameters, binding validity period, and session policy. During the binding period, object access and state transition are controlled. The session needs to be renewed upon expiration. Abnormal disconnection or tampering detection triggers binding revocation and fallback to the restricted state.
[0044] Here, the hardware ID lock constructs a three-layer security architecture: "hardware ID secure storage area—authentication and key negotiation logic—session-level secure binding and access control." The bottom-layer hardware ID secure storage area provides a unique device identifier and has read-only or one-time programmable attributes to ensure the uniqueness and immutability of the device's identity.
[0045] The authentication and key negotiation logic in the middle layer triggers the authentication process when the master station establishes a connection or switches to a critical state. The slave station reads the device ID and authentication materials from the hardware security zone, participates in the random challenge issued by the master station, generates a one-time response, and the master station verifies the response according to the agreed verification rules and key materials to ensure the legitimacy of the connection.
[0046] After successful authentication, the upper-layer session-level security binding and access control establish a "master-slave security binding relationship." The binding content includes the master site identifier, session key derivation parameters, binding validity period, and session policy. During the binding period, access to objects and state transitions are controlled, and only authorized operations can be executed. Session expiration requires renewal verification. Abnormal connection loss or tampering detection triggers binding revocation and fallback to a restricted state to prevent unauthorized access and data leakage.
[0047] The aforementioned hardware ID lock effectively ensures the security of communication between the gateway and the main station, prevents unauthorized device access and illegal data access, and improves the security of the entire system.
[0048] In some embodiments, the data transmission process includes: the EtherCAT master station sending control commands to the gateway; the gateway receiving and parsing the EtherCAT PDO data, converting it into Modbus TCP function codes and IO semaphores, and then sending it to the Modbus TCP device and the Chiller sensor via a TCP connection; the gateway periodically polling the Modbus TCP device and IO semaphores, reading the device status and parameter data, converting it into EtherCAT PDO format, and responding to the data requests from the EtherCAT master station.
[0049] Please see Figure 3 , Figure 3 This is a schematic diagram of the data transmission flow provided in the embodiments of this application, such as... Figure 3 As shown, in the downlink direction (from the EtherCAT master station to the Modbus TCP device and the Chiller sensor), the EtherCAT master station sends control commands to the gateway. The gateway receives and parses these EtherCAT PDO data, converts them into Modbus TCP function codes, IO semaphores, and other data formats suitable for the target device to process, and then sends them to the Modbus TCP device and the Chiller sensor through the TCP connection to achieve control of the target device.
[0050] In the data uplink direction (from Modbus TCP devices and Chiller sensors to the EtherCAT master), the gateway periodically polls the Modbus TCP devices and IO semaphores to read the device status and parameter data. Then, it converts this data into EtherCAT PDO format to respond to the EtherCAT master's data requests, enabling the master to understand the device's operating status in a timely manner.
[0051] The aforementioned bidirectional data transmission process enables data interaction between the EtherCAT master station, Modbus TCP devices, and Chiller sensors, ensuring accurate issuance of control commands and timely feedback of device status, thus providing a guarantee for the precise control of semiconductor temperature control equipment.
[0052] In some embodiments, the algorithm for dynamic resource allocation implements an ignoring strategy for sub-index out-of-bounds and invalid mapping entries; ensures that residual bits are aligned and written back according to rules when the bit width is not an integer byte; follows the writing order of object dictionary offsets; and allows adjustment of allocation and mapping only in the PRE-OP stage, while only stable combination and parsing are performed in the OP stage.
[0053] Here, the algorithm implements an ignore strategy for sub-index out-of-bounds and invalid mapping items to avoid the impact of abnormal data on the system; when the bit width is not an integer byte, it ensures that the residual bits are aligned and written back according to the rules to ensure the integrity and accuracy of the data; and it strictly follows the writing order of the object dictionary offset to prevent data writing errors.
[0054] Meanwhile, the algorithm only allows adjustments to allocation and mapping during the PRE-OP phase, and only performs stable combinations and parsing during the OP phase. This design ensures the stability and consistency of data processing during the normal operation phase of the device (OP phase) and avoids interference from configuration adjustments to real-time data transmission.
[0055] The aforementioned reliability assurance measures enable the dynamic resource allocation algorithm to work stably in complex industrial environments, improving the reliability of the gateway and the accuracy of data transmission.
[0056] In some embodiments, the hardware ID lock supports updating the binding policy and key parameters of the master station without downtime; challenge-response failure, session replay, master station identifier change, and missing authentication materials trigger alarm object reporting and access degradation; continuous failures enter the locking window; authentication materials and session keys are managed hierarchically, with the device-level root identifier used only for identity verification and the session-level dynamic key used only for data integrity and access control of the current connection; critical operations must be performed in a bound context where the policy allows.
[0057] Here, the hardware ID lock supports updating the binding policy and key parameters of the master station without stopping the system, which facilitates system maintenance and upgrades without affecting the normal operation of the device.
[0058] When events such as challenge-response failure, session replay, main site identifier change, or missing authentication materials occur, the mechanism will trigger alarm object reporting and access degradation to promptly detect and respond to security threats; if failures continue, a lockout window will be entered to prevent malicious attacks.
[0059] Authentication materials and session keys are managed hierarchically. The device-level root identifier is used only for identity verification, while the session-level dynamic key is used only for data integrity and access control within the current connection. This hierarchical management approach enhances key security. Critical operations must be performed within a bound and policy-permitted context, ensuring the legitimacy and security of the operations.
[0060] The above methods improve the hardware ID lock mechanism, further enhancing the security and applicability of the gateway and enabling it to better address various security challenges.
[0061] In summary, the embodiments of this application have the following beneficial effects: Through collaborative design at both the hardware and software layers, efficient data transmission based on the EtherCAT protocol between the semiconductor manufacturing equipment host and the temperature control equipment is achieved. Its layered hardware and software architecture enhances system stability and maintainability. An object dictionary system enables standardized management of equipment data, and dynamic resource allocation algorithms improve communication efficiency and flexibility through zero-copy access and bit-level compression. A hardware ID lock mechanism provides multi-layered security protection to ensure communication security. Simultaneously, a complete data transmission process ensures accurate interaction between control commands and status data, and various reliability assurance measures further enhance the system's adaptability in industrial environments. In summary, this application's embodiments solve the compatibility problem between traditional temperature control equipment and industrial Ethernet systems, improve the accuracy, real-time performance, and safety of temperature control in semiconductor manufacturing processes, and contribute to improving the production quality and efficiency of semiconductor products, demonstrating significant industrial application value.
[0062] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems and devices described above can be referred to the corresponding processes in the method embodiments, and will not be repeated here. In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed mutual coupling or direct coupling or communication connection can be through some communication interfaces; the indirect coupling or communication connection of devices or modules can be electrical, mechanical, or other forms.
[0063] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0064] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.
[0065] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. An EtherCAT slave gateway for semiconductor temperature control equipment, characterized in that, The gateway comprises a hardware layer and a software layer. The hardware layer is an embedded semiconductor industrial equipment communication gateway, which includes a power supply module, a main control module, an Ethernet communication module, an EtherCAT slave module, and a 24V input / output port module. The software layer is an embedded software system with a layered architecture, which includes an application layer, a protocol layer, and a hardware abstraction layer. The hardware layer and the software layer work together to realize data transmission between the semiconductor production equipment host and the semiconductor temperature control equipment (Chiller) based on the EtherCAT protocol.
2. The EtherCAT slave gateway for semiconductor temperature control equipment according to claim 1, characterized in that, The power supply module is a DC24V power supply module, which provides 24V DC power to the entire hardware system and converts it to the 3.3V power required by the chips on the board. The main control module includes a system clock unit, a storage unit, a communication interface unit, and a GPIO control unit. The system clock unit provides the system clock signal, the storage unit includes Flash and RAM memories, the communication interface unit processes various communication protocols, and the GPIO control unit controls the general purpose input / output ports.
3. The EtherCAT slave gateway for semiconductor temperature control equipment according to claim 1, characterized in that, The Ethernet communication module is equipped with an RJ45 physical interface and an Ethernet chip. The RJ45 physical interface is used for network connection, and the Ethernet chip is used for processing Ethernet communication protocols. The EtherCAT slave module is equipped with an RJ45 physical interface, an EtherCAT slave chip, an EEPROM chip, and a slave ID unit. The RJ45 physical interface is used for network connection, the EtherCAT slave chip is used to implement EtherCAT slave functions, the EEPROM chip is used to store configuration information, and the slave ID unit is used to manage slave identifiers. The 24V input / output port module includes 16 input ports and 8 output ports. The 16 input ports are used to receive 16 24V digital input signals, and the 8 output ports are used to provide 8 24V digital output control.
4. The EtherCAT slave gateway for semiconductor temperature control equipment according to claim 1, characterized in that, The application layer includes a device management module, a data processing module, and a communication management module. The device management module is responsible for hardware ID management, device configuration, and status monitoring. The data processing module is used for unit conversion, data verification, and cache management. The communication management module is used for managing the object dictionary, PDO mapping, and SDO instruction control. The protocol layer includes the EtherCAT slave protocol and the Modbus TCP protocol. The EtherCAT slave protocol is used to implement industrial Ethernet communication, including state machine management, CoE service, and data exchange control functions. The Modbus TCP protocol is used to provide support for standard industrial communication protocols and is responsible for message encoding and parsing. The hardware abstraction layer includes the STM32 HAL driver, peripheral driver, and interrupt management. The STM32 HAL driver is a hardware abstraction interface based on the STM32 microcontroller. The peripheral driver is used to drive GPIO and timers. The interrupt management is used to handle hardware interrupts and event responses.
5. The EtherCAT slave gateway for semiconductor temperature control equipment according to claim 1, characterized in that, It also includes an object dictionary, which includes slave basic information, device identification information, timestamp, PDO index address, input Chiller data list, output Chiller data list, Chiller configuration data, Chiller operation information, Chiller alarm information, manufacturer-defined information, and object data and dictionary addresses corresponding to Chiller commands. The dictionary address for the slave station's basic information is 0x1000–0x100F, used to describe the device's basic attributes and version information; the dictionary address for the device identification information is 0x1018, which is a standard Identity object, including the manufacturer ID, product code, version number, and serial number; the dictionary address for the timestamp is 0x10F8, used to record the device's local time or synchronization timestamp; the PDO index address includes RxPDO Mapping and TxPDO Mapping, the dictionary address for RxPDO Mapping is 0x1600–0x19FF, used to define the slave station's received process data mapping, and TxPDO... The mapping dictionary addresses are 0x1A00–0x1BFF, used to define the slave station's data mapping process; the input Chiller data list dictionary addresses are 0x6000–0x6FFF, serving as the source of Chiller measurement and status read-only data mapping process; the output Chiller data list dictionary addresses are 0x7000–0x7FFF, serving as the source of control settings and command process data sent to Chiller; and the Chiller configuration data dictionary addresses are 0x8000–0x8FFF, used to store device configurations and parameters, and includes backup functionality. The system includes: power-off retention function; the dictionary address for the Chiller operation information is 0x9000–0x9FFF, used to store operation statistics and diagnostic information; the dictionary address for the Chiller alarm information is 0xF380–0xF3FF, representing semiconductor SDP alarms and error object families; the dictionary address for the manufacturer-defined information is 0xF500–0xF9F, used to store manufacturer and firmware identifiers, serial numbers, device names, and module lists; and the dictionary address for the Chiller instructions is 0xFBF0–0xFFFF, representing management and maintenance command objects, with read / write callbacks to ensure process and verification.
6. The EtherCAT slave gateway for semiconductor temperature control equipment according to claim 1, characterized in that, The EtherCAT slave gateway of the semiconductor temperature control device adopts dynamic resource configuration. This dynamic resource configuration is based on dynamic binding and mapping configuration reading and caching of module indexes. At startup, based on the number of modules and predefined index rules, it automatically calculates and binds the RxPDOs, TxPDOs, and their process data objects for each module to achieve zero-copy access to homogeneous multi-modules. During runtime, it reads the currently effective PDO allocations and mappings, parses the index, sub-index, and bit width of each mapping item into a unified structure, and caches it. When TxPDO combinations are used for input data reporting, the mapping items are traversed according to the current TxPDO allocation order, and bit-level accumulation is performed on the Boolean / status bits. Byte-aligned packing is used to quickly copy analog quantities and fixed-length fields by offset, and priority packing is provided for critical health states such as exceptions and latching exceptions. When RxPDO parsing is used to output commands, the input frame is parsed according to the current RxPDO allocation order. Boolean / bit control quantities are accurately written back by bitmask, and analog quantities and fixed-length fields are written back by object dictionary offset. Based on bit-level packing compression, the pre-parsing cache of the mapping structure is used to reduce the computational overhead within the loop, and high-frequency / critical fields are processed first through sequential layout. After the master station modifies the PDO allocation and mapping through SDO, the cache is automatically refreshed and the combination and parsing are performed immediately according to the new mapping, while being compatible with the default TxPDO mapping.
7. The EtherCAT slave gateway for semiconductor temperature control equipment according to claim 1, characterized in that, It also includes a hardware ID lock. The underlying hardware ID secure storage area provides a unique device identifier and has read-only or one-time programmable attributes. The middle layer's authentication and key negotiation logic triggers the authentication process when the master station establishes a connection or switches to a critical state. The slave station reads the device ID and authentication materials from the hardware secure area, participates in the random challenge issued by the master station, and generates a one-time response so that the master station can verify the response according to the agreed verification rules and key materials. The upper layer's session-level security binding and access control establish a master-slave security binding relationship after successful authentication. The binding content includes the master station identifier, session key derivation parameters, binding validity period, and session policy. During the binding period, object access and state transitions are controlled. Session expiration requires renewal verification. Abnormal disconnection or tampering detection triggers binding revocation and fallback to a restricted state.
8. The EtherCAT slave gateway for semiconductor temperature control equipment according to claim 1, characterized in that, The data transmission process includes: the EtherCAT master station sends control commands to the gateway; the gateway receives and parses the EtherCAT PDO data, converts it into Modbus TCP function codes and IO semaphores, and then sends it to the Modbus TCP device and the Chiller sensor via a TCP connection; the gateway periodically polls the Modbus TCP device and IO semaphores, reads the device status and parameter data, converts it into EtherCAT PDO format, and responds to the data requests from the EtherCAT master station.
9. The EtherCAT slave gateway for semiconductor temperature control equipment according to claim 6, characterized in that, The algorithm for dynamic resource allocation implements an ignore strategy for sub-index out-of-bounds and invalid mapping items; ensures that residual bits are aligned and written back according to rules when the bit width is not an integer byte; follows the writing order of object dictionary offsets; and allows adjustment of allocation and mapping only in the PRE-OP stage, while only stable combination and parsing are performed in the OP stage.
10. The EtherCAT slave gateway for semiconductor temperature control equipment according to claim 7, characterized in that, The hardware ID lock supports updating the binding policy and key parameters of the master station without downtime; challenge-response failure, session replay, master station identifier change, and missing authentication materials trigger alarm object reporting and access degradation; Continuous failures will result in a locked window; authentication materials and session keys are managed hierarchically, with the device-level root identifier used only for identity verification and the session-level dynamic key used only for data integrity and access control of the current connection; critical operations must be performed in a bound context that is permitted by the policy.
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