Image splicing method, device and system

Abstract

The invention provides an image splicing method, device and system, the image splicing method is applied to an acquisition card, and the acquisition card corresponds to at least one sub-camera in a multi-camera system. Distributing a corresponding storage space for the images collected by the sub-camera, so that the storage address fields of the same pixel rows of the adjacent images collected by the sub-camera are continuous; the image splicing method comprises the following steps: acquiring image data acquired by the sub-camera; and writing the image data into a storage address field corresponding to the sub-camera. Through the technical scheme of the invention, the image transmission and splicing efficiency can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of machine vision, and in particular to an image splicing method, device and system. BACKGROUND

[0002] A CIS (Contact Image Sensor) is a kind of solid-state photoelectric sensor for image acquisition. With the rapid development of digital imaging technology, CIS cameras (i.e., cameras using CIS sensors) are gradually attracting widespread attention as a kind of high-precision, low-power image acquisition equipment. CIS cameras are based on contact image sensors and can achieve high-resolution, high-quality image acquisition by directly contacting the surface of the scanned object, and are widely used in fields such as document scanning, industrial detection, medical imaging, etc.

[0003] A CIS camera includes multiple sub-cameras. How to splice the images collected by the multiple sub-cameras has not been effectively implemented in the related art, and there are problems such as poor image transmission efficiency and image splicing efficiency. SUMMARY

[0004] The present application provides an image splicing method applied to a capture card, the capture card corresponding to at least one sub-camera in a multi-camera system; a corresponding storage space is allocated for an image collected by the sub-camera, so that the storage address segments of the same pixel rows of adjacent images collected by the sub-camera are continuous. The method comprises: acquiring image data collected by the sub-camera; writing the image data into a storage address segment corresponding to the sub-camera.

[0005] The present application provides an image splicing device applied to a capture card, the capture card corresponding to at least one sub-camera in a multi-camera system; a corresponding storage space is allocated for an image collected by the sub-camera, so that the storage address segments of the same pixel rows of adjacent images collected by the sub-camera are continuous. The device comprises: an acquisition module configured to acquire image data collected by the sub-camera; a processing module configured to write the image data into a storage address segment corresponding to the sub-camera.

[0006] The present application provides an image splicing system, the image splicing system comprising a capture card and a multi-camera system, the capture card corresponding to at least one sub-camera in the multi-camera system; a corresponding storage space is allocated for an image collected by the sub-camera, so that the storage address segments of the same pixel rows of adjacent images collected by the sub-camera are continuous; wherein: the sub-camera is configured to acquire image data. The acquisition card is configured to acquire image data collected by the sub-camera and write the image data into a storage address segment corresponding to the sub-camera.

[0007] The present application provides a computer program product, which can include a computer program, and the computer program is executed by a processor to implement the image stitching method of the above examples.

[0008] The present application provides an acquisition card device, which includes a processor and a machine readable storage medium, and the machine readable storage medium stores machine executable instructions executable by the processor; wherein the processor is configured to execute the machine executable instructions to implement the image stitching method of the above examples.

[0009] The present application provides a machine readable storage medium, which stores machine executable instructions executable by a processor; wherein the processor is configured to execute the machine executable instructions, and the machine executable instructions are executed to implement the image stitching method of the above examples.

[0010] As can be seen from the above technical solutions, in the embodiments of the present application, the image stitching operation is realized by the acquisition card, the acquisition card writes the image collected by the sub-camera into the cache at the specified position (i.e. allocates the corresponding storage space for the image collected by the sub-camera), avoids the operation of memory copying, realizes zero-copy image transmission and image stitching, and greatly improves the efficiency of image transmission and stitching. Even if the number of cameras continues to increase, it will not cause performance loss. After the camera collects a row of pixels, the pixel values of the row of pixels (i.e. the pixel values of the Mth row of pixels) are sent to the acquisition card, and the acquisition card writes the pixel values of the row of pixels into the storage address segment, realizes the image stitching while the image data is being transmitted, and the image stitching is completed after the image data transmission is completed. The entire stitching process has no memory copying, and high-performance image transmission and image stitching are realized. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 is a flowchart of the image stitching method in an embodiment of the present application; Figure 2 is a schematic diagram of an acquisition card to which a CIS camera is connected to a terminal device; Figure 3 is a flowchart of the image stitching method in an embodiment of the present application; Figure 4 is a schematic diagram of an image coordinate system in an embodiment of the present application; Figure 5 is a schematic diagram of a plurality of acquisition cards to which a CIS camera is connected to a terminal device; Figure 6is a flowchart of an image splicing method in an embodiment of the present application; Figure 7 is a mapping relationship diagram of coordinates and memory address blocks when a CIS camera is connected to multiple acquisition cards; Figure 8A and Figure 8B is a diagram of a CIS camera connected to multiple acquisition cards of multiple terminal devices; Figure 9 is a structural diagram of an image splicing device in an embodiment of the present application. DETAILED DESCRIPTION

[0012] An image splicing method is proposed in an embodiment of the present application, which can be applied to an acquisition card corresponding to at least one sub-camera in a multi-camera system; an image collected by the sub-camera is assigned a corresponding storage space, so that storage address segments of the same pixel row of adjacent images collected by the sub-camera are continuous. Referring to Figure 1 is a flowchart of the image splicing method, which can include the following steps: Step 101, obtaining image data collected by a sub-camera.

[0013] Step 102, writing the image data into a storage address segment corresponding to the sub-camera.

[0014] Illustratively, at least one sub-camera is corresponding to one acquisition card, and a physical address of the storage space corresponds to a pixel coordinate of an image collected by the sub-camera; writing the image data into the storage address segment corresponding to the sub-camera can include writing the image data into the storage address segment corresponding to the sub-camera based on the pixel coordinate of the image data.

[0015] Illustratively, at least one sub-camera is corresponding to at least two acquisition cards, and a storage address assigned to the acquisition card is a logical address of a virtual space corresponding to the storage space, and the logical address of the virtual space corresponds to a pixel coordinate of an image collected by the sub-camera; writing the image data into the storage address segment corresponding to the sub-camera can include determining a logical address based on the pixel coordinate of the image data, mapping the logical address to a physical address of the storage space, and writing the image data into the storage address segment corresponding to the sub-camera based on the mapped physical address.

[0016] Illustratively, if the number of acquisition cards is one, then based on the positional relationship of the image collected by the sub-camera in the spliced image, a continuous storage address segment is configured for the same pixel row of adjacent images in the storage space. The adjacent images are images collected by the camera corresponding to the acquisition card. Alternatively, if the number of acquisition cards is at least two, taking a first acquisition card and a second acquisition card as an example, the first acquisition card corresponds to at least one sub-camera in a multi-camera system, and the second acquisition card corresponds to at least one sub-camera in the multi-camera system.

[0017] On this basis, based on the position relationship of the image collected by the sub-camera in the spliced image, a continuous storage address segment is configured for the same pixel row of adjacent images in the storage space; wherein the adjacent images are the images collected by the cameras corresponding to the first acquisition card, or the adjacent images are the images collected by the cameras corresponding to the second acquisition card, or the adjacent images are the images collected by the cameras corresponding to the first acquisition card and the second acquisition card.

[0018] For example, the image data can include the pixel value of the Mth row of pixels collected by the sub-camera, the pixel coordinates of the first pixel in the Mth row of pixels in the spliced image, and the spliced image is obtained by splicing the images collected by the sub-cameras in the multi-camera system. Writing the image data into the storage address segment corresponding to the sub-camera can include: determining the corresponding offset starting address of the image data in the storage space based on the pixel coordinates, and storing the pixel value of the Mth row of pixels from the offset starting address; wherein the storage address segment corresponding to the image data in the storage space is continuous with the storage address segment used to store the adjacent image data in the spliced image.

[0019] For example, the image data can also include the total width of the spliced image. On this basis, determining the offset starting address of the image data in the storage space based on the pixel coordinates can include but is not limited to: determining the offset starting address based on the pixel coordinates and the total width of the spliced image.

[0020] For example, determining the offset starting address of the image data in the storage space based on the pixel coordinates can include: determining the logical starting address of the virtual space based on the pixel coordinates; mapping the logical starting address of the virtual space to the offset starting address of the storage space based on the obtained address mapping relationship; wherein the address mapping relationship includes the mapping relationship between the logical address of the virtual space and the physical address of the storage space.

[0021] For example, when multiple acquisition cards splice images, the storage space includes a physical storage area corresponding to each acquisition card; wherein the physical storage area corresponding to the acquisition card includes a plurality of storage sub-areas, and the storage sub-area is used to store the pixel value of the same row of pixels of each image spliced by the acquisition card; Wherein, a storage sub-area occupies a continuous physical address in the storage space, and different storage sub-areas occupy non-continuous physical addresses in the storage space; the physical storage area corresponding to the acquisition card is mapped to a virtual space with continuous logical addresses; the address mapping relationship can include the mapping relationship between the logical address of the virtual space and the physical address of the physical storage area corresponding to the acquisition card.

[0022] Exemplarily, when the acquisition card stitches the images, the storage space includes a physical storage area corresponding to the acquisition card; wherein the physical storage area corresponding to the acquisition card includes a plurality of storage sub-areas, and each storage sub-area is used to store pixel values of the same row of pixels of each image stitched by the acquisition card. The physical address occupied by one storage sub-area in the storage space is continuous, and the physical address occupied by the adjacent storage sub-area in the storage space is continuous; the physical storage area corresponding to the acquisition card is mapped to a virtual space with continuous logical addresses; and the address mapping relationship can include a mapping relationship between the logical addresses of the virtual space and the physical addresses of the physical storage area corresponding to the acquisition card.

[0023] Exemplarily, the image data includes a Leader and a Payload; wherein the Leader includes a total width of the stitched image and a total height of the stitched image; wherein the total height of the stitched image is used to determine whether the Mth row of pixels is the last row of pixels of the stitched image, if yes, the stitching process of the stitched image is ended; if not, image data of the next row of pixels of the Mth row of pixels is waited to be received; the Payload includes pixel values of the Mth row of pixels and pixel coordinates; wherein the pixel coordinates include a horizontal position coordinate and a vertical position coordinate.

[0024] Exemplarily, the sub-camera in the multi-camera system is a sub-camera in a CIS camera; or, the sub-camera in the multi-camera system is an independent camera, and the multi-camera system includes a plurality of sub-cameras.

[0025] As can be seen from the above technical solutions, in the embodiment of the present application, the image stitching operation is realized by the acquisition card, the acquisition card writes the images collected by the sub-camera into the cache at the specified position (i.e., the corresponding storage space is allocated for the images collected by the sub-camera), which avoids the operation of memory copying, realizes zero-copy image transmission and image stitching, and greatly improves the efficiency of image transmission and stitching. Even if the number of cameras continues to increase, it will not cause performance loss. After the camera collects a row of pixels, the pixel values of the row of pixels (i.e., the pixel values of the Mth row of pixels) are sent to the acquisition card, and the acquisition card writes the pixel values of the row of pixels into the storage address segment, which realizes the stitching of the image while the image data is being transmitted, and the image can be stitched after the image data transmission is completed. The entire stitching process does not involve memory copying, and high-performance image transmission and image stitching are realized.

[0026] The image stitching method of the embodiment of the present application is described below in combination with a specific application scenario.

[0027] In the embodiments of the present application, a high-performance image splicing method of a CIS camera is provided. The CIS camera can also be referred to as a CIS industrial camera, and can be applied to a large object detection scene. The CIS camera is a camera for a user, but can include multiple sub-cameras, each of which is connected to a capture card. For example, the capture card is connected to a terminal device through a PCIe (Peripheral Component Interconnect express, high-speed serial computer expansion bus standard) slot on the terminal device, and each sub-camera of the CIS camera is connected to the capture card through an optical port (optical fiber interface). The capture card is a hardware device on a terminal device (such as a personal computer, a notebook computer, a server, etc.), and belongs to a PCIe device.

[0028] The capture card is used to capture analog signals such as photoelectric, video, and audio signals from the outside world, and digitize these analog signals and then import them into the terminal device for digital processing based on the digital signals. The capture card can include an image capture card, a video capture card, an audio capture card (such as a sound card), a data capture card, etc. The capture card in the embodiments can be an image capture card, which is used to obtain image data from the CIS camera.

[0029] For the multiple sub-cameras in the CIS camera, the functions of each sub-camera are relatively independent, each sub-camera can capture images, and the images captured by all sub-cameras need to be spliced to obtain a complete large image after splicing. In the embodiments, all the images captured by the sub-cameras are spliced into a complete large image with high performance.

[0030] In the embodiments, it is considered that the image splicing methods under different topological relationships are different, and therefore, the topological relationship between the CIS camera and the capture card can be divided into three categories. The first category of topological relationship is that the CIS camera is connected to one capture card of one terminal device, the second category of topological relationship is that the CIS camera is connected to multiple capture cards of one terminal device, and the third category of topological relationship is that the CIS camera is connected to multiple capture cards of multiple terminal devices. The image splicing methods under these topological relationships are described below.

[0031] Case 1: The CIS camera is connected to one capture card of one terminal device. Referring to FIG. 1, a CIS camera 100 is connected to one capture card 200 of one terminal device 300. Figure 2As shown, it is a schematic diagram of a capture card connecting to a terminal device, the CIS camera can include sub-camera 1 and sub-camera 2, of course, two sub-cameras are taken as an example here, the number of sub-cameras can be more, and the implementation manner is similar to that of two sub-cameras, and subsequent limitations are not limited. It should be noted that sub-camera 1 and sub-camera 2 can be sub-cameras in the CIS camera, or two independent cameras. When sub-camera 1 and sub-camera 2 are sub-cameras in the CIS camera, the multi-camera system is the CIS camera, and when sub-camera 1 and sub-camera 2 are two independent cameras, the multi-camera system includes multiple independent cameras. Sub-camera 1 and sub-camera 2 are connected to the same capture card a, and the capture card a can be deployed on the terminal device.

[0032] The capture card corresponds to sub-camera 1 and sub-camera 2 in the multi-camera system, and needs to allocate corresponding storage space for the images collected by sub-camera 1 and sub-camera 2, so that the storage address segments of the same pixel rows of adjacent images collected by sub-camera 1 and sub-camera 2 are continuous. For example, the physical address of the storage space allocated for the capture card, and the capture card writes the image data into the storage address segment corresponding to the sub-camera based on the physical address. In this case, by corresponding sub-camera 1 and sub-camera 2 through a capture card, the physical address of the storage space corresponds to the pixel coordinates of the images collected by the sub-camera; the image data can be written into the storage address segment corresponding to the sub-camera based on the pixel coordinates of the image data.

[0033] In the above application scenario, an image splicing method is proposed, which can be referred to as a first camera (the number of first cameras is at least one, and the processing manner of each first camera is the same, taking one first camera as an example), and the sub-camera 2 is referred to as a second camera (the number of second cameras is at least one, and the processing manner of each second camera is the same, taking one second camera as an example), and the capture card a is referred to as a first capture card. Referring to Figure 3 As shown, it is a schematic diagram of the flow of the image splicing method, which includes: Step 301, the first capture card acquires image data collected by the first camera. For example, the first capture card receives the first data packet (i.e. image data) sent by the first camera, and the first data packet can include the pixel value of the Mth row of pixels of the first image, and M can be a positive integer.

[0034] For the sake of distinction, the image captured by the first camera is referred to as the first image, and the first camera captures the pixel value of each row of pixels of the first image line by line. After capturing the pixel value of the first row of pixels of the first image, the first camera sends a first data packet to the first acquisition card, and the first data packet includes the pixel value of the first row of pixels of the first image. After capturing the pixel value of the second row of pixels of the first image, the first camera sends a first data packet to the first acquisition card, and the first data packet includes the pixel value of the second row of pixels of the first image. In this way, after capturing each row of pixels, the first camera sends the pixel value of the row of pixels to the first acquisition card, and the first acquisition card writes the pixel value of the row of pixels to the storage address segment, so as to realize image data acquisition, image data transmission and image splicing at the same time, and the image data transmission is completed, that is, the splicing is completed.

[0035] For the sake of distinction, the pixel value in the first data packet is referred to as the pixel value of the Mth row of pixels of the first image, and M can be a positive integer, such as the pixel value of the first row of pixels of the first image, the pixel value of the second row of pixels of the first image, the pixel value of the third row of pixels of the first image, and so on.

[0036] For example, the first data packet further includes the first pixel coordinate of the first pixel in the first spliced image, and the first spliced image can be obtained by splicing the images captured by all cameras (such as the first camera and the second camera) connected to the first acquisition card, that is, the first acquisition card outputs the first spliced image.

[0037] For example, since the first acquisition card splices all images to obtain the first spliced image, that is, splices the images captured by all cameras to obtain the first spliced image, the first acquisition card can know the number of images (that is, the number of cameras) and the width of each image, such as the width of the first image captured by the first camera and the width of the second image captured by the second camera. Based on this, assuming that the width of the first image is 100 and the width of the second image is 100, the first acquisition card determines that the horizontal position coordinate of the first image is 0 (indicating that the horizontal position coordinate of the first pixel in each row of pixels is 0), and the horizontal position coordinate of the second image is 100 (indicating that the horizontal position coordinate of the first pixel in each row of pixels is 100).

[0038] In addition, each camera can also learn the topological relationship between the camera and the acquisition card, and learn that there are several cameras connected to the first acquisition card and the arrangement order of each camera is fixed, so that each camera can also learn the horizontal position coordinate of the first pixel in each row of pixels. In this way, when the first camera sends the first data packet to the first acquisition card, the first data packet can carry the first pixel coordinate of the first pixel in the Mth row of pixels in the first spliced image, and the first pixel coordinate includes the horizontal position coordinate and the vertical position coordinate. For example, for the first pixel in the first row of pixels, the first pixel coordinate is (0, 0), the first 0 represents the horizontal position coordinate, i.e., in the first column of the first spliced image, and the second 0 represents the vertical position coordinate, i.e., in the first row of the first spliced image. For the first pixel in the second row of pixels, the first pixel coordinate is (0, 1), the first 0 represents the horizontal position coordinate, i.e., in the first column of the first spliced image, and the second 1 represents the vertical position coordinate, i.e., in the second row of the first spliced image, and so on.

[0039] Obviously, for the first pixel coordinate of the first pixel in the Mth row of pixels in the first spliced image, the horizontal position coordinate is 0, indicating the first column of the first image, and the vertical position coordinate is determined based on M, such as when the Mth row of pixels is the first row of pixels, the vertical position coordinate is 0, and so on.

[0040] For example, the first data packet also includes the total width of the first spliced image. For example, the first acquisition card learns the total width of the first spliced image, i.e., the sum of the widths of the images collected by all the cameras connected to the first acquisition card, and sends the total width of the first spliced image to the first camera, so that when the first camera sends the first data packet to the first acquisition card, the first data packet can carry the total width of the first spliced image. Alternatively, the first acquisition card already knows the total width of the first spliced image, so that when the first camera sends the first data packet to the first acquisition card, the first data packet can also not carry the total width of the first spliced image.

[0041] In summary, the first acquisition card can receive the first data packet sent by the first camera, and the first data packet includes the pixel value of the Mth row of pixels of the first image, the first pixel coordinate of the first pixel in the Mth row of pixels in the first spliced image, and the total width of the first spliced image.

[0042] In this embodiment, the width (total width) represents the total data amount of a row of data, for example, if the pixel format of the first image is RGB, the total data amount of a row of data can be the total number of pixels in a row × 3, and if the pixel format of the first image is Mono8, the total data amount of a row of data can be the total number of pixels in a row.

[0043] At step 302, the first acquisition card acquires image data collected by the second camera. For example, the first acquisition card receives a second data packet sent by the second camera, and the second data packet can include pixel values of the Mth row of pixels of the first image.

[0044] For example, the image collected by the second camera is referred to as a second image. After the second camera collects pixel values of the first row of pixels of the second image, the second camera sends a second data packet to the first acquisition card, and the second data packet includes the pixel values of the first row of pixels of the second image. After the second camera collects pixel values of the second row of pixels of the second image, the second camera sends a second data packet to the first acquisition card, and the second data packet includes the pixel values of the second row of pixels of the second image. This is repeated for each row of pixels collected by the second camera. The second camera sends pixel values of each row of pixels to the first acquisition card, and the first acquisition card writes the pixel values of each row of pixels to the storage address segment.

[0045] For convenience, the pixel values in the second data packet are referred to as pixel values of the Mth row of pixels of the second image, which can be horizontally spliced with the pixel values of the Mth row of pixels of the first image.

[0046] For example, the second data packet also includes a second pixel coordinate of a first pixel in the Mth row of pixels in the first spliced image. The second pixel coordinate can include a horizontal position coordinate and a vertical position coordinate.

[0047] For example, when the second camera sends the second data packet to the first acquisition card, the second data packet can carry the second pixel coordinate of the first pixel in the Mth row of pixels in the first spliced image. For example, for the first pixel in the first row of pixels, the second pixel coordinate can be (100, 0), where the first 100 represents the horizontal position coordinate, i.e., the first spliced image is in the 101st column, and the second 0 represents the vertical position coordinate, i.e., the first spliced image is in the first row. For the first pixel in the second row of pixels, the second pixel coordinate can be (100, 1), where the first 100 represents the horizontal position coordinate, i.e., the first spliced image is in the 101st column, and the second 1 represents the vertical position coordinate, i.e., the first spliced image is in the second row. This is repeated for each row of pixels.

[0048] For the second pixel coordinate of the first pixel in the Mth row of pixels in the first spliced image, the horizontal position coordinate is 100, indicating that the first column of the second image corresponds to the 101st column of the first spliced image, and the vertical position coordinate is determined based on M, e.g., the vertical position coordinate is 0 when the Mth row of pixels is the first row of pixels, and this is repeated for each row of pixels.

[0049] For example, the second data packet further includes the total width of the first stitched image. For example, the first acquisition card sends the total width of the first stitched image to the second camera, and the second data packet can carry the total width of the first stitched image when the second camera sends the second data packet. Alternatively, the first acquisition card knows the total width of the first stitched image, and the second data packet can also not carry the total width of the first stitched image.

[0050] In summary, the first acquisition card can receive the second data packet sent by the second camera, and the second data packet includes the pixel value of the Mth row of pixels of the second image, the second pixel coordinate of the first pixel in the Mth row of pixels in the first stitched image, and the total width of the first stitched image.

[0051] For example, the first camera sends the first data packet to the first acquisition card, and the first data packet carries the first pixel coordinate. The second camera sends the second data packet to the first acquisition card, and the second data packet carries the second pixel coordinate. The first pixel coordinate and the second pixel coordinate are pixel coordinates in the image coordinate system. Referring to Figure 4 As shown in the figure, the upper left corner of the first pixel is taken as the (0, 0) position, the horizontal right is taken as the X axis, and the vertical down is taken as the Y axis, and the increments are made according to the X axis and the Y axis directions.

[0052] In actual use, the ROI (Region of Interest) operation of the camera Sensor (sensor) and the ROI operation of the ISP (Image Signal Processor) do not affect the transmission of the data packet, that is, the X Offset and the Y Offset can be 0. For example, the X Offset can be the horizontal coordinate of the upper left corner of the ROI, and the Y Offset can be the vertical coordinate of the upper left corner of the ROI.

[0053] In Figure 4 , HM (Height Max) represents the total height of the first stitched image, and the total height of the first stitched image is the total height of the first image and the total height of the second image. WM (Width Max) represents the width of the first image or the width of the second image. HP (Horizontal position) represents the horizontal position coordinate in the first pixel coordinate (HP in the first data packet) or the horizontal position coordinate in the second pixel coordinate (HP in the second data packet). VP (Vertical position) represents the vertical position coordinate in the first pixel coordinate (VP in the first data packet) or the vertical position coordinate in the second pixel coordinate (VP in the second data packet).

[0054] For example, when the first camera sends the first data packet to the first acquisition card, the first data packet can include Leader, Trailer and Payload. The Leader can include the total width of the first stitched image and the total height of the first stitched image. The Trailer can include the theoretical height of the first stitched image. The Payload includes the pixel value of the Mth row of pixels and the first pixel coordinates, which can include the horizontal position coordinate (HP of the first pixel in the Mth row of pixels in the first stitched image) and the vertical position coordinate (VP of the first pixel in the Mth row of pixels in the first stitched image).

[0055] For the total height of the first stitched image, whether the Mth row of pixels is the last row of pixels of the first stitched image is determined. If yes, the stitching process of the first stitched image can be ended, that is, the stitching operation of the first image is completed, and the image data of the first image is no longer received. If no, the first data packet of the next row of pixels of the Mth row of pixels is continuously received, that is, the image data of the first image is continuously received, until the Mth row of pixels is the last row of pixels of the first stitched image.

[0056] For the theoretical height of the first stitched image, the theoretical height mainly plays a checking role to determine whether there is a data loss in the transmission process. For example, the first image (the first stitched image) should be 100 rows, but the camera only collects 98 rows when collecting the image, so the total height of the first stitched image is 98, and the theoretical height of the first stitched image is 100. Based on the above situation, it can be determined that there is a data loss.

[0057] When the second camera sends the second data packet to the first acquisition card, the second data packet can include Leader, Trailer and Payload. The Leader includes the total width of the first stitched image and the total height of the first stitched image. The Trailer includes the theoretical height of the first stitched image. The Payload includes the pixel value of the Mth row of pixels and the second pixel coordinates, which include the horizontal position coordinate and the vertical position coordinate.

[0058] In summary, the data packets of all cameras are sent to the first acquisition card, and the first acquisition card can know the coordinates of each row of pixels of each camera by analyzing the Leader, Trailer and Payload of the data packet. For example, assuming that the total width of the first stitched image is 16384 and the total height of the first stitched image is 4, the coordinates of each row of pixels of each camera can be seen from Table 1.

[0059] Table 1 For the first row of pixels (Line0), the first acquisition card parses the first pixel coordinate (0, 0) from the first data packet, and determines all pixel coordinates of the first row of pixels of the first image, such as (0, 0),..., (8191, 0). The first acquisition card parses the second pixel coordinate (8192, 0) from the second data packet, and determines all pixel coordinates of the first row of pixels of the second image, such as (8192, 0),..., (16383, 0), and so on.

[0060] In step 303, the first acquisition card determines a first offset start address of an image cache area based on the first pixel coordinate, where the image cache area can be a storage space allocated for the image. For example, the first offset start address is determined based on the first pixel coordinate and the total width of the first stitched image. In addition, the width of the first image is used to determine the size of the storage space occupied by a row of pixels (i.e., the product of the width and the space occupied by each pixel), and the sum of the first offset start address and the size of the storage space is used as a first end address. In this way, the storage address segment between the first offset start address and the first end address is referred to as a first storage address segment.

[0061] In step 304, the first acquisition card determines a second offset start address of the image cache area based on the second pixel coordinate. For example, the second offset start address is determined based on the second pixel coordinate and the total width of the first stitched image. In addition, the width of the second image is used to determine the size of the storage space occupied by a row of pixels, and the sum of the second offset start address and the size of the storage space is used as a second end address. In this way, the storage address segment between the second offset start address and the second end address is referred to as a second storage address segment.

[0062] For example, it is assumed that the first pixel coordinate includes a horizontal position coordinate HP1 and a vertical position coordinate VP1, the second pixel coordinate includes a horizontal position coordinate HP2 and a vertical position coordinate VP2, the total width of the first stitched image is K, the first offset start address is HP1+VP1×K, and the second offset start address is HP2+VP2×K.

[0063] For example, referring to Table 1, for the first row of pixels, HP1 is 0, VP1 is 0, K is 16384, HP2 is 8192, and VP2 is 0. Thus, the first offset start address is 0, and the second offset start address is 8192. For the second row of pixels, HP1 is 0, VP1 is 1, HP2 is 8192, and VP2 is 1. Thus, the first offset start address is 16384, and the second offset start address is 24576. For the third row of pixels, HP1 is 0, VP1 is 2, HP2 is 8192, and VP2 is 2. Thus, the first offset start address is 32768, and the second offset start address is 40960. For the fourth row of pixels, HP1 is 0, VP1 is 3, HP2 is 8192, and VP2 is 3. Thus, the first offset start address is 49152, and the second offset start address is 57344.

[0064] In a possible implementation, when a stitching card stitches images, the image cache area includes a physical storage area corresponding to the first stitching card. For example, a terminal device in which the first stitching card is located divides a cache area (or a cache area is divided in a cloud device, and the location of the cache area is not limited). The cache area is used to store image data, and the cache area is referred to as an image cache area (storage space). The image cache area includes a physical storage area corresponding to the first stitching card.

[0065] For example, the physical storage area corresponding to the first stitching card includes a plurality of storage sub-areas. Each storage sub-area is used to store pixel values of a same row of pixels of each image stitched by the first stitching card. When the total height of the first stitched image is A, that is, there are A rows of pixels in the first stitched image, the physical storage area corresponding to the first stitching card includes A storage sub-areas. The first storage sub-area is used to store pixel values of the first row of pixels of each image, the second storage sub-area is used to store pixel values of the second row of pixels of each image, and so on, and the A-th storage sub-area is used to store pixel values of the A-th row of pixels of each image.

[0066] For example, a storage address of the image cache area can be a physical address (that is, an actual address used to store data). A physical address occupied by a storage sub-area in the image cache area is continuous, and a physical address occupied by an adjacent storage sub-area in the image cache area is continuous. For example, a physical address occupied by the second storage sub-area in the image cache area is continuous with a physical address occupied by the first storage sub-area in the image cache area, a physical address occupied by the third storage sub-area in the image cache area is continuous with a physical address occupied by the second storage sub-area in the image cache area, and so on.

[0067] For example, the total width of the first spliced image is K, i.e. there are K pixels in a row of the first spliced image, and each pixel occupies P bytes, so a row of the first spliced image occupies a storage area of KxP. Based on this, for each storage sub-area, the storage sub-area includes a storage area of KxP. Assuming that the starting physical address of the image cache area is physical address X, the first storage sub-area occupies physical address X to (physical address X+KxP), the second storage sub-area occupies (physical address X+KxP) to (physical address X+2xKxP), the third storage sub-area occupies (physical address X+2xKxP) to (physical address X+3xKxP), and so on.

[0068] For example, for the first row of pixels, the first offset starting address is 0, and the second offset starting address is 8192, so the first offset starting address 0 corresponds to the physical address X (i.e. the starting physical address) of the physical storage area. Since the width of the first image is 8192, the first row occupies a storage area of 8192xP in total, so the first storage address segment is physical address X to physical address (X+8192xP).

[0069] In addition, the second offset starting address 8192 corresponds to the physical address (X+8192xP) of the physical storage area. Since the width of the second image is 8192, the first row occupies a storage area of 8192xP in total, so the second storage address segment is physical address (X+8192xP) to physical address (X+16384xP).

[0070] Obviously, for the first row of pixels, the first image occupies the first storage address segment, and the second image occupies the second storage address segment. The first storage address segment and the second storage address segment correspond to the first storage sub-area, i.e. the first storage address segment and the second storage address segment correspond to physical address X to physical address (X+16384xP).

[0071] For example, for the second row of pixels, the first offset starting address is 16384, and the second offset starting address is 24576. The first offset starting address 16384 corresponds to the physical address (X+16384xP) of the physical storage area. Since the width of the first image is 8192, the second row occupies a storage area of 8192xP in total, so the first storage address segment is physical address (X+16384xP) to physical address (X+24576xP).

[0072] In addition, the second offset start address 24576 corresponds to a physical address (X+24576×P) of the physical storage area, and since the width of the second image is 8192, the second row occupies a storage area of 8192×P in total, so that the second storage address segment is the physical address (X+24576×P) to the physical address (X+32768×P).

[0073] For the second row of pixels, the first image occupies the first storage address segment, and the second image occupies the second storage address segment, the first storage address segment and the second storage address segment correspond to the second storage sub-area of the physical storage area, and the first storage address segment and the second storage address segment correspond to the physical address (X+16384×P) to the physical address (X+32768×P).

[0074] By analogy, for the i-th row of pixels, the i-th row of pixels of the first image occupies the first storage address segment, and the i-th row of pixels of the second image occupies the second storage address segment, the first storage address segment and the second storage address segment correspond to the i-th storage sub-area of the physical storage area, and the i-th storage sub-area of the physical storage area can be used to horizontally splice the i-th row of pixels of the first image and the i-th row of pixels of the second image.

[0075] In a possible implementation, when a capture card splices images, the image cache area includes a physical storage area corresponding to the first capture card. The physical storage area corresponding to the first capture card includes a plurality of storage sub-areas, and each storage sub-area is used to store pixel values of the same row of pixels of each image spliced by the first capture card. For example, the physical storage area corresponding to the first capture card includes A storage sub-areas.

[0076] For example, the storage address of the image cache area can be a physical address, a storage sub-area occupies a continuous physical address in the image cache area, and adjacent storage sub-areas occupy continuous physical addresses in the image cache area. For example, the total width of the first spliced image is K, and each pixel occupies P bytes, so that each storage sub-area can include a storage area of K×P.

[0077] The physical storage area corresponding to the first capture card can be mapped to a virtual cache area (i.e., a virtual space) with continuous logical addresses. The storage address of the virtual cache area can be a logical address (not a physical address used to store data), and the virtual cache area can include a plurality of virtual sub-areas. A virtual sub-area occupies a continuous logical address in the virtual cache area, and adjacent virtual sub-areas occupy continuous logical addresses in the virtual cache area. For example, the logical address occupied by the second virtual sub-area in the virtual cache area is continuous with the logical address occupied by the first virtual sub-area in the virtual cache area, and so on.

[0078] For example, the starting logical address of the first virtual sub-region corresponds to the starting physical address of the first storage sub-region, and the address length of the first virtual sub-region is the same as the address length of the first storage sub-region. The starting logical address of the second virtual sub-region corresponds to the starting physical address of the second storage sub-region, and the address length of the second virtual sub-region is the same as the address length of the second storage sub-region, and so on. In this way, the plurality of storage sub-regions of the physical storage region can be mapped into the virtual cache region with logical addresses being continuous, and the virtual cache region includes the plurality of virtual sub-regions corresponding to the plurality of storage sub-regions.

[0079] For example, the first acquisition card can maintain an address mapping relationship, which includes a mapping relationship between the logical addresses of the virtual cache region and the physical addresses of the physical storage region. For a logical address of the virtual cache region, the physical address of the physical storage region can be queried through the address mapping relationship.

[0080] For example, a third offset starting address of the virtual cache region can be determined based on the first pixel coordinates, and the third offset starting address of the virtual cache region can be mapped into a first offset starting address of the image cache region based on the address mapping relationship. Similarly, a fourth offset starting address of the virtual cache region can be determined based on the second pixel coordinates, and the fourth offset starting address of the virtual cache region can be mapped into a second offset starting address of the image cache region based on the address mapping relationship.

[0081] For example, assuming that the first pixel coordinates include a horizontal position coordinate HP1 and a vertical position coordinate VP1, the second pixel coordinates include a horizontal position coordinate HP2 and a vertical position coordinate VP2, and the total width of the first spliced image is K, then the third offset starting address can be HP1+VP1×K, and the fourth offset starting address can be HP2+VP2×K. The third offset starting address represents an offset address for the starting logical address of the virtual cache region, and the fourth offset starting address represents an offset address for the starting logical address of the virtual cache region. For example, the starting logical address of the virtual cache region is logical address 0, and both the third offset starting address and the fourth offset starting address represent offset addresses for logical address 0.

[0082] For example, for the first row of pixels, the third offset starting address is 0 and the fourth offset starting address is 8192, for the second row of pixels, the third offset starting address is 16384 and the fourth offset starting address is 24576, for the third row of pixels, the third offset starting address is 32768 and the fourth offset starting address is 40960, and for the fourth row of pixels, the third offset starting address is 49152 and the fourth offset starting address is 57344.

[0083] Based on the address mapping relationship between the logical address of the virtual cache area and the physical address of the physical storage area, the logical address of the virtual cache area can be mapped to the physical address of the physical storage area. In this way, the third offset starting address (i.e., the logical address) of the virtual cache area can be mapped to the first offset starting address (i.e., the physical address) of the image cache area, and the fourth offset starting address (i.e., the logical address) of the virtual cache area can be mapped to the second offset starting address (i.e., the physical address) of the image cache area.

[0084] At step 305, the first acquisition card stores the pixel values of the Mth row of pixels of the first image starting from the first offset starting address, such as storing the pixel values of the Mth row of pixels of the first image in the first storage address segment, and stores the pixel values of the Mth row of pixels of the second image starting from the second offset starting address, such as storing the pixel values of the Mth row of pixels of the second image in the second storage address segment. The first storage address segment and the second storage address segment can be a continuous address block (i.e., a continuous address segment) of the image cache area. Based on this, the storage address segments of the same pixel rows of adjacent images captured by the first camera and the second camera are continuous, i.e., one storage address segment is continuous to the next storage address segment, for storing adjacent image data in the stitched image.

[0085] For the first row of pixels, the first storage address segment is physical address X to physical address (X+8192×P), and the second storage address segment is physical address (X+8192×P) to physical address (X+16384×P). For the second row of pixels, the first storage address segment is physical address (X+16384×P) to physical address (X+24576×P), and the second storage address segment is physical address (X+24576×P) to physical address (X+32768×P). Similarly, for the third row of pixels, the first storage address segment is physical address (X+24576×P) to physical address (X+32768×P), and the second storage address segment is physical address (X+32768×P) to physical address (X+49152×P). When the first acquisition card obtains the first row of pixels of the first image, it can store the pixel values of the first row of pixels starting from physical address X and ending at physical address (X+8192×P), completing the pixel value storage process. When the first acquisition card obtains the second row of pixels of the first image, it can store the pixel values of the second row of pixels starting from physical address (X+16384×P) and ending at physical address (X+24576×P), completing the pixel value storage process. Obviously, the second row of pixels of the first image does not start from physical address (X+8192×P), i.e., the second row of pixels of the first image is not stored continuously with the first row of pixels of the first image.

[0086] When the first acquisition card gets the first row of pixels of the second image, it can start storing pixel values of the second row of pixels from physical address (X+8192XP) and store until physical address (X+16384XP), completing the pixel value storage process. Obviously, the first row of pixels of the second image does not start from physical address X, but from physical address (X+8192XP), so it is stored continuously with the first row of pixels of the first image, i.e. the first storage address segment and the second storage address segment can be continuous address segments of the image cache region.

[0087] When the first acquisition card gets the second row of pixels of the second image, it can start storing pixel values of the second row of pixels from physical address (X+24576XP) and store until physical address (X+32768XP), completing the pixel value storage process. Obviously, the second row of pixels of the second image does not start from physical address (X+16384XP), i.e. the second row of pixels of the second image is not stored continuously with the first row of pixels of the second image.

[0088] Moreover, the second row of pixels of the second image is stored continuously with the second row of pixels of the first image, i.e. the first storage address segment and the second storage address segment can be continuous address segments of the image cache region.

[0089] For example, after storing pixel values of each row of pixels of the first image and the second image, image storage is completed, i.e. image splicing is completed synchronously. In this way, image data is directly written into a specified position of the image cache region, and after image transmission of all cameras is completed, image splicing is completed synchronously.

[0090] In a possible image splicing scheme, an image cache can be configured for each camera, the first image acquired by the first camera is stored into the image cache corresponding to the first camera, and the second image acquired by the second camera is stored into the image cache corresponding to the second camera. After image acquisition of all cameras is completed, image data is copied from the image cache corresponding to the first camera and the image cache corresponding to the second camera to a target cache region in sequence, and image splicing is completed in the target cache region. However, in the above manner, an image cache needs to be additionally configured for each camera, and a large amount of storage space needs to be occupied. Moreover, the above manner needs to store image data first and then copy image data, and the operation is time-consuming, and the image acquisition performance is poor.

[0091] Unlike the methods described above, this embodiment only requires one image buffer area (target buffer area). The first acquisition card stores the first image captured by the first camera and the second image captured by the second camera in the target buffer area, thereby directly completing image data storage and image stitching, achieving a high-performance image stitching solution. The image stitching operation is implemented on the first acquisition card, which directly writes all images captured by all cameras to the target buffer area, avoiding memory copying operations and achieving zero-copy image transmission and stitching. The efficiency of image transmission and stitching is greatly improved, and even if the number of cameras continues to increase, there will be no performance loss, making it highly practical. It can realize image stitching while transmitting image data, and the stitching is completed as soon as the transmission is finished, achieving high-performance image transmission and image stitching.

[0092] Scenario 2: The CIS camera is connected to multiple acquisition cards of a single terminal device. See also... Figure 5 The diagram illustrates a CIS camera connected to multiple capture cards on a terminal device. The CIS camera can include sub-camera 1 and sub-camera 2; two sub-cameras are used here as an example. The number of sub-cameras can be greater, and their implementation is similar to that of two sub-cameras, which will not be elaborated further. Sub-camera 1 and sub-camera 2 can be sub-cameras within the CIS camera or two independent cameras. Sub-camera 1 is connected to capture card a, and sub-camera 2 is connected to capture card b. Capture cards a and b can be deployed on the terminal device.

[0093] Each acquisition card corresponds to at least one sub-camera in a multi-camera system. It's necessary to allocate corresponding storage space for the images acquired by each sub-camera to ensure that the storage address segments for the same pixel rows in adjacent images acquired by each sub-camera are contiguous. For example, if there are at least two acquisition cards, a logical address of the virtual space corresponding to the storage space is allocated to each acquisition card. The acquisition card maps the logical address to the physical address of the storage space, and the image data is written to the storage address segment corresponding to the sub-camera based on the mapped physical address. In this case, since at least two acquisition cards correspond to all sub-cameras, the storage address allocated to the acquisition card is the logical address of the virtual space corresponding to the storage space. The logical address of the virtual space corresponds to the pixel coordinates of the images acquired by the sub-cameras. The logical address can be determined based on the pixel coordinates of the image data, mapped to the physical address of the storage space, and the image data is written to the storage address segment corresponding to the sub-camera based on the mapped physical address.

[0094] The embodiment provides an image splicing method, wherein a sub-camera 1 is referred to as a first camera (the number of the first cameras is at least one, and each first camera is processed in the same way, and one first camera is taken as an example), a sub-camera 2 is referred to as a second camera (the number of the second cameras is at least one, and each second camera is processed in the same way, and one second camera is taken as an example), a capture card a is referred to as a first capture card, and a capture card b is referred to as a second capture card. Referring to Figure 6 Fig. 1 is a flowchart of the image splicing method, and the method comprises the following steps. In step 601, the first capture card receives a first data packet sent by the first camera, and the first data packet can comprise pixel values of Mth row pixels of a first image, where M can be a positive integer.

[0095] For example, the first data packet further comprises a first pixel coordinate of a first pixel in the Mth row pixels in a first spliced image, and the first spliced image can be obtained by splicing images collected by all cameras connected to the first capture card. If there is one first camera, the first spliced image is the first image, and if there are multiple first cameras, the first spliced image is a spliced image of the multiple first images.

[0096] For example, the first capture card can receive the first data packet sent by the first camera, and the first data packet comprises the pixel values of the Mth row pixels of the first image, the first pixel coordinate of the first pixel in the Mth row pixels in the first spliced image, and a total width of the first spliced image.

[0097] In step 602, the second capture card receives a second data packet sent by the second camera, and the second data packet can comprise pixel values of Mth row pixels of a second image, where M can be a positive integer.

[0098] For example, the second data packet further comprises a second pixel coordinate of a first pixel in the Mth row pixels in a second spliced image, and the second spliced image can be obtained by splicing images collected by all cameras connected to the second capture card. If there is one second camera, the second spliced image is the second image, and if there are multiple second cameras, the second spliced image is a spliced image of the multiple second images.

[0099] For example, the second capture card can receive the second data packet sent by the second camera, and the second data packet comprises the pixel values of the Mth row pixels of the second image, the second pixel coordinate of the first pixel in the Mth row pixels in the second spliced image, and a total width of the second spliced image.

[0100] Different from case 1, case 2 has two acquisition cards, each of which is completely independent and cannot communicate with each other, so that the first pixel coordinate is a pixel coordinate in the first spliced image, the second pixel coordinate is a pixel coordinate in the second spliced image, and neither the first pixel coordinate nor the second pixel coordinate is a pixel coordinate in the final spliced image (the first spliced image and the first spliced image are spliced to obtain). Neither the first acquisition card nor the second acquisition card can obtain the pixel coordinate in the final spliced image.

[0101] The data packet of the first camera is sent to the first acquisition card, and the first acquisition card determines the coordinates of each row of pixels of the first camera by analyzing the Leader, Trailer and Payload of the data packet. Assuming that the total width of the first spliced image is 8192 and the total height of the first spliced image is 4, the coordinates of each row of pixels of the first camera can be seen from Table 2. The data packet of the second camera is sent to the second acquisition card, and the second acquisition card determines the coordinates of each row of pixels of the second camera by analyzing the Leader, Trailer and Payload of the data packet. Assuming that the total width of the second spliced image is 8192 and the total height of the second spliced image is 4, the coordinates of each row of pixels of the second camera can be seen from Table 2.

[0102] Table 2 For the first row of pixels (Line0), the first acquisition card analyzes the first pixel coordinate (0, 0) from the first data packet and determines all pixel coordinates of the first row of pixels of the first image, such as (0, 0),..., (8191, 0). The second acquisition card analyzes the second pixel coordinate (0, 0) from the second data packet and determines all pixel coordinates of the first row of pixels of the second image, (0, 0),..., (8191, 0), and so on.

[0103] In step 603, the first acquisition card determines a third offset starting address of the virtual cache area based on the first pixel coordinate, such as determining the third offset starting address based on the first pixel coordinate and the total width of the first spliced image.

[0104] In step 604, the second acquisition card determines a fourth offset starting address of the virtual cache area based on the second pixel coordinate, such as determining the fourth offset starting address based on the second pixel coordinate and the total width of the second spliced image.

[0105] For example, assuming that the first pixel coordinate comprises a horizontal position coordinate HP1 and a vertical position coordinate VP1, the second pixel coordinate comprises a horizontal position coordinate HP2 and a vertical position coordinate VP2, the total width of the first stitched image is K1, and the total width of the second stitched image is K2, the third offset start address is HP1+VP1×K1, and the fourth offset start address is HP2+VP2×K2. For example, referring to Table 2, for the first row of pixels, HP1 is 0, VP1 is 0, K1 is 8192, HP2 is 0, VP2 is 0, and K2 is 8192, the third offset start address is 0, and the fourth offset start address is 0. The same applies to other rows of pixels.

[0106] In step 605, the first acquisition card maps the third offset start address of the virtual cache region to the first offset start address of the image cache region based on the obtained address mapping relationship. The address mapping relationship comprises a mapping relationship between a logical address of the virtual cache region and a physical address of the image cache region.

[0107] In step 606, the second acquisition card maps the fourth offset start address of the virtual cache region to the second offset start address of the image cache region based on the obtained address mapping relationship.

[0108] In a possible implementation, when the plurality of acquisition cards stitch the images, the image cache region comprises a physical storage region corresponding to each acquisition card. The physical storage region corresponding to the first acquisition card comprises a plurality of storage sub-regions, each of which is used to store pixel values of the same row of pixels of each image stitched by the first acquisition card; a storage sub-region occupies a continuous physical address in the image cache region, and different storage sub-regions occupy non-continuous physical addresses in the image cache region. The physical storage region corresponding to the second acquisition card comprises a plurality of storage sub-regions, each of which is used to store pixel values of the same row of pixels of each image stitched by the second acquisition card; a storage sub-region occupies a continuous physical address in the image cache region, and different storage sub-regions occupy non-continuous physical addresses in the image cache region.

[0109] For example, the total width of the first stitched image is K1, and each pixel occupies P bytes, so that one row of the first stitched image occupies a storage region with a size of K1×P. For each storage sub-region corresponding to the first acquisition card, the storage sub-region comprises a storage region with a size of K1×P. The total width of the second stitched image is K2, and each pixel occupies P bytes, so that one row of the second stitched image occupies a storage region with a size of K2×P. For each storage sub-region corresponding to the second acquisition card, the storage sub-region comprises a storage region with a size of K2×P.

[0110] Suppose the starting physical address of the image cache region is physical address X, then the first storage sub-region corresponding to the first acquisition card can occupy physical address X to physical address (X+K1XP), the first storage sub-region corresponding to the second acquisition card can occupy physical address (X+K1XP) to physical address (X+K1XP+K2XP), the second storage sub-region corresponding to the first acquisition card can occupy physical address (X+K1XP+K2XP) to physical address (X+2K1XP+K2XP), the second storage sub-region corresponding to the second acquisition card can occupy physical address (X+2K1XP+K2XP) to physical address (X+2K1XP+2K2XP), and so on.

[0111] By way of example, when K1=K2=8192 and P=1, the multiple storage sub-regions corresponding to the first acquisition card include physical address X to physical address (X+8192), physical address (X+16384) to physical address (X+24576), physical address (X+32768) to physical address (X+40960), and so on. Obviously, the physical addresses occupied by the multiple storage sub-regions corresponding to the first acquisition card are discontinuous. The multiple storage sub-regions corresponding to the second acquisition card include physical address (X+8192) to physical address (X+16384), physical address (X+24576) to physical address (X+32768), and so on. Obviously, the physical addresses occupied by the multiple storage sub-regions corresponding to the second acquisition card are discontinuous. In addition, the first storage sub-region of the second acquisition card and the first storage sub-region of the first acquisition card occupy continuous physical addresses.

[0112] By way of example, the physical storage region corresponding to the first acquisition card can be mapped to a virtual cache region with continuous logical addresses, the storage addresses of the virtual cache region can be logical addresses, and the virtual cache region can include multiple virtual sub-regions. One virtual sub-region occupies continuous logical addresses in the virtual cache region, and adjacent virtual sub-regions occupy continuous logical addresses in the virtual cache region. For example, suppose the starting logical address of the virtual cache region is logical address Y, then the first virtual sub-region corresponding to the first acquisition card occupies logical address Y to logical address (Y+K1XP), the second virtual sub-region occupies logical address (Y+K1XP) to logical address (Y+2K1XP), the third virtual sub-region occupies logical address (Y+2K1XP) to logical address (Y+3K1XP), and so on, i.e., adjacent virtual sub-regions occupy continuous logical addresses. For example, one virtual sub-region occupies logical address Y to logical address (Y+8192), and the second virtual sub-region occupies logical address (Y+8192) to logical address (Y+2*16384).

[0113] Exemplarily, the physical storage area corresponding to the second acquisition card can be mapped to a virtual cache area with consecutive logical addresses, the storage address of the virtual cache area can be a logical address, and the virtual cache area can include a plurality of virtual sub-areas. One virtual sub-area occupies consecutive logical addresses in the virtual cache area, and adjacent virtual sub-areas occupy consecutive logical addresses in the virtual cache area. For example, assuming that the starting logical address of the virtual cache area is logical address Z, the first virtual sub-area corresponding to the second acquisition card occupies logical address Z to logical address (Z+K2×P), the second virtual sub-area occupies logical address (Z+K2×P) to logical address (Z+2×K2×P), and so on, that is, adjacent virtual sub-areas occupy consecutive logical addresses. For example, one virtual sub-area occupies logical address Z to logical address (Z+8192), and the second virtual sub-area occupies logical address (Z+8192) to logical address (Z+2×16384).

[0114] Exemplarily, the virtual cache area corresponding to the first acquisition card and the image cache area can establish an address mapping relationship, and the address mapping relationship includes a mapping relationship between the logical address of the virtual cache area and the physical address of the image cache area. For example, the starting logical address (Y) of the first virtual sub-area corresponds to the starting physical address (X) of the first storage sub-area, and the address length of the first virtual sub-area is the same as the address length of the first storage sub-area. The starting logical address (Y+K1×P) of the second virtual sub-area corresponds to the starting physical address (X+K1×P+K2×P) of the second storage sub-area, and the address length of the second virtual sub-area is the same as the address length of the second storage sub-area, and so on. In this way, a plurality of storage sub-areas of the physical storage area of the first acquisition card can be mapped to a virtual cache area with consecutive logical addresses, and the virtual cache area includes a plurality of virtual sub-areas corresponding to the plurality of storage sub-areas.

[0115] For example, the second acquisition card corresponds to the virtual cache area and the image cache area, and an address mapping relationship can be established, and the address mapping relationship includes a mapping relationship between a logical address of the virtual cache area and a physical address of the image cache area. For example, a starting logical address (Z) of a first virtual sub-area corresponds to a starting physical address (X+K1×P) of a first storage sub-area, and an address length of the first virtual sub-area is the same as an address length of the first storage sub-area. A starting logical address (Z+K2×P) of a second virtual sub-area corresponds to a starting physical address (X+2×K1×P+K2×P) of a second storage sub-area, and an address length of the second virtual sub-area is the same as an address length of the second storage sub-area, and so on. In this way, the plurality of storage sub-areas of the physical storage area of the second acquisition card can be mapped into the virtual cache area with continuous logical addresses, and the virtual cache area includes a plurality of virtual sub-areas corresponding to the plurality of storage sub-areas.

[0116] In summary, the first acquisition card can obtain the address mapping relationship for the first acquisition card, and then map the third offset starting address of the virtual cache area to the first offset starting address of the image cache area based on the address mapping relationship, that is, obtain the first offset starting address. The second acquisition card can obtain the address mapping relationship for the second acquisition card, and then map the fourth offset starting address of the virtual cache area to the second offset starting address of the image cache area based on the address mapping relationship, that is, obtain the second offset starting address.

[0117] In case 1, since each row of data coordinates of the camera corresponds to a memory address block one by one, the acquisition card driver does not need to do address mapping. In case 2, since the acquisition card and the camera cannot perceive how many acquisition cards a CIS camera is connected to, the camera on each acquisition card can only be processed individually, resulting in that each row of data coordinates of the camera does not correspond to a memory address block. Therefore, the acquisition card driver needs to do address mapping, that is, the acquisition card driver obtains the address mapping relationship and sends the address mapping relationship to each acquisition card.

[0118] The acquisition card driver has mapped each row of data coordinates of the camera to a memory address block, ensuring that the position of the acquisition card writing image data is correct. For example, referring to Figure 7As shown, it is a mapping diagram of coordinates and memory address blocks when the CIS camera is connected to multiple acquisition cards. The core of the coordinate and memory address mapping is the inter-driver communication. Since each acquisition card corresponds to an acquisition card driver and is independent of each other, the large memory (image cache area) applied by the upper software is continuous, but the memory block addresses allocated to each acquisition card driver after mapping are discontinuous. Therefore, the memory blocks with offset addresses 0-8192, 16384-24576, 32768-40960, 49152-57344 can be allocated to the first acquisition card to write the image data of the sub-camera 1, and the memory blocks with offset addresses 8192-16384, 24576-32768, 40960-49152, 57344-65536 can be allocated to the second acquisition card to write the image data of the sub-camera 2. The above process can also realize zero-copy image transmission and image stitching. The acquisition card completes image stitching after image transmission is completed.

[0119] In step 607, the first acquisition card stores the pixel values of the Mth row of pixels of the first image from the first offset start address, such as storing the pixel values of the Mth row of pixels of the first image in the first storage address segment. For example, the first offset start address represents a physical address in the image cache area, the storage space size occupied by a row of pixels is determined based on the width of the first image (i.e. the product value of the width and the space occupied by each pixel), and the sum of the first offset start address and the storage space size is the first end address. The first storage address segment is the storage address segment between the first offset start address and the first end address.

[0120] In step 608, the second acquisition card stores the pixel values of the Mth row of pixels of the second image from the second offset start address, such as storing the pixel values of the Mth row of pixels of the second image in the second storage address segment. The first storage address segment and the second storage address segment can be continuous address segments of the image cache area. Based on this, the storage address segments of the same pixel rows of adjacent images collected by the first camera and the second camera are continuous, i.e. one storage address segment is followed by a continuous storage address segment, which is used to store adjacent image data in the stitched image.

[0121] For example, for the first row of pixels, the first offset start address is 0, the second offset start address is 8192, the first storage address segment is physical address X to physical address (X+8192×P), and the second storage address segment is physical address (X+8192×P) to physical address (X+16384×P). Similarly, the above is true.

[0122] For example, the first acquisition card stores the pixel values of the first row of pixels of the first image from physical address X to physical address (X+8192xP), and stores the pixel values of the second row of pixels of the first image from physical address (X+16384xP) to physical address (X+24576xP), and so on. The second acquisition card stores the pixel values of the first row of pixels of the second image from physical address (X+8192xP) to physical address (X+16384xP), and stores the pixel values of the second row of pixels of the second image from physical address (X+24576xP) to physical address (X+32768xP), and so on.

[0123] For example, after the pixel values of each row of pixels of the first image and the second image are stored, the image storage is completed, i.e., the image stitching is completed synchronously. In this way, the image data is directly written into the specified position of the image buffer area, and the image stitching is completed synchronously after the image transmission of all cameras is completed.

[0124] Case 3: The CIS camera is connected to multiple acquisition cards of multiple terminal devices. Referring to FIGS. 13 and 14, which are schematic diagrams of the CIS camera connected to multiple acquisition cards of multiple terminal devices, and FIGS. 15 and 16, which are schematic diagrams of the CIS camera connected to multiple acquisition cards of multiple terminal devices, the terminal devices are PCs in FIGS. 15 and 16. Figure 8A Figure 8B Case 3: The CIS camera is connected to multiple acquisition cards of multiple terminal devices. Referring to FIGS. 13 and 14, which are schematic diagrams of the CIS camera connected to multiple acquisition cards of multiple terminal devices, and FIGS. 15 and 16, which are schematic diagrams of the CIS camera connected to multiple acquisition cards of multiple terminal devices, the terminal devices are PCs in FIGS. 15 and 16. Figure 8A Figure 8B For example, the first acquisition card stores the pixel values of the first row of pixels of the first image from physical address X to physical address (X+8192xP), and stores the pixel values of the second row of pixels of the first image from physical address (X+16384xP) to physical address (X+24576xP), and so on. The second acquisition card stores the pixel values of the first row of pixels of the second image from physical address (X+8192xP) to physical address (X+16384xP), and stores the pixel values of the second row of pixels of the second image from physical address (X+24576xP) to physical address (X+32768xP), and so on.

[0125] By deploying multiple PCs, the image can be divided into multiple parts for different image processing on different PCs, thereby improving the efficiency of image processing. In the scenario of multiple PCs, the acquisition card and the camera on each PC are processed separately, and the processing manner of the acquisition card and the camera can refer to case 1 and case 2.

[0126] ​​In a possible implementation, if the image cache area is a cache area of a cloud device, the images of the sub-camera 1, the sub-camera 2, the sub-camera 3, and the sub-camera 4 can also be spliced, that is, the images of all the sub-cameras corresponding to the plurality of PCs are spliced, and the implementation can refer to Figure 2

[0127] In this embodiment, only the basic topology is described, and in an actual application scenario, the topology can be more complex. However, no matter how complex the topology is, the image splicing scheme can be the first case, or the second case, or a combination of the first case and the second case.

[0128] As can be seen from the above technical solutions, in this embodiment, a high-performance image splicing scheme of a CIS camera is proposed, zero-copy image splicing is achieved, and the overall performance, CPU occupancy, and memory occupancy are significantly improved. When one CIS camera is connected to a plurality of capture cards, the transmission bandwidth can be doubled, the use flexibility of the CIS camera is improved by combining the high-performance image splicing, and the actual application scenarios of different users are met.

[0129] Based on the same application concept as the above method, in this embodiment, an image splicing device is proposed, which is applied to a capture card corresponding to at least one sub-camera in a multi-camera system; a corresponding storage space is allocated for an image collected by the sub-camera, so that storage address segments of the same pixel rows of adjacent images collected by the sub-camera are continuous; as shown in Figure 9 The structure of the image splicing device is shown in FIG. 9, and the image splicing device includes: an acquisition module 91 configured to acquire image data collected by the sub-camera; and a processing module 92 configured to write the image data into a storage address segment corresponding to the sub-camera.

[0130] For example, the at least one sub-camera corresponds to one capture card, and a physical address of the storage space corresponds to a pixel coordinate of the image collected by the sub-camera; and the processing module 92 is specifically configured to write the image data into the storage address segment corresponding to the sub-camera based on the pixel coordinate of the image data.

[0131] ​Exemplarily, the storage address allocated to the at least two acquisition cards corresponding to the at least one sub-camera is a logical address of a virtual space corresponding to a storage space, and the logical address of the virtual space corresponds to a pixel coordinate of an image collected by the sub-camera; and the processing module 92 is specifically configured to: determine a logical address based on the pixel coordinate of the image data, map the logical address to a physical address of the storage space, and write the image data into the storage address segment corresponding to the sub-camera based on the mapped physical address.

[0132] Exemplarily, the image data includes a pixel value of an Mth row of pixels collected by the sub-camera, and a pixel coordinate of a first pixel in the Mth row of pixels in a spliced image, and the spliced image is obtained by splicing images collected by the sub-cameras in the multi-camera system; and the processing module 92 is specifically configured to: determine an offset starting address corresponding to the image data in the storage space based on the pixel coordinate, and store the pixel value of the Mth row of pixels from the offset starting address; and a storage address segment subsequent to the storage address segment corresponding to the image data in the storage space is used to store adjacent image data in the spliced image.

[0133] Exemplarily, the image data further includes a total width of the spliced image; and the processing module 92 is specifically configured to: determine the offset starting address based on the pixel coordinate and the total width of the spliced image.

[0134] Exemplarily, the processing module 92 is specifically configured to: determine a logical starting address of a virtual space based on the pixel coordinate when determining the offset starting address corresponding to the image data in the storage space; and map the logical starting address of the virtual space to the offset starting address of the storage space based on an acquired address mapping relationship; and the address mapping relationship includes a mapping relationship between a logical address of a virtual space and a physical address of a storage space.

[0135] Exemplarily, when multiple acquisition cards stitch images, the storage space comprises a physical storage area corresponding to each acquisition card; wherein the physical storage area corresponding to each acquisition card comprises multiple storage sub-areas, and the storage sub-areas are used to store pixel values of the same row of pixels of each image stitched by the acquisition card; wherein a storage sub-area occupies a continuous physical address in the storage space, and different storage sub-areas occupy discontinuous physical addresses in the storage space; the physical storage area corresponding to each acquisition card is mapped to a virtual space with continuous logical addresses; and the address mapping relationship comprises a mapping relationship between the logical addresses of the virtual space and the physical addresses of the physical storage area corresponding to each acquisition card.

[0136] Exemplarily, when one acquisition card stitches images, the storage space comprises a physical storage area corresponding to the acquisition card; wherein the physical storage area corresponding to the acquisition card comprises multiple storage sub-areas, and the storage sub-areas are used to store pixel values of the same row of pixels of each image stitched by the acquisition card; wherein a storage sub-area occupies a continuous physical address in the storage space, and adjacent storage sub-areas occupy continuous physical addresses in the storage space; the physical storage area corresponding to the acquisition card is mapped to a virtual space with continuous logical addresses; and the address mapping relationship comprises a mapping relationship between the logical addresses of the virtual space and the physical addresses of the physical storage area corresponding to the acquisition card.

[0137] Exemplarily, the image data comprises a header Leader and a payload Payload; wherein the Leader comprises a total width of the stitched image and a total height of the stitched image; wherein the total height of the stitched image is used to determine whether the Mth row of pixels is the last row of pixels of the stitched image, if yes, the stitching process of the stitched image is ended; if not, image data of a next row of pixels of the Mth row of pixels is waited to be received; and the Payload comprises pixel values of the Mth row of pixels and the pixel coordinates; wherein the pixel coordinates comprise a horizontal position coordinate and a vertical position coordinate.

[0138] Exemplarily, the sub-camera in the multi-camera system is a sub-camera in a CIS camera; or the sub-camera in the multi-camera system is a standalone camera.

[0139] Based on the same application concept as the above method, an image stitching system is proposed in the embodiments of the present application, the image stitching system comprises a capture card and a multi-camera system, the capture card corresponds to at least one sub-camera in the multi-camera system; the image captured by the sub-camera is assigned a corresponding storage space, so that the storage address segments of the same pixel rows of adjacent images captured by the sub-camera are continuous; wherein: the sub-camera is configured to capture image data; the capture card is configured to obtain the image data captured by the sub-camera; and the capture card is configured to write the image data into the storage address segment corresponding to the sub-camera.

[0140] For example, one capture card corresponds to the at least one sub-camera, the physical address of the storage space corresponds to the pixel coordinates of the image captured by the sub-camera; and the capture card is configured to write the image data into the storage address segment corresponding to the sub-camera based on the pixel coordinates of the image data.

[0141] For example, at least two capture cards correspond to the at least one sub-camera, the storage address assigned to the capture card is the logical address of the corresponding virtual space of the storage space, the logical address of the virtual space corresponds to the pixel coordinates of the image captured by the sub-camera; and the capture card is configured to determine the logical address based on the pixel coordinates of the image data, map the logical address to the physical address of the storage space, and write the image data into the storage address segment corresponding to the sub-camera based on the mapped physical address.

[0142] For example, the image data comprises the pixel value of the Mth row of pixels captured by the sub-camera, the pixel coordinates of the first pixel in the Mth row of pixels in the stitched image, and the stitched image is obtained by stitching the images captured by the sub-cameras in the multi-camera system; and when the capture card writes the image data into the storage address segment corresponding to the sub-camera, the capture card is specifically configured to: determine the corresponding offset starting address of the image data in the storage space based on the pixel coordinates, and store the pixel value of the Mth row of pixels from the offset starting address; wherein the storage address segment after the storage address segment of the image data in the storage space is continuous, and is used to store the adjacent image data in the stitched image.

[0143] For example, the sub-camera in the multi-camera system is a sub-camera in a CIS camera; or the sub-camera in the multi-camera system is a stand-alone camera.

[0144] Based on the same application concept as the above method, a capture card device (i.e. a capture card) is proposed in the embodiments of the present application, comprising: a processor and a machine readable storage medium, the machine readable storage medium stores machine executable instructions that can be executed by the processor; and the processor is configured to execute the machine executable instructions to implement the image stitching method disclosed in the above examples of the present application.

[0145] Based on the same application concept as the above method, the embodiment of the present application also provides a machine readable storage medium, wherein the machine readable storage medium stores a plurality of computer instructions, and the computer instructions can realize the image stitching method disclosed in the above examples of the present application when executed by a processor.

[0146] The machine readable storage medium can be any electronic, magnetic, optical, or other physical storage apparatus, and can contain or store information such as executable instructions, data, and the like. For example, the machine readable storage medium can be a RAM (Random Access Memory), a volatile memory, a non-volatile memory, a flash memory, a storage drive (such as a hard disk drive), a solid state drive, any type of storage disc (such as a compact disc, a DVD, and the like), or similar storage medium, or a combination thereof.

[0147] Based on the same application concept as the above method, the embodiment of the present application also provides a computer program product, wherein the computer program product can include a computer program, and the computer program can realize the image stitching method disclosed in the above examples of the present application when executed by a processor.

[0148] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can be in the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the embodiments of the present application can be in the form of a computer program product implemented on one or more computer usable storage media (including but not limited to a magnetic disk storage, a CD-ROM, an optical storage, and the like) containing computer usable program code.

[0149] The above only describes the embodiments of the present application and is not intended to limit the present application. Those skilled in the art can make various modifications and changes to the present application. Any modification, equivalent replacement, improvement, and the like within the spirit and principle of the present application shall be included in the scope of the claims of the present application.

Claims

1. An image stitching method, characterized by, The application is applied to a capture card corresponding to at least one sub-camera in a multi-camera system; a corresponding storage space is allocated for the image captured by the sub-camera, so that the storage addresses of the same pixel rows of adjacent images captured by the sub-camera are continuous; The method comprises: acquiring image data captured by the sub-camera; writing the image data into a storage address segment corresponding to the sub-camera.

2. The method of claim 1, wherein, Through one capture card corresponding to the at least one sub-camera, the physical address of the storage space corresponds to the pixel coordinates of the image captured by the sub-camera; The writing of the image data into the storage address segment corresponding to the sub-camera comprises: writing the image data into the storage address segment corresponding to the sub-camera based on the pixel coordinates of the image data.

3. The method of claim 1, wherein, Through at least two capture cards corresponding to the at least one sub-camera, the storage address allocated for the capture card is a logical address of a virtual space corresponding to the storage space, and the logical address of the virtual space corresponds to the pixel coordinates of the image captured by the sub-camera; The writing of the image data into the storage address segment corresponding to the sub-camera comprises: determining a logical address based on the pixel coordinates of the image data, mapping the logical address to a physical address of the storage space, and writing the image data into the storage address segment corresponding to the sub-camera based on the mapped physical address.

4. The method of claim 1, wherein, The image data comprises pixel values of the Mth row of pixels captured by the sub-camera, and pixel coordinates of the first pixel in the Mth row of pixels in a spliced image, which is obtained by splicing the images captured by the sub-cameras in the multi-camera system; The writing of the image data into the storage address segment corresponding to the sub-camera comprises: determining an offset starting address corresponding to the image data in the storage space based on the pixel coordinates, and storing the pixel values of the Mth row of pixels from the offset starting address. The storage address segment corresponding to the image data in the storage space is continuous after the storage address segment, and is used to store adjacent image data in the spliced image.

5. The method of claim 4, wherein: the image data further comprises a total width of the spliced image; determining the offset starting address corresponding to the image data in the storage space based on the pixel coordinates comprises determining the offset starting address based on the pixel coordinates and the total width of the spliced image.

6. The method of claim 4, wherein, Determining the offset starting address corresponding to the image data in the storage space based on the pixel coordinates comprises: determining a logical starting address of a virtual space based on the pixel coordinates; mapping the logical starting address of the virtual space to the offset starting address of the storage space based on the acquired address mapping relationship; wherein the address mapping relationship comprises a mapping relationship between the logical address of the virtual space and the physical address of the storage space.

7. The method of claim 6, wherein, In the case that multiple acquisition cards stitch images, the storage space comprises a physical storage area corresponding to each acquisition card; wherein the physical storage area corresponding to each acquisition card comprises multiple storage sub-areas, and the storage sub-areas are used to store pixel values of the same row of pixels of each image stitched by the acquisition card; wherein the physical addresses occupied by one storage sub-area in the storage space are continuous, and the physical addresses occupied by different storage sub-areas in the storage space are discontinuous; the physical storage area corresponding to the acquisition card is mapped to a virtual space with continuous logical addresses; and the address mapping relationship comprises a mapping relationship between the logical addresses of the virtual space and the physical addresses of the physical storage area corresponding to the acquisition card.

8. The method of claim 6, wherein, In the case that one acquisition card stitches images, the storage space comprises a physical storage area corresponding to the acquisition card; wherein the physical storage area corresponding to the acquisition card comprises multiple storage sub-areas, and the storage sub-areas are used to store pixel values of the same row of pixels of each image stitched by the acquisition card; wherein the physical addresses occupied by one storage sub-area in the storage space are continuous, and the physical addresses occupied by adjacent storage sub-areas in the storage space are continuous; the physical storage area corresponding to the acquisition card is mapped to a virtual space with continuous logical addresses; and the address mapping relationship comprises a mapping relationship between the logical addresses of the virtual space and the physical addresses of the physical storage area corresponding to the acquisition card.

9. The method of any one of claims 1-8, wherein the image data comprises a header (Leader) and a payload (Payload); wherein the Leader comprises a total width of the stitched image and a total height of the stitched image; wherein the total height of the stitched image is used to determine whether the Mth row of pixels is the last row of pixels of the stitched image, and if so, the stitching process of the stitched image is ended; and if not, image data of a next row of pixels of the Mth row of pixels is received.

10. The method of any one of claims 1-8, wherein the sub-camera in the multi-camera system is a sub-camera in a CIS camera; or the sub-camera in the multi-camera system is a standalone camera. The application is applied to an acquisition card corresponding to at least one sub-camera in a multi-camera system; image data collected by the sub-camera is allocated a corresponding storage space, so that storage address segments of the same row of pixels of adjacent images collected by the sub-camera are continuous. The device comprises: an acquisition module configured to acquire image data collected by the sub-camera; a processing module configured to write the image data into a storage address segment corresponding to the sub-camera. ​ 11. An image stitching apparatus characterized by comprising: ​ ​ ​ ​ 12. The apparatus of claim 11, wherein, The physical address of the storage space corresponds to the pixel coordinates of the image collected by the sub-camera; and the processing module is specifically configured to write the image data into the storage address segment corresponding to the sub-camera based on the pixel coordinates of the image data. Alternatively, the at least two acquisition cards correspond to the at least one sub-camera, and the storage address allocated to the acquisition card is a logical address of a virtual space corresponding to the storage space, the logical address of the virtual space corresponding to the pixel coordinates of the image collected by the sub-camera; and the processing module is specifically configured to determine a logical address based on the pixel coordinates of the image data, map the logical address to a physical address of the storage space, and write the image data into the storage address segment corresponding to the sub-camera based on the mapped physical address. Alternatively, the image data includes pixel values of an Mth row of pixels collected by the sub-camera, and pixel coordinates of a first pixel in the Mth row of pixels in a spliced image, the spliced image being obtained by splicing images collected by the sub-cameras in the multi-camera system; and the processing module is specifically configured to determine an offset starting address corresponding to the image data in the storage space based on the pixel coordinates, and store the pixel values of the Mth row of pixels from the offset starting address; wherein a storage address segment after the storage address segment corresponding to the image data in the storage space is used to store adjacent image data in the spliced image. Alternatively, the image data further includes a total width of the spliced image; and the processing module is specifically configured to determine the offset starting address corresponding to the image data in the storage space based on the pixel coordinates and the total width of the spliced image. Alternatively, the processing module is specifically configured to determine the offset starting address corresponding to the image data in the storage space based on the pixel coordinates by determining a logical starting address of a virtual space based on the pixel coordinates, and mapping the logical starting address of the virtual space to the offset starting address of the storage space based on an address mapping relationship obtained. Alternatively, the processing module is specifically configured to determine the offset starting address corresponding to the image data in the storage space based on the pixel coordinates by determining a logical starting address of a virtual space based on the pixel coordinates, and mapping the logical starting address of the virtual space to the offset starting address of the storage space based on an address mapping relationship obtained. Or, when multiple acquisition cards stitch the images, the storage space includes a physical storage area corresponding to each acquisition card; wherein the physical storage area corresponding to each acquisition card includes multiple storage sub-areas, and the storage sub-areas are used to store pixel values of the same row of pixels of each image stitched by the acquisition card; wherein a storage sub-area occupies a continuous physical address in the storage space, and different storage sub-areas occupy discontinuous physical addresses in the storage space; the physical storage area corresponding to each acquisition card is mapped to a virtual space with continuous logical addresses; and the address mapping relationship includes a mapping relationship between the logical addresses of the virtual space and the physical addresses of the physical storage area corresponding to each acquisition card. Or, when one acquisition card stitches the images, the storage space includes a physical storage area corresponding to the acquisition card; wherein the physical storage area corresponding to the acquisition card includes multiple storage sub-areas, and the storage sub-areas are used to store pixel values of the same row of pixels of each image stitched by the acquisition card; wherein a storage sub-area occupies a continuous physical address in the storage space, and adjacent storage sub-areas occupy continuous physical addresses in the storage space; the physical storage area corresponding to the acquisition card is mapped to a virtual space with continuous logical addresses; and the address mapping relationship includes a mapping relationship between the logical addresses of the virtual space and the physical addresses of the physical storage area corresponding to the acquisition card. Or, the image data includes a header Leader and a payload Payload; wherein the Leader includes a total width of the stitched image and a total height of the stitched image; wherein the total height of the stitched image is used to determine whether the Mth row of pixels is the last row of pixels of the stitched image, if yes, the stitching process of the stitched image is ended, if not, image data of a next row of pixels of the Mth row of pixels is received; and the Payload includes pixel values of the Mth row of pixels and the pixel coordinates; wherein the pixel coordinates include a horizontal position coordinate and a vertical position coordinate. Or, the sub-camera in the multi-camera system is a sub-camera in a CIS camera; or the sub-camera in the multi-camera system is an independent camera.

13. An image stitching system characterized by, The image stitching system includes an acquisition card and a multi-camera system, the acquisition card corresponds to at least one sub-camera in the multi-camera system; and a corresponding storage space is allocated for an image collected by the sub-camera, so that storage address segments of the same pixel row of adjacent images collected by the sub-camera are continuous; wherein: The sub-camera is configured to collect image data. The acquisition card is configured to acquire the image data collected by the sub-camera, and write the image data into a storage address segment corresponding to the sub-camera.

14. The image stitching system of claim 13, wherein, Through one acquisition card corresponding to the at least one sub-camera, a physical address of the storage space corresponds to a pixel coordinate of the image collected by the sub-camera; and the acquisition card is configured to write the image data into a storage address segment corresponding to the sub-camera based on the pixel coordinate of the image data. Alternatively, the storage address assigned to the acquisition card corresponding to the at least one sub-camera is a logical address of a virtual space corresponding to a storage space, the logical address of the virtual space corresponding to a pixel coordinate of an image collected by the sub-camera; the acquisition card is configured to determine a logical address based on the pixel coordinate of the image data, map the logical address to a physical address of the storage space, and write the image data into a storage address segment corresponding to the sub-camera based on the mapped physical address. Alternatively, the image data includes pixel values of an Mth row of pixels collected by the sub-camera, a pixel coordinate of a first pixel in the Mth row of pixels in a spliced image, and the spliced image is obtained by splicing images collected by the sub-camera in the multi-camera system; when the acquisition card writes the image data into the storage address segment corresponding to the sub-camera, the acquisition card is specifically configured to determine an offset starting address corresponding to the image data in the storage space based on the pixel coordinate, and store the pixel values of the Mth row of pixels from the offset starting address; wherein a storage address segment continuous to a storage address segment corresponding to the image data in the storage space is used to store adjacent image data in the spliced image. Alternatively, the sub-camera in the multi-camera system is a sub-camera in a CIS camera; or the sub-camera in the multi-camera system is an independent camera.

Images