Continuous time linear equalization circuit with segmented adjustable compensation intensity
By using a segmented adjustable continuous-time linear equalization circuit, differential signals are processed separately and the signal amplitude is dynamically adjusted, which solves the problems of high power consumption and fixed frequency point in the existing technology for high-frequency signal compensation, and achieves low power consumption and high efficiency in signal compensation.
Patent Information
- Application Number
- CN202511877399.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-12
- Publication Date
- 2026-03-17
AI Technical Summary
Existing continuous-time linear equalization circuits suffer from high power consumption, low peak frequency, and insufficient tuning capability when compensating for high-frequency signals, thus failing to effectively improve the signal integrity of high-speed data transmission systems.
A segmented adjustable continuous-time linear equalization circuit is adopted. The differential signal is processed by the first and second gain modules respectively, and the signal amplitude is dynamically adjusted by the adjustable feedthrough network module to achieve flexible compensation of high-frequency signals, reduce power consumption and optimize the compensation frequency.
It reduces circuit power consumption, improves the flexibility and accuracy of high-frequency compensation, enhances signal compensation effect, and improves signal integrity.
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Figure CN121690916A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of high-speed signal transceivers, specifically relating to a continuous-time linear equalization circuit with segmented adjustable compensation intensity. Background Technology
[0002] With the rapid development of emerging technologies such as artificial intelligence and machine learning, the demand for computing power continues to rise, and high-speed communication interface circuits are constantly evolving towards higher transmission rates. However, in long-distance, high-capacity transmission scenarios, traditional interconnect technologies are limited by the skin effect, resulting in significant high-frequency signal attenuation. Simultaneously, traditional transceiver circuits are constrained by parasitic process parameters, causing their high-frequency gain to exhibit a rapid roll-off trend. These factors combined lead to severe signal integrity problems in high-speed data transmission systems. Without effective compensation measures, the channel signal-to-noise ratio will significantly decrease, thus limiting system capacity expansion and transmission distance increases.
[0003] Currently, there exists a current-mode source degenerate equalizer that uses a resistor-capacitor relationship at the source to create a high-frequency zero, compensating for high-frequency attenuation. However, this structure involves a trade-off between low-frequency gain and high-frequency compensation, and its peak frequency is limited, resulting in high power consumption. There is also a subtractive equalizer based on an inverter, which uses negative feedback to suppress low-frequency gain and achieve a high-pass response, but this results in the loss of low-frequency signals and increased power consumption. Furthermore, there is an additive equalizer based on an inverter structure, which enhances high frequencies without attenuating low frequencies by connecting a parallel high-pass branch, providing better compensation. However, it is a single-ended structure with limited output swing and insufficient tuning capability.
[0004] In summary, current continuous-time linear equalization circuits generally suffer from problems such as high power consumption, low peaking frequency, and insufficient tuning capability, which makes it impossible to compensate for the high-frequency losses of higher-speed interface circuits. Summary of the Invention
[0005] To address the shortcomings of existing technologies, the purpose of this application is to propose a continuous-time linear equalization circuit with segmented adjustable compensation intensity. This aims to solve the problem that current equalization circuits generally reduce low-frequency gain while compensating for high-frequency attenuation, resulting in high power consumption and low compensation frequency, thus leading to poor compensation performance.
[0006] The first aspect of this application relates to a continuous-time linear equalization circuit with segmented adjustable compensation intensity, comprising: a first gain module, a second gain module, and an adjustable feedthrough network module; the input terminal of the first gain module is connected to the first output terminal of a differential signal source, and the feedthrough control terminal of the first gain module is connected to the first terminal of the adjustable feedthrough network module; the input terminal of the second gain module is connected to the second output terminal of the differential signal source, and the feedthrough control terminal of the second gain module is connected to the second terminal of the adjustable feedthrough network module; both the first gain module and the second gain module are configured to amplify the input signal to a first gain signal; and simultaneously perform high-pass filtering on the input signal to obtain a target signal, and then amplify the target signal to a second gain signal; finally, output a composite signal of the first gain signal and the second gain signal; the adjustable feedthrough network module is configured to adjust the amplitude of the target signal based on differential characteristics to achieve second gain signal adjustment.
[0007] In one embodiment, the first gain module includes: a first main gain unit, a first high-pass filter unit, a first branch gain unit, and a first signal synthesis unit; the input terminal of the first main gain unit is connected to the first output terminal of the differential signal source and the input terminal of the first high-pass filter unit, respectively; the output terminal of the first main gain unit is connected to the first input terminal of the first signal synthesis unit; the output terminal of the first high-pass filter unit is connected to the input terminal of the first branch gain unit and the first terminal of the adjustable feedthrough network module, respectively; the output terminal of the first branch gain unit is connected to the second input terminal of the first signal synthesis unit; the first main gain unit is configured to gain the input signal to a first gain signal and output it to the first signal synthesis unit; the first high-pass filter unit is configured to perform high-pass filtering on the input signal to generate a target signal and transmit it to the first branch gain unit; the first branch gain unit is configured to gain the target signal to a second gain signal and output it to the first signal synthesis unit; the first signal synthesis unit is configured to synthesize the first gain signal and the second gain signal and output them.
[0008] In one embodiment, the second gain module includes: a second main gain unit, a second high-pass filter unit, a second branch gain unit, and a second signal synthesis unit; the input terminal of the second main gain unit is connected to the second output terminal of the differential signal source and the input terminal of the second high-pass filter unit, respectively; the output terminal of the second main gain unit is connected to the second input terminal of the second signal synthesis unit; the output terminal of the second high-pass filter unit is connected to the input terminal of the second branch gain unit and the second terminal of the adjustable feedthrough network module, respectively; the output terminal of the second branch gain unit is connected to the second input terminal of the second signal synthesis unit; the second main gain unit is configured to gain the input signal to a first gain signal and output it to the second signal synthesis unit; the second high-pass filter unit is configured to perform high-pass filtering on the input signal to generate a target signal and transmit it to the second branch gain unit; the second branch gain unit is configured to gain the target signal to a second gain signal and output it to the second signal synthesis unit; the second signal synthesis unit is configured to synthesize the first gain signal and the second gain signal and output them.
[0009] In one embodiment, the high-pass filtering characteristics of the first high-pass filter unit and the second high-pass filter unit are adjustable.
[0010] In one embodiment, the first high-pass filter unit includes: a first variable capacitor and a first switched resistor array; a first terminal of the first variable capacitor is connected to a first output terminal of the differential signal source; a second terminal of the first variable capacitor is connected to a first terminal of the first switched resistor array; a second terminal of the first switched resistor array is connected to an input terminal of the first branch gain unit; and a continuous-time linear equalization circuit with segmented adjustable compensation intensity adjusts the frequency selection range by adjusting the resistance value of the first switched resistor array and the capacitance value of the first variable capacitor.
[0011] In one embodiment, the adjustable feedthrough network module includes: a transmission gate array; a first end of the transmission gate array is connected to the feedthrough control terminal of the first gain module; a second end of the transmission gate array is connected to the feedthrough control terminal of the second gain module; and a continuous-time linear equalization circuit with segmented adjustable compensation intensity changes the resistance value of the transmission gate array by adjusting the number of conducting transmission gates, so as to achieve the second gain signal adjustment by adjusting the amplitude of the target signal based on differential characteristics.
[0012] In one embodiment, the continuous-time linear equalization circuit with segmented adjustable compensation intensity further includes: a bias module; a first output terminal of the bias module is connected to the input terminal of the first gain branch unit; a second output terminal of the bias module is connected to the input terminal of the second gain branch unit; the bias module is configured to output DC bias to the first gain branch unit and the second gain branch unit.
[0013] In one embodiment, the continuous-time linear equalization circuit with segmented adjustable compensation intensity further includes: a control module; a first output terminal of the control module is connected to the controlled terminal of the first switching resistor array; a second output terminal of the control module is connected to the controlled terminal of the transmission gate array; the control module is configured to control the switching on of the first switching resistor array and the transmission gate on of the transmission gate array.
[0014] The second aspect of this application relates to a continuous-time linear equalization method, the method comprising: generating a target high-pass filter characteristic based on the input signal of a differential signal source, and gaining the input signal of the differential signal source as a first gain signal; simultaneously performing high-pass filtering on the input signal based on the target high-pass filter characteristic to obtain a target signal, and gaining the target signal as a second gain signal; and synthesizing and outputting the first gain signal and the second gain signal.
[0015] Thirdly, this application provides a transceiver, which includes: a continuous-time linear equalization circuit with segmentally adjustable compensation intensity as described in the first aspect.
[0016] It is understood that the beneficial effects of the second and third aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here.
[0017] Overall, the technical solutions conceived in this application have the following beneficial effects compared with the prior art: This application employs a technique that uses a first gain module and a second gain module to process differential signals separately, and internally performs full-band gain of the input signal and independent gain of the target signal after high-pass filtering, before synthesizing the output signal. This eliminates the need for the circuit to attenuate low frequencies before compensating for high frequencies, allowing for direct adjustable compensation of high-frequency signals and reducing unnecessary power consumption. Furthermore, by combining an adjustable feedthrough network module to dynamically adjust the amplitude of the target signal based on differential characteristics, the second gain signal is segmentally adjustable, enabling flexible optimization of the high-frequency compensation frequency point and avoiding the limitations of fixed compensation frequencies in existing technologies.
[0018] Compared with existing technologies, this solution simplifies the circuit structure by integrating gain and filtering functions, reduces overall power consumption, and improves the flexibility and accuracy of the compensation frequency through an adjustable feedthrough network, thereby significantly improving the compensation effect. Attached Figure Description
[0019] Figure 1 This is one of the structural block diagrams of the continuous-time linear equalization circuit with segmented adjustable compensation intensity provided in the embodiments of this application; Figure 2 This is the second block diagram of the continuous-time linear equalization circuit with segmented adjustable compensation intensity provided in the embodiments of this application; Figure 3This is a schematic diagram of the circuit topology of the high-pass filter unit provided in the embodiments of this application; Figure 4 This is a schematic diagram of the circuit topology of the high-pass filter unit provided in the embodiments of this application; Figure 5 This is a simulation result of the amplitude-frequency response of the circuit after adjusting the frequency selection characteristics of the high-pass filter unit in this application; Figure 6 This is a simulation result of the amplitude-frequency characteristics of the circuit after adjusting the equivalent impedance of the feedthrough network in this application; Figure 7 This is a comparison diagram of the amplitude-frequency response before and after application in a broadband front-end. Figure 8 This is a flowchart illustrating the continuous-time linear equilibrium method provided in the embodiments of this application.
[0020] In all the accompanying drawings, the same reference numerals are used to denote the same elements or structures, wherein: 10 is the first gain module; 11 is the first main path gain unit; 12 is the first high-pass filter unit; 13 is the first branch gain unit; 14 is the first signal synthesis unit; 20 is the second gain module; 21 is the second main path gain unit; 22 is the second high-pass filter unit; 23 is the second branch gain unit; 24 is the second signal synthesis unit; 30 is the adjustable feedthrough network module; 40 is the bias module. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0022] In this application, the term "and / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A existing alone, A and B existing simultaneously, and B existing alone. In this application, the symbol " / " indicates that the related objects are in an "or" relationship, for example, A / B means A or B.
[0023] In this application, the terms "first" and "second," etc., are used to distinguish different objects, not to describe a specific order of objects. For example, "first response message" and "second response message," etc., are used to distinguish different response messages, not to describe a specific order of response messages. The term "connection" in this application can refer to a direct circuit connection or signal transmission via a communication protocol.
[0024] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.
[0025] In the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more, for example, multiple processing units means two or more processing units, multiple elements means two or more elements, etc.
[0026] There are three main types of existing equalizer technologies, each with its own drawbacks: Current-mode source degenerate structures utilize source resistors and capacitors to generate high-frequency zeros for compensation, but suffer from an inherent contradiction between low-frequency gain and high-frequency compensation, and also have a narrow tuning range and high power consumption. Subtractive equalizers based on inverters use negative feedback to suppress gain and achieve high-pass characteristics, but this results in the loss of low-frequency signals and increased power consumption. Additive equalizers enhance high frequencies while retaining low frequencies through parallel high-pass branches, offering better compensation, but their single-ended structure limits the output swing and reduces tuning flexibility.
[0027] Based on this, this application proposes an embodiment of a continuous-time linear equalization circuit with piecewise adjustable compensation intensity. Please refer to... Figure 1 , Figure 1 This is one of the structural block diagrams of the continuous-time linear equalization circuit with segmented adjustable compensation intensity provided in the embodiments of this application.
[0028] In this embodiment, the continuous-time linear equalization circuit with segmented adjustable compensation intensity includes: a first gain module 10, a second gain module 20, and an adjustable feedthrough network module 30.
[0029] It should be noted that the input terminal of the first gain module 10 is connected to the first output terminal of the differential signal source, and the feedthrough control terminal of the first gain module 10 is connected to the first terminal of the adjustable feedthrough network module 30; the input terminal of the second gain module 20 is connected to the second output terminal of the differential signal source, and the feedthrough control terminal of the second gain module 10 is connected to the second terminal of the adjustable feedthrough network module 30.
[0030] Understandably, the input terminal of the first gain module 10 is used to receive the positive phase signal of the differential input signal, and its feedthrough control terminal is connected to one differential control terminal of the adjustable feedthrough network module 30; correspondingly, the input terminal of the second gain module 20 is used to receive the negative phase signal of the differential input signal, and its feedthrough control terminal is connected to another differential control terminal of the adjustable feedthrough network module 30. Here, "connection" refers to direct electrical coupling or indirect coupling through passive components to achieve signal or control quantity transmission.
[0031] It should be noted that both the first gain module 10 and the second gain module 20 are configured to amplify the input signal to the first gain signal; and simultaneously perform high-pass filtering on the input signal to obtain the target signal, and then amplify the target signal to the second gain signal; finally outputting a composite signal of the first gain signal and the second gain signal.
[0032] Understandably, the first gain module 10 and the second gain module 20 have symmetrical and identical internal structures and are configured to process the two signals in parallel. The module first amplifies the signal received at its input terminal to generate an amplified first gain signal. This gain function can be implemented using circuits such as transconductance amplifiers, operational amplifiers, or transistor amplifiers. Simultaneously, a high-pass filter path within the module processes the same input signal, extracting the high-frequency components, i.e., the target signal; the high-pass filter function can be implemented using resistor-capacitor networks, active filters, or other circuit structures capable of attenuating low frequencies while allowing high frequencies to pass.
[0033] Understandably, the target signal is then fed to a variable gain stage controlled by a feedthrough control terminal, thereby generating a second gain signal. Finally, the module combines the first gain signal and the second gain signal through a summing node and outputs the combined signal; combining here refers to current summation, voltage summation, or other signal superposition methods.
[0034] It should be noted that the adjustable feedthrough network module 30 is configured to adjust the amplitude of the target signal based on differential characteristics to achieve the second gain signal adjustment.
[0035] Understandably, the key lies in the adjustable feedthrough network module 30, which is configured as a differentially controlled impedance or transconductance network to dynamically adjust the signal strength flowing to the feedthrough control terminals of the two gain modules based on the voltage or current difference at its differential ports. For example, this module can consist of a set of digitally controlled switching transistor arrays or adjustable resistor arrays, achieving segmented adjustment of the feedthrough control signal by changing the conduction state of the cells in the array.
[0036] It is understandable that segmented adjustability means that the compensation intensity can be switched between multiple discrete preset levels. By adjusting the signal at the feedthrough control terminal, the network can precisely control the gain factor of the high-pass path within each gain module, that is, adjust the amplitude of the second gain signal. Thus, without affecting the original low-frequency and intermediate-frequency content represented by the first gain signal, it can achieve flexible and programmable control of the high-frequency compensation intensity, and ultimately achieve equalization of the channel frequency response.
[0037] In this embodiment, by employing a first gain module and a second gain module to process the differential signal respectively, and by simultaneously performing full-band gain of the input signal and independent gain of the target signal after high-pass filtering internally, and then synthesizing the output signal, the circuit eliminates the need to attenuate low frequencies before compensating for high frequencies. This allows for direct adjustable compensation of the high-frequency signal, reducing unnecessary power consumption. Simultaneously, by combining an adjustable feedthrough network module to dynamically adjust the amplitude of the target signal based on the differential characteristics, the second gain signal is segmentally adjustable. This enables flexible optimization of the high-frequency compensation frequency point, avoiding the limitations of fixed compensation frequencies in existing technologies.
[0038] Furthermore, based on the above embodiments, this application proposes an improved embodiment for the entire circuit. Please refer to... Figure 2 , Figure 2 This is the second block diagram of the continuous-time linear equalization circuit with segmented adjustable compensation intensity provided in the embodiments of this application.
[0039] In this embodiment, the first gain module 10 includes: a first main gain unit 11, a first high-pass filter unit 12, a first branch gain unit 13, and a first signal synthesis unit 14.
[0040] It should be noted that the input terminal of the first main gain unit 11 is connected to the first output terminal of the differential signal source and the input terminal of the first high-pass filter unit 12, respectively; the output terminal of the first main gain unit 11 is connected to the first input terminal of the first signal synthesis unit 14; the output terminal of the first high-pass filter unit 12 is connected to the input terminal of the first branch gain unit 13 and the first terminal of the adjustable feedthrough network module 30, respectively; and the output terminal of the first branch gain unit 13 is connected to the second input terminal of the first signal synthesis unit 14.
[0041] Specifically, in terms of connectivity, the input terminal of the first main gain unit 11 is simultaneously connected to the inverting output terminal of the differential signal source and the input terminal of the first high-pass filter unit 12 to receive the original input signal. The output terminal of the first main gain unit 11 is connected to one input terminal of the first signal synthesis unit 14 to transmit its processed signal. The output terminal of the first high-pass filter unit 12 is connected to both the input terminal of the first branch gain unit 13 and a control terminal of the adjustable feedthrough network module 30, thereby achieving signal splitting. The output terminal of the first branch gain unit 13 is connected to the other input terminal of the first signal synthesis unit 14. The adjustable feedthrough network module 30, through its control terminal, changes the signal flowing to the first branch gain unit 13.
[0042] It should be noted that the first main gain unit 11 is configured to gain the input signal to a first gain signal and output it to the first signal synthesis unit 14. This gain function can be achieved by active amplifier circuits such as transconductance amplifiers, common-source amplifiers, or operational amplifiers, which provide basic low-frequency and mid-frequency gain for the signal, or simply maintain low loss.
[0043] It should be noted that the first high-pass filter unit 12 is configured to perform high-pass filtering on the input signal to generate a target signal and transmit it to the first branch gain unit 13. The input signal undergoes frequency filtering, attenuating low-frequency components while allowing high-frequency components to pass, thereby generating and outputting a target signal rich in high-frequency components. The circuit implementing the high-pass filtering can be a passive resistor-capacitor high-pass network or an active filter composed of an operational amplifier and an RC network. However, the high-pass filtering method is not limited to these two types; the primary goal is to achieve the function of the high-pass filter unit 12. Finally, the target signal is directly transmitted to the first branch gain unit 13.
[0044] It should be noted that the first branch gain unit 13 is configured to output a second gain signal to the first signal synthesis unit 14, with the target signal gain being the second gain signal. For example, the first branch gain unit 13 can be configured as a gain-adjustable amplification stage, which receives the target signal from the high-pass filter unit and dynamically adjusts its amplification factor for the target signal according to the control signal sent from the adjustable feedthrough network module 30, thereby generating a second gain signal with adjustable amplitude and outputting it to the first signal synthesis unit 14. This unit can be implemented by a voltage-controlled gain amplifier or a transconductance stage driven by a variable bias current. Alternatively, the amplitude of the target signal can be adjusted by limiting the current or voltage signals flowing into or to the branch gain unit, for example, by applying the principle of differential signal cancellation.
[0045] It should be noted that the first signal synthesis unit 14 is configured to synthesize a first gain signal and a second gain signal and output them. This synthesis operation can be accomplished by a current summing node, an operational amplifier-based adder circuit, or other linear superposition circuits.
[0046] Through the above division, the signal processing flow of the original gain module is clearly decomposed into independent and serial gain, filtering, adjustable gain and synthesis steps, making the circuit structure clear, each unit has a specific function, and it is convenient for targeted design and performance optimization.
[0047] In addition, the second gain module 20 includes: a second main gain unit 21, a second high-pass filter unit 22, a second branch gain unit 23, and a second signal synthesis unit 24; the input terminal of the second main gain unit 21 is connected to the second output terminal of the differential signal source and the input terminal of the second high-pass filter unit 22, respectively; the output terminal of the second main gain unit 21 is connected to the second input terminal of the second signal synthesis unit 24; the output terminal of the second high-pass filter unit 22 is connected to the input terminal of the second branch gain unit 23 and the second terminal of the adjustable feedthrough network module 30, respectively; the second branch gain unit 23... The output of the gain unit 23 is connected to the second input of the second signal synthesis unit 24; the second main gain unit 21 is configured to gain the input signal to a first gain signal and output it to the second signal synthesis unit 24; the second high-pass filter unit 22 is configured to perform high-pass filtering on the input signal to produce a target signal and transmit it to the second branch gain unit 23; the second branch gain unit 23 is configured to gain the target signal to a second gain signal and output it to the second signal synthesis unit 24; the second signal synthesis unit 24 is configured to synthesize the second gain signal and the second gain signal and output them.
[0048] It is understandable that the second gain module 20 uses the same symmetrical unit division and connection method as the first gain module 10 to form a complete differential signal processing channel. The principle is the same, so it will not be elaborated here.
[0049] Specifically, the high-pass filtering characteristics of the first high-pass filter unit 12 and the second high-pass filter unit 22 can also be adjusted, thereby achieving more targeted selective gain for different frequency band components in the signal. Here, the high-pass filtering characteristics mainly refer to the cutoff frequency and frequency response slope of the unit, while adjustment refers to changing the parameter values of its internal components through external control signals to dynamically adjust the allowed signal frequency range. Specifically, the unit can be composed of a resistor-capacitor high-pass network, where one or both of the resistor or capacitor are replaced with adjustable elements. For example, a set of digitally controlled switches can be used to select capacitors of different capacitance values, forming a programmable capacitor array, thereby discretely changing the cutoff frequency of the high-pass filter unit.
[0050] In addition, the continuous-time linear equalization circuit with segmented adjustable compensation intensity in this embodiment further includes: a bias module 40; the first output terminal of the bias module 40 is connected to the input terminal of the first gain branch unit; the second output terminal of the bias module 40 is connected to the input terminal of the second gain branch unit; the bias module 40 is configured to output DC bias to the first gain branch unit and the second gain branch unit.
[0051] It is understood that the core function of the bias module 40 is to provide stable and matched DC bias conditions to the first branch gain unit 13 and the second branch gain unit 23.
[0052] Specifically, the bias module 40 is a circuit unit used to generate and supply a constant or settable DC voltage or current. This connection enables the bias module 40 to establish the required static operating point for active devices such as transistors within the connected branch gain unit. The DC bias provided by the bias module 40 refers to a DC voltage or current that does not change with the signal, and its function is to ensure that the amplifier in the branch gain unit operates in a preset linear region to obtain the expected gain, linearity, and dynamic range.
[0053] It should be noted that the bias module 40 can obtain bias from the power supply voltage using a resistor divider network, or use a digitally controlled programmable current / voltage source to achieve adjustability of the operating point of the branch gain unit, thereby optimizing circuit performance or compensating for process deviations.
[0054] Specifically, please refer to point 3. Figure 3 This is a schematic diagram of the circuit topology of the high-pass filter unit provided in the embodiments of this application. Figure 3 In the circuit, the first high-pass filter unit 12 includes a first variable capacitor and a first switched resistor array; the first terminal of the first variable capacitor is connected to the first output terminal of the differential signal source; the second terminal of the first variable capacitor is connected to the first terminal of the first switched resistor array; and the second terminal of the first switched resistor array is connected to the input terminal of the first branch gain unit 13. The continuous-time linear equalization circuit with segmented adjustable compensation intensity adjusts the frequency selection range by adjusting the resistance value of the first switched resistor array and the capacitance value of the first variable capacitor.
[0055] It is understood that the input terminal is at one end of the variable capacitor, and the input signal is AC coupled to the gain unit through the capacitor. The switched resistor array and the variable capacitor together form a frequency-selectable high-pass network. The frequency selection range of the high-pass network is controlled by adjusting the value of the capacitor or resistor in the high-pass filter network. The DC bias of the gain unit is provided by the bias module below the resistor. The resistor array is composed of resistors connected in series and switching transistors connected in parallel. The value of the resistance is controlled by controlling the conduction and cutoff of multiple transistor switches. The resistor array in the embodiment of this application is only one implementation method, and other implementation methods are also within the protection scope of this invention.
[0056] With this design, the circuit can not only control the overall strength of high-frequency compensation through the adjustable feedthrough network module, but also precisely "shape" the frequency band position and width of the high-frequency compensation by adjusting the characteristics of the high-pass filter unit itself. This allows for a more precise match with the frequency characteristics of channel attenuation, achieving the optimal signal integrity compensation effect.
[0057] It is understandable that the second high-pass filter unit 22 includes a second variable capacitor and a second switched resistor array. The working principle is the same and will not be elaborated further.
[0058] Specifically, please refer to Figure 4 , Figure 4 This is a schematic diagram of the circuit topology of the high-pass filter unit provided in the embodiments of this application. Figure 4 In the process, the adjustable feedthrough network module 30 includes: a transmission gate array; a first end of the transmission gate array is connected to the feedthrough control terminal of the first gain module 10; a second end of the transmission gate array is connected to the feedthrough control terminal of the second gain module 20; and a continuous-time linear equalization circuit with segmented adjustable compensation intensity changes the resistance value of the transmission gate array by adjusting the number of conducting transmission gates, so as to realize the adjustment of the amplitude of the target signal based on differential characteristics to achieve the adjustment of the second gain signal.
[0059] It should be noted that the transmission gate array is composed of multiple parallel basic transmission gate units with essentially identical electrical characteristics. Each basic transmission gate unit typically contains one PMOS transistor and one NMOS transistor, with its source and drain interconnected to form a switching path, and its gate receiving an independent digital control signal. The number of transmission gates that are turned on refers to the number of units in the array that are in a low-resistance on state when a suitable gate control voltage is applied. By adjusting this number of on-state units, the total equivalent resistance value of the array between the first and second terminals, i.e., the resistance value, will change discretely and in a stepwise manner. Because the array is connected in a differential feedthrough control path, the change in its resistance value will directly and differentially affect the magnitude and ratio of the current or voltage signal flowing to the feedthrough control terminals of the first and second gain modules, thereby adjusting the amplitude of the target signal being processed based on differential characteristics, and ultimately realizing segmented programmable adjustment of the gain factor of the second gain signal.
[0060] It is understood that each transmission gate has an on-resistance when it is turned on. By connecting multiple transmission gates in parallel and controlling the number of gates turned on, the on-resistance of the feedthrough path can be controlled, thereby controlling the feedthrough strength and thus the peak intensity. The transmission gate array in this application is only one implementation method, and other implementation methods are also within the protection scope of this invention.
[0061] In this embodiment, the equalization circuit further includes: a control module; a first output terminal of the control module is connected to the controlled terminal of the first switching resistor array; a second output terminal of the control module is connected to the controlled terminal of the transmission gate array; the control module is configured to control the switching on of the first switching resistor array and the transmission gate on of the transmission gate array.
[0062] Understandably, the control module is a circuit that generates and outputs specific logic signals or voltage / current control signals, and is configured to coordinately or independently control the on / off state of each switching element in the first switching resistor array, as well as the on / off state of each transmission gate in the transmission gate array.
[0063] Understandably, by sending pre-set or programmable control words to the controlled terminals of the two arrays, the equivalent resistance values of the first switching resistor array and the transmission gate array are changed synchronously or sequentially. For example, the control module can be implemented as a digital state machine, a microcontroller unit, or a programmable logic circuit, which generates corresponding multiplexer control signals based on externally input control codes. These signals are applied to the corresponding control terminals of the two arrays, precisely controlling the conduction of a specific number of switches or transmission gates, thereby setting the resistance values of the two arrays to target discrete values. Through this coordinated control, the differential attenuation characteristics of the adjustable feedthrough network module are precisely set, thereby systematically adjusting the target signal amplitude flowing to the feedthrough control terminals of the two gain modules, ultimately achieving segmented and programmable adjustment of the overall high-frequency compensation intensity of the circuit.
[0064] Alternatively, the control module can be implemented analogally, for example, by generating analog voltages through a digital-to-analog converter to control voltage-controlled switches or variable resistors. However, its core function remains the same: to generate corresponding drive signals based on control commands to operate the switching states of the array. The introduction of this module enables digital, centralized configuration of equalization parameters, improving the circuit's ease of use and integrability.
[0065] Specifically, the simulation results of the amplitude-frequency response of the circuit after adjusting the frequency selection characteristics of the high-pass filter unit through the control module are as follows: Figure 5 As shown, the overall frequency response exhibits peaking. As the cutoff frequency of the frequency selection network is adjusted to lower frequencies, the minimum compensation frequency shifts from several GHz to several MHz, while the high-frequency peaking intensity increases.
[0066] Specifically, the simulation results of the amplitude-frequency characteristics of the circuit after adjusting the equivalent impedance of the adjustable feedthrough network module by the control module show that the continuous-time linear equalization circuit of the present invention can provide peaking in the frequency band above 30 GHz. With the adjustment of the equivalent impedance of the feedthrough network, the high-frequency peaking intensity can be varied at a fixed frequency point.
[0067] Specifically, by simultaneously adjusting the high-pass filter network and the adjustable feedthrough network through the control module, channel or circuit losses with different characteristics can be compensated, such as... Figure 7 As shown, Figure 7This is a comparison diagram of the amplitude-frequency response before and after application in a broadband front-end. It shows the overall effect of a broadband front-end embodiment after channel attenuation. The dashed line represents the overall response of the broadband front-end, with an overall 3 dB bandwidth of 28 GHz and a gain of approximately 66 dB. There is a gain roll-off of about 10 dB around 56 GHz. The solid line represents the overall response of the broadband front-end after compensation by the present invention, with an overall 3 dB bandwidth of 56 GHz and a gain of approximately 68 dB.
[0068] In addition to the above embodiments, this application also proposes an embodiment of a continuous-time linear equalization method. Please refer to... Figure 8 , Figure 8 This is a flowchart illustrating the continuous-time linear equilibrium method provided in this application embodiment. The method includes steps S10 to S30.
[0069] Step S10: Generate the target high-pass filter characteristics based on the input signal of the differential signal source, and set the input signal gain of the differential signal source as the first gain signal.
[0070] Specifically, based on the preset equalization requirements, the frequency response parameters of the high-pass filter path, particularly its cutoff frequency, are determined and set. This can be achieved by configuring the internal parameters of adjustable high-pass filter units, such as the first high-pass filter unit 12 and the second high-pass filter unit 22, for example, by switching the capacitance value of the capacitor array or adjusting the resistance value of the variable resistor through digital control signals to dynamically set the target high-pass filter characteristics. The original differential input signals are then fed into the main gain unit for linear amplification. This amplification function can be implemented using circuits such as fixed-gain transconductance amplifiers and operational amplifiers, the purpose of which is to provide basic low-frequency and mid-frequency gain for the signal, generating a first gain signal.
[0071] Step S20: Simultaneously, based on the target high-pass filtering characteristics, the input signal is high-pass filtered to obtain the target signal, and the target signal gain is set to the second gain signal.
[0072] Understandably, this step occurs in parallel with some of the processing in step S10. The concurrent processing of the signal on the main gain and high-pass filter branches is emphasized. Using the high-pass filter unit with parameters set in step S10, the same original input signal is filtered to attenuate low-frequency components, thereby extracting the target signal that mainly contains high-frequency energy. The obtained target signal is then fed into a gain-adjustable branch gain unit. The gain value of this unit is controlled by the adjustable feedthrough network module 30, for example, by adjusting its bias current or control voltage, thereby applying a variable amplification factor to the target signal and generating a second gain signal with programmable amplitude. This gain adjustment enables control of the high-frequency compensation intensity.
[0073] Step S30: Combine the first gain signal and the second gain signal and output them.
[0074] As can be understood, synthesis refers to the linear superposition of the first gain signal from the main path and the second gain signal from the adjustable branch. This can be achieved through current summation or voltage summation. Ultimately, this method outputs a synthesized differential signal that fully retains the low-frequency and mid-frequency components amplified by the main path and superimposes the high-frequency compensation component amplified by the controllable gain, thus achieving a continuous-time linear equalization effect with adjustable high-frequency compensation intensity. The entire process is performed continuously in the analog domain without discrete-time sampling.
[0075] Compared with the prior art, the beneficial effects of the continuous-time linear equalization method provided in this application are the same as those of the continuous-time linear equalization circuit with segmented adjustable compensation intensity provided in the above embodiments, and will not be repeated here.
[0076] In addition to the above embodiments, this application also proposes a transceiver embodiment.
[0077] It should be noted that a transceiver is a core unit of a communication device that can simultaneously or in a time-sharing manner perform signal transmission and reception functions, and is widely used in wired communication, optical communication, wireless communication radio frequency front-end systems, etc.
[0078] In this embodiment, the continuous-time linear equalization circuit is integrated into the receiving channel of the transceiver to perform equalization processing on the input electrical signal that has been attenuated by high frequency after transmission through the channel, so as to compensate for channel loss, reduce inter-symbol interference, and thereby improve the signal integrity and receiving sensitivity of the system.
[0079] Compared with existing technologies, the transceiver provided in this application, by integrating the aforementioned continuous-time linear equalization circuit with segmented adjustable compensation intensity, inherits all the beneficial effects of that circuit. Specifically, this transceiver can implement a linear equalization function on the receiving path with flexibly programmable high-frequency compensation intensity without loss of low-frequency signal. Further details are omitted here.
[0080] It should be understood that expressions such as “comprising” and “may include” used in this application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In this application, terms such as “comprising” and / or “having” are to be interpreted as indicating a particular characteristic, number, operation, constituent element, component, or combination thereof, but not to exclude the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.
[0081] Furthermore, in this application, the expression "and / or" includes any and all combinations of the associated listed words. For example, the expression "A and / or B" may include A, may include B, or may include both A and B.
[0082] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A continuous-time linear equalization circuit with adjustable strength segmentation, characterized by, The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module.
2. The continuous-time linear equalization circuit with compensating strength segment adjustability of claim 1, wherein, The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module.
3. The continuous-time linear equalization circuit with compensating strength segment adjustability of claim 2, wherein, The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain module. 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The application relates to a differential signal gain module. The application relates to a differential signal gain module. The application relates to a differential signal gain The second main branch gain unit is configured to amplify the input signal to a first gain signal and output to the second signal synthesis unit; the second high-pass filter unit is configured to high-pass filter the input signal to generate a target signal and transmit to the second branch gain unit; the second branch gain unit is configured to amplify the target signal to a second gain signal and output to the second signal synthesis unit; and the second signal synthesis unit is configured to synthesize the first gain signal and the second gain signal and output.
4. The continuous-time linear equalization circuit with compensating strength segment adjustability of claim 3, wherein, The high-pass filtering characteristics of the first high-pass filter unit and the second high-pass filter unit are adjustable.
5. The continuous-time linear equalization circuit with compensating strength segment adjustability of claim 3, wherein, The first high-pass filter unit comprises a first variable capacitor and a first switchable resistance array. A first end of the first variable capacitor is connected to a first output end of a differential signal source; a second end of the first variable capacitor is connected to a first end of the first switchable resistance array; and a second end of the first switchable resistance array is connected to an input end of the first branch gain unit. The compensation strength segmented adjustable continuous time linear equalization circuit adjusts the resistance value of the first switchable resistance array and the capacitance value of the first variable capacitor to achieve adjustment of the selected frequency range.
6. The continuous-time linear equalization circuit with compensating strength segment adjustability of claim 5, wherein, The adjustable feedthrough network module comprises a transmission gate array. A first end of the transmission gate array is connected to a feedthrough control end of the first gain module; and a second end of the transmission gate array is connected to a feedthrough control end of the second gain module. The compensation strength segmented adjustable continuous time linear equalization circuit adjusts the resistance value of the transmission gate array by adjusting the number of transmission gate conduction of the transmission gate array to achieve adjustment of the amplitude of the target signal based on the differential characteristics to achieve second gain signal adjustment.
7. The compensating strength segmentally adjustable continuous-time linear equalization circuit according to claim 1, wherein, The compensation strength segmented adjustable continuous time linear equalization circuit further comprises a biasing module. A first output end of the biasing module is connected to an input end of the first gain branch unit; and a second output end of the biasing module is connected to an input end of the second gain branch unit. The biasing module is configured to output a direct current bias to the first gain branch unit and the second gain branch unit.
8. The continuous-time linear equalization circuit with compensating strength segment adjustability of claim 6, wherein, The compensation strength segmented adjustable continuous time linear equalization circuit further comprises a control module. A first output end of the control module is connected to a controlled end of the first switchable resistance array; and a second output end of the control module is connected to a controlled end of the transmission gate array. The control module is configured to control the switch conduction of the first switchable resistance array and the conduction of the transmission gate of the transmission gate array.
9. A continuous-time linear equalization method, characterized by, The method comprises: generating a target high-pass filtering characteristic based on the input signal of the differential signal source, and amplifying the input signal of the differential signal source to a first gain signal; simultaneously high-pass filtering the input signal based on the target high-pass filtering characteristic to obtain a target signal, and amplifying the target signal to a second gain signal; synthesizing and outputting the first gain signal and the second gain signal.
10. A transceiver, characterized by The transceiver comprises the compensation strength segmented adjustable continuous time linear equalization circuit according to any one of claims 1 to 8.