A method and device for realizing autonomous controllable flow table forwarding based on domestic FPGA

Abstract

The application discloses a kind of based on localization FPGA implementation self-controllable flow table forwarding method and equipment, its method includes: based on domestic SOC type FPGA platform constructs self-controllable switching equipment supporting flow table forwarding, its hardware architecture includes control end and switch end, central processing unit is used as forwarding control layer, FPGA logic processor is used as data forwarding layer to execute high-speed parallel processing;Control end and switch end communicate by self-defined flow table interaction protocol;The software architecture of equipment includes interface adaptation layer, for realizing the mutual conversion of interface data and internal forwarding data packet;Data forwarding layer is used to execute mixed forwarding operation;Forwarding control layer is used to issue, modify or delete flow table rule to switch end by self-defined flow table interaction protocol.The application realizes the self-controllable of switching equipment software and hardware, can flexibly realize the forwarding of service data between different channels, satisfies the demand of military small network switching equipment.

Description

Technical Field

[0001] This invention relates to the field of communication and network technology, and more specifically to a method and device for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA. Background Technology

[0002] With the rapid development of network technology and the increasing complexity of the international situation, the self-reliance and controllability of communication equipment has become crucial to ensuring national information security. In sensitive areas such as military communications and critical infrastructure, reliance on imported general-purpose switching chips not only faces the risk of supply chain disruptions but also may contain security vulnerabilities such as hardware backdoors. Furthermore, wireless communication and complex networking applications place diverse demands on data processing, requiring network equipment to possess high flexibility and programmability. With the maturation of the semiconductor industry chain, domestically produced FPGA chips have gradually met the performance requirements of military and industrial applications. Utilizing domestically produced FPGAs to design self-controllable network switching equipment is an inevitable choice for reducing dependence on foreign technology and improving network security levels.

[0003] Current network switching technologies primarily rely on general-purpose ASIC switching chips or SDN switches based on the OpenFlow protocol. While general-purpose switching chips offer high performance, their functions are fixed and difficult to adapt to rapidly changing customized forwarding requirements. Standard OpenFlow switches, while achieving separation of control and forwarding and providing flexibility, have relatively complex protocol stacks, and the interaction between the controller and the switch typically depends on standard protocols, posing a risk of protocol vulnerabilities being exploited. More importantly, the core chips of mainstream switching equipment on the market are mostly monopolized by foreign companies, making it impossible to achieve complete independent control over the underlying layers. Simply relying on software forwarding (such as CPU-based software routing) cannot meet the demands of high-speed gigabit / 10-gigabit line-speed forwarding, while purely hardware logic development is difficult and its strategies are hard to change.

[0004] Therefore, it is necessary to propose an independent and controllable flow table forwarding method and device based on domestically produced SOC-type FPGA, which can solve the problems of low degree of self-sufficiency of existing switching equipment software and hardware, large size, and insufficient forwarding flexibility and real-time performance of standard protocol flow tables in complex business scenarios. Summary of the Invention

[0005] In view of this, the present invention provides a method and device for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA, in order to solve the problem that existing network switching equipment relies on foreign chips and cannot flexibly realize the forwarding of service data between different channels, thus failing to meet the needs of military small network switching equipment.

[0006] In a first aspect, the present invention provides a method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA, comprising: constructing an autonomous and controllable switching device supporting flow table forwarding based on a domestically produced SOC-type FPGA platform, wherein the hardware architecture of the autonomous and controllable switching device includes a control terminal and a switch terminal; and the control terminal and the switch terminal use a custom flow table interaction protocol for message exchange. The control terminal uses the central processing unit of the SOC-type FPGA platform to act as the forwarding control layer to complete the distribution of flow tables; the switch terminal uses the FPGA logic processor of the SOC-type FPGA platform to realize the general layer 2 switching and autonomous and controllable flow table switching functions of the OSI model through the high parallel processing capability of the FPGA logic processor, and realizes the access of multiple Ethernet data through the high-speed serial transceiver of the SOC-type FPGA platform. Based on the aforementioned autonomous and controllable switching equipment, a software architecture including an interface adaptation layer, a data forwarding layer, and a forwarding control layer is constructed. The interface adaptation layer runs on the switch and is used to convert between interface data and the internal forwarding data packets of the custom flow table interaction protocol. The data forwarding layer runs on the switch and is used to perform hybrid forwarding operations; The forwarding control layer runs on the control end and is used to send, modify, or delete flow table rules to the switch end through the custom flow table interaction protocol.

[0007] Furthermore, the Ethernet data is accessed via an SGMII interface; The interface adaptation layer implements the conversion method for internal forwarding data packets between SGMII interface data and the custom flow table interaction protocol, including: Data is accessed through the corresponding SGMII interface via the GTX transceiver IP core integrated within the FPGA logic processor. Convert SGMII interface data to GMII interface data; Convert GMII interface data to AXI-Stream interface data using an Ethernet MAC IP core; The AXI-Stream data is encapsulated into an internal forwarding data packet of the custom flow table interaction protocol. The format of the internal forwarding data packet includes a frame header indication, a receiving port number, a data payload, and a frame tail marker.

[0008] Furthermore, the internally forwarded data packets include Rxfifo_data and Txfifo_data; The Rxfifo_data includes received data from each port. An indicator frame field and an ingress port identifier field are set in the high bits of the bus, and a message field is set in the low bits of the bus. The message field includes at least the source MAC address, the destination MAC address, and the vlan-ID, which is used to enable direct association of the physical source of the received message. The Txfifo_data includes the data that needs to be sent to the destination port after the lookup table. The destination port identifier, priority, broadcast indication and VLAN isolation fields are set in the high bits of the bus, and the packet payload field after the flow table action is set in the low bits of the bus.

[0009] Furthermore, the method for the data forwarding layer to perform hybrid forwarding operations includes: Read the received Rxfifo_data, and store and parse the Rxfifo_data; Complete MAC table self-learning based on the source MAC address and vlan-ID obtained from the parsing; Determine whether the forwarding control layer has issued a flow table and enabled the flow table lookup function; When the forwarding control layer does not issue a flow table or issues a flow table but does not enable the flow table lookup function, the MAC layer autonomous forwarding is adopted, including: based on the stored MAC address table or VLAN table, performing a MAC address table lookup according to the source MAC address, destination MAC address and VLAN ID, generating Txfifo_data according to the lookup result, and completing the MAC layer autonomous forwarding; When the forwarding control layer issues a forwarding flow table and enables the flow table lookup function, the autonomous and controllable flow table forwarding of data packets is completed based on the flow table issued by the forwarding control layer.

[0010] Furthermore, the step of performing a MAC address table lookup based on a preset MAC address table or VLAN table, according to the source MAC address, destination MAC address, and VLAN ID, and generating Txfifo_data based on the lookup result, includes: Determine the data type based on the destination MAC address; When the forwarded data is unicast data, it is forwarded to the corresponding port in the same VLAN based on the destination MAC address. When the forwarded data is multicast or broadcast data, the stored VLAN table is searched to obtain the list of VLAN member ports, enabling data broadcasting or multicasting within the same VLAN.

[0011] Furthermore, the key fields of the flow table issued by the forwarding control layer include at least: a matching field, an action instruction field, and a priority field; The matching field is used to match the characteristics of data packets, covering information from OSI model layers one to four, including ingress port, source / destination MAC address, Ethernet protocol type, VLAN tag, IP protocol number, source / destination IP address, TCP / UDP source / destination port number, ICMP type, and MPLS tag information; The action instruction field is used to determine the corresponding action to be performed when a data packet matches an entry in the matching field field of the flow table. The action to be performed includes at least modifying the data packet field, dropping, and forwarding to a group. The priority field is used to determine the matching priority of entries in the flow table. When multiple entries are matched, the action instruction with the higher priority is executed.

[0012] Furthermore, the autonomous and controllable flow table forwarding of data packets based on the flow table issued by the forwarding control layer includes: Read each entry in the flow table and perform matching judgments on the corresponding fields of the data packets based on the matching field. If a match is found, the priority field of the flow table, the flow table ID, and the mask length of the destination IP are latched, and the traversal continues. If a match is found again, and the IP mask length of the current entry is greater than that of the latched entry, or the IP mask length is the same but the priority is higher, then the flow table ID is replaced. The flow table ID that was successfully looked up is used as the address to look up the action instruction field, determine the action information to be executed, and complete the forwarding or modification of the packet based on the action information.

[0013] Furthermore, the autonomous and controllable flow table forwarding of data packets based on the flow table issued by the forwarding control layer also includes: When multiple flow tables match simultaneously, the flow table ID with the highest priority that matches successfully is selected; If a flow table terminator is encountered during the table lookup process, the query will be terminated early to reduce processing latency.

[0014] Furthermore, the autonomous and controllable flow table forwarding of data packets based on the flow table issued by the forwarding control layer also includes forwarding packets with MPLS tags: Protocol tag encapsulation is performed between the link layer header and the network layer header of the message, and the protocol identifier field of the message is rewritten according to the encapsulated protocol type. The tag field at the top of the message stack is stripped, and the bottom flag is parsed; if the bottom flag is in a preset valid state, the message protocol identifier is restored to the original protocol type. Perform an atomic replacement operation on the tag value at the top of the message stack to achieve tag-based path switching.

[0015] Secondly, the present invention provides an independently controllable flow table forwarding device based on a domestically produced FPGA, which is built on a domestically produced SOC-type FPGA platform and includes a control terminal and a switch terminal. The control terminal is used to manage network topology, generate and distribute flow table rules, and interact with the switch terminal through a custom flow table interaction protocol. The switch includes an interface adaptation module and a data forwarding module; the interface adaptation module is used to convert Ethernet data to and from internally forwarded data packets; the data forwarding module has a flow table lookup engine and a general Layer 2 switching engine, which are used to perform data packet matching, modification and forwarding.

[0016] Compared with existing technologies, the method and device for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA proposed in this invention have the following advantages: 1. This invention is based on a domestically produced SoC-type FPGA chip. Through independent programming, it realizes the full-stack logic from the bottom-level driver to the high-level flow table control, and builds a highly integrated and miniaturized network control device. It gets rid of the limitation of external general-purpose switching chips, and uses custom flow table switching technology to eliminate the security backdoor risks in standard protocols, ensuring that the device is independently controllable throughout its entire software and hardware life cycle in military and special network communication environments.

[0017] 2. This invention achieves real-time access to multiple gigabit Ethernet data streams through an internal hardware pipeline. Compared to traditional software-driven switches, this invention implements a flow table retrieval mechanism at the FPGA logic layer, ensuring extremely low processing latency and line-speed throughput when data packets are forwarded across channels, meeting the stringent real-time requirements of industrial and military-grade communication.

[0018] 3. This design breaks through the limitations of traditional Layer 2 switching by supporting composite matching domains of OSI model layers 2 to 4, achieving multi-dimensional flow table control across ports, MAC, IP, and transport layers. This flexible and programmable mechanism not only supports general Layer 2 switching services but also enables customized service flow scheduling and forwarding strategies for complex military channel environments. Its high scalability allows the equipment to quickly adapt to future new protocols, providing core technical support for building flexible, efficient, and secure customized networks. Attached Figure Description

[0019] Figure 1 A schematic diagram of the hardware architecture of the flow table forwarding device based on a domestically produced FPGA, provided for this invention; Figure 2 A schematic diagram of the software architecture for an independently controllable flow table forwarding device based on a domestically produced FPGA, provided for this invention. Figure 3This is a schematic diagram of the software data transmission and reception processing for the interface adaptation layer provided by the present invention. Figure 4 A schematic diagram of the internal forwarding data packet format; Figure 5 A flowchart illustrating the method for performing hybrid forwarding operations at the data forwarding layer provided by this invention; Figure 6 A schematic diagram illustrating the MAC address table lookup method based on the hash algorithm provided by this invention; Figure 7 The MAC layer autonomous forwarding flowchart provided by this invention; Figure 8 This is a schematic diagram of the MAC layer autonomously forwarding MAC frames provided by the present invention; Figure 9 The flowchart for autonomous and controllable flow table forwarding provided by this invention; Figure 10 This is a schematic diagram of IP / UDP / TCP packet forwarding based on flow tables provided by the present invention; Figure 11 This is a schematic diagram illustrating the insertion of MPLS labels and the completion of forwarding provided by the present invention. Figure 12 This is a schematic diagram illustrating the pop-up of MPLS tags and the completion of forwarding provided by the present invention; Figure 13 This is a schematic diagram illustrating the modification of MPLS labels and the completion of forwarding provided by the present invention. Figure 14 This is a schematic diagram of the simulation results provided by the present invention; Figure 15 This is a schematic diagram of the connection topology for overall system performance testing provided by the present invention. Detailed Implementation

[0020] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0021] Before introducing the embodiments of the present invention, the concept of the present invention will be explained first.

[0022] In network communication systems, data forwarding requirements are complex and diverse, and general-purpose switching chips can no longer flexibly meet various application needs. Independent and controllable communication equipment can not only better ensure information security and avoid external interference and attacks, but also avoid external constraints and restrictions.

[0023] In the field of network communication, FPGAs play an irreplaceable role. On one hand, FPGAs can implement distributed algorithm structures, which is highly advantageous for high-speed digital signal processing in wireless communication. This is because many functional modules in wireless communication systems typically require a large number of filtering operations, and these filtering functions often involve numerous multiplication and accumulation operations. On the other hand, FPGAs, with their high parallelism, flexibility, and abundant high-speed interface resources, are also widely used in high-speed data storage and forwarding. Furthermore, designing network communication equipment independently based on domestically produced FPGA platforms can reduce dependence on foreign technologies, thereby improving the security and reliability of network data transmission.

[0024] SDN (Software-Defined Networking), represented by the OpenFlow protocol, is based on the core idea of ​​"separation of forwarding and control." The core components of the OpenFlow protocol include a controller, OpenFlow switches, and a secure channel. The controller centrally controls the network, implementing control layer functions; the OpenFlow switch is responsible for data layer forwarding and exchanges messages with the controller through the secure channel. However, its protocol stack is relatively complex, and the interaction between the controller and the switch usually relies on standard protocols, posing a risk of protocol vulnerabilities being exploited. Therefore, a simpler, custom flow table interaction protocol needs to be designed.

[0025] This embodiment provides a method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGAs, including: An independent and controllable switching device supporting flow table forwarding is constructed based on a domestically produced SOC-type FPGA platform. The hardware architecture of the independent and controllable switching device includes a control terminal and a switch terminal. The control terminal and the switch terminal use a custom flow table interaction protocol for message exchange. Please see Figure 1 , Figure 1 The hardware architecture diagram of the switching device is shown. It adopts the domestically produced Fudan Microelectronics FMQ45T900 chip, which is an FPGA chip that integrates SOC and combines ARM processor and FPGA logic resources. It has both the flexible and efficient data operation and transaction processing capabilities of ARM processor and the rich I / O resources and high-speed parallel processing capabilities of FPGA. The control terminal uses the ARM processor of the Fudan Micro FPGA chip to serve as the forwarding control layer to complete the distribution of flow tables; the switch terminal uses an FPGA logic processor to realize the general layer 2 switching of the OSI model and the autonomous and controllable flow table switching function through the high parallel processing capability of the FPGA logic processor, and realizes the SGMII interface data access of multiple Ethernet through the GTX component of the FPGA chip. Based on the aforementioned autonomous and controllable switching equipment, a software architecture is constructed including an interface adaptation layer, a data forwarding layer, and a forwarding control layer; such as Figure 2 As shown, Figure 2 The diagram illustrates the software architecture of the switching device and the data flow and interaction between software modules. The interface adaptation layer runs on the switch and is used to convert between SGMII interface data and internal custom protocol-encapsulated data packets. The data forwarding layer software is the core processing layer on the switch side, used to perform hybrid forwarding operations. It includes modules for maintaining and looking up MAC tables and flow tables, as well as modules for storing and switching data packets. The forwarding control layer software runs on the control end and is implemented in C / C++. It is used to send, modify, or delete flow table rules to the switch end through the custom flow table interaction protocol, including configuring interface parameters, interacting with routing protocols, defining flow table rules, adding and deleting flow tables, etc.

[0026] The method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGAs provided in this embodiment is based on domestically produced SoC-type FPGA chips, which integrate hard-core processors and programmable logic architectures. On the basis of ensuring autonomous controllability of the entire software and hardware link, it makes full use of the high parallel processing capability and low latency throughput advantage of FPGAs to construct a composite flow table matching mechanism covering multi-dimensional information of MAC frames from layers 2 to 4. Thus, while being compatible with general layer 2 switching, it can execute customized service forwarding strategies more flexibly and efficiently than traditional OpenFlow switches, meeting the requirements of military and other special communication systems for high security, high flexibility and equipment miniaturization.

[0027] As a specific embodiment, the control terminal and the switch terminal exchange Ethernet packets via GMAC to achieve high-speed transmission of Ethernet data packets; register access is completed through the SPI interface to achieve low-speed and reliable register configuration and status reading; interrupt-based communication is implemented through GPIO to achieve asynchronous event notification (such as status changes and error alarms).

[0028] For ease of explanation, the control terminal will be abbreviated as PS terminal and the switch terminal as PL terminal in the following text.

[0029] As a specific implementation, the Fudan Microelectronics FMQ45T900 chip features multiple GTX banks, each containing four transceiver channels. Each bank has an independent reference clock input and clock management unit. This architecture uses two GTX banks, Bank115 and Bank116, to instantiate six SGMII interfaces.

[0030] The PL terminal uses a GTX component to access six Ethernet SGMII interface signals; for example... Figure 1 As shown, six external 10 / 100 / 1000 adaptive Ethernet interfaces are connected to the FPGA chip via two 4-port PHY chips. The PHY chips implement Copper-SGMII interface conversion. The SGMII interface transmits data serially at speeds up to 1.25Gbps, suitable for high-speed data transmission scenarios such as Gigabit Ethernet. This interface uses differential signal transmission, offering advantages such as strong anti-interference capability, high speed, and low pin count.

[0031] The FMQ45T900 chip integrates high-speed serial transceivers (such as Xilinx's GTX / GTH / GTY series). These transceivers implement the PMA (Physical Media Adaptor) and PCS (Physical Coding System) sublayers of the high-speed serial interface, supporting the standard SGMII interface. Users can configure the serial transceiver to enable SGMII interface access, while also providing link status monitoring and error detection functions. This embodiment uses a 1G / 2.5G-EthernetPCS / PMA or SGMII (16.1) version IP core to implement the SGMII interface.

[0032] In a preferred embodiment, the method for the interface adaptation layer to convert SGMII interface data into data packets encapsulated by an internal custom protocol includes: Data is accessed via the SGMII interface through the GTX transceiver IP core integrated within the FPGA. Convert SGMII interface data to GMII interface data; Convert GMII interface data to AXI-Stream interface data using an Ethernet MAC IP core; AXI-Stream data is encapsulated into an internal custom protocol format, which includes a frame header indicator, a receive port number, a data payload, and a frame tail marker.

[0033] As a specific example, such as Figure 3 As shown, Figure 3 The diagram illustrates the data transmission and reception processing of the interface adaptation layer software.

[0034] First, the PL side converts the SGMII interface data into internal GMII interface data by calling the PCS / PMA-SGMII-IP core. It should be noted that the GMII interface is a commonly used high-speed Ethernet digital interface. The interface signals include transmit / receive data, transmit / receive clock, and transmit / receive data enable signals. The interface data encapsulation conforms to the IEEE 802.3 frame format (standard MAC frame format).

[0035] Next, the internal GMII interface is converted to a user AXI-Stream interface via a Tri-Mode Ethernet IP core (Tri-Mode Ethernet MAC9.0). The Tri-Mode Ethernet IP core primarily implements functions such as MAC frame parsing, data verification, and rate adaptation. The user-programmed logic design of the GMAC interface includes packet parsing and encapsulation, VLAN addition and deletion, data buffering, and data width conversion. The AXI-stream interface is an interface for high-speed data stream transmission, characterized by addresslessness, low latency, high bandwidth, and scalability; its transmission data width can reach up to 512 bits. The AXI-stream interface uses a handshake mechanism based on TAVLID and TREADY signals, marks packet termination with TLAST, and uses TKEEP to handle non-continuous valid data transmission (such as transmitting only partial bytes).

[0036] Converting AXI4-Stream-8 (8-bit wide) to AXI4-Stream-64 (64-bit wide) can improve bus utilization and system throughput, enabling bit-width conversion between low-precision front-end processing and high-precision back-end computation.

[0037] Finally, the user's AXI4-Stream-64 interface data is converted into the encapsulation format of the custom protocol inside this method and sent to the data forwarding layer.

[0038] The data packets encapsulated by the internal custom protocol have a data width of 74 bits. As shown in Table 1, Table 1 describes the signals for internally forwarded data packets.

[0039] Table 1. Description of Internal Forwarding Data Packet Signals In a preferred embodiment, the internal forwarding data packet includes Rxfifo_data and Txfifo_data; Rxfifo_data sets an indicator frame field and an ingress port identifier field in the high bits of the bus, and sets a message field in the low bits of the bus. The message field includes at least the source MAC address, the destination MAC address, and the vlan-ID, which is used to enable direct association of the physical source of the received message. Txfifo_data sets the destination port identifier, priority, broadcast indication, and VLAN isolation fields in the high bits of the bus, and sets the packet payload field after flow table processing in the low bits of the bus.

[0040] As a specific example, such as Figure 4As shown, Rxfifo_data is the received data from each port. The highest 2 bits of Rxfifo_data represent the receive indication frame. The frame header carries the corresponding receive port number and the MAC entry {MAC, VLAN, PortID} used to generate the MAC table entry.

[0041] Txfifo_data is the data that needs to be sent to the destination port after looking up a table. The frame header carries the destination port number and packet priority information. If the packet is a broadcast packet, it needs to be broadcast to other ports within the same VLAN, so the packet header also carries VLAN-ID information.

[0042] In this scheme, the data forwarding layer adopts a hybrid forwarding strategy, which supports both autonomous and controllable flow table forwarding and autonomous forwarding based on MAC address and VLAN.

[0043] As a preferred embodiment, such as Figure 5 As shown, the method for the data forwarding layer to perform hybrid forwarding operations includes: Read the received Rxfifo_data, and store and parse the Rxfifo_data; Complete MAC table self-learning based on the source MAC address and vlan-ID obtained from the parsing; Determine whether the forwarding control layer has issued a flow table and enabled the flow table lookup function; When the forwarding control layer does not issue a flow table or issues a flow table but does not enable the flow table lookup function, the MAC layer autonomous forwarding is adopted, including: based on the stored MAC address table or VLAN table, performing a MAC address table lookup according to the source MAC address, destination MAC address and VLAN ID, generating Txfifo_data according to the lookup result, and completing the MAC layer autonomous forwarding; When the forwarding control layer issues a forwarding flow table and enables the flow table lookup function, the autonomous and controllable flow table forwarding of data packets is completed based on the flow table issued by the forwarding control layer.

[0044] As a specific implementation, the system first responds to the data packet requests of each receiving port using a polling method, reads the received data from the port receiving FIFO, stores and parses the Rxfifo_data, and obtains the port number, source MAC address, and VLAN ID, etc.

[0045] Both MAC table self-learning and MAC address table lookup are based on hash functions, using {MAC, vlan-ID} for index calculation. Here, MAC includes the source MAC address (smac) and the destination MAC address (dmac). MAC table self-learning uses the source MAC address (smac), while MAC address table lookup uses the destination MAC address (dmac). During the MAC table self-learning phase, the hash calculation using {smac, vlan-ID} yields the storage location; during the MAC address table lookup phase, the hash calculation using {dmac, vlan-ID} yields the search range. This index mapping mechanism transforms the massive MAC address identification requirements into instantaneous addressing operations in hardware memory.

[0046] As a specific implementation, the MAC address table supports a total of 4096 entries. The address table consists of 1K buckets, and each bucket contains 4 addresses. Its organization structure is as follows: Figure 6 As shown, the storage location of the MAC address in the address table is determined by the lower 10 bits of the hash value calculated from the 48-bit MAC address and the 16-bit vlanID.

[0047] The hash algorithm used in this method employs the CRC-CCITT polynomial (X... 16 +X 12 +X 5 +1) Implementation: Generate a 16-bit hash value based on {dmac, vlan-ID}, take the lower 10 bits, and index 1K buckets. The hash algorithm reduces the 48-bit MAC address and 12-bit vlan-ID into a 10-bit index value. Based on this index value, the source or destination location information is mapped to physical table entries, thus establishing a deterministic association between spatial address and logical characteristics.

[0048] Furthermore, to prevent collisions, each hash value identifies a Bucket, and each Bucket contains four MAC addresses. In the first cycle, bin0 and bin1 are read and compared with {dmac, vlan-ID}; in the second cycle, bin2 and bin3 are read. Figure 6 The document lists the storage format of MAC address entries.

[0049] By locating a Bucket using a hash value, and with each Bucket containing four MAC addresses, the address table overflow problem caused by hash collisions is solved. At the same time, the use of periodic reading reduces the requirements for the on-chip memory width of the FPGA, allowing the switch to accurately find which port a data packet should go to from thousands of addresses in just a few nanoseconds.

[0050] As a specific implementation, if the flow table lookup function is not enabled, the MAC layer autonomous forwarding method is directly adopted. The MAC layer table is looked up using the destination MAC address and VLAN ID. If the table lookup is successful, the packet is forwarded to the outgoing interface; if the table lookup fails, it is broadcast within the VLAN.

[0051] Data forwarding within the same VLAN between the six Ethernet interfaces of this switch can be completed autonomously based on MAC addresses. The software mainly includes core modules such as MAC address self-learning, MAC address table lookup, and VLAN table lookup.

[0052] As a preferred embodiment, such as Figure 7 As shown, the step of performing a MAC address table lookup based on a preset MAC address table or VLAN table, according to the source MAC address, destination MAC address, and VLAN ID, and generating Txfifo_data based on the lookup result includes: Determine the data type based on the destination MAC address; When the forwarded data is unicast data, it is forwarded to the corresponding port in the same VLAN based on the destination MAC address. When the forwarded data is multicast or broadcast data, the stored VLAN table is searched to obtain the list of VLAN member ports, enabling data broadcasting or multicasting within the same VLAN.

[0053] It should be noted that the method of determining the data type based on the destination MAC address is based on the Ethernet standard. The least significant bit of the first byte of the destination is checked. If the least significant bit is 0, it is determined to be unicast data. If the least significant bit is 1, it is determined to be multicast or broadcast data. The MAC address of broadcast data is all F.

[0054] If the data is unicast, the MAC address table is looked up and hash calculation is initiated; if the data is multicast, the MAC address lookup is skipped, and the VLAN table is looked up directly; if the data is broadcast, it is forwarded to all ports within the VLAN except for the incoming port. The VLAN partitioning is set by the forwarding control layer, while the maintenance and lookup of the MAC address table are handled autonomously by the data forwarding layer.

[0055] As a specific example, such as Figure 8 As shown, Figure 8 This diagram illustrates the autonomous forwarding of Ethernet MAC frames via the MAC layer. The MAC layer is the second layer in the OSI reference model, and packet switching based on MAC addresses is also known as Layer 2 switching.

[0056] The MAC layer switching in this method is based on VLANs and MAC addresses. After a MAC frame is received from the ingress port, the ingress port VLAN is added first. Then, after MAC layer lookup and switching, it is forwarded to the destination port of the same VLAN, which can achieve VLAN-based broadcast packet isolation. Before the MAC frame is sent from the egress port, the VLAN tag needs to be removed. During the entire forwarding process, the MAC frame is not modified except for adding and removing VLANs.

[0057] In a preferred embodiment, when the forwarding control layer issues a forwarding flow table and enables the flow table lookup function, a self-controlled flow table forwarding method is adopted. Self-controlled flow table forwarding primarily relies on the flow tables issued by the control layer to modify and forward data packets. Flow table forwarding offers high flexibility, scalability, and programmability.

[0058] The key fields of the flow table issued by the forwarding control layer include at least: Match Fields, Actions, and Priority. The matching field is used to match the characteristics of data packets, covering information from OSI model layers one to four, including ingress port, source / destination MAC address, Ethernet protocol type, VLAN tag, IP protocol number, source / destination IP address, TCP / UDP source / destination port number, ICMP type, and MPLS tag information; The action instruction field is used to determine the action to be performed when a data packet matches an entry in the matching field of the flow table, including at least modifying the data packet field, dropping, and forwarding to a group; The priority field is used to determine the matching priority of entries in the flow table. When multiple entries are matched, the action instruction with the higher priority is executed.

[0059] As a specific implementation, when the forwarding controller issues a flow table, it includes the flow table ID, flow table priority, matching field mask, matching field, instruction set mask, and instruction set.

[0060] The values ​​and lengths of the flow table matching fields in this method are defined as shown in Table 2: Table 2 Matching Domain Definitions During packet matching, the corresponding field is extracted based on the matching field. The feature value and the number of bits in the feature mask are ANDed. If the result is the same as the extracted field, the match is successful. If multiple matches are successful at the same time, the flow table entry with the higher priority is selected.

[0061] The action instruction field definitions in the flow table are shown in Table 3: Table 3 Action Instruction Definitions As a preferred embodiment, the basic process of flow table forwarding is as follows: parse the data packet to match the flow table and execute the action, such as... Figure 9 As shown, Figure 9 The flowchart for flow table forwarding is shown.

[0062] When flow table lookup is enabled, autonomous and controllable flow table forwarding of data packets is achieved based on the flow table issued by the forwarding control layer, including: First, the data packets to be forwarded are stored in the dual-port RAM. Then, the IP header and UDP / TCP header fields of the data packets are read. After at least 48 bytes are written to the dual-port RAM, the flow table lookup is started to speed up the processing time. When looking up a table, each entry is read according to its flow table ID, and the matching judgment of the corresponding field is completed based on the matching field mask value. If a match is found, the priority of the flow table, the flow table ID, and the mask length of the destination IP are latched, and then the traversal continues. If a match is found again, and the IP mask length is the same or the IP mask length is the same but the priority is higher, then the flow table ID is replaced. If a table lookup process encounters a flow terminator or completes the traversal, the lookup process will exit.

[0063] Furthermore, the flow table ID obtained from the successful lookup can be used directly as the address to look up the action instruction table, obtain the actionInfor information, parse the actionInfor information according to the value of the action instruction, and complete the forwarding and modification of the packet according to the specific requirements. Multiple instructions can be executed on the packet at the same time.

[0064] It should be noted that the modifications mainly include changing the VLAN and destination MAC address. After the IP packet is modified according to the instructions, the IP checksum needs to be regenerated.

[0065] After the flow table lookup and modification are completed, the packet will carry the new VLAN ID and destination MAC address. At this point, the packet is sent to the MAC layer, and the outgoing port can be obtained by looking up the MAC address table based on {dmac, vlanID}.

[0066] Furthermore, if the message needs to be forwarded to a group, the group number is used to retrieve the group member information.

[0067] like Figure 10 As shown, Figure 10 This diagram illustrates the forwarding of IP / UDP / TCP packets based on flow tables.

[0068] Packets entering through the ingress port are first tagged with the ingress port VLAN tag, and then proceed to the flow table lookup process. The Lay2 / Lay3 / Lay4 fields of the packet can all be used as matching fields. Multiple matching fields are matched simultaneously according to the matching field mask. A flow table lookup is considered successful only if all fields specified by the matching field mask are matched successfully.

[0069] After a successful field match, the packet is modified according to the instruction set. Combined with the instruction set mask, all instructions are executed, allowing modification of Lay2 / Lay3 / Lay4 fields. The modified packet then performs a MAC layer lookup based on {MAC, VLAN} to obtain the outgoing port. The VLAN tag is removed before the packet is sent out from the outgoing port. After the IP packet is forwarded via the flow table, the Lay2 / Lay3 / Lay4 fields may all be modified.

[0070] In some embodiments, the autonomous and controllable flow table forwarding of data packets based on the flow table issued by the forwarding control layer further includes forwarding packets with MPLS tags: Protocol tag encapsulation is performed between the link layer header and the network layer header of the message, and the protocol identifier field of the message is rewritten according to the encapsulated protocol type. The tag field at the top of the message stack is stripped, and the bottom flag is parsed; if the bottom flag is in a preset valid state, the message protocol identifier is restored to the original protocol type. Perform an atomic replacement operation on the tag value at the top of the message stack to achieve tag-based path switching.

[0071] As a specific implementation, the core idea of ​​MPLS (Multiprotocol Label Switching) is to "replace IP routing with label switching," thereby improving forwarding efficiency and network control capabilities. The format of a packet with an MPLS label is as follows: the MAC header contains the destination and source MAC addresses; the 2-byte MACtype is fixed at 0x8847 (indicating the packet type is MPLS). It should be noted that the MACtype value for IP packets is 0x0800. A single MPLS label is 32 bits and contains the following fields: Label: 20 bits, label value range; 0-15 are special labels; 16-1023 are static labels; 1024 and above are dynamic labels. Exp (TC): 3 bits, used for extension, now usually used as Cos, priority, value 0-7; BoS: 1 bit, bottom of stack identifier. MPLS supports multi-level labels; when BoS is 1, it indicates the bottom-level label. TTL: 8 bits, same meaning as TTL in IP packets; the value is decremented by 1 with each forward. MPLS supports multi-level label nesting; the label closest to the MAC header is the top of the stack, and the label closest to the IP header is the bottom of the stack.

[0072] The forwarding process for MPLS label packets in this method is as follows: First, the message type is identified. When mactype=0x8847, the message type is determined to be a message carrying an MPLS tag.

[0073] Secondly, according to the matching field definition in Table 2, the matching field identifier values ​​22 / 23 / 24 correspond to MPLS_Labl, MPLS_TC, and MPLS_BOS, respectively. When matching tags, the top tag of the stack is retrieved. After a match, the top tag is popped from the stack, and then forwarded according to the instruction set. At the same time, the BoS bit of the top tag is used to determine whether there are any other tags. If not, the tag is popped and the MAC type is changed to 0x0800; if there are other tags, the tag is popped without modifying the MAC type.

[0074] Finally, the MPLS tag messages are forwarded according to the instructions. The processing of the messages during forwarding mainly includes pushing the tags, matching and modifying the tags, and popping the tags, which correspond to the instruction set identifier values ​​12 / 16 / 15 in Table 3, respectively.

[0075] For further details, please see Figure 11 , Figure 11 This demonstrates the forwarding process for packet data that does not inherently carry MPLS labels. Specifically: IP packets received from the ingress port are first tagged with a VLAN tag, but do not carry an MPLS tag themselves. After flow table matching, the instruction set requires the insertion of an MPLS tag into the packet, modification of the destination MAC address and VLAN, and forwarding to a new port. After MPLS tag insertion, the MAC frame type of the packet is 0x8847. The VLAN tag is removed when the packet is sent from the egress port. After the IP packet is looked up in the flow table and an MPLS tag is inserted, the MAC type changes from 0x0800 to 0x8847, and the MAC address and VLAN are also modified.

[0076] In contrast, Figure 12 and Figure 13 This demonstrates the forwarding process for packet data carrying MPLS tags. Specifically: Packets coming in from the ingress port carry MPLS labels, and the MPLS labels can be popped or modified according to the instructions.

[0077] After the label pops up, the MAC type changes from 0x8847 to 0x0800, such as... Figure 12 As shown; after modifying the label, the message still carries the MPLS label, such as Figure 13 As shown, however, the label level will be reduced by one level.

[0078] As a specific implementation, the forwarding control layer is implemented by the PS (Power Switch) and acts as a bridge between the application layer and the forwarding layer. It provides open programmable interfaces to upper-layer applications and centrally manages and schedules traffic forwarding for lower-layer network devices. Its main functions include: 1. Configuring Ethernet interfaces, including VLAN planning and interface mode settings. 2. Issuing, modifying, and deleting flow tables. 3. Querying and maintaining interface status and flow table status.

[0079] In one specific embodiment, the PS end uses Ethernet MAC frames to carry flow table entries and sends the flow table to the PL end. The MAC frame content definition is shown in Table 4: Table 4 Flow Table Message Format Definition In some embodiments, type 0x0852 is a custom MAC type for flow table distribution messages. If the PL receives a VLAN 2 message from the CPU-GMAC and MAC_type=0x0852, it is identified as a flow table distribution message.

[0080] After the network control and management software plans the data forwarding path, the PS end converts the path into flow table packets and sends them to the PL end according to the packet format defined in Table 4. The corresponding modules on the PL end parse the packets and complete the writing, modification, or deletion of the flow table.

[0081] To verify the practical effectiveness of this method, this application performs functional simulation on the flow table lookup and forwarding step. The simulation system clock is 125MHz with a clock period of 8ns. The simulation results are as follows: Figure 14 As shown.

[0082] As seen in the functional simulation diagram, when port 1 (RID=1) receives a MAC frame, it initiates a flow table lookup at state_start=1. A match is successfully found at flowID=0 (the first flow table entry), and since the flow table entry with flowID=1 is a terminator, the lookup is completed immediately, returning the search_end and search_success signals. The time from the start of the search_start signal to the end of the search_end signal is the flow table lookup time, and the time from the end of the RVALID signal to the start of the TVALID signal is the packet forwarding delay. The diagram shows that the flow table lookup time is 9 system clock cycles (72ns), and the packet forwarding time is 32 system clock cycles (256ns).

[0083] If we consider the case where the controller does not issue a flow table terminator, it would be necessary to traverse 500 flow table entries and retrieve the flow table ID with the highest priority that matches successfully. In this case, the flow table lookup time is the longest. Therefore, in practical applications, when there are fewer flow table entries, adding a terminator can significantly reduce the flow table lookup time and improve processing performance.

[0084] This invention also provides an independent and controllable flow table forwarding device based on a domestically produced FPGA, which is built on a domestically produced SOC-type FPGA platform and includes a control terminal and a switch terminal. The control terminal is used to manage network topology, generate and distribute flow table rules, and interact with the switch terminal through a custom flow table interaction protocol. The switch includes an interface adaptation module and a data forwarding module; the interface adaptation module is used to convert Ethernet data to and from internally forwarded data packets; the data forwarding module has a flow table lookup engine and a general Layer 2 switching engine, which are used to perform data packet matching, modification and forwarding.

[0085] The main performance characteristics of this independently controllable network switching equipment are as follows: The device features six external 10 / 100 / 1000 auto-sensing Ethernet interfaces, requiring full-line-speed data exchange on each port at both the MAC layer and flow table forwarding layer. It supports VLAN tags, and each Ethernet interface can be configured to operate in access or trunk mode. It supports a maximum of 500 flow table entries; the controller can add, modify, and delete entries in the flow table one by one; it shares a 1024Kb data buffer; it supports over 20 matching fields, including port, MAC address, VLAN, IP address, UDP / TCP port number, ARP packet fields, and MPLS tags; it supports over 10 post-matching actions, including forwarding to the port, modifying fields, discarding, and forwarding to the group; and it supports MPLS-based label forwarding.

[0086] To verify the actual effectiveness of this equipment, a setup was constructed as follows: Figure 15 The connection topology shown for the overall system performance test connects the six Gigabit Ethernet ports of the Bigtall stream generator to the six Gigabit Ethernet ports of the system under test. Six 1Gbps streams, each 1500 bytes long, are generated, with the corresponding transmit and receive ports... With ports 1, 2, 3, 4, 5, 6, and 6, all six Ethernet interfaces can transmit and receive simultaneously. A 3-minute test showed an average packet loss rate of 0.001%, verifying that this switch has a 12Gbps full-line-speed switching capability.

[0087] In summary, this invention constructs a miniaturized network control device based on a domestically produced SOC-type FPGA platform. The device's hardware and software are both independently controllable, and it can flexibly forward service data between different channels, meeting the needs of military-grade small network switching equipment.

[0088] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA, characterized in that, include: An independent and controllable switching device supporting flow table forwarding is constructed based on a domestically produced SOC-type FPGA platform. The hardware architecture of the independent and controllable switching device includes a control terminal and a switch terminal. The control terminal and the switch terminal use a custom flow table interaction protocol for message exchange. The control terminal uses the central processing unit of the SOC-type FPGA platform to act as the forwarding control layer to complete the distribution of flow tables; the switch terminal uses the FPGA logic processor of the SOC-type FPGA platform to realize the general layer 2 switching and autonomous and controllable flow table switching functions of the OSI model through the high parallel processing capability of the FPGA logic processor, and realizes the access of multiple Ethernet data through the high-speed serial transceiver of the SOC-type FPGA platform. Based on the aforementioned autonomous and controllable switching equipment, a software architecture including an interface adaptation layer, a data forwarding layer, and a forwarding control layer is constructed. The interface adaptation layer runs on the switch and is used to convert between interface data and the internal forwarding data packets of the custom flow table interaction protocol. The data forwarding layer runs on the switch and is used to perform hybrid forwarding operations; The forwarding control layer runs on the control end and is used to send, modify, or delete flow table rules to the switch end through the custom flow table interaction protocol.

2. The method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA according to claim 1, characterized in that, The Ethernet data is accessed via the SGMII interface; The interface adaptation layer implements the conversion method for internal forwarding data packets between SGMII interface data and the custom flow table interaction protocol, including: Data is accessed through the corresponding SGMII interface via the GTX transceiver IP core integrated within the FPGA logic processor. Convert SGMII interface data to GMII interface data; Convert GMII interface data to AXI-Stream interface data using an Ethernet MAC IP core; The AXI-Stream data is encapsulated into an internal forwarding data packet of the custom flow table interaction protocol. The format of the internal forwarding data packet includes a frame header indication, a receiving port number, a data payload, and a frame tail marker.

3. The method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA according to claim 1, characterized in that, The internally forwarded data packets include Rxfifo_data and Txfifo_data; The Rxfifo_data includes received data from each port. An indicator frame field and an ingress port identifier field are set in the high bits of the bus, and a message field is set in the low bits of the bus. The message field includes at least the source MAC address, the destination MAC address, and the vlan-ID, which is used to enable direct association of the physical source of the received message. The Txfifo_data includes the data that needs to be sent to the destination port after the lookup table. The destination port identifier, priority, broadcast indication and VLAN isolation fields are set in the high bits of the bus, and the packet payload field after the flow table action is set in the low bits of the bus.

4. The method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA according to claim 3, characterized in that, The method for the data forwarding layer to perform hybrid forwarding operations includes: Read the received Rxfifo_data, and store and parse the Rxfifo_data; Complete MAC table self-learning based on the source MAC address and vlan-ID obtained from the parsing; Determine whether the forwarding control layer has issued a flow table and enabled the flow table lookup function; When the forwarding control layer does not issue a flow table or issues a flow table but does not enable the flow table lookup function, the MAC layer autonomous forwarding is adopted, including: based on the stored MAC address table or VLAN table, performing a MAC address table lookup according to the source MAC address, destination MAC address and VLAN ID, generating Txfifo_data according to the lookup result, and completing the MAC layer autonomous forwarding; When the forwarding control layer issues a forwarding flow table and enables the flow table lookup function, the autonomous and controllable flow table forwarding of data packets is completed based on the flow table issued by the forwarding control layer.

5. The method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA according to claim 4, characterized in that, The method, based on a preset MAC address table or VLAN table, performs a MAC address table lookup according to the source MAC address, destination MAC address, and VLAN ID, and generates Txfifo_data based on the lookup result, including: Determine the data type based on the destination MAC address; When the forwarded data is unicast data, it is forwarded to the corresponding port in the same VLAN based on the destination MAC address. When the forwarded data is multicast or broadcast data, the stored VLAN table is searched to obtain the list of VLAN member ports, enabling data broadcasting or multicasting within the same VLAN.

6. The method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA according to claim 4, characterized in that, The key fields of the flow table issued by the forwarding control layer include at least: a matching field, an action instruction field, and a priority field; The matching field is used to match the characteristics of data packets, covering information from OSI model layers one to four, including ingress port, source / destination MAC address, Ethernet protocol type, VLAN tag, IP protocol number, source / destination IP address, TCP / UDP source / destination port number, ICMP type, and MPLS tag information; The action instruction field is used to determine the corresponding action to be performed when a data packet matches an entry in the matching field field of the flow table. The action to be performed includes at least modifying the data packet field, dropping, and forwarding to a group. The priority field is used to determine the matching priority of entries in the flow table. When multiple entries are matched, the action instruction with the higher priority is executed.

7. The method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA according to claim 6, characterized in that, The autonomous and controllable flow table forwarding of data packets based on the flow table issued by the forwarding control layer includes: Read each entry in the flow table and perform matching judgments on the corresponding fields of the data packets based on the matching field. If a match is found, the priority field of the flow table, the flow table ID, and the mask length of the destination IP are latched, and the traversal continues. If a match is found again, and the IP mask length of the current entry is greater than that of the latched entry, or the IP mask length is the same but the priority is higher, then the flow table ID is replaced. The flow table ID that was successfully looked up is used as the address to look up the action instruction field, determine the action information to be executed, and complete the forwarding or modification of the packet based on the action information.

8. The method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA according to claim 7, characterized in that, The autonomous and controllable flow table forwarding of data packets based on the flow table issued by the forwarding control layer also includes: When multiple flow tables match simultaneously, the flow table ID with the highest priority that matches successfully is selected; If a flow table terminator is encountered during the table lookup process, the query will be terminated early to reduce processing latency.

9. The method for implementing autonomous and controllable flow table forwarding based on domestically produced FPGA according to claim 7, characterized in that, The autonomous and controllable flow table forwarding of data packets based on the flow table issued by the forwarding control layer also includes forwarding packets with MPLS tags: Protocol tag encapsulation is performed between the link layer header and the network layer header of the message, and the protocol identifier field of the message is rewritten according to the encapsulated protocol type. Remove the tag field from the top of the message stack and parse the flag bits at the bottom of the stack; If the stack bottom flag is in a preset valid state, the message protocol identifier will be restored to the original protocol type; Perform an atomic replacement operation on the tag value at the top of the message stack to achieve tag-based path switching.

10. A domestically developed and controllable flow table forwarding device based on a domestically produced FPGA, characterized in that, Built on a domestically produced SOC-type FPGA platform, including the control end and the switch end; The control terminal is used to manage network topology, generate and distribute flow table rules, and interact with the switch terminal through a custom flow table interaction protocol. The switch includes an interface adaptation module and a data forwarding module; the interface adaptation module is used to convert Ethernet data to and from internally forwarded data packets; the data forwarding module has a flow table lookup engine and a general Layer 2 switching engine, which are used to perform data packet matching, modification and forwarding.

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