Apd method, system, medium, and product for threshold voltage of ldmos device

Abstract

The application provides an APC method, system, medium and product for threshold voltage of an LDMOS device, and belongs to the technical field of semiconductors. The APC method comprises the following steps: providing a substrate; etching a conductive layer and part of a first oxide layer to form a second opening, and obtaining the CD of the second opening and the thickness of the first oxide layer under the second opening; etching to form a third opening; obtaining the process conditions for performing first ion implantation on the current batch of substrates according to the CD of the second opening, the CD of the third opening and the thickness of the first oxide layer under the second opening of the current batch of substrates, combining a first APC model, and performing first ion implantation on the current batch of substrates based on the process conditions to adjust the threshold voltage of the LDMOS device. The application can be used to accurately and timely regulate the threshold voltage of the LDMOS device.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to an APC method, system, medium, and product for threshold voltage of an LDMOS device. Background Technology

[0002] Laterally diffused metal-oxide-semiconductor field-effect transistors (LDMOS) are semiconductor devices widely used in power and radio frequency circuits. LDMOS devices have a simple structure, mature manufacturing process, and advantages such as low turn-on resistance, high voltage withstand capability, and good conduction characteristics. Among these, the threshold voltage is one of the important parameters characterizing the conduction characteristics of LDMOS devices.

[0003] In some process platforms, LDMOS devices are often integrated into the same chip as other devices (such as CMOS devices). To save costs, the doping conditions of LDMOS, such as the well region and drift region, are shared with the process conditions used in CMOS. Therefore, how to efficiently and accurately adjust the threshold voltage of LDMOS devices is crucial.

[0004] In addition, compared with other processes that can use APC (Advanced Process Control), it is often difficult to directly and quickly measure the adjusted threshold voltage after adjusting the threshold voltage of the LDMOS device, making it difficult to use the APC method for timely and accurate control during the threshold voltage adjustment process. Summary of the Invention

[0005] In view of this, this application aims to provide an APC method, system, medium, and product for the timely and accurate control of the threshold voltage of an LDMOS device.

[0006] The APC method for the threshold voltage of LDMOS devices provided in this application includes:

[0007] A substrate is provided, the substrate including a first oxide layer, a conductive layer and a patterned mask layer stacked sequentially, the patterned mask layer having a first opening to expose the surface of the conductive layer;

[0008] The conductive layer and a portion of the first oxide layer are etched to form a second opening in the first oxide layer and the conductive layer, and the CD of the second opening and the thickness of the first oxide layer below the second opening are obtained.

[0009] The first opening of the patterned mask layer is etched to form the third opening, and the CD of the third opening is obtained;

[0010] Based on the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening of the current batch of substrates, the process conditions for performing the first ion implantation on the current batch of substrates are obtained by combining the first APC model, and the first ion implantation is performed on the current batch of substrates based on the process conditions to form a first doped region in the substrate below the conductive layer. The threshold voltage of the LDMOS device is adjusted using the first doped region. The first APC model is constructed based on the mapping relationship between the CD of the second opening, the CD of the third opening, the thickness of the first oxide layer under the second opening, the process conditions of the first ion implantation, and the threshold voltage of the LDMOS device in historical data.

[0011] Optionally, the process conditions for the first ion implantation include dose and energy, and the process conditions for the first ion implantation obtained from the first APC model are the dose.

[0012] Optionally, the steps for establishing the first APC model include:

[0013] Obtained from historical data: dose, CD of the second opening, CD of the third opening, thickness of the first oxide layer under the second opening, and deviation of the threshold voltage from their respective target values;

[0014] The mapping relationships between the deviation of the dose, the deviation of the CD of the second opening, the deviation of the CD of the third opening, and the deviation of the thickness of the first oxide layer under the second opening, and the deviation of the threshold voltage were obtained.

[0015] The relationship between the deviation of the dose and the sum of the deviation of the CD of the second opening, the deviation of the CD of the third opening, and the deviation of the thickness of the first oxide layer under the second opening is obtained.

[0016] Optionally, in the first APC model: the deviation of the dose of the first ion implantation = a The influence of the threshold voltage on the total deviation + b, the influence of the threshold voltage on the total deviation = the influence of the threshold voltage on the deviation of the CD of the second opening + the influence of the threshold voltage on the deviation of the CD of the third opening + the influence of the threshold voltage on the deviation of the thickness of the first oxide layer under the second opening, where a and b are both real numbers.

[0017] Optionally, it is further determined whether the influence of the total deviation on the threshold voltage is less than or equal to a preset value. If yes, the deviation of the dose of the first ion implantation is 0; otherwise, the deviation of the dose of the first ion implantation is a. The threshold voltage is affected by the total deviation by +b, where the preset value is n times the standard deviation of the threshold voltage, and n is an integer from 1 to 12.

[0018] Optionally, the amount of influence on the threshold voltage is linearly related to the deviation of CD of the second opening, the deviation of CD of the third opening, and the deviation of the thickness of the first oxide layer under the second opening.

[0019] Optionally, before forming the second opening, a second APC model is used to obtain the etching parameters of the current batch of substrates based on the data of the previous batch of substrates and the next batch of substrates, and the second opening is formed by etching according to the etching parameters. The second APC model includes a feedforward model based on the CD of the first opening of the next batch of substrates and the thickness of the first oxide layer, and a feedback model based on the CD of the second opening of the previous batch of substrates and the thickness of the first oxide layer.

[0020] Based on another aspect of this application, an APC system for the threshold voltage of an LDMOS device is also provided, applied to the APC method described above, the APC system comprising:

[0021] The data acquisition module is used to acquire the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening of the current batch of substrates;

[0022] The first APC model is constructed based on the mapping relationship between the CD of the second and third openings, the thickness of the first oxide layer under the second opening, the process conditions of the first ion implantation, and the threshold voltage corresponding to the LDMOS device in historical data.

[0023] The control module is used to obtain the data of the current batch of substrates in the data acquisition module, obtain the process conditions for performing the first ion implantation on the current batch of substrates in combination with the first APC model, and perform the first ion implantation on the current batch of substrates based on the process conditions to adjust the threshold voltage of the LDMOS device.

[0024] Based on another aspect of this application, a computer-readable storage medium is also provided, on which a computer program is stored, which, when executed by a processor, implements the APC method as described above.

[0025] Based on another aspect of this application, a computer program product is also provided, including a computer program that, when executed by a processor, implements the APC method as described above.

[0026] In summary, the unexpected effect of this application is that, without adding a photomask or photolithography process, it forms a third opening by etching a patterned mask layer and performs first ion implantation to form a first doped region in the substrate under the third opening. The threshold voltage of the LDMOS device is then adjusted using the first doped region under the conductive layer, offering advantages of simplicity and high efficiency. Furthermore, to address the problem of difficulty in timely detection of the threshold voltage after the first ion implantation, which prevents the use of traditional APC (composed of feedforward and feedback), this application establishes a first APC model based on the mapping relationship between the CD of the second opening, the CD of the third opening, the thickness of the first oxide layer under the second opening, the process conditions of the first ion implantation, and the corresponding threshold voltage of the LDMOS device from historical data. By inputting the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening of the current batch of substrates into the first APC model, the process conditions for the first ion implantation of the current batch of substrates are obtained. This enables timely and accurate control of the threshold voltage of the LDMOS device, solving the problem of large process fluctuations and difficulty in adjusting the threshold voltage of the LDMOS device. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of an advanced process control method.

[0028] Figure 2 A flowchart of an APC method for the threshold voltage of an LDMOS device provided in an embodiment of this application.

[0029] Figure 3 This is a schematic diagram of a first oxide layer, a conductive layer, and a patterned mask layer formed on a substrate, according to an embodiment of this application.

[0030] Figure 4 This is a schematic diagram showing the second ion implantation performed according to an embodiment of this application.

[0031] Figure 5 This is a schematic diagram illustrating the etching of a conductive layer and a portion of a first oxide layer to form a second opening, according to an embodiment of this application.

[0032] Figure 6 This is a schematic diagram showing the formation of a third opening from a first opening in an etched patterned mask layer according to an embodiment of this application.

[0033] Figure 7 This is a schematic diagram showing the result of performing the first ion implantation according to an embodiment of this application.

[0034] Figure 8 This is a schematic diagram of an APC system for the threshold voltage of an LDMOS device provided in an embodiment of this application.

[0035] In the attached figures: 10 - substrate; 21 - first oxide layer; 22 - conductive layer; 23 - patterned mask layer; 24 - first opening; 25 - second doped region; 26 - second opening; 27 - third opening; 28 - first doped region. Detailed Implementation

[0036] Advanced process control is a control method in semiconductor manufacturing based on feedforward and feedback. This control method automatically controls the data of the next batch to approach the target value based on the data from the previous and next batch feeding systems. Figure 1 This is a schematic diagram of an advanced process control method, such as... Figure 1 As shown, the three batches of wafers are located in three adjacent processes in sequence. The Lot N+1 wafer (the next batch) is located in the previous process, the Lot N wafer (the current batch) is located in the current process, and the Lot N-1 wafer (the previous batch) is located in the next process. Therefore, for the Lot N wafer in the current process, the advanced process control consists of feedforward control and feedback control. The test results of the Lot N+1 wafer are used for the feedforward control adjustment of the Lot N wafer, and the test results of the Lot N-1 wafer are used for the feedback control adjustment of the Lot N wafer, thereby realizing real-time feedback on the Lot N wafer.

[0037] But by Figure 1 It can be seen that if the test results of the previous batch of wafers cannot be obtained in a timely manner (i.e., it is difficult to obtain feedback results), it is difficult to adjust the APC of the current batch of wafers. In other words, it is difficult to use the test results of the previous batch of wafers to adjust the current batch of wafers. And relying solely on the feedforward adjustment of the next batch of wafers is simply not enough to adjust the APC of the current batch of wafers.

[0038] In view of this, embodiments of this application provide an APC method, system, dielectric, and product for the threshold voltage of an LDMOS device. The APC method includes: providing a substrate, on which a first oxide layer, a conductive layer, and a patterned mask layer are sequentially stacked, the patterned mask layer having a first opening exposing the surface of the conductive layer; etching the conductive layer and a portion of the first oxide layer to form a second opening in the first oxide layer and the conductive layer, and obtaining the CD of the second opening and the thickness of the first oxide layer below the second opening; etching the first opening of the patterned mask layer to form a third opening, and obtaining the CD of the third opening; according to the current batch of substrates... The process conditions for performing the first ion implantation on the current batch of substrates are obtained by combining the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening with the first APC model. Based on the process conditions, the first ion implantation is performed on the current batch of substrates to form a first doped region in the substrate below the conductive layer. The threshold voltage of the LDMOS device is adjusted by using the first doped region. The first APC model is constructed based on the mapping relationship between the CD of the second opening, the CD of the third opening, the thickness of the first oxide layer under the second opening, the process conditions of the first ion implantation, and the threshold voltage of the LDMOS device in historical data.

[0039] An unexpected benefit of this application is that, without adding a photomask or photolithography process, a third opening is formed by etching a patterned mask layer, and a first ion implantation is performed to form a first doped region in the substrate under the third opening. The threshold voltage of the LDMOS device is then adjusted using the first doped region under the conductive layer, offering advantages of simplicity and high efficiency. Furthermore, to address the problem of difficulty in timely detection of the threshold voltage after the first ion implantation, which prevents the use of traditional APC (composed of feedforward and feedback), this application establishes a first APC model based on the mapping relationship between the CD of the second opening, the CD of the third opening, the thickness of the first oxide layer under the second opening, the process conditions of the first ion implantation, and the corresponding threshold voltage of the LDMOS device from historical data. By inputting the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening of the current batch of substrates into the first APC model, the process conditions for the first ion implantation of the current batch of substrates are obtained, thereby achieving timely and accurate control of the threshold voltage of the LDMOS device, solving the problem of large process fluctuations and difficulty in adjusting the threshold voltage of the LDMOS device.

[0040] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0041] Figure 2 This is a flowchart of an APC method for the threshold voltage of an LDMOS device provided in an embodiment of this application. Figure 2 As shown, an embodiment of this application provides an APC method for the threshold voltage of an LDMOS device, which includes:

[0042] S100: A substrate is provided, the substrate including a first oxide layer, a conductive layer and a patterned mask layer stacked sequentially, the patterned mask layer having a first opening to expose the surface of the conductive layer;

[0043] S200: Etch the conductive layer and a portion of the first oxide layer to form a second opening in the first oxide layer and the conductive layer, and obtain the CD of the second opening and the thickness of the first oxide layer below the second opening;

[0044] S300: Etch the first opening of the patterned mask layer to form the third opening, and obtain the CD of the third opening;

[0045] S400: Based on the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening of the current batch of substrates, the process conditions for performing the first ion implantation on the current batch of substrates are obtained by combining the first APC model, and the first ion implantation is performed on the current batch of substrates based on the process conditions to form a first doped region in the substrate below the conductive layer. The threshold voltage of the LDMOS device is adjusted using the first doped region. The first APC model is constructed based on the mapping relationship between the CD of the second opening, the CD of the third opening, the thickness of the first oxide layer under the second opening, the process conditions of the first ion implantation, and the threshold voltage of the LDMOS device in historical data.

[0046] Figures 3-7 This is a schematic diagram of the structure corresponding to the steps of the APC method for the threshold voltage of an LDMOS device provided in an embodiment of this application. Next, we will combine... Figures 3-7 The APC method for the threshold voltage of an LDMOS device provided in one embodiment of this application will be described in detail.

[0047] First, such as Figures 3-4 As shown, in step S100, a substrate 10 is provided. The substrate 10 includes a first oxide layer 21, a conductive layer 22 and a patterned mask layer 23 stacked sequentially. The patterned mask layer 23 has a first opening 24 to expose the surface of the conductive layer 22.

[0048] Specifically, such as Figure 3As shown, a first oxide layer 21, a conductive layer 22, and a mask layer are sequentially formed on a substrate 10. The mask layer is patterned to form a patterned mask layer 23, which has a first opening 24 exposing the surface of the conductive layer 22. In some embodiments, this application can be used to form an NLDMOS device. The first oxide layer 21 covers the surface of the substrate 10, and its material may include, but is not limited to, silicon oxide, for forming a gate oxide layer. The conductive layer 22 covers the first oxide layer 21, and its material may include polysilicon, for forming a gate conductive layer. The surface of the substrate 10 under the conductive layer 22 may be a channel region. The patterned mask layer 23 may be a patterned photoresist layer with a relatively thick thickness. In some examples, the openings of the patterned mask layer 23 can be used to define the source region of the NLDMOS device. The thickness of the patterned mask layer 23 can be greater than the sum of the thicknesses of the first oxide layer 21 and the conductive layer 22, for example, 1 micrometer to 1.5 micrometers, to serve as a shielding layer for subsequent two ion implantations, while reserving a certain consumption margin so that the first opening 24 has a large aspect ratio.

[0049] like Figure 4 As shown, a second ion implantation is performed using a patterned mask layer 23 to form a second doped region 25 in the substrate 10. In some embodiments, this application is used to form an NLDMOS device, where the ion type of the second ion implantation can be N-type, with higher implantation energy and a larger implantation dose, so that the second doped region 25 serves as a source region.

[0050] Understandably, other devices, such as CMOS devices, are also disposed on the substrate 10, which are covered by the patterned mask layer 23 described above.

[0051] Next, as Figure 5 As shown, step S200 is performed to etch the conductive layer 22 and a portion of the first oxide layer 21 to form a second opening 26 in the first oxide layer 21 and the conductive layer 22, and to obtain the CD of the second opening 26 and the thickness of the first oxide layer 21 under the second opening 26.

[0052] Specifically, using the patterned mask layer 23, dry etching can be used to remove the conductive layer 22 under the first opening 24 and a portion of the first oxide layer 21 to form a second opening 26. The second opening 26 is located between the conductive layer 22 and the first oxide layer 21, and is located below the first opening 24. The CD of the second opening 26 and the depth of the second opening 26 are measured. The CD of the second opening 26 can be the same as or similar to the CD of the first opening 24. The thickness of the remaining first oxide layer 21 under the second opening 26 is obtained from the depth of the second opening 26, the thickness of the conductive layer 22, and the thickness of the first oxide layer 21.

[0053] It is understandable that, for the dry etching in step S200, the results can be quickly obtained through detection, and the relative relationships (influences) of the parameters before and after dry etching are relatively clear. Therefore, when etching to form the second opening 26 of the current batch, the second APC model is used to obtain the etching parameters of the current batch substrate based on the data of the previous batch substrate and the next batch substrate, and the second opening 26 is formed according to the etching parameters. The second APC model includes a feedforward model based on the CD of the first opening 24 and the thickness of the first oxide layer 21 of the next batch substrate (before etching) and a feedback model based on the CD of the second opening 26 and the thickness of the first oxide layer 21 of the previous batch substrate (after etching).

[0054] Next, as Figure 6 As shown, step S300 is performed to etch the first opening 24 of the patterned mask layer 23 to form the third opening 27, and to obtain the CD of the third opening 27.

[0055] Specifically, dry etching can be used to remove part of the patterned mask layer 23. This dry etching has high etch selectivity for the patterned mask layer 23, so that the first opening 24 is widened into the third opening 27, while minimizing the impact on the conductive layer 22. In some embodiments, the patterned mask layer 23 can be a patterned photoresist layer, which can be etched using dry etching including oxygen or oxygen plasma. It is understood that because the patterned mask layer 23 has a relatively thick thickness and the first opening 24 has a large aspect ratio, it is difficult to accurately control the CD of the third opening 27 by dry etching, that is, the CD of the third opening 27 has large fluctuations.

[0056] Next, as Figure 7 As shown, in step S400, based on the CD of the second opening 26, the CD of the third opening 27, and the thickness of the first oxide layer 21 under the second opening 26 of the current batch of substrate 10, the process conditions for performing the first ion implantation on the current batch of substrate 10 are obtained in combination with the first APC model. Based on the process conditions, the first ion implantation is performed on the current batch of substrate 10 to form a first doped region 28 in the substrate 10 below the conductive layer 22. The threshold voltage of the LDMOS device is adjusted using the first doped region 28. The first APC model is constructed based on the mapping relationship between the CD of the second opening 26, the CD of the third opening 27, the thickness of the first oxide layer 21 under the second opening 26, the process conditions for the first ion implantation, and the threshold voltage of the corresponding LDMOS device in historical data.

[0057] During the first ion implantation, the CD of the second opening 26, the CD of the third opening 27, and the thickness of the first oxide layer 21 under the second opening 26 of the current batch of substrate 10 are input into the first APC model. The implantation dose required for the first ion implantation of the current batch of substrate 10 is obtained from the first APC model. The first ion implantation is performed on the current batch of substrate 10 according to the implantation dose to form a first doped region 28 in the substrate 10 below the third opening 27. The threshold voltage of the LDMOS device is adjusted by using the first doped region 28 below the conductive layer 22. Specifically, the conductivity type of the first ion implantation can be the same as that of the second doped region 25, and the CD of the first doped region 28 can be the same as or similar to the CD of the third opening 27. That is, at least a portion of the first doped region 28 is located below the conductive layer 22 (gate structure), i.e., in the channel region of the LDMOS device. The energy of the first ion implantation is less than that of the second ion implantation, so that the doping depth (junction depth) of the first doped region 28 is less than that of the second doped region 25.

[0058] The first APC model can be a historical data fitting model. This historical data fitting model is obtained based on the mapping relationship between the CD of the second opening, the CD of the third opening, the thickness of the first oxide layer under the second opening, the dose of the first ion implantation, and the threshold voltage of the LDMOS device in the historical data. In other words, according to the historical data, a historical data fitting model is established for the dose of the first ion implantation and the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening. The CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening are input into the historical data fitting model (as the input of the model) to obtain the corresponding dose of the first ion implantation (as the output of the model).

[0059] In one embodiment, the step of establishing the first APC model includes: obtaining the dose of the first ion implantation, the CD of the second opening, the CD of the third opening, the thickness of the first oxide layer under the second opening, and the threshold voltage of the LDMOS device from historical data; then obtaining the deviation of each of the above data relative to its respective target value, for example, the deviation of the first ion implantation dose = actual dose value - corresponding target value, the deviation of the CD of the second opening = actual CD of the second opening - corresponding target value, and the deviation of the threshold voltage = actual threshold voltage value - corresponding target value, where the target value is the center value of each specification; then, establishing the mapping relationship between the deviation of the first ion implantation dose, the deviation of the CD of the second opening, the deviation of the CD of the third opening, the deviation of the thickness of the first oxide layer under the second opening, and the deviation of the threshold voltage of the LDMOS device, and obtaining the influence of the deviation of the first ion implantation dose on the threshold voltage (the deviation of the threshold voltage and the deviation of the dose). The following parameters are defined: the mapping relationship between the threshold voltage and the CD of the second opening (the mapping relationship between the threshold voltage deviation and the CD of the second opening); the mapping relationship between the threshold voltage and the CD of the third opening (the mapping relationship between the threshold voltage deviation and the CD of the third opening); and the mapping relationship between the threshold voltage and the thickness deviation of the first oxide layer under the second opening (the mapping relationship between the threshold voltage deviation and the thickness deviation of the first oxide layer). Then, the influence of the total deviation (excluding the dose effect) on the threshold voltage is obtained as: the influence of the threshold voltage on the CD of the second opening + the influence of the threshold voltage on the CD of the third opening + the influence of the threshold voltage on the thickness deviation of the first oxide layer under the second opening. Finally, based on the influence of the total deviation on the threshold voltage and the influence of the first ion implantation dose deviation on the threshold voltage, the relationship between the first ion implantation dose deviation and the total deviation on the threshold voltage is obtained. It is easy to understand that, in order to ensure that the threshold voltage is at its target value, the deviation of the first ion implantation dose can be used to actively offset the influence of the total deviation (the other three parameters) on the threshold voltage. The obtained deviation of the first ion implantation dose is actually a compensation. That is, the above deviation (compensation) + the target value of the dose can be used as the output of the first APC model or the actual dose of the first ion implantation.

[0060] In some examples, the impact on the threshold voltage can be linearly related to the deviations of the CD of the second opening, the CD of the third opening, and the thickness deviation of the first oxide layer under the second opening (i.e., the mapping relationship is linear). The impact of the thickness deviation of the first oxide layer under the second opening on the threshold voltage is P^liner_OX_vt, the impact of the CD deviation of the second opening on the threshold voltage is P^liner_CD2_vt, the impact of the CD deviation of the third opening on the threshold voltage is P^liner_CD3_vt, and the impact of the total deviation on the threshold voltage is P^_vt, that is...

[0061] P^_vt =P^liner_OX_vt + P^liner_CD2_vt +P^liner_CD3_vt.

[0062] Furthermore, there is also a linear relationship between the deviation of the first ion implantation dose and the influence of the total deviation on the threshold voltage, that is,

[0063] P^Imp_vt =a P^_vt +b, where a is the regression coefficient, b is the bias, and both a and b are real numbers.

[0064] In addition, in actual implementation, it can be first determined whether the influence of the total deviation on the threshold voltage, P^_vt, is less than or equal to the preset value. If so, the dose output by the historical data fitting model is set as the corresponding target value (the dose deviation is 0). If not, the dose output by the historical data fitting model is a. The threshold voltage is affected by the total deviation by +b. In some examples, the default value is n times the standard deviation of the threshold voltage, where n is an integer from 1 to 12.

[0065] This application also provides an APC system for the threshold voltage of an LDMOS device. Figure 8 This is a schematic diagram of an APC system for the threshold voltage of an LDMOS device provided in an embodiment of this application. Figure 8 As shown in the embodiment of this application, the APC system is applied to the above-described APC method. The APC system includes a data acquisition module, a first APC model, and a control module.

[0066] The data acquisition module acquires the CD of the second opening and the third opening of the current batch of substrates, as well as the thickness of the first oxide layer under the second opening. The first APC model is constructed based on the mapping relationship between the CD of the second and third openings, the thickness of the first oxide layer under the second opening, the first ion implantation process conditions, and the threshold voltage of the LDMOS device from historical data. The control module obtains the process conditions for performing the first ion implantation on the current batch of substrates based on the data from the data acquisition module and the first APC model, and performs the first ion implantation on the current batch of substrates based on the process conditions to adjust the threshold voltage of the LDMOS device.

[0067] In some embodiments, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of any APC method in the embodiments of this disclosure.

[0068] In some embodiments, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any APC method in the embodiments of this disclosure.

[0069] In some embodiments, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the APC methods described above.

[0070] In summary, embodiments of this application provide an APC method, system, dielectric, and product for the threshold voltage of an LDMOS device. The APC method includes: providing a substrate, on which a first oxide layer, a conductive layer, and a patterned mask layer are sequentially stacked, the patterned mask layer having a first opening exposing the surface of the conductive layer; etching the conductive layer and a portion of the first oxide layer to form a second opening in the first oxide layer and the conductive layer, and obtaining the CD of the second opening and the thickness of the first oxide layer below the second opening; etching the first opening of the patterned mask layer to form a third opening, and obtaining the CD of the third opening; according to the current batch of substrates... The process conditions for performing the first ion implantation on the current batch of substrates are obtained by combining the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening with the first APC model. Based on the process conditions, the first ion implantation is performed on the current batch of substrates to form a first doped region in the substrate below the conductive layer. The threshold voltage of the LDMOS device is adjusted using the first doped region. The first APC model is constructed based on the mapping relationship between the CD of the second opening, the CD of the third opening, the thickness of the first oxide layer under the second opening, the process conditions of the first ion implantation, and the corresponding threshold voltage of the LDMOS device from historical data. An unexpected effect of this application is that, without adding a photomask and photolithography process, this application forms a third opening by etching a patterned mask layer and performs the first ion implantation to form a first doped region in the substrate below the third opening. The threshold voltage of the LDMOS device is adjusted using the first doped region under the conductive layer, which has the advantages of simplicity and high efficiency. Furthermore, to address the issue of the difficulty in timely detection of the threshold voltage after the first ion implantation, which prevents the use of traditional APC (consisting of feedforward and feedback), this application establishes a first APC model based on the mapping relationship between the CD of the second opening, the CD of the third opening, the thickness of the first oxide layer under the second opening, the process conditions of the first ion implantation, and the threshold voltage of the LDMOS device from historical data. By inputting the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening of the current batch of substrates into the first APC model, the process conditions for the first ion implantation of the current batch of substrates are obtained, thereby enabling timely and accurate control of the threshold voltage of the LDMOS device, thus solving the problem of large process fluctuations and difficulty in adjusting the threshold voltage of the LDMOS device.

[0071] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant parts can be referred to the method section.

[0072] It should also be noted that although preferred embodiments have been disclosed above, these embodiments are not intended to limit this application. Any person skilled in the art can make many possible variations and modifications to the technical solutions of this application, or modify them into equivalent embodiments, without departing from the scope of the technical solutions of this application. Therefore, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of this application, without departing from the content of the technical solutions of this application, shall still fall within the scope of protection of the technical solutions of this application.

[0073] It should also be understood that, unless otherwise specified or indicated, the terms “first,” “second,” “third,” etc., in the specification are used only to distinguish the various components, elements, and steps in the specification, and not to indicate the logical or sequential relationships between the various components, elements, and steps.

[0074] Furthermore, it should be recognized that the terminology described herein is used only to describe particular embodiments and is not intended to limit the scope of this application. It must be noted that the singular forms “a” and “an” as used herein include plural bases unless the context clearly indicates the opposite. For example, a reference to “a step” or “an apparatus” means a reference to one or more steps or apparatuses, and may include secondary steps and secondary apparatuses. All conjunctions used should be understood in the broadest sense. Also, the word “or” should be understood as having the definition of logical “or”, not logical “exclusive OR”, unless the context clearly indicates the opposite. Furthermore, implementations of the methods and / or devices in the embodiments of this application may include performing selected tasks manually, automatically, or in combination.

Claims

1. An APC method for the threshold voltage of an LDMOS device, characterized in that, include: A substrate is provided, the substrate including a first oxide layer, a conductive layer and a patterned mask layer stacked sequentially, the patterned mask layer having a first opening to expose the surface of the conductive layer; The conductive layer and a portion of the first oxide layer are etched to form a second opening in the first oxide layer and the conductive layer, and the CD of the second opening and the thickness of the first oxide layer below the second opening are obtained. The first opening of the patterned mask layer is etched to form the third opening, and the CD of the third opening is obtained; Based on the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening of the current batch of substrates, the process conditions for performing the first ion implantation on the current batch of substrates are obtained by combining the first APC model, and the first ion implantation is performed on the current batch of substrates based on the process conditions to form a first doped region in the substrate below the conductive layer. The threshold voltage of the LDMOS device is adjusted using the first doped region. The first APC model is constructed based on the mapping relationship between the CD of the second opening, the CD of the third opening, the thickness of the first oxide layer under the second opening, the process conditions of the first ion implantation, and the threshold voltage of the LDMOS device in historical data.

2. The APC method for the threshold voltage of an LDMOS device according to claim 1, characterized in that, The process conditions for the first ion implantation include dose and energy, and the process conditions for the first ion implantation obtained from the first APC model are the dose.

3. The APC method for the threshold voltage of an LDMOS device according to claim 2, characterized in that, The steps for establishing the first APC model include: Obtained from historical data: dose, CD of the second opening, CD of the third opening, thickness of the first oxide layer under the second opening, and deviation of the threshold voltage from their respective target values; The mapping relationships between the deviation of the dose, the deviation of the CD of the second opening, the deviation of the CD of the third opening, and the deviation of the thickness of the first oxide layer under the second opening, and the deviation of the threshold voltage were obtained. The relationship between the deviation of the dose and the sum of the deviation of the CD of the second opening, the deviation of the CD of the third opening, and the deviation of the thickness of the first oxide layer under the second opening is obtained.

4. The APC method for the threshold voltage of an LDMOS device according to claim 3, characterized in that, In the first APC model: the deviation of the dose of the first ion implantation = a The influence of the threshold voltage on the total deviation + b, the influence of the threshold voltage on the total deviation = the influence of the threshold voltage on the deviation of the CD of the second opening + the influence of the threshold voltage on the deviation of the CD of the third opening + the influence of the threshold voltage on the deviation of the thickness of the first oxide layer under the second opening, where a and b are both real numbers.

5. The APC method for the threshold voltage of an LDMOS device according to claim 4, characterized in that, It is also determined whether the influence of the total deviation on the threshold voltage is less than or equal to a preset value. If yes, the deviation of the dose of the first ion implantation is 0; otherwise, the deviation of the dose of the first ion implantation is a. The threshold voltage is affected by the total deviation by +b, where the preset value is n times the standard deviation of the threshold voltage, and n is an integer from 1 to 12.

6. The APC method for the threshold voltage of an LDMOS device according to claim 4, characterized in that, The impact of the threshold voltage is linearly related to the deviation of CD of the second opening, the deviation of CD of the third opening, and the deviation of the thickness of the first oxide layer under the second opening.

7. The APC method for the threshold voltage of an LDMOS device according to claim 1, characterized in that, Before forming the second opening, a second APC model is used to obtain the etching parameters of the current batch of substrates based on the data of the previous batch of substrates and the next batch of substrates, and the second opening is formed by etching according to the etching parameters. The second APC model includes a feedforward model based on the CD of the first opening of the next batch of substrates and the thickness of the first oxide layer, and a feedback model based on the CD of the second opening of the previous batch of substrates and the thickness of the first oxide layer.

8. An APC system for the threshold voltage of an LDMOS device, characterized in that, An APC method applied to the threshold voltage of an LDMOS device as described in any one of claims 1 to 7, the APC system comprising: The data acquisition module is used to acquire the CD of the second opening, the CD of the third opening, and the thickness of the first oxide layer under the second opening of the current batch of substrates; The first APC model is constructed based on the mapping relationship between the CD of the second and third openings, the thickness of the first oxide layer under the second opening, the process conditions of the first ion implantation, and the threshold voltage corresponding to the LDMOS device in historical data. The control module is used to obtain the data of the current batch of substrates in the data acquisition module, obtain the process conditions for performing the first ion implantation on the current batch of substrates in combination with the first APC model, and perform the first ion implantation on the current batch of substrates based on the process conditions to adjust the threshold voltage of the LDMOS device.

9. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed by a processor, implements the APC method for the threshold voltage of the LDMOS device according to any one of claims 1 to 7.

10. A computer program product, characterized in that, Includes a computer program that, when executed by a processor, implements the APC method for the threshold voltage of the LDMOS device according to any one of claims 1 to 7.

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