Secondary circuit performance determination method, device, equipment and storage medium

Abstract

This application discloses a method, apparatus, device, and storage medium for determining the performance of a secondary circuit, relating to the field of power technology. The method includes: acquiring electrical quantity data of the current secondary circuit and switching quantity data of each secondary device in the current secondary circuit; identifying fault timing in the current secondary circuit based on the electrical quantity data and switching quantity data to obtain key time nodes; using the key time nodes as timing benchmarks, performing feature analysis on fault recording data characterizing the primary devices connected to the current secondary circuit and response event data characterizing the current secondary circuit's response to the faults of the primary devices to obtain fault behavior characteristics; and analyzing the performance status of the current secondary circuit based on the fault behavior characteristics to obtain response performance indicators. This application, by constructing key time nodes for fault timing as timing benchmarks, reduces misjudgments and omissions caused by disconnections, thus improving the accuracy of secondary circuit performance analysis.

Description

Technical Field

[0001] This application relates to the field of power technology, and in particular to a method, apparatus, equipment and storage medium for determining the performance of a secondary circuit. Background Technology

[0002] Currently, in power system relay protection scenarios, in order to accurately trace the source of faults in secondary circuits and evaluate their performance, post-event analysis is generally performed using fault waveform files and Sequence of Events (SOE) files.

[0003] Fault waveform data and SOE event files typically originate from different devices and are independent, reflecting only fragmented results after a fault occurs. For example, after a protection device correctly isolates a fault, maintenance personnel assess the accuracy and timeliness of the protection action by comparing the current and voltage waveform changes in the fault waveform file with the protection action time recorded in the SOE event file. However, because this data originates from different independent devices, it is disconnected from the overall circuit topology, making it difficult to consider the entire process of fault occurrence and response. For instance, a normal protection action may be misjudged as a coordination error, or latent defects in the secondary circuit (such as signal transmission delay) may be completely overlooked, leading to biases in the performance analysis of the secondary circuit. Summary of the Invention

[0004] The main objective of this application is to provide a method, apparatus, device, and storage medium for determining the performance of secondary circuits, aiming to solve the technical problem that the performance analysis of traditional secondary circuits is biased due to the data sources being from different independent devices.

[0005] To achieve the above objectives, this application proposes a method for determining the performance of a secondary loop, the method comprising: Acquire the electrical quantity data of the current secondary circuit and the switching quantity data corresponding to each secondary device in the current secondary circuit; Based on the electrical quantity data and the switching quantity data, the fault timing of the current secondary circuit is identified to obtain key time nodes; Using the key time nodes as the time series reference, feature analysis is performed on the fault waveform data and response event data to obtain fault behavior characteristics. The fault waveform data is used to characterize the fault data of the primary equipment connected to the current secondary circuit, and the response event data is used to characterize the action data of the current secondary circuit in response to the fault of the primary equipment. The performance status of the current secondary circuit is analyzed based on the fault behavior characteristics to obtain the response performance index corresponding to the current secondary circuit.

[0006] In one embodiment, the step of identifying the fault timing of the current secondary circuit based on the electrical quantity data and the switching quantity data to obtain key time nodes includes: The electrical quantity data is denoised, and the switching quantity data is corrected. Feature extraction is performed on the processed electrical quantity data and the corrected switch quantity data to obtain the electrical quantity abruptness features, protection and electrical correlation features, and circuit breaker status features corresponding to the current secondary circuit. Based on the electrical quantity abrupt change characteristics, the protection and electrical correlation characteristics, and the circuit breaker status characteristics, the fault timing events in the current secondary circuit response to the primary equipment are identified. Based on the fault timing events, determine the key time points of the current secondary circuit in the process of responding to the primary equipment fault.

[0007] In one embodiment, the step of identifying fault timing events in the current secondary circuit response to primary equipment based on the electrical quantity change characteristics, the protection and electrical association characteristics, and the circuit breaker status characteristics includes: The electrical quantity abrupt change characteristics, the protection and electrical correlation characteristics, and the circuit breaker state characteristics are enhanced by a multilayer perceptron to obtain the corresponding modal attention weights; Based on the modal attention weights, the electrical quantity abruptness features, the protection and electrical correlation features, and the circuit breaker status features are weighted and fused to obtain multi-source fused features; Based on the multi-source fusion features, the fault process of the current secondary circuit responding to the primary equipment is identified by a preset deep learning model to obtain fault timing events. The preset deep learning model is constructed by a convolutional neural network.

[0008] In one embodiment, the step of performing feature analysis on fault waveform data and response event data using the key time nodes as a time-series reference to obtain fault behavior characteristics includes: Obtain the fault occurrence time, protection action time, reclosing time, and steady-state recovery time from the key time nodes; Using the fault occurrence time node as a timing reference, the clock deviation between the fault waveform data and the response event data is calibrated to obtain calibration data. Based on the protection action time node, the reclosing time node, and the recovery steady state time node, the calibration data is subjected to feature analysis to obtain timing features, fault features, and action features; The timing characteristics, the fault characteristics, and the action characteristics are used as the fault behavior characteristics corresponding to the current secondary circuit's response to the primary equipment.

[0009] In one embodiment, the step of analyzing the performance state of the current secondary circuit based on the fault behavior characteristics to obtain the response performance index corresponding to the current secondary circuit includes: The secondary circuit fault type of the current secondary circuit is analyzed based on the fault behavior characteristics to obtain secondary circuit fault data. Based on the secondary circuit fault data, the performance status of the current secondary circuit is analyzed to obtain the reliability index of the starting element, the reliability index of the action, the correctness index of the timing, and the integrity index of the process. The reliability index of the starting element, the reliability index of the action, the correctness index of the timing, and the integrity index of the process are used as the response performance index corresponding to the current secondary circuit.

[0010] In one embodiment, the step of analyzing the performance status of the current secondary circuit based on the secondary circuit fault data to obtain the reliability index of the starting element includes: Based on the secondary circuit fault data, the total number of valid faults of the primary equipment and the number of successful starts of the starting element in the secondary equipment are counted. Obtain the startup time corresponding to each startup element in the number of successful startups, and determine whether each startup time has reached a preset delay threshold; The number of times the startup does not reach the preset delay threshold is considered as the number of valid responses; The reliability index of the starting element is obtained by weighting the total number of valid failures, the number of successful starts, and the number of valid responses.

[0011] In one embodiment, the step of analyzing the performance status of the current secondary circuit based on the secondary circuit fault data to obtain a process integrity index includes: Based on the key time points, the process of the current secondary circuit responding to the primary device is divided into multiple stage intervals; Based on the secondary circuit fault data, the response results of the current secondary circuit in the multiple stage intervals are analyzed to obtain the completion degree of key events in each stage. A collaborative analysis is performed on each of the secondary devices to obtain the degree of coordination between action and electrical quantities. The event intersection between the fault recording data and the response event data is analyzed to obtain the multi-source record completeness. The completion rate of key events in the stage, the coordination between actions and electrical quantities, and the completeness of multi-source records are weighted and summed according to preset weighting coefficients to obtain a comprehensive index of process integrity.

[0012] Furthermore, to achieve the above objectives, this application also proposes a secondary loop performance determination device, the device comprising: The acquisition module is used to acquire electrical quantity data of the current secondary circuit and switch quantity data corresponding to each secondary device in the current secondary circuit; The identification module is used to identify the fault timing of the current secondary circuit based on the electrical quantity data and the switch quantity data, and obtain the key time nodes; The feature module is used to perform feature analysis on fault waveform data and response event data based on the key time nodes to obtain fault behavior features. The fault waveform data is used to characterize the fault data of the primary equipment connected to the current secondary circuit, and the response event data is used to characterize the action data of the current secondary circuit in response to the fault of the primary equipment. The performance module is used to analyze the performance status of the current secondary circuit based on the fault behavior characteristics, and obtain the response performance index corresponding to the current secondary circuit.

[0013] In addition, to achieve the above objectives, this application also proposes a secondary loop performance determination device, the device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the secondary loop performance determination method as described above.

[0014] In addition, to achieve the above objectives, this application also proposes a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the secondary loop performance determination method described above.

[0015] One or more technical solutions proposed in this application have at least the following technical effects: The secondary circuit performance determination method of this application includes: acquiring electrical quantity data of the current secondary circuit and switching quantity data corresponding to each secondary device in the current secondary circuit; performing fault timing identification on the current secondary circuit based on the electrical quantity data and the switching quantity data to obtain key time nodes; using the key time nodes as timing references, performing feature analysis on fault waveform data and response event data to obtain fault behavior characteristics, wherein the fault waveform data is used to characterize the fault data of the primary device connected to the current secondary circuit, and the response event data is used to characterize the action data of the current secondary circuit in response to the fault of the primary device; and analyzing the performance status of the current secondary circuit based on the fault behavior characteristics to obtain the response performance index corresponding to the current secondary circuit.

[0016] This application first acquires the electrical quantity data of the current secondary circuit and the corresponding switching quantity data of each secondary device, and then uses this data to identify the key time nodes for fault timing in the secondary circuit. Next, using these key time nodes as the timing benchmark, it performs feature analysis on the fault waveform data and response event data to obtain fault behavior characteristics, and further analyzes the performance status of the secondary circuit to obtain response performance indicators. Compared to existing methods where secondary circuit fault analysis is disconnected from the overall circuit topology, this application reduces misjudgments and omissions caused by disconnection by constructing key time nodes for fault timing as the timing benchmark and performing feature analysis on the fault waveform data and response event data, thus improving the accuracy of secondary circuit performance analysis. Attached Figure Description

[0017] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a flowchart illustrating an embodiment of the method for determining the performance of a secondary circuit in this application. Figure 2 A flowchart for fault timing identification provided in Embodiment 1 of this application; Figure 3 This is a flowchart illustrating Embodiment 2 of the method for determining the performance of the secondary circuit in this application. Figure 4A flowchart for loop performance analysis provided in Embodiment 2 of this application; Figure 5 This is a flowchart illustrating Embodiment 3 of the method for determining the performance of the secondary circuit in this application. Figure 6 This is a system diagram for evaluating the performance of the secondary circuit provided in Embodiment 3 of this application; Figure 7 This is a simulation diagram provided for Embodiment 3 of this application; Figure 8 This is a diagram showing the result of fault timing model identification provided in Embodiment 3 of this application; Figure 9 This is a block diagram of the module structure of the secondary loop performance determination device according to an embodiment of this application; Figure 10 This is a schematic diagram of the hardware operating environment involved in the secondary circuit performance determination device in the embodiments of this application. The realization of the purpose, functional characteristics, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0020] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of this application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0021] The main solution proposed in this application is as follows: Currently, in the context of power system relay protection, in order to accurately trace the source of faults in secondary circuits and evaluate their performance, it is generally necessary to rely on fault recording files and SOE files for post-event analysis.

[0022] Fault waveform data and SOE event files typically originate from different devices and are independent, reflecting only fragmented results after a fault occurs. For example, after a protection device correctly isolates a fault, maintenance personnel assess the accuracy and timeliness of the protection action by comparing the current and voltage waveform changes in the fault waveform file with the protection action time recorded in the SOE event file. However, because this data originates from different independent devices, it is disconnected from the overall circuit topology, making it difficult to consider the entire process of fault occurrence and response. For instance, a normal protection action may be misjudged as a coordination error, or latent defects in the secondary circuit (such as signal transmission delay) may be completely overlooked, leading to biases in the performance analysis of the secondary circuit.

[0023] To address the aforementioned issues, this application provides a method for determining the performance of a secondary circuit. First, it acquires the electrical quantity data of the current secondary circuit and the corresponding switching quantity data of each secondary device. Based on this data, it performs fault timing identification to obtain key time nodes. Then, using these key time nodes as timing benchmarks, it performs feature analysis on fault waveform data and response event data to obtain fault behavior characteristics, thereby analyzing the performance status of the secondary circuit to obtain response performance indicators. Compared to existing methods where secondary circuit fault analysis is disconnected from the overall circuit topology, this application reduces misjudgments and omissions caused by disconnection by constructing key time nodes for fault timing as timing benchmarks and performing feature analysis on fault waveform data and response event data, thus improving the accuracy of secondary circuit performance analysis.

[0024] It should be noted that the executing entity of this application embodiment can be a computing service device with data processing, network communication, and program execution functions, such as a personal computer, a server, etc., or an electronic device capable of realizing the above functions, a secondary loop performance determination device executing the secondary loop performance determination method of this application, etc. This embodiment does not limit this. The following uses a secondary loop performance determination device (hereinafter referred to as the device) as an example to describe this embodiment and the following embodiments.

[0025] Based on this, this application proposes a method for determining the performance of a secondary circuit according to a first embodiment, referring to... Figure 1 , Figure 1 This is a flowchart illustrating an embodiment of the secondary loop performance determination method of this application. In this embodiment, the secondary loop performance determination method may include steps S10 to S40: Step S10: Obtain the electrical quantity data of the current secondary circuit and the switching quantity data corresponding to each secondary device in the current secondary circuit.

[0026] It should be noted that the current secondary circuit can be the electrical circuit used in power system relay protection to monitor, control, protect and regulate the primary equipment, and is responsible for converting the operating status of the primary equipment into a signal that can be monitored and operated.

[0027] It should also be noted that electrical quantity data can reflect changes in electrical parameters such as current, voltage, and power in a power system, and serves as the basis for monitoring and analyzing the operating status of primary equipment in secondary circuits. Examples include three-phase current, three-phase voltage, zero-sequence current, and zero-sequence voltage; this embodiment does not impose any limitations on these.

[0028] During the acquisition of this electrical quantity data, it can be collected through devices such as a merging unit (MU), current transformer, and voltage transformer. This embodiment does not impose any restrictions on this.

[0029] Understandably, switch quantity data can represent the status changes of various switching devices (i.e., secondary equipment, such as circuit breakers, disconnectors, protection devices, etc.) in the secondary circuit, used to reflect the operating status of the secondary equipment. For example, switch quantity signals such as protection action commands, circuit breaker opening and closing status, reclosing commands, and control circuit status are not limited in this embodiment.

[0030] In the process of acquiring this switch quantity data, it can be collected by an intelligent terminal that monitors the status of the switching equipment in the secondary circuit in real time and executes protection action commands. This embodiment does not impose any restrictions on this.

[0031] Step S20: Based on the electrical quantity data and the switching quantity data, perform fault timing identification on the current secondary circuit to obtain key time nodes.

[0032] It is also understandable that key time points can be a series of important time points determined during the current secondary circuit's response to the fault, such as the fault occurrence time, protection action time, circuit breaker tripping time, reclosing time, and system recovery to steady state time, which are used to evaluate the timeliness of protection actions.

[0033] In actual use, the equipment can collect electrical quantity data of the current secondary circuit through the merging unit and switch quantity data of each secondary device in the current secondary circuit through the intelligent terminal; then, based on the collected electrical quantity data and switch quantity data, it can identify the fault timing and determine the key time nodes of each stage of fault occurrence, development, isolation and recovery.

[0034] Step S30: Using the key time nodes as the time series reference, perform feature analysis on the fault waveform data and response event data to obtain fault behavior features. The fault waveform data is used to characterize the fault data of the primary equipment connected to the current secondary circuit, and the response event data is used to characterize the action data of the current secondary circuit in response to the fault of the primary equipment.

[0035] It should be understood that fault recording data can be data that records the changes in electrical waveforms before and after a power system fault occurs. This fault recording data can be collected and stored by a fault recorder. For example, data such as the name of the recording device, voltage and current before and after the fault, fault phase, reclosing operation time, circuit breaker status, disconnector operation status, protection pressure plate status, the relationship between primary and secondary equipment channels, and voltage and current transformer status are not limited in this embodiment.

[0036] It should also be understood that the response event data (i.e., the data recorded in the SOE file) can be the data on the action events and time sequence of various protection devices, circuit breakers, and other secondary equipment during the current secondary circuit's response to a primary equipment fault. Examples include data such as the event source device, event location, event time, protection action command event, protection start event, protection return or reset event, protection abnormal event, switchgear operation-related events, and secondary circuit-related events. This embodiment does not impose any limitations on this.

[0037] It should be noted that fault behavior characteristics can be characteristic quantities that can reflect the changing patterns of electrical quantities and switching quantities during the occurrence, development and clearing of faults, such as the amplitude of current sudden change, the depth of voltage drop, the correlation between protection commands and current, the duration characteristics of each stage, and the characteristics of abnormal actions.

[0038] Step S40: Analyze the performance status of the current secondary circuit based on the fault behavior characteristics to obtain the response performance index corresponding to the current secondary circuit.

[0039] It should also be noted that the response performance index can be an index used to evaluate the performance of the secondary circuit during the fault occurrence and response process, such as the reliability index of the starting element reflecting the consistency and stability of the response speed of the starting element, the action reliability index reflecting the accuracy and effectiveness of the protection logic in completing the prescribed actions after the fault occurs, and the timing correctness index reflecting the compliance and accuracy of the timing coordination of each link in the action execution, etc. This embodiment does not limit this.

[0040] In practical use, the equipment uses the aforementioned key time nodes as a timing reference to first synchronize and align fault recording data and response event data. Then, it uses a machine learning model to analyze and extract multi-dimensional features such as electrical quantity abrupt changes before and after the fault, duration characteristics of each stage, and abnormal action characteristics to obtain fault behavior characteristics. Next, based on the above fault behavior characteristics, the performance status of the current secondary circuit is analyzed to obtain response performance indicators.

[0041] Furthermore, in order to obtain the aforementioned key time nodes, in this embodiment, the step of identifying the fault timing of the current secondary circuit based on the electrical quantity data and the switching quantity data to obtain the key time nodes includes: Step S21: Denoise the electrical quantity data and correct the switching quantity data.

[0042] Specifically, such as Figure 2 As shown, Figure 2The flowchart for fault timing identification provided in Embodiment 1 of this application firstly involves multi-source data acquisition and preprocessing. After obtaining MU data (i.e., electrical quantity data) such as three-phase current, three-phase voltage, zero-sequence current, and zero-sequence voltage through the MU unit, the electrical quantity data can be denoised using an improved db6 (Daubechies 6) wavelet 4-level decomposition and then Z-score normalized. The process is as follows: ; in Let be the denoising threshold of the k-th level wavelet decomposition. Let N be the noise standard deviation of the detail coefficients at the k-th level, and N be the data length of the electrical quantity data. The SNR is the signal-to-noise ratio; after denoising, the electrical quantity data can be standardized and dimensioned using the Z-score.

[0043] After acquiring intelligent terminal data (i.e., switching data) such as protection action commands, circuit breaker opening and closing status, reclosing commands, and control circuit status through the intelligent terminal, time synchronization and status completion can be achieved for this switching data using linear interpolation with the MU clock as the reference, as follows: ; in Time to be completed The status of the switch input. , For adjacent known times , The switch status is represented by I, which is an indicator function that takes the value 1 when the condition is met and 0 when the condition is not met.

[0044] Then, the timing is corrected by the timestamp deviation to ensure the synchronization accuracy of both electrical quantity data and switch quantity data. Specifically, the timestamp deviation Δt can be calculated first. sync =∣t m t s |, where Δt sync t represents the timestamp discrepancy between MU data and smart terminal data. m For the timestamp of MU data, t s For the timestamp of the smart terminal data; if the deviation is >1ms, then use t s =t s +Δt sync ×sign(t m t s ) Correction, where t s ′ represents the timestamp of the corrected smart terminal data, and sign is the sign function, which takes 1 for positive numbers, -1 for negative numbers, and 0 for zero.

[0045] Step S22: Perform feature extraction on the processed electrical quantity data and the corrected switching quantity data to obtain the electrical quantity change characteristics, protection and electrical correlation characteristics, and circuit breaker status characteristics corresponding to the current secondary circuit.

[0046] Understandably, electrical quantity abrupt change characteristics, including current abrupt change amplitude and voltage drop depth, are used to capture rapid changes in electrical quantities during a fault. Protection and electrical correlation characteristics are used to characterize the logical relationship between protection actions and changes in electrical quantities. Circuit breaker status characteristics, including status abrupt change slope and reclosing current recovery rate, are used to describe the circuit breaker's operating behavior and status changes during a fault.

[0047] Specifically, such as Figure 2 As shown, the next step is multimodal feature extraction. The device can use a sliding window mechanism to extract the aforementioned features from the processed electrical quantity data and the corrected switching quantity data. The window length can be set to L=f. s / 50, where f s The sampling frequency is 50, the power frequency is 50, and the step size is set to S=L / 4. The three types of features are extracted: electrical quantity change features, protection and electrical correlation features, and circuit breaker status features. Each feature corresponds to a clear event correlation logic.

[0048] The characteristics of electrical quantity abrupt changes include two categories: current abrupt change amplitude and voltage drop depth.

[0049] The magnitudes of the current surges are as follows: ; in, This represents the amplitude of the current surge. , The first , The effective value of the current within each sliding window.

[0050] The voltage drop depth is as follows: ; in, This refers to the voltage drop depth. This is the effective value of the rated voltage. This represents the effective value of the voltage within the w-th sliding window.

[0051] For protection and electrical correlation characteristics, the main focus is on calculating the correlation between protection commands and current: ; in, To protect the correlation between commands and current, To protect the instruction sequence With current RMS value sequence covariance, , These are the standard deviations of the protection command sequence and the current RMS value sequence, respectively.

[0052] The circuit breaker's state characteristics include the slope of state abrupt change and the reclosing current recovery rate.

[0053] The slope of the state transition is calculated as follows: ; in, The slope of the abrupt change in the switching state is used to characterize the rate of change of the switching state of the circuit breaker between adjacent sliding windows. , The first , The on / off status within each sliding window. This represents the time interval corresponding to the sliding window step size. The time interval for a single sampling point, multiplied by the sliding window step size. Get the duration of a single sliding window.

[0054] The reclosing current recovery rate is calculated as follows: ; in, The reclosing current recovery rate, This is the effective value of the rated current. , For the first , The effective value of the current within each sliding window.

[0055] Step S23: Based on the electrical quantity change characteristics, the protection and electrical correlation characteristics, and the circuit breaker status characteristics, identify the fault timing events in the current secondary circuit response to the primary equipment process.

[0056] Understandably, fault timing events can be various key events that occur in the current secondary circuit during the response to a primary equipment fault, such as fault occurrence, protection action, circuit breaker tripping, reclosing action, etc., including the order and time relationship of these events.

[0057] Furthermore, in order to obtain the aforementioned fault timing events, in this embodiment, the step of identifying the fault timing events in the current secondary circuit response to the primary equipment process based on the electrical quantity mutation features, the protection and electrical correlation features, and the circuit breaker state features includes: strengthening the electrical quantity mutation features, the protection and electrical correlation features, and the circuit breaker state features through a multilayer perceptron to obtain corresponding modal attention weights; performing weighted fusion of the electrical quantity mutation features, the protection and electrical correlation features, and the circuit breaker state features according to the modal attention weights to obtain multi-source fusion features; and identifying the fault process of the current secondary circuit response to the primary equipment through a preset deep learning model based on the multi-source fusion features to obtain fault timing events, wherein the preset deep learning model is constructed by a convolutional neural network.

[0058] It should be noted that a multilayer perceptron can be a type of feedforward artificial neural network. Through its multilayer nonlinear transformation capabilities, it can automatically learn and identify the importance of each feature for fault identification, and then assign a modal attention weight to each feature. The preset deep learning model can be a model constructed by combining convolutional neural networks (CNNs) and transformers.

[0059] Specifically, such as Figure 2 As shown, the final step is cross-dimensional feature fusion and fault timing event recognition. The device can use two layers of multilayer perceptrons with ReLU activation to calculate modal attention weights for electrical quantity features, protection and electrical correlation features, and circuit breaker status features, automatically identifying and strengthening feature modes sensitive to fault events while weakening redundant features. Then, the weighted three types of features are unified in dimension through a linear mapping matrix and concatenated along the timing dimension to form a multi-source fusion feature containing multi-source information, achieving complementary integration of electrical quantity and switching quantity features.

[0060] Next, the multi-source fusion features are input into the constructed CNN-Transformer hybrid neural network (i.e., the preset deep learning model). First, local features are extracted through three one-dimensional convolutional layers to capture short-term details of current and voltage changes and switching quantity changes. Then, long-term time-series dependencies are modeled through two Transformer encoder layers to mine the time-series correlation of the entire process from fault occurrence to reclosing. Finally, the probability of four types of events—fault occurrence, protection action, reclosing, and recovery to steady state—is output through the classification branch, and the absolute occurrence time of each event is output through the regression branch. Finally, the adaptive probability threshold and time error threshold of the sample distribution statistics are combined to screen out effective fault time-series events with high confidence and small time error.

[0061] In this embodiment, by automatically allocating modal attention weights through a multilayer perceptron, key feature modalities sensitive to fault events are strengthened, while redundant features are weakened, thus achieving effective fusion of multi-source features such as electrical quantity mutations, protection and electrical correlations, and circuit breaker status. Then, combined with a deep learning model constructed by a convolutional neural network, it can accurately capture local features and long-term temporal dependencies in the fault process, significantly improving the recognition accuracy and reliability of fault temporal events.

[0062] Step S24: Based on the fault timing events, determine the key time nodes of the current secondary circuit in the process of responding to the primary equipment fault.

[0063] Specifically, based on the above-mentioned electrical quantity change characteristics, protection and electrical correlation characteristics, circuit breaker status characteristics, and fault timing events, more precise time nodes can be determined, namely: the fault occurrence time node is the first moment when the current suddenly increases and meets the probability threshold; the protection action time node is the moment when the protection command is issued and the associated current changes; the tripping time node is the moment when the circuit breaker changes position and the current drops sharply; the reclosing time node is the moment when the circuit breaker closes and the current changes and gradually stabilizes; and the steady-state recovery time node is the moment when the voltage and current recover to 95% of their rated values.

[0064] Furthermore, such as Figure 2 As shown, the fault time can be divided into three stages according to the above time nodes: fault development stage, fault clearing stage, and steady-state recovery stage. Based on the above time nodes, characteristics, and data, a fault timing model can be constructed to characterize the current secondary circuit fault response process. The parameters of the fault timing model will be compared and analyzed with the subsequent waveform recording files and SOE files to perform secondary circuit performance analysis.

[0065] In this embodiment, wavelet decomposition denoising and Z-score standardization are used to process electrical quantity data, and linear interpolation and timestamp deviation correction methods are combined to process switch quantity data, ensuring high-precision data synchronization. Subsequently, electrical quantity mutation features, protection and electrical correlation features, and circuit breaker status features are extracted. Finally, based on these features, fault timing events are identified and key time nodes are determined. This effectively solves the problems of one-sided feature extraction and disconnect between waveform data and topology in traditional methods, and significantly improves the accuracy and reliability of fault timing event identification.

[0066] This application provides a method for determining the performance of a secondary circuit. First, it constructs a fault timing model using electrical quantity data from the MU unit and switching quantity data from the intelligent terminal, accurately identifying key time nodes of the equipment in the secondary circuit. Then, it performs electrical and logical comparison analysis with waveform recording files and SOE files from the power grid to determine whether the equipment in the secondary circuit operates correctly. Finally, it determines the response performance indicators of the secondary circuit based on the analysis results, completing the secondary circuit performance evaluation. Compared to existing methods where secondary circuit fault analysis is disconnected from the overall circuit topology, this embodiment uses key time nodes of the fault timing model as a timing benchmark to perform feature analysis on fault waveform recording data and response event data, reducing misjudgments and omissions caused by disconnection and improving the accuracy of secondary circuit performance analysis.

[0067] Based on the first embodiment of this application, in the second embodiment of this application, the content that is the same as or similar to the above embodiment can be referred to the above description, and will not be repeated hereafter. On this basis, a second embodiment of the dialogue method of this application is proposed, please refer to... Figure 3 , Figure 3 This is a flowchart illustrating Embodiment 2 of the method for determining secondary circuit performance in this application. To obtain the aforementioned fault behavior characteristics, such as... Figure 3 As shown, in this embodiment, the step of performing feature analysis on fault waveform data and response event data based on the key time nodes to obtain fault behavior characteristics includes: Step S31: Obtain the fault occurrence time node, protection action time node, reclosing time node, and steady-state recovery time node from the key time nodes.

[0068] Step S32: Using the fault occurrence time node as the timing reference, calibrate the clock deviation between the fault waveform data and the response event data to obtain calibration data.

[0069] Specifically, such as Figure 4 As shown, Figure 4 This is a flowchart of the loop performance analysis provided in Embodiment 2 of this application. During the secondary performance analysis, the waveform recording file and SOE file are first extracted. Due to the large amount of data in the waveform recording file and SOE file, this embodiment extracts key information to perform secondary loop performance analysis. The device can read four types of files from the waveform recording file: HDR, CFG, DAT, and DMF, and extract fault waveform data such as the name of the waveform recording device, voltage and current before and after the fault, fault phase, reclosing operation time, circuit breaker status, disconnector operation status, protection pressure plate status, the relationship between primary and secondary equipment channels, and voltage and current transformer status data.

[0070] Then, extract response event data from the SOE file, including the event source device, event location, event time, protection action command event, protection start event, protection return or reset event, protection abnormal event, switchgear operation-related event, and secondary circuit associated event data.

[0071] Because there may be clock synchronization discrepancies between the fault waveform data, response event data, and the time nodes output by the fault timing model, direct timing analysis will lead to the accumulation of these discrepancies. Therefore, the fault occurrence time node identified by the fault timing model is used as the global reference zero point, and all timing data are uniformly calibrated. The specific steps are as follows: The precise fault occurrence time node T0 is extracted from the fault timing model output. This fault occurrence time node is identified based on the structural abrupt change characteristics of the recorded current sequence in the fault diagnosis model. It is less affected by equipment clock deviation and has uniform comparability. Then, the absolute time of all events in the SOE information and the absolute time of the sampling points in the recorded data are uniformly converted into the relative time Trel relative to the zero point of the reference, ensuring that all timing parameters are comparable based on the same reference. The conversion formula is as follows: T rel =T T0; Among them, T rel Let T be the relative time after conversion. rel <0 indicates that there is a delay error in the time of the event recording, T rel ≥0 indicates that the event was recorded before the event occurred, suggesting that the local clock of the secondary device recording the event is inaccurate; T is the absolute time of the waveform file or SOE event.

[0072] To address the clock synchronization issue in some power plants, a clock deviation correction amount ΔT is obtained by combining the clock synchronization monitoring technology of the entire relay protection system with time-segmented remote start-up and data comparison from the same source, and the relative time is corrected accordingly. T rel,corr =T rel ΔT; Among them, T rel,corr The corrected relative time is ΔT, which is the deviation of the plant equipment clock from the global time reference. A positive ΔT indicates that the equipment clock is ahead, and a negative ΔT indicates that it is behind, ensuring the consistency of timing data across plants and across equipment.

[0073] Step S33: Perform feature analysis on the calibration data based on the protection action time node, the reclosing time node, and the recovery steady state time node to obtain timing features, fault features, and action features.

[0074] Step S34: Use the timing characteristics, the fault characteristics, and the action characteristics as the fault behavior characteristics corresponding to the current secondary circuit's response to the primary equipment.

[0075] Specifically, such as Figure 4 As shown, multi-source feature identification is then performed. Based on the above calibration data, the equipment can extract three core features—timing features, fault features, and action features—from the waveform recording information, SOE information, and fault timing model to perform secondary circuit performance analysis.

[0076] For timing characteristics, which directly reflect the time distribution of each stage of the entire fault process, identification is performed based on the fault occurrence time node T0, protection action time node T1, reclosing time node T2, and recovery to steady state time node T3 identified by the fault timing model. This includes: Duration characteristics of each stage: Duration T0 from fault occurrence to protection action 1=T1 T0, Time from protection action to reclosing (T1) 2=T2 T1 and the time T2 from reclosing to return to steady state 3=T3 T2.

[0077] Protection action timing characteristics: Calculate the time difference T from protection start-up to command issuance. start action The time difference T between the issuance of the protection command and the operation of the circuit breaker. action breaker And the time difference T between the main protection and backup protection actions. main backup To determine whether the timing of each protective action complies with regulations.

[0078] Timing deviation characteristics: Protection start time T recorded by SOE rel,SOE,start The deviation ΔT from the fault timing model protection start time T= start =T rel,SOE,start T rel,model,start The circuit breaker operating time T recorded by SOE rel,SOE,breaker Circuit breaker operating time T in fault timing model rel,model,breaker deviation ΔT breaker =T rel,SOE,breaker T rel,model,breaker .

[0079] Temporal distribution characteristics: statistical analysis of the time density of electrical quantity sampling points and the time interval of switching action events in each stage from different data sources.

[0080] For fault characteristics, the analysis mainly focuses on the power frequency characteristics of the fault timing model, waveform data, and SOE data, including the fundamental effective values ​​of the phase voltage before and after the fault, the fundamental effective values ​​of the phase current before and after the fault, and the amplitude and phase of the voltage / current fault components.

[0081] For action characteristics, which reflect the coordination between equipment action behavior and protection actions, correlation analysis of event actions and electrical quantities is performed on the above multi-source data, including: Action consistency characteristics: Analyze the consistency between the action events recorded by SOE and the switch quantity status in the waveform file, and whether each action is consistent with the corresponding electrical quantity characteristics.

[0082] Abnormal Action Characteristics: By combining changes in electrical quantities with action events recorded by SOE and switch status in waveform files, abnormal events such as protection maloperation, failure to operate, circuit breaker unauthorized tripping, and reclosing failure can be identified.

[0083] In this embodiment, based on the protection action, reclosing and recovery steady state time nodes, the timing features, fault features and action features of the calibration data are extracted, and finally a fault behavior feature library containing three dimensions of timing-fault-action features is constructed, realizing the accurate location and quantitative characterization of fault timing events.

[0084] Based on the first and / or second embodiments of this application, in the third embodiment of this application, the content that is the same as or similar to that in embodiments one and two above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 5 , Figure 5 This is a flowchart illustrating Embodiment 3 of the method for determining the performance of the secondary loop in this application. To obtain the aforementioned response performance indicators, such as... Figure 5 As shown, in this embodiment, the step of analyzing the performance state of the current secondary circuit based on the fault behavior characteristics to obtain the response performance index corresponding to the current secondary circuit includes: Step S41: Analyze the secondary circuit fault type of the current secondary circuit based on the fault behavior characteristics to obtain secondary circuit fault data.

[0085] It should be noted that the secondary circuit fault type can be a classification of abnormal states of the secondary circuit, including protection maloperation, protection failure to operate, circuit breaker unauthorized tripping, and reclosing failure.

[0086] Specifically, such as Figure 4 As shown, after identifying the multi-source characteristics, secondary circuit operation analysis is performed on different characteristics to compare and determine whether the secondary circuit is working normally, and to determine the type of secondary circuit fault, which can be divided into three types: protection maloperation, protection failure to operate, and protection correct operation, as follows: Misoperation of protection devices refers to the abnormal behavior of protection devices issuing operating commands and circuit breakers completing opening and closing when there is no fault in the power system or the fault range has not triggered the protection operating conditions. A comprehensive judgment is made by combining three dimensions: fault characteristics, operating characteristics, and timing characteristics. The specific analysis steps are as follows: First, the authenticity of the fault is determined based on the fault characteristics. If a fault occurs in the SOE event or waveform data record, the judgment result is compared with that of the fault timing model. If the fault timing model determines that there is no fault in the circuit at this time, the voltage or current fundamental effective value, fault component amplitude and phase and other information are extracted again from the fault timing model, SOE event file and waveform file. If there are no fault characteristics such as current surge or voltage drop in the fault phase, it is determined that no actual fault has occurred in the system.

[0087] Then, based on the action characteristics, the action correlation is verified. If the SOE event file records the protection start-up and protection action command issuance events, or the waveform file shows the circuit breaker in the opening and closing state, but the fault timing model detects no corresponding fault characteristics that match the protection action, then the protection action can be determined to be a malfunction of the protection device.

[0088] It is also possible to identify malfunction triggering nodes based on timing characteristics. If the protection start time T recorded in the SOE file is... rel,SOE,start If the fault occurrence reference zero point T0 is determined earlier than that identified by the fault timing model, and there is no preceding fault electrical quantity characteristic triggering, the protection action is determined to be a malfunction of the protection device.

[0089] By combining the above-mentioned characteristics of no actual fault, no correlation between protection action and electrical quantity, or timing characteristics to identify the malfunctioning node, the problem of secondary circuit protection malfunction can be determined, and the corresponding malfunctioning protection device can also be located.

[0090] Protection failure to operate refers to the abnormal behavior where, when a power system fault occurs and the protection operation setting conditions are met, the protection device fails to issue an operation command, or the circuit breaker fails to complete the opening and closing operation after issuing the command. Analysis is conducted through fault characteristics, operation characteristics, and timing characteristics. The specific steps are as follows: First, the fault characteristics are used to verify whether the action conditions are met. When the fault timing model determines that a fault has occurred but no SOE event file or waveform record file records the occurrence of the fault, or when the fault timing model determines that a fault has occurred and a protection action command has been issued but no SOE event file or waveform record file records the circuit breaker tripping, the fault characteristic information of the fault timing model, waveform record file and SOE is extracted for further analysis. If the fault phase shows a significant current surge and voltage drop, and the fault component amplitude / phase meets the protection action setting conditions, it is determined that there is a valid fault in the system, and the protection device fails to operate.

[0091] Further, based on the action characteristics, the integrity of the action events is checked. If the SOE event file has no protection start or protection action command issuance events, the waveform file has no circuit breaker change state, and the fault electrical quantity continues to exist without recovery, it is determined that the protection device completely fails to operate. If the SOE event file has a protection start event but no protection action command issuance event, it is determined that the protection device started but did not trigger the command. If there is a protection action command issuance event, but the waveform file shows no circuit breaker change state, it is determined that the circuit breaker did not execute the action command, which is considered protection failure to operate.

[0092] Based on the above, if there are valid fault characteristics and the protection setting conditions are met, there is no protection action event or there is an action command but no circuit breaker change, the problem of secondary circuit protection failure to operate can be determined, and the failure to operate can be located at the protection device, circuit breaker, or secondary signal transmission channel.

[0093] Correct protection operation refers to the normal behavior of the protection device activating and issuing operation commands within the set conditions after a power system fault occurs, the circuit breaker cooperating to complete the opening and closing, the fault being effectively cleared, and the system gradually returning to steady state. This requires verification through the full-process characteristic matching of fault-action-timing. The specific analysis steps are as follows: Fault characteristics and operating conditions match: If the fault components such as the fault timing model, the current surge value and voltage drop depth in the waveform file are identified and all meet the protection device's setting operating conditions, and the protection is operating normally, then the fault is real and effective and the protection action is correct, that is, the fault characteristics and operating conditions match each other.

[0094] The entire operation process is complete and consistent: the SOE event file and waveform recording file show a complete fault chain event including protection start-up, protection action command issuance, circuit breaker opening and closing, and reclosing; during protection action, the electrical quantity characteristics of current drop and voltage recovery occur synchronously with the circuit breaker position change, with no disconnection between action and electrical quantity. Therefore, the entire operation process is determined to be complete and consistent.

[0095] The timing characteristics are logical and without anomalies: the time difference calculated from protection start to command issuance and from command issuance to circuit breaker action are within the time range of power industry standards and equipment settings; the time difference calculated between the main protection and backup protection actions meets the coordination requirements, and the phenomenon of premature start of backup protection is identified; the timing deviation between waveform data and SOE records and the fault timing model is within the allowable error range.

[0096] Effective fault clearing and steady-state recovery: After the circuit breaker operates, it is detected that the electrical quantities of the faulty phase quickly return to the normal range, the current recovery rate meets the requirements after reclosing, and the system eventually returns to steady state within the set time. The fault is effectively cleared without secondary fault triggering. This indicates that the fault clearing and steady-state recovery are effective.

[0097] By combining the above fault characteristics and operating conditions, the complete consistency of the entire operating process, the compliance and no deviation of the timing characteristics, and the effectiveness of fault clearing and steady-state recovery, it is possible to determine whether the secondary circuit protection operates correctly and the operating status of the equipment and circuit.

[0098] Based on the three-dimensional features of fault, timing, and action, a comprehensive judgment logic for protection maloperation, failure to operate, and correct operation is constructed. It can accurately distinguish different types of fault behaviors in secondary circuits and locate fault nodes such as the protection device body, circuit breaker control circuit, signal transmission channel, and clock synchronization circuit. This solves the problem of ambiguous secondary circuit fault judgment in existing technologies, which can only detect fault phenomena but cannot locate the root cause of the fault. At the same time, the fault judgment process relies on the quantitative analysis of the fault timing model, rather than traditional experience judgment, which effectively reduces the probability of misjudgment and missed judgment, provides a clear direction for on-site operation and maintenance, and significantly shortens the fault investigation time.

[0099] Step S42: Based on the secondary circuit fault data, analyze the current performance status of the secondary circuit to obtain the reliability index of the starting element, the reliability index of the action, the correctness index of the timing, and the integrity index of the process.

[0100] Step S43: Use the reliability index of the starting element, the reliability index of the action, the timing correctness index, and the process integrity index as the response performance index corresponding to the current secondary circuit.

[0101] For details, please refer to Figure 6 , Figure 6 This is a system diagram for evaluating the performance of the secondary circuit provided in Embodiment 3 of this application. When evaluating the performance of the current secondary circuit, a secondary circuit performance evaluation system can be constructed. This system includes reliability indicators for starting elements, operational reliability indicators, timing accuracy indicators, and process integrity indicators. The reliability indicator for starting elements can be a quantitative indicator measuring the correct response capability of relay protection starting elements when a fault occurs. The operational reliability indicator can be a comprehensive indicator reflecting the accuracy of the operation of key equipment such as protection devices and circuit breakers throughout the entire fault process. The timing accuracy indicator can be a quantitative indicator evaluating the compliance of the timing coordination of each link in the secondary circuit. The process integrity indicator can be a comprehensive indicator reflecting the integrity of equipment operation, electrical quantity changes, and event recording throughout the entire fault process of the secondary circuit.

[0102] In this embodiment, by establishing a closed-loop correlation between fault behavior characteristics and performance indicators, accurate source tracing and quantitative assessment of secondary circuit faults can be achieved. This solves the problems of ambiguous fault type determination and subjective performance evaluation in traditional methods, providing maintenance personnel with a highly interpretable basis for decision-making.

[0103] Furthermore, in order to obtain the aforementioned reliability index of the starting element, in this embodiment, the step of analyzing the performance status of the current secondary circuit based on the secondary circuit fault data to obtain the reliability index of the starting element includes: Step S421: Based on the secondary circuit fault data, count the total number of valid faults of the primary equipment and the number of successful starts of the starting element in the secondary equipment.

[0104] Understandably, the total number of valid faults can be the total number of fault events that actually occur in the primary equipment and meet the conditions for relay protection operation. The number of successful starts can be the number of times that the starting element in the secondary equipment correctly triggers the protection operation process after detecting the fault characteristics of the primary equipment.

[0105] Step S422: Obtain the startup time corresponding to each startup element in the number of successful startups, and determine whether each startup time has reached a preset delay threshold.

[0106] It is also understood that the start-up time can be the time interval between the start-up element detecting a primary equipment fault characteristic and issuing a protection action command. The preset delay threshold can be the maximum allowable response time of the start-up element set according to the relay protection design specifications and equipment characteristics.

[0107] Step S423: The number of startups that do not reach the preset delay threshold is taken as the number of valid responses.

[0108] It should be understood that the number of valid responses can be the number of successful startups in which the startup time of the startup element does not exceed the preset delay threshold.

[0109] Among them, the starting element is a key component in power system relay protection used to detect and activate protection devices. The percentage of times the starting delay meets industry standards or system setting requirements reflects the consistency and stability of the starting element's response speed. If the response time of the starting element is too long, it may lead to delayed fault clearing, thereby affecting the safety and stability of the power grid. Therefore, the reliability of the starting element needs to be evaluated based on the secondary circuit performance analysis above, and reliability indicators for the starting element should be proposed.

[0110] Step S424: Weight the total number of valid faults, the number of successful startups, and the number of valid responses to obtain the reliability index of the startup element.

[0111] Specifically, the reliability index of the starting element is calculated as follows: ; in, For the reliability indicators of starting components; Total number of valid failures; The number of successful starts for the starting element to meet the logic requirements, where the logic requirements refer to the starting element only operating when a fault characteristic occurs in the primary circuit. The starting signal matches the electrical information in the primary circuit, eliminating situations where the starting element fails to operate due to minor non-fault disturbances in the primary circuit (such as instantaneous voltage fluctuations or harmonic distortion). The effective number of responses required to start the element to meet the time requirement is defined as follows: the start-up delay calculated from the timing features extracted from multi-source data does not exceed the start-up delay threshold, which is differentiated based on factors such as voltage level and new energy penetration rate. , Weights are assigned based on the actual application scenario.

[0112] In this embodiment, by introducing time threshold filtering and weighted calculation, the influence of interference data on the evaluation results is effectively eliminated, so that the reliability index of the starting element can more accurately reflect its response performance under fault scenarios.

[0113] Among these, the operational reliability index is the core of secondary circuit performance analysis, reflecting the accuracy and effectiveness of key equipment such as protection devices, circuit breakers, and reclosing devices in performing the prescribed actions according to protection logic after a fault occurs. It can be evaluated from multiple dimensions, including operational correctness, risk of failure to operate, and risk of erroneous operation. A comprehensive index is quantified through operational correctness rate, as follows: ; In the formula, For the accuracy of the action, The total number of protective actions, To ensure consistency between the action behavior and protection logic, fault clearing requirements, and the number of effective protection actions, the following requirements must be met: the instruction must be correct, and the protection device must issue the correct action instruction (trip the faulty phase, trip all three phases, or reclose) according to the fault type (e.g., single-phase grounding, three-phase short circuit); the execution must be effective, and the circuit breaker must complete the instruction action (opening or closing) within the specified time; the result must be appropriate, and the fault must be successfully cleared after the action, and the waveform data must show that the electrical quantities have returned to a steady state, consistent with the fault clearing requirements determined by the fault timing model.

[0114] Among them, timing correctness is one of the core indicators of secondary circuit performance evaluation. It reflects the compliance and accuracy of the timing coordination of various stages such as protection initiation, command issuance, circuit breaker operation, and reclosing execution in different stages of a fault. The core is to quantitatively compare the time nodes of different stages identified by the fault timing model with the calibrated waveform recordings and SOE timing data. Quantitative indicators are constructed from two aspects: timing compliance and action response speed at each stage, to achieve accurate evaluation of the timing actions of the secondary circuit, as detailed below: ; In the formula, The time sequence compliance rate ranges from 0 to 100%. The closer the value is to 1, the higher the degree of matching between the time sequence of each stage and the standard. m is the total number of key time sequence parameters of the fault events participating in the evaluation. The duration of the i-th actual timing parameter includes the time from the occurrence of the fault to the protection action stage, the time from the protection action to the reclosing stage, the time from reclosing to the recovery to steady state stage, the time difference from the start of the protection to the issuance of the command, the time difference from the issuance of the protection command to the operation of the circuit breaker, and the time difference between the main protection and the backup protection actions. The duration of the i-th standard timing parameter is set differently based on the corresponding voltage level and the penetration rate of new energy sources.

[0115] Furthermore, in order to obtain the aforementioned process integrity index, in this embodiment, the step of analyzing the performance status of the current secondary circuit based on the secondary circuit fault data to obtain the process integrity index includes: Step S421': Based on the key time nodes, the process of the current secondary circuit responding to the primary device is divided into multiple stage intervals.

[0116] Understandably, process integrity reflects the completeness and coordination of equipment actions, electrical quantity changes, and event records in the secondary circuit throughout the entire stages of fault development, fault clearing, and steady-state recovery. The core is based on the three-stage intervals divided by the fault timing model, verifying the matching degree between the key events that should be completed in each stage and the actual events completed, the coordination degree between electrical quantity characteristics and equipment actions, and the completeness of multi-source data records. Quantitative indicators are constructed from three perspectives: the completion degree of stage events, the coordination degree between actions and electrical systems, and the completeness of multi-source records, to achieve a full-dimensional evaluation of the secondary circuit actions throughout the entire fault process, ensuring that there are no missing links, no disconnected actions, and no omissions in records.

[0117] The fault development stage, fault clearing stage, and steady-state recovery stage are divided into multiple stage intervals based on the fault timing model. The essential key event set (including equipment action events, changes in electrical quantity characteristics, and signal transmission events) for each stage is defined. Some essential key event sets are shown in Table 1. By comparing the key events actually recorded in waveform and SOE data with the essential key event set, the completion degree of each stage is quantitatively calculated. At the same time, the coordination between each equipment action and the corresponding change in electrical quantity, and the consistency of multi-source data recording of the same event are verified. Finally, the process integrity evaluation result is obtained by comprehensively analyzing the results. If the essential key events are not completed, the actions and electrical quantities are disconnected, or multi-source records are missing, the process is judged to be incomplete, and the missing links are located.

[0118] Table 1

[0119] Step S422': Based on the secondary circuit fault data, analyze the response results of the current secondary circuit in the multiple stage intervals to obtain the completion degree of key events in each stage.

[0120] It should be noted that the completion rate of key events in a phase can be an indicator for measuring the completeness of the execution of essential key events within each phase.

[0121] Specifically, the completion rate of key events at each stage reflects the actual completion status of essential key events at each stage of the entire failure process. It is a fundamental indicator of process integrity, and the calculation formula is as follows: ; in, The percentage of completion of key events in each stage is represented by the value [0, 100%]. The closer the value is to 1, the more complete the key events in each stage are. p is the fault stage number, where p=1 is the fault development stage, p=2 is the fault clearing stage, and p=3 is the steady-state recovery stage. The number of essential critical events for stage p is determined by combining the output of the fault timing model with the relay protection logic. This represents the actual number of critical events completed in stage p, i.e., the number of critical events actually recorded in waveform and SOE data that match the fault timing model.

[0122] Step S423': Perform a collaborative analysis on each of the secondary devices to obtain the degree of coordination between action and electrical quantities.

[0123] Understandably, the degree of coordination between action and electrical quantity can be an indicator of the synchronicity between equipment action (such as circuit breaker tripping) and corresponding changes in electrical quantity (such as a sudden drop in current).

[0124] Specifically, the synchronization of action and electrical quantity coordination tests the synchronicity between equipment action events and corresponding changes in electrical quantity characteristics, avoiding disconnections such as action without electrical quantity change or electrical quantity change without action. The calculation formula is as follows: ; in, This represents the degree of coordination between action and electrical quantity, with a value range of [0, 100%]. The closer the value is to 1, the better the synchronization between the action and the change in electrical quantity. The number of device actions for participating in collaborative verification includes four core actions: protection start-up, circuit breaker tripping, reclosing, and protection reset. This represents the actual time when the k-th device takes action. The time of abrupt change in the electrical quantity characteristic corresponding to the k-th action; is the permissible error threshold for action-electrical quantity synchronization; I is the indicator function, which takes the value 1 when the condition is met and 0 when the condition is not met.

[0125] Step S424': Analyze the event intersection between the fault recording data and the response event data to obtain the multi-source record completeness.

[0126] It should also be noted that multi-source record completeness can be used as an indicator to assess the consistency between fault waveform data and SOE event files for the same critical event.

[0127] Specifically, multi-source record completeness reflects the consistency and completeness of the recordings of the same key event between the waveform file and the SOE event file, avoiding situations such as missing single-source records or contradictory recorded information. The calculation formula is as follows: ; in, This represents the completeness of multi-source records, with a value range of [0, 100%]. The closer the value is to 1, the more complete and consistent the multi-source data records are. The number of key events participating in multi-source verification is consistent with the set of key events for each stage. This is the set of recorded information (including event time, status, and amplitude) for the t-th critical event in the waveform recording file. is the set of record information (including event time, location, and type) for the t-th critical event in the SOE file; I is an indicator function, which takes the value 1 when the two sets have a non-empty intersection (the record information is consistent) and takes the value 0 when there is no intersection (single-source missing / record contradiction).

[0128] Step S425': The completion degree of the key events in the stage, the coordination degree of the action and electrical quantity, and the completeness of the multi-source records are weighted and summed according to preset weight coefficients to obtain a comprehensive index of process integrity.

[0129] Specifically, the equipment can comprehensively consider the completion rate of key events in the above stages, the coordination between actions and electrical quantities, and the completeness of multi-source records. Weights are then assigned differently according to the actual application scenario to calculate the integrity index of the secondary circuit fault process. The calculation formula is as follows: ; in, It is a comprehensive index of process integrity, with a value range of [0, 100%]. A value ≥ 90% is considered process integrity, 80% ≤ value < 90% is considered basically complete, 60% ≤ value < 80% is considered average, and a value < 60% is considered incomplete. , and These are the weighting coefficients for the completion of key events in a phase, the weighting coefficients for the coordination between actions and electrical quantities, and the weighting coefficients for the completeness of multi-source records.

[0130] In this embodiment, a secondary circuit performance evaluation index system is constructed from four core dimensions: reliability of starting components, reliability of operation, correctness of timing, and integrity of process. Each index has a scientifically designed quantitative calculation formula, and supports differentiated configuration of weights and thresholds based on actual scenarios such as voltage level and new energy penetration rate. This solves the problems of lack of quantitative standards, subjective evaluation results, and inability to adapt to different application scenarios in the existing technology for secondary circuit performance evaluation. The evaluation index covers key dimensions such as equipment response, timing coordination, and event integrity throughout the entire fault process, realizing a comprehensive and refined evaluation of secondary circuit performance, which can accurately reflect the actual operating status of the secondary circuit.

[0131] For example, to help understand the implementation flow of the secondary loop performance determination method in the above embodiments of this application, please refer to... Figure 7 , Figure 7 The simulation diagram provided for Embodiment 3 of this application is as follows: Building such Figure 7 The simulation model shown has power supplies on both sides, transformers #1 and #2, a multimeter next to each transformer, a line model in the COUPLE PI SECTION, fault type signals generated by F1, F2, F3, F4, F5, F6, and F7, and fault duration parameters adjusted by FT1, FT2, FT3, FT4, FT5, FT6, and FT7. S is a tie switch, S1, S2, S3, S4, S5, S6, S7, and S8 are sectionalizing switches, and B1 to B2 are circuit breakers. The simulation example is set as a single-line B-phase ground fault with a momentary induction, a simulation step size of Δt = 0.05 ms, and a total simulation duration of T = 1 s. The settings for key events such as fault occurrence, circuit breaker tripping and reclosing are as follows: fault occurrence time is 0.20s, fault type is B-phase ground fault, fault clearing time is 0.45s, circuit breaker B1 tripping time is 0.31s, circuit breaker B1 reclosing time is 0.50s, and line recovery to steady state time is 0.78s.

[0132] Following the above process, a fault timing model is constructed. The precise key time points of events identified on the B1 side are as follows: Figure 8 As shown, Figure 8 This is a graph showing the results of fault timing model identification provided in Embodiment 3 of this application, where the horizontal axis represents time and the vertical axis represents current amplitude. t0, t1, t2, and t3 correspond to the fault occurrence, protection action, reclosing, and steady-state recovery time points, respectively. The fault occurrence identification time is 0.1965s, with a simulation setting of 0.20s; the protection action identification time is 0.3202s, with a simulation setting of 0.31s; the reclosing identification time is 0.5093s, with a simulation setting of 0.50s; and the line steady-state recovery identification time is 0.7833s, with a simulation setting of 0.78s.

[0133] from Figure 8 As can be seen, the proposed method can automatically recover the sequence of key events throughout the entire fault process and uniformly map them to a time reference system (t0, t1, t2, t3). Furthermore, the accuracy of key time point identification can be quantitatively evaluated: compared to the simulation settings, the identification deviation at the fault occurrence time is 3.5 ms; the deviation at the tripping time is 10.2 ms; the deviation at the reclosing time is 9.3 ms; and the deviation at the fault recovery time is 3.3 ms. Under the simulation step size Δt = 0.05 ms, the above deviations are approximately 70, 204, 186, and 66 sampling points, respectively, all significantly less than one power frequency cycle (20 ms), which can meet the requirement of phased alignment throughout the fault process.

[0134] Next, the secondary circuit performance is analyzed. This example uses a new energy aggregation station as the research object. The station adopts a double busbar connection, with fiber optic differential protection as the main protection and distance protection as the backup protection, adapting to the secondary circuit performance evaluation requirements of a high-penetration new energy scenario. The sampling frequency of the example is set to 10kHz, the sliding window length L=200 and the step size S=50 for fault feature extraction, and the clock synchronization adopts the IEEE 1588 PTP protocol, allowing a timing deviation of ≤1ms. The protection setting time limit is ≤20ms for the main protection action time limit and ≤30ms for the circuit breaker action time limit. The evaluation weights are configured according to the high-penetration new energy scenario: in the timing correctness index, the weight of the link timing compliance rate is 0.4, and the weight of the cross-source timing consistency rate is 0.6; in the process integrity index, the weight of the completion degree of the key events of the stage is 0.3, the weight of the action-electrical quantity coordination degree is 0.5, and the weight of the multi-source record completeness is 0.2.

[0135] To verify the effectiveness of the evaluation system, three sets of comparative cases were designed: a qualified case, a timing anomaly case of circuit breaker operation timeout, and a process missing case of communication interruption in the merging unit, covering normal operation of the secondary circuit and two typical abnormal operating conditions.

[0136] The qualified case simulates a phase-A ground fault occurring 10km from the beginning of the line. The fault occurs at 10.000s, the protection device activates at 10.005s, issues an operation command at 10.018s, the main protection operation lasts 13ms, the circuit breaker trips at 10.055s (operation time 37ms), the fault current returns to zero at 10.056s, and the fault is successfully cleared. The entire SOE event record is completely consistent with the fault timing model identification results, with a cross-source timing deviation of 0ms. The waveform file fully records all data related to fault development, clearing, and electrical quantity recovery. Based on the calculated indicators, the reliability K of the starting element... st The reliability of the action is 100%, K. act The compliance rate is 100%; regarding timing accuracy, the compliance rate K for each stage of the process is 100%. tim,compThe cross-source time series consistency rate K=s is 95%, and the overall time series correctness index K is 100%. tim,tot =0.4×95%+0.6×100%=98.0%; In terms of process integrity, the completion rate of key events in the stage, the coordination of action-electrical quantities, and the completeness of multi-source records are all 100%.

[0137] Comprehensive process integrity index K pro,tot =0.3×100%+0.5×100%+0.2×100%=100.0%. The evaluation conclusion is that the performance level of the secondary circuit is excellent, and all indicators meet the operation requirements of the new energy collection station, verifying the quantitative scoring capability of the evaluation system under qualified conditions.

[0138] The timing anomaly case simulates a phase-to-phase (BC) short-circuit fault occurring 80km from the end of the line. The fault occurrence time, protection activation time, and output time are consistent with the baseline case. The core anomaly is circuit breaker mechanism jamming, with the actual tripping time delayed to 10.098s, resulting in a circuit breaker action time of 80ms, exceeding the 30ms setting threshold. However, the SOE event record and the cross-source timing record of the fault timing model remain consistent, with no synchronization deviation. The calculated results show that the reliability of the starting element and the operational reliability remain 100%. Because the circuit breaker ultimately completed the fault clearing action, it is determined to be a correct protection action. Regarding timing correctness, the timing compliance rate K is affected by the circuit breaker's timeout. tim,comp The cross-source timing consistency rate remains at 100%, even though the overall timing correctness index K is reduced to 55%. tim,tot =0.4×55%+0.6×100%=82.0%, meeting the qualified standard but not the excellent requirement; the process integrity indicator has no missing critical events, so the overall K... pro,tot The accuracy rate was 98%. Through reverse analysis of the indicators, the relative deviation rate of the timing of the circuit breaker's operation was found to be 60%, accurately identifying the abnormal components as the circuit breaker body and operating mechanism. This verified the evaluation system's sensitivity to abnormal timing conditions and its fault location capability.

[0139] The case study, simulating a three-phase short-circuit fault on the busbar side, demonstrated that the protection device started normally and issued action commands. The circuit breaker completed its opening and reclosing actions on time, and the timing of each step met the setting requirements. The core anomaly was a communication interruption in the merging unit, resulting in missing electrical quantity data during the voltage recovery phase after the fault was cleared from the waveform file. Only the SOE event file fully recorded the entire process of action events. The calculation results showed that the reliability of the starting components and the reliability of the actions were both 100%, and the overall timing accuracy index K= was 97%, reaching an excellent level. Regarding process completeness, due to the missing "electrical quantity recovery" key event, the completion rate K of the key event in this phase was low. pro,event The rate dropped to 83.3%, making it impossible to verify the action-electrical quantity coordination during the recovery phase; the coordination degree K...pro,coo The completion rate was 75.0%, indicating inconsistencies between the waveform recording and the SOE record, and the multi-source record completeness K... pro,rec The overall process integrity index K was 66.7%. pro,tot The pass rate was 75.8%, with an evaluation level of "average". Based on the reasons for the low score, the abnormal link was precisely located as the data acquisition and transmission channel of the merged unit, verifying the evaluation system's ability to identify and locate defects in process integrity.

[0140] The above results verify the advantages of this secondary circuit performance evaluation system: First, it has good sensitivity, which can accurately capture millisecond-level timing deviations and process omissions at the data level, and the index values ​​decrease regularly with the severity of defects; second, it has uniqueness, with different types of secondary circuit defects corresponding to different core index decreases, enabling precise location of fault links; third, it is practical, with the evaluation results quantified as percentages conforming to the usage habits of engineers, facilitating horizontal comparisons between different plants, and applicable to the routine evaluation of secondary circuit performance in plants with different voltage levels and high penetration rates of new energy.

[0141] It should be noted that the above examples are only for understanding this application and do not constitute a limitation on the method for determining the secondary circuit performance of this application. Any simple modifications based on this technical concept are within the scope of protection of this application. All actions involving the acquisition of signals, information, or data in this application are performed in accordance with the relevant data protection regulations of the country where the application is located and with authorization from the owner of the relevant device.

[0142] This application also provides a device for determining the performance of a secondary circuit. Please refer to... Figure 9 , Figure 9 This is a block diagram of the module structure of the secondary loop performance determination device according to an embodiment of this application; in this embodiment, the secondary loop performance determination device includes: The acquisition module 901 is used to acquire electrical quantity data of the current secondary circuit and switch quantity data corresponding to each secondary device in the current secondary circuit; The identification module 902 is used to identify the fault timing of the current secondary circuit based on the electrical quantity data and the switch quantity data, and obtain the key time nodes; The feature module 903 is used to perform feature analysis on fault waveform data and response event data with the key time node as the time series reference to obtain fault behavior features. The fault waveform data is used to characterize the fault data of the primary equipment connected to the current secondary circuit, and the response event data is used to characterize the action data of the current secondary circuit in response to the fault of the primary equipment. The performance module 904 is used to analyze the performance status of the current secondary circuit based on the fault behavior characteristics, and obtain the response performance index corresponding to the current secondary circuit.

[0143] This embodiment first acquires the electrical quantity data of the current secondary circuit and the corresponding switching quantity data of each secondary device. Based on this data, it performs fault timing identification on the secondary circuit to obtain key time nodes. Then, using the key time nodes as the timing reference, it performs feature analysis on the fault waveform data and response event data to obtain fault behavior characteristics, and further analyzes the performance status of the secondary circuit to obtain response performance indicators. Compared with existing methods where secondary circuit fault analysis is disconnected from the overall circuit topology, this embodiment can use the key time nodes of the fault timing as the timing reference to perform feature analysis on the fault waveform data and response event data, reducing misjudgments and omissions caused by disconnection and improving the accuracy of secondary circuit performance analysis.

[0144] In one implementation, the identification module 902 is further configured to perform noise reduction processing on the electrical quantity data and data correction on the switching quantity data; extract features from the processed electrical quantity data and the corrected switching quantity data to obtain the electrical quantity mutation features, protection and electrical correlation features, and circuit breaker status features corresponding to the current secondary circuit; identify fault timing events in the current secondary circuit's response to the primary equipment based on the electrical quantity mutation features, the protection and electrical correlation features, and the circuit breaker status features; and determine the key time nodes of the current secondary circuit in the process of responding to the primary equipment fault based on the fault timing events.

[0145] In one implementation, the identification module 902 is further configured to enhance the electrical quantity mutation features, the protection and electrical correlation features, and the circuit breaker state features using a multilayer perceptron to obtain corresponding modal attention weights; based on the modal attention weights, to perform weighted fusion of the electrical quantity mutation features, the protection and electrical correlation features, and the circuit breaker state features to obtain multi-source fusion features; and based on the multi-source fusion features, to identify the fault process of the current secondary circuit responding to the primary equipment using a preset deep learning model to obtain fault timing events, wherein the preset deep learning model is constructed by a convolutional neural network.

[0146] In one implementation, the feature module 903 is further configured to acquire the fault occurrence time node, protection action time node, reclosing time node, and recovery steady-state time node among the key time nodes; using the fault occurrence time node as a timing reference, calibrate the clock deviation between the fault waveform data and the response event data to obtain calibration data; perform feature analysis on the calibration data based on the protection action time node, the reclosing time node, and the recovery steady-state time node to obtain timing features, fault features, and action features; and use the timing features, fault features, and action features as the fault behavior features corresponding to the current secondary circuit's response to the primary equipment.

[0147] In one implementation, the performance module 904 is further configured to analyze the secondary circuit fault type of the current secondary circuit based on the fault behavior characteristics to obtain secondary circuit fault data; based on the secondary circuit fault data, analyze the performance status of the current secondary circuit to obtain a starting element reliability index, an action reliability index, a timing correctness index, and a process integrity index; and use the starting element reliability index, the action reliability index, the timing correctness index, and the process integrity index as the response performance index corresponding to the current secondary circuit.

[0148] In one implementation, the performance module 904 is further configured to, based on the secondary circuit fault data, count the total number of valid faults in the primary equipment and the number of successful starts of the starting element in the secondary equipment; obtain the start time corresponding to each starting element in the number of successful starts, and determine whether each start time reaches a preset delay threshold; take the number of starts that do not reach the preset delay threshold as the number of valid responses; and perform weighted processing on the total number of valid faults, the number of successful starts, and the number of valid responses to obtain the reliability index of the starting element.

[0149] In one implementation, the performance module 904 is further configured to divide the current secondary circuit response to the primary device into multiple stage intervals based on the key time nodes; Based on the secondary circuit fault data, the response results of the current secondary circuit in the multiple stage intervals are analyzed to obtain the completion degree of key events in each stage; the secondary equipment is analyzed collaboratively to obtain the coordination degree of actions and electrical quantities; the intersection of events between the fault recording data and the response event data is analyzed to obtain the completeness of multi-source records; the completion degree of key events in each stage, the coordination degree of actions and electrical quantities, and the completeness of multi-source records are weighted and summed according to preset weight coefficients to obtain a comprehensive index of process integrity.

[0150] Other embodiments or specific implementations of the secondary circuit performance determination device of this application can be found in the above-described method embodiments, and will not be repeated here.

[0151] The secondary circuit performance determination device provided in this application, employing the secondary circuit performance determination method in the above embodiments, can solve the technical problem of performance analysis deviation caused by data sources from different independent devices in traditional secondary circuit fault analysis. Compared with the prior art, the beneficial effects of the secondary circuit performance determination device provided in this application are the same as those of the secondary circuit performance determination method provided in the above embodiments, and other technical features in the secondary circuit performance determination device are the same as those disclosed in the methods of the above embodiments, and will not be repeated here.

[0152] This application provides a secondary loop performance determination device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the secondary loop performance determination method in the above embodiments.

[0153] The following is for reference. Figure 10 , Figure 10 This is a schematic diagram of the hardware operating environment involved in the secondary loop performance determination device in the embodiments of this application, showing a structural schematic diagram suitable for implementing the secondary loop performance determination device in the embodiments of this application. The secondary loop performance determination device in the embodiments of this application may include, but is not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, personal digital assistants (PDAs), tablet computers (PADs), portable media players (PMPs), and in-vehicle terminals (e.g., in-vehicle navigation terminals), as well as fixed terminals such as digital TVs and desktop computers. Figure 10 The secondary circuit performance determination device shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0154] like Figure 10As shown, the secondary loop performance determination device may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory 1002 or a program loaded from a storage device 1003 into a random access memory 1004. The random access memory 1004 also stores various programs and data required for the operation of the secondary loop performance determination device. The processing unit 1001, the read-only memory 1002, and the random access memory 1004 are interconnected via a bus 1005. An input / output interface 1006 is also connected to the bus. Typically, the following systems can be connected to the input / output interface 1006: input devices 1007 including touchscreens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 1008 including liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 1003 including magnetic tapes, hard disks, etc.; and communication devices 1009. Communication device 1009 allows the secondary loop performance determination device to communicate wirelessly or wiredly with other devices to exchange data. Although the figures show secondary loop performance determination devices with various systems, it should be understood that implementation or possession of all the systems shown is not required. More or fewer systems may be implemented alternatively.

[0155] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from read-only memory 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0156] The secondary loop performance determination device provided in this application, employing the secondary loop performance determination method described in the above embodiments, can solve the technical problem of performance analysis bias caused by data sources from different independent devices in traditional secondary loop fault analysis. Compared with the prior art, the beneficial effects of the secondary loop performance determination device provided in this application are the same as those of the secondary loop performance determination method provided in the above embodiments, and other technical features of this secondary loop performance determination device are the same as those disclosed in the previous embodiment method, and will not be repeated here.

[0157] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0158] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0159] This application provides a computer-readable storage medium having computer-readable program instructions (i.e., a computer program) stored thereon, the computer-readable program instructions being used to execute the secondary loop performance determination method in the above embodiments.

[0160] The computer-readable storage medium provided in this application may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems or devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, radio frequency (RF), etc., or any suitable combination thereof.

[0161] The aforementioned computer-readable storage medium may be included in the secondary loop performance determination device; or it may exist independently and not assembled into the secondary loop performance determination device.

[0162] The aforementioned computer-readable storage medium carries one or more programs. When these programs are executed by the secondary circuit performance determination device, the secondary circuit performance determination device: acquires electrical quantity data of the current secondary circuit and switching quantity data corresponding to each secondary device in the current secondary circuit; performs fault timing identification on the current secondary circuit based on the electrical quantity data and the switching quantity data to obtain key time nodes; uses the key time nodes as a timing reference to perform feature analysis on fault waveform data and response event data to obtain fault behavior characteristics, wherein the fault waveform data is used to characterize the fault data of the primary device connected to the current secondary circuit, and the response event data is used to characterize the action data of the current secondary circuit in response to the fault of the primary device; and analyzes the performance status of the current secondary circuit based on the fault behavior characteristics to obtain the response performance index corresponding to the current secondary circuit.

[0163] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a Local Area Network (LAN) or a Wide Area Network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0164] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation that may be implemented in systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0165] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0166] The readable storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a computer program) for executing the above-described secondary circuit performance determination method. This solves the technical problem that traditional secondary circuit fault analysis suffers from performance bias due to data sources originating from different independent devices. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as those of the secondary circuit performance determination method provided in the above embodiments, and will not be elaborated upon here.

[0167] The above description is only a part of the embodiments of this application and does not limit the scope of protection of this application. All equivalent structural transformations made under the technical concept of this application and using the content of this application specification and drawings, or direct / indirect applications in other related technical fields, are included in the scope of protection of this application.

Claims

1. A method for determining the performance of a secondary circuit, characterized in that, The method includes: Acquire the electrical quantity data of the current secondary circuit and the switching quantity data corresponding to each secondary device in the current secondary circuit; Based on the electrical quantity data and the switching quantity data, the fault timing of the current secondary circuit is identified to obtain key time nodes; Using the key time nodes as the time series reference, feature analysis is performed on the fault waveform data and response event data to obtain fault behavior characteristics. The fault waveform data is used to characterize the fault data of the primary equipment connected to the current secondary circuit, and the response event data is used to characterize the action data of the current secondary circuit in response to the fault of the primary equipment. The performance status of the current secondary circuit is analyzed based on the fault behavior characteristics to obtain the response performance index corresponding to the current secondary circuit.

2. The method as described in claim 1, characterized in that, The step of identifying the fault timing of the current secondary circuit based on the electrical quantity data and the switching quantity data to obtain key time nodes includes: The electrical quantity data is denoised, and the switching quantity data is corrected. Feature extraction is performed on the processed electrical quantity data and the corrected switch quantity data to obtain the electrical quantity abruptness features, protection and electrical correlation features, and circuit breaker status features corresponding to the current secondary circuit. Based on the electrical quantity abrupt change characteristics, the protection and electrical correlation characteristics, and the circuit breaker status characteristics, the fault timing events in the current secondary circuit response to the primary equipment are identified. Based on the fault timing events, determine the key time points of the current secondary circuit in the process of responding to the primary equipment fault.

3. The method as described in claim 2, characterized in that, The step of identifying fault timing events in the current secondary circuit response to primary equipment based on the electrical quantity change characteristics, the protection and electrical correlation characteristics, and the circuit breaker status characteristics includes: The electrical quantity abrupt change characteristics, the protection and electrical correlation characteristics, and the circuit breaker state characteristics are enhanced by a multilayer perceptron to obtain the corresponding modal attention weights; Based on the modal attention weights, the electrical quantity abruptness features, the protection and electrical correlation features, and the circuit breaker status features are weighted and fused to obtain multi-source fused features; Based on the multi-source fusion features, the fault process of the current secondary circuit responding to the primary equipment is identified by a preset deep learning model to obtain fault timing events. The preset deep learning model is constructed by a convolutional neural network.

4. The method as described in claim 1, characterized in that, The step of performing feature analysis on fault waveform data and response event data based on the key time nodes to obtain fault behavior characteristics includes: Obtain the fault occurrence time, protection action time, reclosing time, and steady-state recovery time from the key time nodes; Using the fault occurrence time node as a timing reference, the clock deviation between the fault waveform data and the response event data is calibrated to obtain calibration data. Based on the protection action time node, the reclosing time node, and the recovery steady state time node, the calibration data is subjected to feature analysis to obtain timing features, fault features, and action features; The timing characteristics, the fault characteristics, and the action characteristics are used as the fault behavior characteristics corresponding to the current secondary circuit's response to the primary equipment.

5. The method according to any one of claims 1 to 4, characterized in that, The step of analyzing the performance status of the current secondary circuit based on the fault behavior characteristics to obtain the response performance index corresponding to the current secondary circuit includes: The secondary circuit fault type of the current secondary circuit is analyzed based on the fault behavior characteristics to obtain secondary circuit fault data. Based on the secondary circuit fault data, the performance status of the current secondary circuit is analyzed to obtain the reliability index of the starting element, the reliability index of the action, the correctness index of the timing, and the integrity index of the process. The reliability index of the starting element, the reliability index of the action, the correctness index of the timing, and the integrity index of the process are used as the response performance index corresponding to the current secondary circuit.

6. The method as described in claim 5, characterized in that, The step of analyzing the performance status of the current secondary circuit based on the secondary circuit fault data to obtain the reliability index of the starting element includes: Based on the secondary circuit fault data, the total number of valid faults of the primary equipment and the number of successful starts of the starting element in the secondary equipment are counted. Obtain the startup time corresponding to each startup element in the number of successful startups, and determine whether each startup time has reached a preset delay threshold; The number of times the startup does not reach the preset delay threshold is considered as the number of valid responses; The reliability index of the starting element is obtained by weighting the total number of valid failures, the number of successful starts, and the number of valid responses.

7. The method as described in claim 5, characterized in that, The steps for analyzing the performance status of the current secondary circuit based on the secondary circuit fault data and obtaining process integrity indicators include: Based on the key time points, the process of the current secondary circuit responding to the primary device is divided into multiple stage intervals; Based on the secondary circuit fault data, the response results of the current secondary circuit in the multiple stage intervals are analyzed to obtain the completion degree of key events in each stage. A collaborative analysis is performed on each of the secondary devices to obtain the degree of coordination between action and electrical quantities. The event intersection between the fault recording data and the response event data is analyzed to obtain the multi-source record completeness. The completion rate of key events in the stage, the coordination between actions and electrical quantities, and the completeness of multi-source records are weighted and summed according to preset weighting coefficients to obtain a comprehensive index of process integrity.

8. A device for determining the performance of a secondary circuit, characterized in that, The device includes: The acquisition module is used to acquire electrical quantity data of the current secondary circuit and switch quantity data corresponding to each secondary device in the current secondary circuit; The identification module is used to identify the fault timing of the current secondary circuit based on the electrical quantity data and the switch quantity data, and obtain the key time nodes; The feature module is used to perform feature analysis on fault waveform data and response event data based on the key time nodes to obtain fault behavior features. The fault waveform data is used to characterize the fault data of the primary equipment connected to the current secondary circuit, and the response event data is used to characterize the action data of the current secondary circuit in response to the fault of the primary equipment. The performance module is used to analyze the performance status of the current secondary circuit based on the fault behavior characteristics, and obtain the response performance index corresponding to the current secondary circuit.

9. A device for determining the performance of a secondary circuit, characterized in that, The device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the method for determining the performance of a secondary loop as described in any one of claims 1 to 7.

10. A storage medium, characterized in that, The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, it implements the steps of the method for determining the performance of a secondary loop as described in any one of claims 1 to 7.

Images