An optimization method and system for timing chart subgraph matching

Abstract

The present application relates to a kind of optimization method and system of timing diagram subgraph matching.The method includes: time block is carried out to original timing diagram, and the edge with same end point is aggregated and compressed in each time block to generate intra-block multi-edge object, to build block index in turn;Query graph with time constraint is received, with the edge in query graph as matching unit to execute search, and maintain current legal time window;In candidate generation stage, according to current to be matched data vertex pair and current legal time window, construct cache key, and carry out exploration in hotspot cache;If hotspot cache is not hit, then use current legal time window to locate target time block, and execute intersection operation in target time block to generate candidate multi-edge list;When current to be matched data vertex pair meets preset hotspot condition, the candidate multi-edge list is written into hotspot cache;Continue to execute search based on the candidate multi-edge list of hit or generated candidate multi-edge list, until outputting model matching result.

Description

Technical Field

[0001] This invention relates to the field of graph data processing and high-performance graph computing technology, and in particular to an optimization method and system for subgraph matching in a time-series graph. Background Technology

[0002] Time sequence graphs effectively describe the evolving interactions between entities over time and are widely used in scenarios such as financial transaction analysis, cybersecurity monitoring, and social media dissemination analysis. In time sequence graph analysis, temporal schema mining is a crucial task, requiring not only attention to the topological connections between entities but also strict adherence to dynamic constraints such as the temporal order of connections, time intervals, and overall time span.

[0003] Existing temporal motif mining methods typically employ a recursive search framework on large-scale temporal graphs, expanding the current partial matching results by continuously generating candidate edges or candidate subgraphs. However, in large-scale, high-concurrency graph data scenarios, due to the complexity of the temporal graph structure and the strictness of time constraints, the candidate generation stage faces significant performance bottlenecks, specifically in the following two aspects: On the one hand, when faced with massive historical interaction records, existing technologies often struggle to effectively isolate data from irrelevant time periods during the early, low-level memory access stages when performing time validity checks. This forces the system to perform extensive scanning of the edge set related to the current vertex, resulting in the invalid extraction and initial screening of a large number of interaction records that are not even within the current time window, leading to extremely high memory access overhead and memory bottlenecks.

[0004] On the other hand, real-world time sequence graphs often contain high-frequency, dense interactions between entities. In complex depth-first search paths, different search branches often overlap in time and space, causing the system to repeatedly perform intersection location and matching calculations for the interaction records of the same pair of entities within the same or similar time periods. This repetitive calculation across branches, coupled with inefficient processing of dense interaction data, results in a massive number of redundant branches at the structural level, further amplifying the computational cost of candidate generation.

[0005] Therefore, how to effectively reduce the invalid memory access overhead in the candidate generation stage, reduce redundant calculations and branches across search paths, and improve the overall processing efficiency of large-scale temporal motif mining while satisfying complex temporal constraints is a technical problem that urgently needs to be solved in the current field of graph computing.

[0006] Furthermore, on the one hand, there are differences in understanding among those skilled in the art; on the other hand, the applicant studied a large number of documents and patents when making this invention, but due to space limitations, not all details and contents were listed in detail. However, this does not mean that the present invention does not possess the features of these prior art. On the contrary, the present invention already possesses all the features of the prior art, and the applicant reserves the right to add relevant prior art to the background art. Summary of the Invention

[0007] To address the shortcomings of existing technologies, this invention provides an optimization method and system for timing graph subgraph matching, particularly a method, system, electronic device, and computer-readable storage medium for motif mining in timing graph analysis. More specifically, this invention relates to a technical solution for improving the efficiency of timing motif mining on a multi-core CPU platform through time-aware partitioning, multi-sided compression, partition intersection, and hotspot cache reuse.

[0008] In a first aspect, the present invention discloses an optimization method for time series graph subgraph matching, comprising: The original time series graph is divided into time blocks, and edges with the same endpoints within each time block are aggregated and compressed to generate intra-block polygon objects. A block index is then constructed based on the intra-block polygon objects. Receive a query graph with time constraints, perform a search using the edges in the query graph as matching units, and maintain the current valid time window during the search process; During the candidate generation phase, a cache key is constructed based on the current data vertex pair to be matched and the current valid time window, and exploration is performed in the hot cache. If the hot spot cache is not hit, the target time block is located using the current valid time window. Within the target time block, the intersection operation is performed in combination with the block index to generate a candidate polygon list. When the current data vertex pair to be matched meets the preset hot spot conditions, the candidate polygon list is written into the hot spot cache. The search continues based on the matched candidate polygon list or the generated candidate polygon list until the motif matching result is output.

[0009] This application discloses an optimized method for subgraph matching in time series graphs. Addressing the problems of high invalid memory access overhead and severe redundant computation in existing time series motif mining methods for large-scale time series graphs, this application divides the original time series graph into time blocks and aggregates and compresses edges with the same endpoints within each block. This allows time window constraints to be used as filtering conditions at the underlying memory access stage. The system only needs to perform candidate generation within the target time block intersecting with the current valid time window, effectively reducing invalid access to irrelevant historical interaction data. Simultaneously, since multiple structurally equivalent edges on the same vertex pair are uniformly represented as intra-block edge objects, redundant branches are reduced at the graph structure level, thereby lowering the structure matching cost in the subsequent depth-first search process. Furthermore, this application introduces a hotspot caching mechanism based on composite cache keys in the candidate generation stage, embedding the block intersection and hotspot caching uniformly into the main search path. This transforms the repeated location and filtering operations across search paths for high-frequency vertex pairs into a single actual intersection calculation and subsequent cache lookup. The above mechanism integrates the reduction of invalid traversals and the reduction of redundant calculations within the same search framework, effectively improving the overall processing efficiency of time series graph motif mining.

[0010] According to a preferred embodiment, constructing a block index based on intra-block multilateral objects includes: Construct an intra-block index for local positioning and a global block index table for cross-block positioning; Within the target time block, perform an intersection operation using the block index to generate a candidate multilateral list, including: The existence of a vertex in the target time block is determined across blocks using the global block index table, and the offset within the block is extracted. Based on the intra-block offset, local polygon lists of source and target vertices are mapped in the intra-block index, and time-constrained compatibility filtering is performed on the local polygon lists to generate candidate polygon lists.

[0011] This application defines the features of block index construction and intersection operation based on the collaboration of a global block index table and an intra-block index. Addressing the issue of high addressing blindness caused by relying solely on local traversal or a single index, this application uses a global block index table to determine vertex existence across blocks and extract intra-block offsets. This allows the system to pre-select valid time blocks containing target vertices at a macro level, avoiding invalid scans of time blocks without target nodes. After locating a valid time block, a local polygon list is directly mapped from the intra-block index based on the intra-block offset, and then time-constrained compatibility filtering is performed. This two-stage addressing mechanism, combining macro-level bounding and micro-level local drill-down, effectively narrows the data block access range during the query phase, making local filtering operations more focused, thereby improving the cache hit rate of the processor when performing local accesses.

[0012] According to a preferred embodiment, the hotspot cache is configured as a thread-local cache physically bound to the worker thread to block cross-thread resource contention; the preset hotspot condition is: in the local access count table maintained independently for each worker thread in the background, the access frequency of the current data vertex pair to be matched exceeds the preset hotspot threshold, and the corresponding candidate polygon list is not empty.

[0013] This application specifies the configuration of hotspot cache as thread-local cache and the hotspot write condition triggered by the non-empty state of the local access count table and the polygon list. In a multi-core parallel environment, conventional global shared caches are prone to lock contention conflicts between multiple threads. This application, by physically binding the hotspot cache to worker threads, prevents cross-thread resource contention while ensuring the smoothness of concurrent execution. Furthermore, the access frequency of vertex pairs in the sequence graph exhibits a non-uniform distribution. The system independently maintains a local access count table in the background and triggers cache writes only when the access frequency of a vertex pair exceeds a preset hotspot threshold and the corresponding intersection result is not empty. This mechanism ensures that the limited thread-local cache space is dedicated to storing real intersection results with high-frequency reuse value, avoiding the occupation of cache space by low-frequency data or invalid empty sets, and improving the effective utilization and reuse benefits of cache resources.

[0014] According to a preferred embodiment, maintaining the current valid time window during the search process includes: The lower and upper bounds of the current valid time window are controlled by the superposition calculation result of the timestamp of the first matched edge and the preset time window constraint; During the candidate generation phase, a cache key is constructed based on the current pair of data vertices to be matched and the current valid time window, including: When recursively expanding the query edge to be expanded, when the condition that both vertices of the query edge to be expanded have been mapped to data vertices is met, a composite code containing the current data vertex pair to be matched and the current valid time window is constructed as the cache key.

[0015] This application clarifies the controlled boundary calculation method for the current valid time window and the preconditions for constructing the cache key via topological mapping. Addressing the issue of invalid computation caused by broad time constraints and inappropriate cache probing timing in depth-first search, this application controls the boundary of the current valid time window by superimposing the timestamp of the first matched edge with the preset time window constraint. This transforms the globally static time constraint into a dynamically converging local time boundary as the search depth increases, continuously narrowing the space of valid solutions generated by candidates. Furthermore, the system only constructs a composite code as the cache key using the current pair of data vertices to be matched and the current valid time window when both ends of the query edge to be expanded have been mapped to data vertices. This ensures that cache probing in the time dimension is strictly based on a determined spatial topology, avoiding invalid cache requests generated in single-end mapping or unmapped states, and making branch jumps in the main control logic more accurate.

[0016] According to a preferred embodiment, until the output phantom matching result is obtained, the process includes: Under the condition that all query edges of the query graph are matched, a compressed solution consisting of polygonal objects within the block is obtained; Based on the original edge set corresponding to the multi-sided objects in each block of the compressed solution, the decompression calculation based on dynamic programming is performed according to the query edge order. The dynamic programming calculation uses the timestamp sequence of the currently matched edges as the state representation, and then reversely recovers the specific modal instance that meets the time constraints.

[0017] This application defines the feature of performing decompression calculations based on dynamic programming after obtaining the compressed solution. Addressing the issue that directly performing fine-grained matching on the original temporal graph containing a large number of multi-edges leads to an exponential increase in search branches, this application uses only the aggregated intra-block multi-edge objects as matching units during the search phase. It encapsulates the temporal dimension's combinational changes within the coarse-grained compressed solution, ensuring that depth-first search can quickly reach the bottom with a smaller number of topological branches. After confirming a complete match in the macroscopic graph structure, the system then performs dynamic programming calculations sequentially along the query edges, based on the original edge sets corresponding to the intra-block multi-edge objects in the compressed solution and using the timestamp sequence of the currently matched edges as the state representation. This recursive mechanism transforms the global combination solution process into a local state transition calculation, inversely recovering the specific motif instances that satisfy the time constraints. While ensuring the integrity of the output results, it effectively reduces the overall time and space complexity of the graph matching process.

[0018] According to a preferred embodiment, the original timing diagram is divided into time blocks, including: The edges in the original timing graph are sorted in ascending order according to their timestamps and divided into multiple consecutive time blocks according to a preset block size; the preset block size ensures that the total memory usage of local data in each time block does not exceed the L2 or L3 cache capacity of the processor. Synchronously output the time block / block metadata of the corresponding time block. The time block / block metadata includes the start position, end position, minimum timestamp and maximum timestamp. Locating the target time block using the current valid time window includes: using a binary search method to locate the set of target time blocks that intersect with the current valid time window in the time block / block metadata.

[0019] This application clarifies the basis for setting the preset block size to match the processor cache hierarchy capacity, as well as the binary search location feature based on metadata. Addressing the issues of limited memory access bandwidth and low efficiency of scanning consecutive time blocks in large-scale graph data processing, this application constrains the preset block size to ensure that the total memory usage of local data within a single time block is adapted to the processor's cache hierarchy capacity. This ensures that when the block intersection operation loads the target time block, the relevant data can reside in the processor's cache, reducing memory bandwidth overhead caused by frequent interactions with main memory. With the synchronous output of time block or block metadata, the system uses a binary search method to directly locate the set of target time blocks intersecting with the current valid time window in the lightweight metadata. This mechanism, which first relies on metadata for macroscopic jump location and then loads an appropriate amount of data into the cache for local filtering, effectively shortens the target time block location latency and improves the reading and processing speed of underlying data.

[0020] According to a preferred embodiment, the optimization method runs on a multi-core CPU platform and is controlled by an underlying resource constraint mechanism, including: The initial search task is distributed to the thread-local task queue corresponding to each worker thread; when a worker thread runs out of local tasks, a work-stealing scheduling action is triggered to obtain search tasks from other worker threads; The memory access and addressing actions initiated during the intersection operation of the block index are primarily limited to the local memory space belonging to the same physical node under the constraints of the non-consistent memory access architecture.

[0021] This application combines optimization methods with work-stealing scheduling on multi-core CPU platforms and underlying resource constraint mechanisms for architectures with inconsistent memory access. Addressing the issues of task load imbalance and high cross-physical-node memory access latency caused by uneven connectivity distribution in time-series graphs, this application effectively balances the computational load among worker threads and prevents some computing resources from being idle by distributing initial search tasks to thread-local task queues and triggering cross-thread work-stealing scheduling when a thread's tasks are exhausted. Furthermore, when performing block index intersection operations, the system, based on the constraints of the inconsistent memory access architecture, forces worker threads to prioritize memory access within the local memory space of the same physical node. This hardware-software co-operation mechanism effectively suppresses the additional latency caused by remote memory access across physical nodes while leveraging the parallel execution capabilities of multi-threaded systems, making it highly adaptable to the hardware architecture of large-scale time-series graph data analysis scenarios.

[0022] Secondly, the present invention discloses an optimization system for timing graph subgraph matching, comprising: The preprocessing module is used to divide the original time series graph into time blocks, and to aggregate and compress edges with the same endpoints within each time block to generate intra-block polygon objects, and to build a block index based on the intra-block polygon objects; The query processing module receives a query graph with time constraints, performs a search using edges in the query graph as matching units, and maintains the current valid time window during the search process. The query processing module specifically includes: The hotspot cache management unit is used to construct a cache key based on the current data vertex pair to be matched and the current legal time window during the candidate generation stage, and to search in the hotspot cache to return the candidate polygon list when a match is found; and to trigger the action of writing the generated candidate polygon list into the hotspot cache when the current data vertex pair to be matched meets the preset hotspot conditions. The block intersection unit is used to locate the target time block using the current valid time window when the hot spot cache is not hit, and to perform an intersection operation within the target time block in combination with the block index to generate a candidate multilateral list.

[0023] The optimized system entity device of this application solves the problem of low processing efficiency caused by the separation of offline data processing and online search query in traditional system architectures through pipelined collaboration of logical components such as the preprocessing module and the query processing module. The system utilizes the preprocessing module to complete the static segmentation and compressed index construction of raw data at the front end, providing a well-organized locally addressable data foundation for backend online queries. The hotspot cache management unit and the segmentation intersection unit deployed within the query processing module logically switch between cache interception paths and physical block location drill-down paths. When a cache miss occurs, the segmentation intersection unit performs the underlying physical intersection calculation; when the hotspot condition is met, the hotspot cache management unit triggers the writing of the result. This cohesive modular logical architecture design ensures the stable execution of the time-aware segmentation and hotspot intersection reuse mechanism at the underlying data flow level, providing a collaborative device with a high throughput foundation for time-series graph subgraph matching in multi-core concurrent environments.

[0024] Thirdly, the present invention discloses an electronic device, which includes a processor, a memory, and a computer program stored in the memory and capable of running on the processor. When the computer program is executed by the processor, it can implement the aforementioned method.

[0025] Fourthly, the present invention discloses a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, can implement the aforementioned method. Attached Figure Description

[0026] Figure 1 This is a diagram of the overall system architecture of the present invention.

[0027] Figure 2 This is the main control flowchart of the query processing module of the present invention.

[0028] Figure 3 This diagram illustrates the internal processing logic and data interaction of the block intersection unit of this invention, showing how to locate time blocks based on time windows, access the global block index table, and generate candidate polygons using intra-block indexes.

[0029] Figure 4 This is a flowchart illustrating the execution logic of the hotspot cache management unit of the present invention, showing the complete process of cache key construction, cache query, hotspot identification, and cache write-back.

[0030] List of reference numerals 200: Temporal Module Mining System; 210: Preprocessing Module; 211: Time Sorting Unit; 212: Time Block Partitioning Unit; 213: Intra-Block Polygon Compression Unit; 214: Intra-Block Index Construction Unit; 215: Global Block Index Table Construction Unit; 220: Query Processing Module; 221: Polygon Center Depth-First Search Unit; 222: Search State Maintenance Unit; 223: Block Intersection Unit; 224: Hotspot Cache Management Unit; 225: Decompression Unit; 230: Parallel Scheduling Module; 231: Global Task Pool; 232: Thread Local Task Queue; 233: Work Stealing Scheduling Unit; 234: Memory Management Unit; 310: Original Temporal Graph; 320: Query Graph; 330: Time Block / Block Metadata; 340: Intra-Block Polygon Object; 350: Intra-Block Index; 360: Global Block Index Table. Detailed Implementation

[0031] To clarify the protection boundaries of the relevant technical features in this application, the core terms appearing in this document are defined as follows: Original temporal graph: Composed of vertices, edges, and timestamps, it is original graph data used to describe the interaction relationships between entities over time.

[0032] Temporal pattern mining: The process of searching for target subgraph patterns that satisfy given topological and temporal constraints in the original temporal graph.

[0033] Query graph: A small-scale target graph structure given by the user to describe the structure of the motif to be matched and the time constraints.

[0034] Time window constraint: Physical and logical restrictions on the time range within which candidate edges or candidate multilaterals are allowed to occur.

[0035] Current valid time window: During the search process, the lower and upper limits of the time range that are currently allowed to participate in matching are determined by the timestamps of matched edges and preset time constraints.

[0036] Time block: A series of consecutive data blocks obtained by dividing the global edge sequence sorted by time into a preset block size.

[0037] Time block / block metadata: Information describing the attributes of a time block, including at least the start position, end position, minimum timestamp, and maximum timestamp of the time block.

[0038] Intra-block polygonal objects: Data volumes (such as polygonal arrays) obtained by aggregating and compressing multiple edges with the same source vertex and target vertex within the same block at the same time.

[0039] Multi-center depth-first search: The main control logic process of executing a recursive search framework, using multi-sided objects within a block as the basic extension unit.

[0040] Search state: A set of state information maintained during the depth-first search process, including at least the mapping relationship from query vertex to data vertex, the inverse mapping relationship from data vertex to query vertex, the stack of matched edges, and the current valid time window.

[0041] Candidate Multi-edge List: A set of feasible multi-edge objects generated for the query edges to be expanded, given the current search state and time constraints.

[0042] Intra-block index: A local index structure built around the polygon objects within the block, including forward and backward compressed sparse row indexes, used to quickly locate the corresponding outgoing or incoming polygon list within the local block after a given vertex and time block.

[0043] Global Block Index Table: A global index structure used to record which time blocks a vertex appears in, and the offset information of that vertex in the index within the corresponding time block.

[0044] Block intersection: Given a pair of data vertices and the current valid time window, first locate the relevant time blocks, and then perform vertex pair filtering and generate a candidate polygon list within the relevant time blocks by combining the intra-block index and the global block index table.

[0045] Hotspot vertex pairs: Data vertex pairs that are accessed frequently during the underlying search process and whose access frequency exceeds a preset hotspot threshold.

[0046] Hotspot cache: A memory structure used to store the intersection results of high-frequency data vertex pairs within a specific time window.

[0047] Thread-local cache: A private cache structure physically bound to a specific worker thread, used to prevent cross-thread resource contention.

[0048] Cache key: A composite code used to uniquely identify a cached item. In this embodiment, the cache key contains at least data vertex pair information and current time window information.

[0049] Compression solution: An intermediate matching result obtained during the depth-first search of the polygon center, consisting of polygon objects within the matched block.

[0050] Decompression: Using dynamic programming and other methods, the specific edge combinations and module instances that satisfy the time constraints are recovered in reverse within each polygon based on the compressed solution.

[0051] Work-stealing scheduling: a task reallocation mechanism used in a parallel execution environment to acquire new search tasks from other worker threads when a worker thread runs out of local tasks.

[0052] Memory management for non-consistent memory access architectures: a low-level resource constraint mechanism to enable worker threads to prioritize accessing data structures in the local node's memory during addressing, thereby reducing the overhead of remote memory access across physical nodes.

[0053] The following is a detailed explanation with reference to the accompanying drawings.

[0054] like Figure 1 As shown, this embodiment provides a time-series phantom mining system 200, an electronic device, and a computer-readable storage medium. It should be noted that the following embodiments are used to explain the present invention, not to limit the scope of protection. Technical features in each embodiment can be combined with each other without conflict. Unless otherwise specified, the parameters appearing in this document are exemplary parameters and can be adjusted according to actual application scenarios and hardware configurations.

[0055] The electronic device is configured to form a multi-core central processing unit (CPU) platform, which provides the underlying runtime environment for the time-series motif mining method. The electronic device includes a processor and memory.

[0056] The processor is a multi-core central processing unit (CPU), comprising multi-core computing resources and a processor cache hierarchy. The multi-core computing resources support parallel thread execution, while the processor cache hierarchy provides data residency space for local access, thus forming the underlying hardware support for large-scale timing graph analysis. Combined with... Figure 1 As shown, the processor is divided into a CPU worker thread execution area, which contains multiple worker threads (as indicated by thread 0 to thread N in the attached figure). These multiple worker threads execute tasks in parallel to fully utilize the thread parallelism capabilities of the multi-core CPU platform.

[0057] The memory is used to store various software data structures, such as computer programs, original timing graphs 310, query graphs 320, and block-compressed data during the execution graph calculation process. In terms of physical distribution, the memory is limited to form multiple physical memory nodes for a non-uniform memory access architecture; each physical memory node includes local node memory corresponding to a worker thread, thereby forming physical memory access constraints in subsequent scheduling to reduce the additional overhead caused by remote memory access across physical nodes.

[0058] A computer program is stored on a computer-readable storage medium. When executed by a processor, the computer program implements the graph calculation and scheduling logic of the time-series phantom mining system 200. The time-series phantom mining system 200, as the core logic execution module, works in conjunction with electronic devices to construct a complete hardware and software environment for time-series phantom mining.

[0059] Combination Figure 1The overall system architecture shown is that the time series module mining system 200 includes a preprocessing module 210, a query processing module 220, and a parallel scheduling module 230. The preprocessing module 210 is used to perform offline preprocessing on the original time series graph 310, and the query processing module 220 is used to perform online multilateral center depth-first search on the preprocessing results in conjunction with the parallel scheduling module 230, thereby forming a unified processing mechanism that integrates time-aware block partitioning, multilateral compression, block intersection, and hot spot cache reuse.

[0060] The preprocessing module 210 defines an offline data processing pipeline, which sequentially includes a time sorting unit 211, a time block partitioning unit 212, an intra-block edge compression unit 213, an intra-block index construction unit 214, and a global block index table construction unit 215, thereby realizing the conversion of the original time series graph 310 into a block-based compressed data representation. During operation, the edge data of the original time series graph 310 enters from the time sorting unit 211 and flows unidirectionally along the aforementioned offline data processing pipeline to the global block index table construction unit 215.

[0061] Specifically, the time sorting unit 211 sorts the edges in the original timing graph 310 in ascending order according to their timestamps, forming a globally ordered edge sequence. The time block partitioning unit 212 divides the globally ordered edge sequence into multiple consecutive time blocks according to a preset block size. The preset block size for partitioning the time blocks is determined by the following method: under the constraints of the target hardware platform's cache capacity, edge number threshold, or preset time span, each time block is suitable for performing local access within the processor's cache hierarchy, and the cross-block access overhead does not exceed the limit. The time block partitioning unit 212 synchronously outputs time block / block metadata 330, which includes the start position, end position, minimum timestamp, and maximum timestamp, where the minimum timestamp limits the lower time limit of the corresponding time block, and the maximum timestamp limits the upper time limit of the corresponding time block.

[0062] Within the physical boundary of each time block, the data processing path for multiple edges with the same source vertex and target vertex is as follows: the original data undergoes aggregation and compression processing by the intra-block edge compression unit 213, ultimately forming an intra-block edge object 340. The intra-block edge object 340 consists of a source vertex identifier, a target vertex identifier, an interval corresponding to the original edge set, a minimum timestamp, and a maximum timestamp. The intra-block index 350 constructed by the intra-block index construction unit 214 includes a forward compressed sparse row index and a reverse compressed sparse row index. The forward compressed sparse row index locates the outgoing edge list within the corresponding time block given the state of the source vertex, while the reverse compressed sparse row index is used to locate the incoming edge list of the target vertex within the corresponding time block given the state of the target vertex. Simultaneously, the global block index table 360 ​​constructed by the global block index table construction unit 215 works in conjunction with the intra-block index 350 to ensure that the existence determination of a vertex across time blocks and the location of the vertex's offset position in the corresponding time block's intra-index are completed continuously.

[0063] After the offline operation phase of the preprocessing module 210 is completed, the time block / block metadata 330, intra-block polygon objects 340, intra-block indexes 350 and global block index tables 360 are loaded and arranged in the memory of the electronic device, so that the query processing module 220 has a static local addressing basis, thereby realizing the memory access locality physical constraint in the subsequent depth-first search process.

[0064] Combination Figure 1 lower half and Figure 2 As shown in the overall query processing flow, after receiving the time-series schema query graph 320 and its time constraints, the query processing module 220 executes the main control logic of the polygon center depth-first search unit 221. The search state instantiated in memory by the search state maintenance unit 222 includes the mapping relationship from query vertices to data vertices (mapMG), the inverse mapping relationship from data vertices to query vertices (mapGM), the matched polygon stack (eStack), and the current valid time window. The mapping relationships mapMG and mapGM are used to record the bidirectional matching status of vertices, and the matched edge stack eStack is used to cache coarse-grained matching results, thus forming the isolated execution context of the edge center depth-first search unit 221 within the worker thread. By controlling the boundary of the current valid time window to the superposition calculation result of the timestamp of the first matched edge and the preset time window constraint, the time validity judgment is brought forward. For example, if the timestamp of the first matched edge is... The preset time window size is Then determine the lower limit. for And the upper limit for and sum.

[0065] Under the main control logic of the edge-center depth-first search unit 221, the search is performed recursively, with the edges in the query graph 320 as the expansion unit. The candidate generation method is dynamically selected based on the mapping status of the current query edge to be expanded. When the condition that both ends of the query edge to be expanded are mapped to data vertices is met, the edge-center depth-first search unit 221 prioritizes triggering the hotspot cache management unit 224 to perform cache probing. When the hotspot cache management unit 224 reports a cache miss, the block intersection unit 223 is triggered to perform physical block location and block intersection. When the condition that only one end is mapped is met, candidates are generated based on the list of adjacent edges of that mapped vertex in the relevant time block. When the condition that neither end is mapped is met, feasible edges are scanned in the relevant time block according to the current valid time window, and candidates are filtered based on the mapping consistency condition.

[0066] During recursive processing, the intra-block polygon objects 340 in the generated candidate polygon list are sequentially added to the matched polygon stack eStack, and the mapping relationship mapMG and the inverse mapping relationship mapGM are updated synchronously. When the trigger condition of the candidate polygon list being empty or the current branch being explored is met, the polygon center depth-first search unit 221 enters backtracking mode and performs reverse stack popping and state cleanup actions to restore the previous search state.

[0067] Finally, the depth-first search unit 221, based on the determination that all query edges in the query graph 320 have been matched, obtains the compressed solution stored in the matched edge stack eStack, consisting of intra-block edge objects 340. The decompression unit 225 works in conjunction with the depth-first search unit 221, performing dynamic programming calculations according to the query edge order based on the original edge sets corresponding to each intra-block edge object 340 in the compressed solution. This dynamic programming calculation is constrained to form a recursive logic, where the recursive logic uses the timestamp sequence of currently matched edges as the state representation, thereby generating all legal specific edge combinations that satisfy the time constraints, and finally outputting a specific motif instance or motif count result.

[0068] During the recursive expansion of the aforementioned multilateral center depth-first search unit 221, for a single-step candidate generation process, combined with Figure 2 Macro jump branches and Figure 3 The block intersection engine execution flow shown is as follows: Under the main control logic of the multi-center depth-first search unit 221, when the hot spot cache management unit 224 reports a cache miss, the multi-center depth-first search unit 221 triggers the block intersection unit 223 to receive the data vertex pair and the current valid time window. It then proceeds to physical block location and block intersection operations; where the data vertex pairs include the source vertex. With the target vertex .

[0069] Block intersection unit 223 performs a memory access operation relative to the memory. This memory access operation, constrained by time block / block metadata 330, is only permitted within the current valid time window. The intersection of the starting and ending boundaries is performed within the target time block. Specifically, the block intersection unit 223 uses a binary search method to quickly locate the target time block set in the metadata, thereby blocking global memory scanning within invalid time periods.

[0070] For each target time block obtained from the location, the global block index table 360 ​​and the intra-block index 350 work together to ensure that the two-stage cross-level addressing logic is completed continuously. This two-stage cross-level addressing logic defines the cross-block null detection and local physical mapping; the global block index table 360 ​​is used to determine the source vertex across blocks. With the target vertex Existence and extract the corresponding intra-block offset, when the source vertex If there are no records in the current time block, the control flow skips the time block directly; and the intra-block index 350 is used to map the source vertex according to the intra-block offset. Local output polygon list and target vertex The local entries are added to the polygon list, thereby enabling physical drill-down of the index table.

[0071] The multi-sided objects 340 within a block are organized chronologically in both the local outbound multi-sided list and the local inbound multi-sided list. The block intersection unit 223 performs a local intersection operation on these two lists, where each multi-sided object 340 within a block falls within a time-constrained region. Data within a given time frame is retained as a public multilateral state, while data exceeding the time limit is truncated and removed. Because the data is distributed in temporal order at the underlying level, this compatibility filtering operation is strictly limited to a local scope.

[0072] During operation, the local polygon indexes within the selected blocks are transformed into global polygon identifiers through an identifier conversion process. Candidate results from all target time blocks are then merged, ultimately assembling a candidate polygon list in a standard format. Once generated, the candidate polygon list is passed up the execution flow and returned to the polygon center depth-first search unit 221 for subsequent legality checks and status updates.

[0073] Combination Figure 2 and Figure 4 The control flow shown, under the main control logic of the multi-center depth-first search unit 221, prioritizes the hotspot cache management unit 224 to perform bypass interception and cache probing actions when the condition that both ends of the query edge to be expanded in the query graph 320 are mapped to data vertices is met. The corresponding cache key is the data vertex pair and the current valid time window. Composition; where data vertex pairs are used for state identification in the spatial dimension, and the current valid time window. State identifiers are used for the time dimension, thereby forming a composite code with unique state characteristics.

[0074] By placing the thread-local cache within the private local memory space of the current worker thread, cache probing is restricted to the thread itself, thus avoiding cross-thread resource contention and locking overhead in a multi-threaded environment. When the conditions for a hit are met in the thread-local cache, which serves as the physical carrier of the hot cache, the hot cache management unit 224 directly returns the corresponding candidate polygon list to truncate subsequent calculations; otherwise, the block intersection unit 223 is triggered to perform physical intersection calculations.

[0075] The hotspot status of data vertex pairs is determined by the following method: While recording the access frequency of data vertex pairs, the hotspot cache management unit 224 maintains an independent local access count table for each worker thread in the background. When the access frequency index exceeds a preset hotspot threshold... When the state of the data vertex pair is marked and flipped to a hotspot vertex pair, the state of the data vertex pair is determined.

[0076] For candidate results calculated by the block intersection unit 223, the hot spot cache management unit 224 triggers a write operation to insert the candidate result as hot spot cache data into the thread-local cache if and only if the dual conditions of the data vertex pair being marked as a hot spot vertex pair and the corresponding candidate result being non-empty are met. When a thread-local cache space is full and capacity exceeds the limit, the hot spot cache management unit 224 enters replacement mode and performs old entry removal based on a preset eviction policy (such as the least recently used policy) to maintain the dynamic availability boundary of the cache. Finally, the hot spot cache management unit 224 returns a list of qualified candidate polygons to the polygon center depth-first search unit 221.

[0077] To address the shortcomings of existing technology CN111177188A, which only discloses the dynamic maintenance of conventional timing windows without combining it with underlying structure optimization, resulting in massive redundant search branches, and the objective problem of existing technology CN105095371A, which suffers from large-scale invalid underlying bus memory access due to the global blind execution of coarse-grained index intersection in graph matching, this application constructs an online timing graph accurate search scheme with advanced bypass interception characteristics through precise underlying hardware and software coordination and execution control flow reconstruction. Specifically, the multi-center depth-first search unit 221, located in the multi-threaded core execution area, guides the query graph 320 with strict upper and lower time constraints to the specific matching execution flow of the underlying concurrent computing framework in a topological recursive order. The hotspot cache management unit 224, acting as a local high-speed storage defense, performs a pre-bypass matching result interception operation for frequently accessed data vertex pairs within the strictly physical private isolation context of the multi-core, multi-threaded parallel architecture. The block intersection unit 223, acting as the underlying graph computing engine, performs a micro-local filtering operation oriented towards graph entity topological compatibility within the target time block after the legality time span pre-screening by the time block / block metadata 330. Where both vertices of the current query edge to be expanded are strictly and bidirectionally mapped to the target data vertex, the multi-center depth-first search unit 221, under the mandatory directional instruction that must prioritize issuing query cache instructions, establishes a pre-bypass exploration flow relationship with the hotspot cache management unit 224. Furthermore, when the hot spot cache management unit 224 returns a miss probe result to its private thread-local cache based on the composite cache key that is strictly constructed by the currently determined data vertex pairs to be matched and the current legal time window in a dynamic convergence state, the hot spot cache management unit 224, under the irreversible unidirectional control flow triggered by the drill-down addressing logic, establishes a direct scheduling dependency relationship with the block intersection unit 223 for the underlying physical intersection operation, thereby completely correcting the memory access delay and logical contradiction problems caused by single serial execution or intersection calculation inversion. Furthermore, when the block intersection unit 223 completes the physical dimension intersection calculation based on the underlying continuous local time blocks and the generated candidate polygon list entity content is not empty as determined by the system through strict verification, the block intersection unit 223, in accordance with the strict anti-empty set pollution mandatory safe write-back rule, establishes a targeted hotspot data injection relationship with the hotspot cache management unit 224 based on the background local access count table status verification judgment. This solves two problems at once: the cross-thread lock contention blocking problem that is inevitably caused by the conventional global shared cache in KR101556060B1, which is a well-known common sense and is widely cited, and the dual fatal technical problem that invalid empty sets occupy and pollute the valuable processor cache space without any protection.

[0078] To further significantly reduce the scanning overhead for invalid time ranges during continuous addressing and to patch process omissions, during the controlled execution of the aforementioned underlying physical intersection calculation, the pre-loaded global block index table 360 ​​in the system memory plays an effective physical addressing and delimiting role. This is achieved when the source vertex u to be queried exists within the target time block where the intersection is quickly located via binary search and is rigorously verified by pre-read instructions. This allows the block intersection unit 223, responsible for local micro-physical mapping, to engage in a local fine-tuning offset extraction relationship with the block index 350, which is stored continuously and compactly at the underlying level and is in a memory-physical-aligned state. Simultaneously, the global block index table 360, which acts as a global macro-guidance unit, transforms into a fast circuit breaker for cross-block span jumps when the source vertex u has no historical interaction records within the target time block where the intersection is located, as confirmed by metadata comparison. This allows the controlled block intersection unit 223 to directly skip the current target time block without initiating additional memory reads and to directly jump to the next target time block arranged based on a time-series time sequence for state iteration. This design enables global time constraints not only to serve as a backend filter for the final result, but also to directly transform into a low-level addressing physical blocker at the pre-memory access micro-instruction stage, effectively cutting off useless branches in their infancy.

[0079] Combination Figure 1 The unified task organization and resource management execution flow shown at the bottom includes a parallel scheduling module 230 comprising a global task pool 231, a thread-local task queue 232, a work-stealing scheduling unit 233, and a memory management unit (hereinafter referred to as memory management unit 234) for non-consistent memory access architecture. The global task pool 231 receives the initial search tasks generated by the query processing module 220, and the thread-local task queue 232 provides each worker thread with a private closed-loop processing space, thereby forming a task dimensionality reduction allocation architecture that reduces global lock contention. During operation, the initial search task enters the global task pool 231 from the query processing module 220 and is then distributed downwards to the thread-local task queues 232 corresponding to each worker thread. Worker threads prioritize processing search tasks in their local task queues.

[0080] Under the control flow of the parallel scheduling module 230, when the triggering condition that the thread-local task queue 232 corresponding to a specific worker thread is empty is met, the work-stealing scheduling unit 233 triggers a cross-thread task-stealing action to obtain new search tasks from other worker threads, thereby alleviating the uneven task load; otherwise, the worker thread will prioritize closed-loop processing of the remaining tasks in its thread-local task queue 232.

[0081] The memory management unit 234 (for non-uniform memory access architectures) establishes hardware-level memory access self-locking conditions after being assembled at the system level: when a worker thread initiates a memory access operation on a block-based compressed graph data structure, this memory access operation is preferentially restricted to the local memory space belonging to the same physical node under the constraints of the non-uniform memory access architecture, so as to suppress the additional overhead caused by remote memory access across physical nodes. The work-stealing scheduling unit 233 works in conjunction with the memory management unit 234 to ensure that cross-thread task-stealing operations are completed synchronously with the localized physical memory access constraints, ultimately maintaining high parallel execution efficiency on a multi-core CPU platform.

[0082] To address the issues of ambiguous descriptions of underlying multi-core hardware adaptation parameters and architectural conflicts caused by serial interpretation of multi-concurrency scheduling mechanisms, the parallel scheduling module 230 within the time-series module mining system 200, responsible for overall graph-wide computational resource management, includes a work-stealing scheduling unit 233 located in an independent parallel execution region for worker threads, a thread-local task queue 232 providing a private lock-free closed-loop task retrieval space, and a memory management unit 234 responsible for physical layer hardware addressing constraint control. The work-stealing scheduling unit 233, responsible for task balancing and allocation, the thread-local task queue 232 serving as a carrier for micro-task queues, and the memory management unit 234 providing the underlying system-level memory interface, together with the multi-level multi-core computing resources of the multi-core CPU platform, constitute a non-consistent memory access node structure with deep physical resource binding at the underlying level. This highly cohesive non-consistent memory access node structure possesses localized physical memory access absolute priority constraint characteristics based on physical memory page hardware binding and operating system-level worker thread affinity forced locking, thereby completely correcting the architectural configuration contradiction in conventional modular systems where scheduling units are mistakenly understood as unidirectional serial pipelines. To achieve the aforementioned low-latency physical addressing acceleration, the memory management unit 234, which is granted low-level permissions, connects to a background maintenance thread that is asynchronously resident in the background and dedicated to frequency monitoring and counting, as well as the main working thread that is in real-time memory state synchronization with the background maintenance thread, by pre-dividing physical page table references based on the physical node's local memory pool capacity. This enables the main working thread, as the upper-level concurrent computing entity, to establish a direct memory addressing and reading relationship with the localized physical memory space that belongs to the same unique physical motherboard node and resides for a long time with the static block-based polygon object 340 compressed graph data, without the signal attenuation delay across the high-speed bus.

[0083] Furthermore, to ensure that the abstract method claim features possess objective physical quantification boundaries that can be accurately implemented and reproduced by those skilled in the art, the aforementioned preset block size for forcibly dividing the global time-series edge sequence is a fixed downward rounding upper limit determined by dividing the maximum byte capacity of the processor's L2 or L3 physical cache obtained through the pre-executed system hardware probe instruction during the system's low-level initialization phase by the standard byte length occupied by the polygonal object 340 within a single block after structure serialization. This ensures that each time the block intersection unit 223 loads the target time block through the bus to perform local graph mode filtering processing, the relevant data segments can be perfectly accommodated and completely reside in the limited hierarchical structure of the physical processor's cache, effectively avoiding the problem of frequent hardware cache line replacement overflow caused by capacity mismatch.

[0084] To clarify the parameter calibration boundaries and anti-circumvention standards of the underlying graph computing architecture, key operating parameters in the system are all subject to hard constraints based on specific operating conditions. Preferably, the preset block size for dividing time blocks is such that the total memory usage of local data within a single time block is adapted to the range of the processor's L2 or L3 cache capacity, thus balancing cache hit rate for local memory accesses with bandwidth overhead for cross-block scheduling. A preset hotspot threshold is also included. The upper and lower limits of the parameter range correspond to the feasible solution boundaries under the low-frequency reuse condition of sparse graphs with very few search branches and the optimal reuse condition with high-frequency intersection of multiple branches, respectively, so as to achieve a balance between avoiding cold data pollution and maximizing cache reuse.

[0085] At the underlying data addressing architecture level, in one optional implementation, the intra-block index 350 employs a forward and reverse compressed sparse row index structure. In another optional implementation, the intra-block index 350 can also be configured as other equivalent compressed graph structures with equivalent topology mapping capabilities. Regarding the protection scope of the underlying graph index structure, the so-called equivalent replacement must at least satisfy: consistency in the physical isolation constraints of time-aware blocks in the processor's memory address space, consistency in the addressing path from vertex identifiers down to the intra-block polygon object 340, and consistency in the memory locality access characteristics for execution time validity filtering.

[0086] Furthermore, each execution unit in the timing module mining system 200 can be configured as a highly decoupled modular software component, enabling flexible deployment in electronic devices with different core counts or topologies. Without departing from the inventive concept, the physical alignment of memory data, the granularity of processor thread binding, and the direction of task stealing can all be adaptively adjusted based on specific application scenarios. Any structural modifications or process substitutions made by those skilled in the art based on the above-mentioned equivalent criteria and hardware-software co-operation physical constraints after reading this specification should fall within the protection scope of this invention.

[0087] Furthermore, based on the unified processing mechanism constructed by the aforementioned time-aware block partitioning, polygon compression, block intersection, and hotspot cache reuse, the system and method provided in this embodiment have achieved significant technical progress in underlying graph computation performance. At the runtime level, the time-aware block partitioning mechanism moves the time window constraint to the memory access boundary, enabling the system to perform candidate generation only within a small number of relevant time blocks. Compared to global scanning, its invalid memory access can be significantly reduced by approximately 60% to 80%. The polygon objects 340 within the block eliminate redundant branches at the structural level, reducing the structural matching computation cost in the depth-first search process by approximately 30% to 50%. The collaborative cross-level drill-down of the global block index table and the intra-block index improves the local cache hit rate by approximately 40%. In particular, for high-frequency vertex pairs, reuse interception is implemented through thread-local cache, compressing the repeated intersection location and filtering operations across search paths into one real physical calculation and multiple O(1) level fast searches, reducing the amount of repeated computation by approximately 70%. Based on the above-mentioned hardware and software co-optimization mechanism, this application achieves a significant improvement in overall mining efficiency of 2 to 5 times compared with existing conventional time series motif mining schemes, and is highly adaptable to large-scale time series graph parallel analysis scenarios under multi-core central processing unit platforms.

[0088] This embodiment also provides an optimization method for timing graph subgraph matching, particularly a timing module mining method based on time segmentation and hotspot caching, which includes the following steps: Step S101: Sort the edges in the original time sequence graph 310 in ascending order according to the timestamp to form a globally time-ordered edge sequence; Step S102: Divide the global time-ordered edge sequence into multiple consecutive time blocks according to the preset block size, and record time block / block metadata 330 for each time block, including the start position, end position, minimum timestamp and maximum timestamp; Step S103: Within the internal physical boundary of each time block, aggregate and compress multiple edges with the same source vertex and target vertex to form an intra-block polygon object 340; Step S104: Based on the intra-block polygon object 340, construct an intra-block index 350 for each time block, and simultaneously construct a global block index table 360 ​​for cross-block positioning; Step S105: Receive the time sequence schema query graph 320 and its time constraints. Perform a polygon center depth-first search using the edges in the query graph 320 as the basic matching units. Initialize and maintain in memory the mapping relationship mapMG from query vertices to data vertices, the inverse mapping relationship mapGM from data vertices to query vertices, the matched polygon stack eStack, and the current valid time window. ; Step S106: During the recursive process of the depth-first search of the multi-center, when the condition that both endpoints of the edge to be expanded have been mapped to data vertices is met, the search proceeds based on the current data vertex pair and the current valid time window. The constructed composite cache key is searched in the thread-local cache, which serves as the physical carrier of the hot cache; if the cache hit condition is met, the corresponding candidate polygon list is returned directly. Step S107: If the cache miss condition is met, then proceed according to the current valid time window. The boundary of the target time block is located to intersect. Within the target time block, candidate polygons are located based on the global block index table 360 ​​and the intra-block index 350. The selected intra-block local index transitions are converted into global polygon identifiers, and then assembled to generate a candidate polygon list. Step S108: Perform a validity check on the generated candidate edge list and update the mapping relationship mapMG and the matched edge stack eStack synchronously, and then continue to recursively expand the subsequent query edges; when the candidate edge list is empty, enter the backtracking mode and perform reverse pop stack to restore the previous search state. Step S109: When it is determined that all query edges in the query graph 320 have been matched, the compressed solution stored in the matched edge stack eStack is obtained, and dynamic programming-based decompression processing is performed on the compressed solution to reverse restore and output the specific module instance or module count result that meets the time constraint.

[0089] Furthermore, between the execution flow of steps S106 and S107, the method also includes a hotspot identification step: maintaining a local access count table for data vertex pairs in the background; when the access frequency of a certain data vertex pair exceeds a preset hotspot threshold... When the condition is met, its state is marked as a hotspot vertex pair. The thread-local cache only performs cache write operations on results that satisfy the dual conditions of being marked as a hotspot vertex pair and the candidate polygon list calculated in step S107 being non-empty.

[0090] This embodiment also provides an electronic device. At the physical bus architecture level, the electronic device includes a processor, a memory, a communication bus, and a communication interface; wherein the processor, memory, and communication interface are physically connected and interact with electrical signals through the communication bus. The processor, as the execution core, is used to call and execute the computer program residing in the memory, seamlessly sequentially implementing the method flow in steps S101 to S109 above. The communication interface is used to receive large-scale original timing diagrams and query graph constraints input from external devices, and supports the external transmission of the final mining results.

[0091] Furthermore, this embodiment also provides a computer-readable storage medium on which a computer program is persistently or temporarily stored. When the computer program is read and executed by the processor of an electronic device, the aforementioned time-series module mining method based on time-blocking and hotspot caching is implemented. The computer-readable storage medium includes, but is not limited to, various physical media with machine-readable data resident capabilities such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0092] It should be noted that the specific embodiments described above are exemplary. Those skilled in the art can devise various solutions inspired by the disclosure of this invention, and these solutions all fall within the scope of this invention and its protection. Those skilled in the art should understand that this specification and its accompanying drawings are illustrative and not intended to limit the scope of the claims. The scope of protection of this invention is defined by the claims and their equivalents. This specification contains multiple inventive concepts; terms such as "preferredly," "according to a preferred embodiment," or "optionally" indicate that the corresponding paragraph discloses an independent concept. The applicant reserves the right to file divisional applications based on each inventive concept.

Claims

1. An optimization method for subgraph matching in a time series graph, characterized in that, include: The original time sequence graph (310) is divided into time blocks, and edges with the same endpoints are aggregated and compressed in each time block to generate intra-block polygon objects (340). A block index is constructed based on the intra-block polygon objects (340). Receive a query graph (320) with time constraints, perform a search using the edges in the query graph (320) as matching units, and maintain the current valid time window during the search process; During the candidate generation stage, a cache key is constructed based on the current data vertex pair to be matched and the current valid time window, and the search is performed in the hot spot cache. If the hotspot cache is not hit, the target time block is located using the current valid time window. Within the target time block, an intersection operation is performed using the block index to generate a candidate polygon list. When the current data vertex pair to be matched meets the preset hotspot conditions, the candidate polygon list is written into the hotspot cache. The search continues based on the matched candidate polygon list or the generated candidate polygon list until the motif matching result is output.

2. The method according to claim 1, characterized in that, The construction of the block index based on the intra-block polygonal object (340) includes: Construct an intra-block index (350) for local positioning and a global block index table (360) for cross-block positioning. The step of performing an intersection operation within the target time block using the block index to generate a candidate multilateral list includes: The existence of a vertex in the target time block is determined across blocks by the global block index table (360), and the offset within the block is extracted. Based on the intra-block offset, local polygon lists of the source vertex and the target vertex are mapped in the intra-block index (350) respectively, and time-constrained compatibility filtering is performed on the local polygon lists to generate the candidate polygon list.

3. The method according to claim 1 or 2, characterized in that, The hotspot cache is configured as a thread-local cache physically bound to the worker thread to prevent cross-thread resource contention. The preset hotspot condition is as follows: in the local access count table maintained independently for each worker thread in the background, the access frequency of the current data vertex pair to be matched exceeds the preset hotspot threshold, and the corresponding candidate polygon list is not empty.

4. The method according to any one of claims 1 to 3, characterized in that, Maintaining the current valid time window during the search process includes: The lower and upper bounds of the current legal time window are controlled by the superposition calculation result of the timestamp of the first matched edge and the preset time window constraint; The step of constructing a cache key based on the current pair of data vertices to be matched and the current valid time window during the candidate generation stage includes: When recursively expanding the query edge to be expanded, when the condition that both vertices of the query edge to be expanded have been mapped to data vertices is met, a composite code containing the current data vertex pair to be matched and the current valid time window is constructed as the cache key.

5. The method according to any one of claims 1 to 4, characterized in that, The process until the output phantom matching result is reached includes: Under the determination result that all query edges of the query graph (320) have been matched, a compressed solution composed of the polygonal objects (340) within the block is obtained; Based on the original edge set corresponding to the multi-sided object (340) in each block of the compressed solution, the decompression calculation based on dynamic programming is performed according to the query edge order. The dynamic programming calculation uses the timestamp sequence of the currently matched edges as the state representation, and then reversely recovers the specific modal instance that meets the time constraint.

6. The method according to any one of claims 1 to 5, characterized in that, The step of dividing the original timing diagram (310) into time blocks includes: The edges in the original timing graph (310) are arranged in ascending order according to the timestamps and divided into multiple consecutive time blocks according to a preset block size; wherein the preset block size ensures that the total memory usage of local data in each time block is not greater than the L2 or L3 cache capacity of the processor. Synchronously output the time block / block metadata (330) of the corresponding time block, wherein the time block / block metadata (330) includes the start position, end position, minimum timestamp and maximum timestamp; The step of locating the target time block using the current valid time window includes: using a binary search method to locate the set of target time blocks that intersect with the current valid time window in the time block / block metadata (330).

7. The method according to any one of claims 1 to 6, characterized in that, The optimization method operates on a multi-core CPU platform and is controlled by underlying resource constraints, including: The initial search task is distributed to the thread-local task queue (232) corresponding to each worker thread; when a worker thread's local task is exhausted, a work-stealing scheduling action is triggered to obtain search tasks from other worker threads; The memory access and addressing actions initiated during the intersection operation in conjunction with the block index are, under the constraints of a non-consistent memory access architecture, primarily limited to the local memory space belonging to the same physical node.

8. An optimization system for time series graph subgraph matching, characterized in that, include: The preprocessing module (210) is used to divide the original time sequence graph (310) into time blocks, and to aggregate and compress edges with the same endpoints in each time block to generate intra-block polygon objects (340), and to construct a block index based on the intra-block polygon objects (340); The query processing module (220) is used to receive a query graph (320) with time constraints, perform a search using the edges in the query graph (320) as matching units, and maintain the current valid time window during the search process; The query processing module (220) specifically includes: The hotspot cache management unit (224) is used to construct a cache key based on the current data vertex pair to be matched and the current legal time window during the candidate generation stage, and to search in the hotspot cache to return the candidate polygon list when a match is found; and is used to trigger the action of writing the generated candidate polygon list into the hotspot cache when the current data vertex pair to be matched meets the preset hotspot conditions. The block intersection unit (223) is used to locate the target time block using the current valid time window when the hot spot cache is not hit, and to perform an intersection operation in the target time block in combination with the block index to generate a candidate polygon list.

9. An electronic device, characterized in that, The method includes a processor, a memory, and a computer program stored in the memory and capable of running on the processor, wherein when the computer program is executed by the processor, it implements the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method described in any one of claims 1 to 7.

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