Storage controller and method of operating the same
By introducing a storage controller into the electronic system and optimizing the data transmission path, data is sent to a high-efficiency secondary host processor or memory device, thus solving the problem of main processor operating overhead and improving system efficiency.
CN122363602APending Publication Date: 2026-07-10SAMSUNG ELECTRONICS CO LTD
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Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SAMSUNG ELECTRONICS CO LTD
- Filing Date
- 2025-07-30
- Publication Date
- 2026-07-10
AI Technical Summary
Technical Problem
In electronic systems that include multiple processors and storage devices, the operating overhead of the main processor still exists, even though the processing workload of the main processor has been reduced.
Method used
A storage controller, including a host interface and a storage processor, is used to receive write requests and address translation information, optimize the data transmission path, and send data to a high-efficiency second host processor or memory device, thereby reducing the operating overhead of the main processor.
Benefits of technology
By optimizing data transmission paths, the overhead of the main processor is reduced, system-level efficiency is improved, and the overall performance of the electronic system is enhanced.
✦ Generated by Eureka AI based on patent content.
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Figure CN122363602A_ABST
Abstract
A storage controller is disclosed that includes a host interface and a storage processor. The host interface receives a write request, a write logical address range, and write data from a first host processor and receives first address translation information between the write logical address range and a storage region of a second host memory device associated with a second host processor. The storage processor sends the write data to at least one non-volatile memory of a storage device and sends the write data to the second host memory device based on receiving a read request for the write data and the first address translation information from the first host processor.
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