Inverter carrier frequency synchronization method, power grid system, charging pile and storage medium

Abstract

This application provides an inverter carrier frequency synchronization method, a power grid system, a charging pile, and a storage medium, belonging to the field of power technology. The method includes: acquiring an inductor sampling current, which is obtained by sampling a filter inductor located at the power output terminal of the target inverter according to a preset sampling frequency; determining the actual current ripple based on the inductor sampling current; and adjusting the actual carrier frequency of the target inverter in response to the actual current ripple and the theoretical high-frequency ripple component satisfying a preset carrier frequency adjustment condition. The carrier frequency adjustment condition indicates that the error between the actual current ripple and the theoretical high-frequency ripple component is within a preset component error range, so that the actual carrier frequency and the desired carrier frequency of the target inverter are within the frequency error range. This application embodiment can achieve carrier frequency synchronization between parallel inverters while considering deployment difficulty, application cost, and synchronization stability.

Description

Technical Field

[0001] This application relates to the field of power technology, and in particular to an inverter carrier frequency synchronization method, a power grid system, a charging pile, and a storage medium. Background Technology

[0002] Inverter parallel operation technology is widely used in photovoltaic power generation systems, uninterruptible power supplies (UPS), energy storage systems, and AC microgrids, aiming to improve system capacity, reliability, and redundancy through the collaborative operation of multiple inverters. However, in parallel systems, the high-frequency carrier frequency synchronization between inverters has always been a key technical challenge restricting system performance. Existing technologies for achieving carrier frequency synchronization between multiple inverters in parallel operation include wired synchronization, high-precision external clock sources, or software phase-locked loops (PLLs). However, these three methods cannot simultaneously address hardware deployment difficulty, application cost, and synchronization stability. Therefore, there is an urgent need for an inverter carrier frequency synchronization method that can balance deployment difficulty, application cost, and synchronization stability. Summary of the Invention

[0003] The main objective of this application is to propose an inverter carrier frequency synchronization method, a power grid system, a charging pile, and a storage medium that can achieve carrier frequency synchronization between parallel inverters while taking into account deployment difficulty, application cost, and synchronization stability.

[0004] To achieve the above objectives, a first aspect of this application provides an inverter carrier frequency synchronization method, the method comprising: The inductor sampling current is obtained by sampling the filter inductor located at the power supply output terminal of the target inverter according to a preset sampling frequency. The actual current ripple of the current frequency adjustment cycle is determined based on the inductor sampling current. Within the current frequency adjustment cycle, in response to the actual current ripple and theoretical high-frequency ripple components satisfying the preset carrier frequency adjustment conditions, the actual carrier frequency of the target inverter is adjusted. The carrier frequency adjustment condition indicates that the error between the actual current ripple and the theoretical high-frequency ripple component is within a preset component error range, so that the actual carrier frequency and the desired carrier frequency of the target inverter are within the frequency error range.

[0005] To achieve the above objectives, a second aspect of this application provides a power grid system, comprising: Multiple target inverters, each of which includes an inverter bridge circuit and a control chip, wherein the control chip is connected to the control terminal of the switching transistor in the corresponding inverter bridge circuit to control the switching transistor to turn on or off according to a preset carrier frequency; The filter inductors are configured one-to-one with the inverter bridge circuits. The input terminals of the filter inductors are connected to the power supply output terminals of the corresponding inverter bridge circuits, and the output terminals of each filter inductor are connected in parallel. A sampling circuit is used to sample the filter inductor according to a preset sampling frequency to obtain the inductor sampling current; Each of the control chips is also used to perform the inverter carrier frequency synchronization method as described in any of the first aspects.

[0006] To achieve the above objectives, a third aspect of this application provides a charging pile, comprising: Multiple target inverters, each of which includes an inverter bridge circuit and a control chip, wherein the control chip is connected to the control terminal of the switching transistor in the corresponding inverter bridge circuit to control the switching transistor to turn on or off according to a preset carrier frequency; The filter inductors are configured one-to-one with the inverter bridge circuits. The input terminals of the filter inductors are connected to the power supply output terminals of the corresponding inverter bridge circuits, and the output terminals of each filter inductor are connected in parallel. A sampling circuit is used to sample the filter inductor according to a preset sampling frequency to obtain the inductor sampling current; Each of the control chips is also used to perform the inverter carrier frequency synchronization method as described in any of the first aspects.

[0007] To achieve the above objectives, a fourth aspect of the present application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the inverter carrier frequency synchronization method described in any of the first aspects.

[0008] This application proposes an inverter carrier frequency synchronization method, a power grid system, a charging pile, and a storage medium. By sampling the inductor current obtained from the filter inductor at the power output terminal of each target inverter, and using the actual current ripple and theoretical high-frequency ripple components obtained from the inductor sampling current, it determines whether the target inverter meets the carrier frequency conditions. This allows each target inverter to independently adjust its own carrier frequency, making deployment easier and primarily involving adjustments to the software control method of the target inverter, resulting in lower application costs. Furthermore, since the actual current ripple is determined based on the current at the output terminal of the filter inductor, it can more stably and quickly determine whether the carrier frequency deviation is caused by crystal oscillator differences, temperature drift, aging, etc. Therefore, compared with related technologies, the embodiments of this application can achieve carrier frequency synchronization between parallel inverters while considering deployment difficulty, application cost, and carrier frequency synchronization stability. Attached Figure Description

[0009] Figure 1 This is a flowchart illustrating an embodiment of the inverter carrier frequency synchronization method provided in this application; Figure 2 This is a schematic diagram illustrating the application process of an embodiment of the inverter carrier frequency synchronization method provided in this application; Figure 3 This is a schematic diagram of the adjustment process of an embodiment of the inverter carrier frequency synchronization method provided in this application; Figure 4 This is a schematic diagram of the structure of a power grid system corresponding to the inverter carrier frequency synchronization method provided in this application; Figure 5 This is a network diagram of the target inverter in one embodiment of the power grid system and charging pile corresponding to the inverter carrier frequency synchronization method provided in this application; Figure 6 This is a schematic diagram of the hardware structure of the electronic device to which the inverter carrier frequency synchronization method provided in this application embodiment is applied. Detailed Implementation

[0010] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0011] It should be noted that although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first," "second," etc., in the specification, claims, and the aforementioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0012] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0013] The following is a Chinese and English explanation of the terms used in the embodiments of this application: PWM stands for Pulse Width Modulation.

[0014] Carrier frequency: The reference high-frequency signal frequency used in PWM modulation to compare with the modulating signal and determine the pulse repetition rate.

[0015] Power switch frequency: The number of times a power switch turns on and off per second.

[0016] Parallel inverter operation technology is widely used in photovoltaic power generation systems, uninterruptible power supplies (UPS), energy storage systems, and AC microgrids, aiming to improve system capacity, reliability, and redundancy through the collaborative operation of multiple inverters. However, in parallel systems, the high-frequency carrier frequency synchronization between inverters has always been a key technical challenge restricting system performance. Under conventional PWM modulation, each inverter operates at its own carrier frequency. Due to manufacturing tolerances, temperature drift, and aging factors in the crystal oscillators within the control chips of each inverter, even if the initial frequency settings are consistent, carrier frequency deviations will occur after long-term operation. This inconsistent carrier frequency deviation leads to misalignment of the output pulse edges of each inverter, resulting in high-frequency circulating currents in the parallel circuit. These high-frequency circulating currents not only increase system losses and reduce conversion efficiency but also cause additional temperature rises in components such as inductors and power devices, affecting system reliability and lifespan, and in severe cases, even triggering resonance or protection malfunctions. Therefore, existing technologies often require carrier frequency synchronization settings for multiple inverters connected in parallel. Existing technologies for carrier frequency synchronization include three methods: wired synchronization, high-precision external clock sources, and software phase-locked loops (PLLs). Wired synchronization uses dedicated communication lines (such as fiber optics or CAN buses) to transmit synchronization signals, achieving consistency in carrier frequency and phase. While this method achieves high-precision synchronization, it increases system wiring complexity and cost, and its reliability decreases over long distances or in environments with strong electromagnetic interference. High-precision external clock sources utilize high-stability crystal oscillators or GPS clocks as a unified clock source. This method results in high hardware deployment costs and still cannot completely eliminate synchronization errors caused by transmission delays and component differences. Software PLL synchronization locks the phase by sampling the output voltage, but this method is primarily for fundamental frequency synchronization and has limited effectiveness for high-frequency carrier synchronization, with slow dynamic response. Therefore, existing technologies for high-frequency carrier synchronization suffer from complex wiring, high costs, and insufficient long-term stability. Especially with the trend towards higher frequencies and higher power densities, achieving adaptive high-frequency carrier synchronization and circulating current suppression in inverter parallel systems without relying on wired connections has become a critical technological bottleneck that the industry urgently needs to overcome. Therefore, achieving carrier frequency synchronization between parallel inverters while considering hardware deployment difficulty, application cost, and synchronization stability is a pressing technical problem. Based on this, embodiments of this application provide an inverter carrier frequency synchronization method, a power grid system, a charging pile, and a storage medium, which can achieve carrier frequency synchronization between parallel inverters while simultaneously considering hardware deployment difficulty, application cost, and carrier frequency synchronization stability.

[0017] Understandably, referring to Figure 1 As shown, the inverter carrier frequency synchronization method provided according to the embodiments of this application includes: Step S100: Obtain the inductor sampling current. The inductor sampling current is obtained by sampling the filter inductor located at the power supply output terminal of the target inverter according to the preset sampling frequency. Step S200: Determine the actual current ripple of the current frequency adjustment cycle based on the inductor sampling current; Step S300: Within the current frequency adjustment cycle, in response to the actual current ripple and theoretical high-frequency ripple components satisfying the preset carrier frequency adjustment conditions, the actual carrier frequency of the target inverter is adjusted. Among them, the carrier frequency adjustment condition means that the error between the actual current ripple and the theoretical high-frequency ripple component is within the preset component error range, so that the actual carrier frequency and the desired carrier frequency of the target inverter are within the frequency error range.

[0018] By sampling the inductor current at the power output terminal of each target inverter, and using the actual current ripple and theoretical high-frequency ripple components obtained from the inductor sampling current, it is determined whether the target inverter meets the carrier frequency condition. This allows each target inverter to independently adjust its own carrier frequency, making deployment easier and mainly involving adjustments to the software control method of the target inverter, resulting in lower application costs. Furthermore, since the actual current ripple is determined based on the current at the output terminal of the filter inductor, it is possible to more stably, quickly, and accurately determine whether the carrier frequency deviation is caused by crystal oscillator differences, temperature drift, aging, etc. Therefore, the embodiments of this application can achieve carrier frequency synchronization between parallel inverters while taking into account deployment difficulty, application cost, and carrier frequency synchronization stability.

[0019] This application does not limit how the inductor sampling current is sampled. For example, in some embodiments, an ADC chip is used for AD sampling. This application does not limit the sampling frequency setting. Those skilled in the art can selectively set it according to the required accuracy. For example, in some embodiments, the sampling frequency is set to be greater than or equal to 10 times the desired carrier frequency.

[0020] The actual current ripple is the ripple current separated from the inductor sampling current.

[0021] The theoretical high-frequency ripple component represents the maximum high-frequency ripple current that the target inverter can achieve under ideal operating conditions by controlling the switching of the power switching transistors at the desired carrier frequency. This application does not limit how the theoretical high-frequency ripple component is obtained; it can be calculated based on the ripple current calculation formula or obtained through experimental simulation. This application does not impose any restrictions on this. Those skilled in the art can selectively configure it according to actual needs.

[0022] The embodiments of this application do not limit how the component error range is set. It can be a specific value or it can be determined based on the redundancy coefficient of the theoretical high-frequency ripple component. The embodiments of this application do not limit this, and those skilled in the art can selectively set it according to actual needs.

[0023] This application does not limit how the target inverter adjusts the actual carrier frequency. In some embodiments, the frequency can be adjusted once according to a preset step size each time the conditions are met in each adjustment cycle. In the next frequency adjustment cycle, it is determined whether to continue adjusting based on the actual current ripple and theoretical high-frequency ripple component generated by the adjusted carrier frequency. Thus, through multiple frequency adjustment cycles, the desired carrier frequency in the actual carrier frequency domain is kept within the frequency error range. In other embodiments, each time the conditions are not met, the desired actual carrier frequency can be calculated based on the error between the actual current ripple and the theoretical high-frequency ripple component. Then, the adjustment is performed within the same frequency adjustment cycle, and the above steps are repeated. This application does not limit the implementation of this method.

[0024] Understandably, based on the inductor sampling current, the actual current ripple of the current adjustment cycle is determined, including: The maximum and minimum sampling currents for the current frequency adjustment period are determined from the inductor sampling currents collected within a preset first time period. The peak-to-peak value of the current is obtained based on the maximum and minimum sampling currents; The peak-to-peak value of the current is filtered by AC component filtering to obtain the actual current ripple of the current adjustment period.

[0025] The first duration can be set as a multiple of the period duration corresponding to the carrier frequency. In this application embodiment, there is no limit to the specific value of the multiple. For example, if the carrier frequency is set to 20kHz and the first duration is set to 1 times the period duration corresponding to the carrier frequency, then the first duration is 50µs.

[0026] This application does not limit how AC component filtering is performed. In some embodiments, a digital bandpass filter with a center frequency set to the desired carrier frequency can be used for filtering. By setting the center frequency of the digital bandpass filter to the desired carrier frequency, the high-frequency ripple current can be separated, thereby obtaining the actual current ripple. In other embodiments, signal processing algorithms can also be used, which will not be elaborated upon in this application.

[0027] Understandably, obtaining the theoretical high-frequency ripple component includes: Obtain the bridge arm output voltage of the target inverter at the target duty cycle, the switching frequency of the power transistors in the target inverter, and the inductance value of the filter inductor; where the target duty cycle is the power transistor duty cycle corresponding to the maximum actual current ripple generated by the target inverter during operation. The theoretical high-frequency ripple component is obtained based on the bridge arm output voltage, switching transistor frequency, and inductance value.

[0028] The ripple current calculation formula can improve the convenience of obtaining the theoretical high-frequency ripple component, thereby reducing the cost of applying this method.

[0029] This application does not limit how the target duty cycle is set. In some embodiments, it can be set based on human experience. This application will not elaborate on these points.

[0030] The bridge arm output voltage characterizes the average voltage output by the bridge arm of the target inverter within one power switching cycle. Since the instantaneous grid voltage is close to zero at the target duty cycle, the current calculated by directly substituting the bridge arm output voltage, switching frequency, and filter inductor value into the ripple current calculation formula can be considered as the theoretical high-frequency ripple component. In some embodiments, the ripple current calculation formula is as follows: ;in, Represents the theoretical high-frequency ripple component; Indicates the output voltage of the bridge arm; Indicates the target duty cycle. Indicates the switching frequency; This indicates the inductance value of the filter inductor.

[0031] Understandably, the target inverter uses a bipolar or unipolar PWM inverter bridge; the bridge arm output voltage is determined through the following steps: Obtain the DC bus voltage of the target inverter; The bridge arm output voltage is obtained based on the DC side bus voltage and the target duty cycle.

[0032] For a bipolar PWM inverter bridge circuit, the output to the filter inductor is a signal with an amplitude of [missing value]. The PWM wave; for a unipolar PWM inverter bridge, the output to the filter inductor is a wave with an amplitude of The PWM wave. Among them, This refers to the DC bus voltage of the target inverter. Taking a bipolar PWM inverter bridge as an example, this refers to the period during which the power transistors are on in the inverter bridge circuit (i.e.,...). Assuming the voltage output by the bridge arm is high, The instantaneous value of the grid voltage is At this time, the voltage across the filter inductor is At this point, according to the inductance formula... It can be seen that the current in the filter inductor will increase linearly, and the increase is... During the power transistor turn-off period in an inverter bridge circuit The voltage output by the bridge arm becomes low, which is... Correspondingly, the voltage across the filter inductor The current decreases linearly, where the decrease in current equals the increase in current under steady state. Therefore, the peak-to-peak value of the ripple current... It is equal to twice the magnitude of the increase or decrease, that is... In PWM where the duty cycle varies sinusoidally, the grid voltage instantaneously approaches 0 when the maximum ripple current occurs, that is... ,therefore, , that is ,in, This is the output voltage of the bridge arm. When the target duty cycle is 0.5, .

[0033] Understandably, in response to the actual current ripple and theoretical high-frequency ripple components satisfying the preset carrier frequency adjustment conditions, the actual carrier frequency of the target inverter is adjusted, including: When the actual current ripple is greater than the theoretical high-frequency ripple component of the preset first multiple, the actual carrier frequency of the target inverter is adjusted. Among them, the first multiple is greater than 1 and less than 2.

[0034] This application does not limit the specific value of the first multiple in its embodiments; in some embodiments, the first multiple is set to 1.2. By setting the first multiple based on the theoretical high-frequency ripple component as the judgment condition for carrier frequency adjustment, the component error range can follow the changes in the theoretical high-frequency ripple component, resulting in higher adaptability and further improving the accuracy of actual carrier frequency adjustment.

[0035] Understandably, the actual current ripple is obtained according to a preset frequency adjustment period, and the actual carrier frequency of the target inverter is adjusted, including: The actual current ripple of the current frequency adjustment cycle and the actual current ripple of the previous frequency adjustment cycle are used to determine the adjustment step base of the current frequency adjustment cycle. Based on the carrier frequency adjustment trend and adjustment step base of the previous frequency adjustment cycle, the actual carrier frequency of the target inverter is adjusted.

[0036] The carrier frequency adjustment trend indicates whether the actual carrier frequency in the previous and current frequency adjustment cycles has increased or decreased. The carrier frequency adjustment trend can be determined based on the magnitude of the actual carrier frequency in the previous and current frequency adjustment cycles. It is used to determine whether the adjustment direction of the target inverter is correct.

[0037] The adjustment step base can be selected from a preset pre-configured step base, with different pre-configured step bases set for correct and incorrect adjustments. In some embodiments, if it is determined that the high-frequency ripple current increases for two consecutive frequency adjustment cycles in the current frequency adjustment cycle, it indicates that the adjustment is correct and a first pre-configured step base needs to be selected as the adjustment step base for the current frequency adjustment cycle. In this case, if the carrier frequency adjustment trend of the actual carrier frequency is increasing, the actual carrier frequency is reduced based on the first pre-configured step base. In other embodiments, if it is determined that the high-frequency ripple current increases for two consecutive frequency adjustment cycles and decreases for two consecutive frequency adjustment cycles in the current frequency adjustment cycle, and the carrier frequency adjustment trend of the actual carrier frequency is decreasing, it indicates that the actual carrier frequency needs to be increased based on the first pre-configured step base. Similarly, in other embodiments, if it is determined that the high-frequency ripple current decreases for two consecutive frequency adjustment cycles in the current frequency adjustment cycle, it indicates that a second pre-configured step base needs to be selected as the adjustment step base for the current frequency adjustment cycle, and the actual carrier frequency is adjusted based on this adjustment step base. In some embodiments, after determining the adjustment step base, it is also determined whether there are consecutive opposite carrier frequency adjustment trends in the same adjustment process based on the carrier frequency adjustment trend. If so, the adjustment step base is reduced, thereby reducing the probability of repeated adjustments.

[0038] Understandably, obtaining the inductor sampling current includes: In response to entering the current frequency adjustment cycle, the control sampling circuit samples the filter inductor located at the power supply output terminal of the target inverter according to the preset sampling frequency to obtain the inductor sampling current; The frequency regulation period is the second multiple of the grid cycle corresponding to the target inverter.

[0039] This application does not limit the second multiple. In some embodiments, the value of the second multiple ranges from 5 to 10. In some embodiments, the second multiple is set to 5; in other embodiments, it is set to 10; and in still other embodiments, it is set to 7.5. This application will not elaborate on these specific details.

[0040] The power grid cycle represents the time required for alternating current to complete one full sine wave cycle.

[0041] For example, see below.Figure 2 The inverter carrier frequency synchronization method according to an embodiment of this application is described below, with the following specific steps: S1. Initialization Parameters: In some embodiments, the initialization parameters include configuring the desired carrier frequency and ripple current threshold (i.e., the first multiple of the theoretical high-frequency ripple component) in the target inverter. In other embodiments, the initialization configuration parameters may also include configuring the desired carrier frequency and the first multiple in the target inverter, so that real-time calculations can be performed based on the specific parameters of the target inverter. This application will not elaborate on these details. For example, when the target inverter is running, the desired carrier frequency is loaded as 20kHz and the first multiple is 1.2 through a configuration file or interface. In some embodiments, the initialization parameters also include configuring the AD sampling frequency and filter parameters, which will not be described in detail in this application.

[0042] S2. Real-time sampling to obtain the actual current ripple according to the frequency adjustment period: In some embodiments, each inverter connected in parallel serves as the target inverter, with a filter inductor at its power supply output terminal. A high-speed AD sampling circuit is deployed at the output terminal of the filter inductor to acquire the inductor current signal in real time, obtaining the inductor sampling current. Then, the high-frequency ripple current is separated through digital filtering or signal processing algorithms to obtain the actual current ripple for each frequency adjustment cycle. The actual current ripple can directly reflect the magnitude of the circulating current caused by carrier frequency asynchrony.

[0043] For example, taking a high-speed AD sampling circuit and a digital bandpass filter as an example, where the center frequency of the digital bandpass filter is the desired carrier frequency, the specific steps are as follows: The current AD value of the filter inductor within 50µs (20kHz frequency) is read in the high-speed AD sampling circuit (that is, the inductor sampling current). The difference between the maximum and minimum values ​​of the current AD value sampled within 50µs is taken as the peak-to-peak value of the current. The peak-to-peak value of the current is passed through a digital bandpass filter to extract the high-frequency ripple component, thus obtaining the actual current ripple of the current adjustment cycle. At this point, the actual current ripple can be represented as follows: ; in, Indicates the first Actual current ripple per frequency adjustment cycle The filter coefficients of a digital bandpass filter whose center frequency is the desired carrier frequency; Indicates the first The actual current ripple of each frequency adjustment cycle; Indicates the first Peak-to-peak current for each frequency adjustment cycle.

[0044] S3. Real-time acquisition of theoretical ripple current; For example, assuming a target duty cycle of 0.5, the ripple current calculation formula is then applied. We can obtain: Theoretical ripple current ; S4. Comparison and Decision-Making: The actual current ripple is compared with the theoretical ripple current to determine whether the current ripple exceeds the set allowable threshold. If the actual current ripple is significantly greater than the theoretical ripple current (e.g., actual current ripple > theoretical ripple current + component error threshold), it is determined that there is a significant circulating current, and carrier frequency adjustment is required.

[0045] Exemplary, in some embodiments, such as Figure 3 As shown, 1.2 times the theoretical ripple component is used as the judgment threshold for the actual current ripple. If the actual current ripple is greater than 1.2 times the theoretical ripple component, it is determined that there is circulating current and carrier frequency adjustment is required. Otherwise, it means that the first ripple component has been reduced to the allowable range: stop the adjustment and maintain the current carrier frequency.

[0046] S5, Adaptive carrier frequency adjustment: In some embodiments, it can be first determined whether the actual current ripple of the current frequency adjustment cycle is larger or smaller than that of the previous frequency adjustment cycle. If it is smaller, it means that the adjustment direction is correct and the carrier frequency needs to be finely adjusted along that direction. If the actual current ripple of the current frequency adjustment cycle is larger, it means that the synchronization point may have been crossed and the adjustment direction is incorrect. The carrier frequency needs to be adjusted in the opposite direction. In some embodiments, the frequency adjustment period can be set to 5-10 times the grid cycle. In some embodiments, the adjustment step base used for the adjustment direction under the same state is the same, while the adjustment step base used for the adjustment direction under different states is different. For example, in some embodiments, Fstep2 is used as the adjustment step base when the adjustment direction is determined to be incorrect, and Fstep1 is used as the step base when the adjustment is determined to be correct. Fstep2 and Fstep1 are different. In some embodiments, Fstep2 is 0.5 times Fstep1.

[0047] For example, see below. Figure 3 The specific adjustment process of the embodiments of this application is described below: If the actual current ripple is determined to be 1.2 times greater than the theoretical ripple component, the following steps are performed: S5.1 Determine if the actual current ripple of the current frequency adjustment cycle has increased: that is, determine if the actual current ripple of the current frequency adjustment cycle is greater than the actual current ripple of the previous frequency adjustment cycle. If yes, jump to S5.2; otherwise, jump to S5.3.

[0048] S5.2 Determine whether the current actual carrier frequency is greater than that of the previous frequency adjustment period. If so, use the second pre-configured adjustment step base Fstep2 as the adjustment step base for the current frequency adjustment period, and use the difference between the actual carrier frequency and the adjustment step base as the adjusted carrier frequency for the current frequency adjustment period. If not, use the second pre-configured adjustment step base Fstep2 as the adjustment step base for the current frequency adjustment period, and use the sum of the actual carrier frequency and the adjustment step base as the adjusted carrier frequency for the current frequency adjustment period.

[0049] S5.3 Determine whether the current actual carrier frequency is greater than that of the previous frequency adjustment period. If so, use the first pre-configured adjustment step base Fstep1 as the adjustment step base for the current frequency adjustment period, and use the sum of the actual carrier frequency and the adjustment step base as the adjusted carrier frequency for the current frequency adjustment period. If not, use the first pre-configured adjustment step base Fstep1 as the adjustment step base for the current frequency adjustment period, and use the difference between the actual carrier frequency and the adjustment step base as the adjusted carrier frequency for the current frequency adjustment period.

[0050] S5.3. Write the adjusted carrier frequency to the carrier frequency register to update the PWM carrier frequency: Repeat steps S4 and S5 until the actual current ripple is less than or equal to 1.2 times the theoretical ripple component.

[0051] At this point, the above method in the embodiments of this application enables the parallel target inverters to achieve distributed coordination and convergence. Since each target inverter adjusts its frequency with the goal of reducing its own ripple, under the positive feedback mechanism, the carrier frequency of the entire system will gradually converge to a uniform frequency, and the high-frequency circulating current will be suppressed.

[0052] In summary, the synchronization method of this application embodiment has at least the following beneficial effects: 1) No hardware synchronization line required: Completely eliminates the wired connection required for traditional synchronization, reduces system complexity and cost, and improves installation flexibility, especially suitable for distributed or modular systems; 2) Strong adaptability: Through real-time ripple (i.e., actual current ripple and theoretical ripple components) feedback, it can automatically compensate for frequency deviations caused by crystal oscillator differences, temperature drift, aging, etc., and ensure synchronization accuracy during long-term operation. 3) Significant circulating current suppression effect: It directly targets the performance of high-frequency circulating current (i.e., actual current ripple) to suppress circulating current at the source, reduce system losses and thermal stress, and improve overall efficiency and reliability. 4) Fast dynamic response: The adjustment is based on high-frequency sampling and fast control cycle, which can respond to load changes or disturbances in a timely manner and maintain system stability; 5) Easy to implement and integrate: The algorithm can be implemented in existing inverter control chips (such as DSP and MCU) through software upgrades without changing the main circuit topology, which facilitates promotion and application.

[0053] Understandably, referring to Figure 4 As shown, a power grid system according to an embodiment of this application includes: Multiple target inverters, each including an inverter bridge circuit and a control chip, the control chip being connected to the control terminal of the switching transistor in the corresponding inverter bridge circuit to control the switching transistor to turn on and off according to a preset carrier frequency; The filter inductors are set one-to-one with the inverter bridge circuits. The input terminals of the filter inductors are connected to the power output terminals of the corresponding inverter bridge circuits, and the output terminals of each filter inductor are connected in parallel. The sampling circuit is used to sample the filter inductor according to a preset sampling frequency to obtain the inductor sampling current. Each control chip is also used to execute the inverter carrier frequency synchronization method described above.

[0054] In some embodiments, the filter inductor may be integrated into the target inverter, while in other embodiments it may be set independently of the target inverter. This application will not elaborate further on this aspect.

[0055] The embodiments of this application do not limit the structure of the sampling circuit. The sampling circuit can use an ADC chip for sampling, or it can be integrated into the target inverter or independent of the target inverter. The embodiments of this application do not limit this, and those skilled in the art can selectively set it according to the actual situation.

[0056] For example, such as Figure 4 As shown, taking the deployment of both the filter inductor and the sampling circuit as an example, such as... Figure 4 As shown, there are n target inverters, each target inverter The inverter bridge circuits all use filter inductors Parallel connection. A one-to-one correspondence is established between the sampling circuit and the filter inductor to collect the current from the filter inductor and supply it to the control chip of the target inverter. The parallel terminals of each filter inductor are used to power the load.

[0057] This application does not limit the type of power grid system; it can be any of a photovoltaic grid-connected and energy storage system, an uninterruptible power supply (UPS), or an AC microgrid and off-grid system. In some embodiments, the photovoltaic grid-connected and energy storage system can utilize parallel expansion of string inverters and power storage converters (PCS). In this case, the processing method based on the embodiments of this application can improve system output capacity and reliability. In some embodiments, the UPS can employ a parallel redundant system of modular UPS units. Using the method described in the above embodiments of this application for the inverters in the UPS can improve power quality and system maintainability. In some embodiments, the AC microgrid and off-grid system can utilize an islanded or grid-connected microgrid composed of multiple inverters. In this case, the method described in the embodiments of this application can achieve power sharing and stable operation. The embodiments of this application do not elaborate on each of these aspects; those skilled in the art can selectively configure the system according to actual needs.

[0058] It is understood that a charging pile according to an embodiment of this application includes: Multiple target inverters, each including an inverter bridge circuit and a control chip, the control chip being connected to the control terminal of the switching transistor in the corresponding inverter bridge circuit to control the switching transistor to turn on and off according to a preset carrier frequency; The filter inductors are set one-to-one with the inverter bridge circuits. The input terminals of the filter inductors are connected to the power output terminals of the corresponding inverter bridge circuits, and the output terminals of each filter inductor are connected in parallel. The sampling circuit is used to sample the filter inductor according to a preset sampling frequency to obtain the inductor sampling current. Each control chip is also used to execute the inverter carrier frequency synchronization method described above.

[0059] This application does not limit the type of charging pile. In some embodiments, it can be an electric vehicle charging pile. In some embodiments, the electric vehicle charging pile uses parallel-operated charging modules. The charging modules can achieve efficient current sharing and low ripple output by using an inverter that applies the method of this application.

[0060] This application does not limit the connection results between the target inverter and the sampling circuit and control chip in either the power grid system or the charging pile. For example, taking the networking of a single target inverter as an example, such as... Figure 5 As shown, the target inverter includes an inverter bridge circuit and a control chip. The output of the inverter bridge circuit is connected to a filter inductor. ; The output terminal of the circuit is connected to the acquisition terminal of the sampling circuit, the output terminal of the sampling circuit is connected to the control chip, and the control chip is connected to the control terminal of the inverter bridge circuit to control the switching of the power switching transistors of the inverter bridge circuit. This application does not limit the number or networking of power switching transistors in the inverter bridge circuit; those skilled in the art can selectively configure them according to actual needs. The power switching transistors can be MOSFETs.

[0061] This application also provides an electronic device including: at least one processor and at least one memory; the memory is used to store at least one program; when the at least one program is executed by the at least one processor, the above-described inverter carrier frequency synchronization method is implemented.

[0062] Please see Figure 6 , Figure 6 The hardware structure of an electronic device according to another embodiment is illustrated. The electronic device includes: The processor 401 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application. The memory 402 can be a NAND flash memory. The relevant program code is stored in the memory 402 and is called by the processor 401 to execute the inverter carrier frequency synchronization method of this application embodiment. Input / output interface 403 is used to implement information input and output; The communication interface 404 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). Bus 405 transmits information between various components of the device (e.g., processor 401, memory 402, input / output interface 403, and communication interface 404); The processor 401, memory 402, input / output interface 403 and communication interface 404 are connected to each other within the device via bus 405.

[0063] This application also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described inverter carrier frequency synchronization method.

[0064] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0065] The embodiments described in this application are for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided by the embodiments of this application. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this application are also applicable to similar technical problems.

[0066] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of this application, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0067] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0068] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0069] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0070] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0071] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of the units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0072] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0073] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0074] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes multiple instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing programs, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0075] The preferred embodiments of the present application have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of the embodiments of the present application shall be within the scope of the claims of the present application.

Claims

1. A method for synchronizing the carrier frequency of an inverter, characterized in that, The method includes: The inductor sampling current is obtained by sampling the filter inductor located at the power supply output terminal of the target inverter according to a preset sampling frequency. The actual current ripple of the current frequency adjustment cycle is determined based on the inductor sampling current. Within the current frequency adjustment cycle, in response to the actual current ripple and theoretical high-frequency ripple components satisfying the preset carrier frequency adjustment conditions, the actual carrier frequency of the target inverter is adjusted. The carrier frequency adjustment condition indicates that the error between the actual current ripple and the theoretical high-frequency ripple component is within a preset component error range, so that the actual carrier frequency and the desired carrier frequency of the target inverter are within the frequency error range.

2. The inverter carrier frequency synchronization method according to claim 1, characterized in that, The step of determining the actual current ripple of the current frequency adjustment period based on the inductor sampling current includes: The maximum and minimum sampling currents of the current frequency adjustment period are determined from the inductor sampling currents collected within a preset first time period. The peak-to-peak value of the current is obtained based on the maximum sampling current and the minimum sampling current; The peak-to-peak value of the current is filtered by AC component filtering to obtain the actual current ripple of the current adjustment period.

3. The inverter carrier frequency synchronization method according to claim 1, characterized in that, The acquisition of the theoretical high-frequency ripple component includes: The bridge arm output voltage of the target inverter at the target duty cycle, the switching frequency of the power switching transistors in the target inverter, and the inductance value of the filter inductor are obtained; wherein, the target duty cycle is the power transistor duty cycle corresponding to the maximum actual current ripple generated by the target inverter during operation. The theoretical high-frequency ripple component is obtained based on the bridge arm output voltage, the switching transistor frequency, and the inductance value.

4. The inverter carrier frequency synchronization method according to claim 3, characterized in that, The target inverter employs a bipolar or unipolar PWM inverter bridge; the bridge arm output voltage is determined through the following steps: Obtain the DC-side bus voltage of the target inverter; The bridge arm output voltage is obtained based on the DC side bus voltage and the target duty cycle.

5. The inverter carrier frequency synchronization method according to claim 1, characterized in that, The adjustment of the actual carrier frequency of the target inverter in response to the actual current ripple and the theoretical high-frequency ripple component satisfying a preset carrier frequency adjustment condition includes: When the actual current ripple is greater than the theoretical high-frequency ripple component by a preset first multiple, the actual carrier frequency of the target inverter is adjusted. Wherein, the first multiple is greater than 1 and less than 2.

6. The inverter carrier frequency synchronization method according to claim 1 or 5, characterized in that, The actual current ripple is obtained according to a preset frequency adjustment period, and the adjustment of the actual carrier frequency of the target inverter includes: The adjustment step base for the current frequency adjustment cycle is determined based on the actual current ripple of the current frequency adjustment cycle and the actual current ripple of the previous frequency adjustment cycle. The actual carrier frequency of the target inverter is adjusted based on the carrier frequency adjustment trend of the previous frequency adjustment cycle and the adjustment step base.

7. The inverter carrier frequency synchronization method according to claim 1, characterized in that, The acquisition of the inductor sampling current includes: In response to entering the current frequency adjustment cycle, the control sampling circuit samples the filter inductor located at the power supply output terminal of the target inverter according to the preset sampling frequency to obtain the inductor sampling current; The frequency adjustment period is the second multiple of the grid cycle corresponding to the target inverter.

8. A power grid system, characterized in that, include: Multiple target inverters, each of which includes an inverter bridge circuit and a control chip, wherein the control chip is connected to the control terminal of the switching transistor in the corresponding inverter bridge circuit to control the switching transistor to turn on or off according to a preset carrier frequency; The filter inductors are configured one-to-one with the inverter bridge circuits. The input terminals of the filter inductors are connected to the power supply output terminals of the corresponding inverter bridge circuits, and the output terminals of each filter inductor are connected in parallel. A sampling circuit is used to sample the filter inductor according to a preset sampling frequency to obtain the inductor sampling current; Each of the control chips is further configured to perform the inverter carrier frequency synchronization method as described in any one of claims 1 to 7.

9. A charging pile, characterized in that, include: Multiple target inverters, each of which includes an inverter bridge circuit and a control chip, wherein the control chip is connected to the control terminal of the switching transistor in the corresponding inverter bridge circuit to control the switching transistor to turn on or off according to a preset carrier frequency; The filter inductors are configured one-to-one with the inverter bridge circuits. The input terminals of the filter inductors are connected to the power supply output terminals of the corresponding inverter bridge circuits, and the output terminals of each filter inductor are connected in parallel. A sampling circuit is used to sample the filter inductor according to a preset sampling frequency to obtain the inductor sampling current; Each of the control chips is further configured to perform the inverter carrier frequency synchronization method as described in any one of claims 1 to 7.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the inverter carrier frequency synchronization method according to any one of claims 1 to 7.

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