Integrated circuit parameter optimization method and system based on simulator sensitivity information
Patent Information
- Application Number
- CN202611133260.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-29
- Publication Date
- 2026-09-04
AI Technical Summary
[0003]然而,现有主流算法大多将底层仿真器视为“黑盒”,仅根据仿真返回的单一标量结果采用无偏向的随机游走策略
[0054] This invention reduces the random trial-and-error simulations inherent in traditional optimization methods. By directly utilizing the sensitivity information within the simulator, the algorithm can identify performance improvement directions during iteration. This sensitivity-driven guided search reduces traversal of the invalid parameter space, decreases the number of simulation iterations, saves computational resources, and accelerates chip development iteration. Simultaneously, this invention transforms the manual fine-tuning process, which previously relied on the intuition and experience of senior engineers, into a standardized machine computation process. This effectively avoids omissions and subjective judgment errors that are prone to occur in manual parameter tuning, lowers the barrier to entry for high-performance analog and RF integrated circuit design, and realizes the assetization and standardization of design knowledge and processes. Furthermore, the algorithm-driven mechanism of this invention, through deep integration of high-dimensional sensitivity information, possesses stronger foresight and deadlock prevention capabilities, and can adaptively balance multi-variable coupling relationships, overcoming the predicament of traditional algorithms easily getting trapped in local suboptimal solutions. This mechanism enables circuits with performance shortcomings to achieve significant improvements in key performance within a shorter iteration cycle, fully leveraging the performance advantages of the circuit topology and providing a design solution with high engineering accuracy and robustness.
Smart Images

Figure CN122693571A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of integrated circuit electronic design automation technology, specifically relating to a method and system for optimizing integrated circuit parameters based on simulator sensitivity information. Background Technology
[0002] In the field of integrated circuit design, with the evolution of semiconductor process nodes, various short-channel effects and severe small-size parasitic effects have led to complex nonlinear physical behavior in analog and radio frequency integrated circuits. Due to the strong interrelationships among key performance indicators and the requirement for circuits to maintain strict robustness under extreme operating conditions, performance constraint optimization is essentially a complex multi-objective, high-dimensional optimization problem. Traditionally, parameter fine-tuning in circuit topology design relies heavily on the designer's intuition and experience. This cycle of manual adjustment and simulation trial and error in high-dimensional parameter space is not only lengthy in its development cycle but also limited by the complexity of high-dimensional nonlinear mappings, typically yielding only partially satisfactory suboptimal solutions. To overcome the inefficiency of manual tuning, the industry has introduced automated optimization methods based on heuristic search.
[0003] However, most existing mainstream algorithms treat the underlying simulator as a "black box," employing an unbiased random walk strategy based solely on the single scalar result returned by the simulation. To ensure search coverage, this black-box mechanism relies on a large number of invalid iterative probes, leading to increased computational power consumption. Furthermore, existing mechanisms typically fail to fully utilize the underlying characteristic information generated by the simulator within matrix solving, such as the sensitivity of target performance to the influence of design variables. This limits the algorithm's convergence speed, making it prone to getting trapped in local optima in complex high-dimensional optimization. Summary of the Invention
[0004] To address the aforementioned technical problems, this invention proposes an integrated circuit parameter optimization method and system based on simulator sensitivity information. The aim is to establish a low-level data interaction mechanism between the optimization algorithm and the underlying circuit simulator. By extracting and utilizing the physical and electrical sensitivity information of the simulator during the solution process, a sensitivity information-guided intelligent optimization mechanism is constructed.
[0005] To achieve the above objectives, the present invention adopts the following technical solution:
[0006] In a first aspect, the present invention provides a method for optimizing integrated circuit parameters based on simulator sensitivity information, comprising the following steps:
[0007] S1. Obtain the design parameters, constraints, and target performance requirements of the object to be optimized, determine the adjustable parameter range, and establish a parameterized description model;
[0008] S2. Based on the parameterized description model, call the simulator to perform simulation calculations and obtain the performance response data of the object to be optimized and the sensitivity information corresponding to the design parameters;
[0009] S3. Determine whether the current design state meets the optimization requirements based on the performance response data; if it does, output the current design parameters; if it does not, analyze the impact of parameter changes on performance indicators based on the sensitivity information, determine the parameter adjustment direction and adjustment strategy, and generate new design parameters.
[0010] S4. Re-enter the updated design parameters into the simulator for iterative optimization, and adjust the optimization strategy according to the performance changes during the iteration process until the preset termination condition is met.
[0011] The design parameters include at least one of the following: active device size parameters; passive structure size parameters; circuit connection parameters; bias condition parameters; and process-related parameters.
[0012] The target performance requirements in S1 include at least one electrical performance index, and multiple performance indexes obtained from simulation are comprehensively evaluated by a preset evaluation function;
[0013] Let the design parameter vector be ,in Extract the number of parameters to be optimized. Electrical performance indicators The target value for each indicator is Then the evaluation function Represented as:
[0014] ;
[0015] in, The preset weighting coefficient for the i-th performance index is... Let j be the current calculated value of the j-th constraint. Corresponding constraint boundary values, The penalty coefficient is... The function is used to generate a positive penalty term when a constraint is violated;
[0016] The evaluation function generates a comprehensive evaluation result for optimization decision-making by performing index normalization, weight combination, and constraint penalties.
[0017] The sensitivity information in S2 is used to characterize the correlation between changes in design parameters and changes in performance indicators, and is obtained through at least one of the following methods:
[0018] The sensitivity analysis function provided by the simulator is used to obtain the results.
[0019] Obtained based on parameter perturbation simulation;
[0020] This was obtained based on the analysis of multiple simulation results;
[0021] Obtained based on predictions using historical optimized data;
[0022] The sensitivity information is represented in the form of a sensitivity matrix S:
[0023] ;
[0024] Among them, elements Represents the j-th design parameter When changing Performance indicators The rate of change.
[0025] The parameter adjustment strategy determined in S3 based on sensitivity information specifically includes:
[0026] The degree of influence of different design parameters contained in the sensitivity information on the target performance indicators.
[0027] Sort the parameter adjustment priorities;
[0028] Based on the relationships between the parameters, multiple parameters are adjusted jointly;
[0029] The parameter update magnitude is adaptively adjusted based on the performance change trend during the optimization process.
[0030] The parameter update is performed according to the following rules:
[0031] ;
[0032] in, For the first The design parameter vector during round iteration, The step size is adaptively adjusted for the current iteration step. To comprehensively evaluate the function on the parameter vector Total gradient, dimension .
[0033] Due to the comprehensive evaluation function The total gradient, comprising a performance error objective term based on absolute value and a constraint penalty term based on a penalty function, is analytically derived as a sum of two parts:
[0034] ;
[0035] In the above formula, This is the transpose of the sensitivity matrix at the current operating point; Let be the vector of partial derivatives of the objective term with respect to each performance index, and let its i-th... Each component introduces a sign function to indicate the direction of the error, expressed as:
[0036] ;
[0037] in, Penalty terms for design parameters The direct gradient vector, independent of the sensitivity matrix, is the first... Each design parameter component is represented as:
[0038] ;
[0039] The adaptive adjustment step size Dynamically adjust based on the numerical characteristics of the sensitivity matrix: shrink when the sensitivity shows drastic distortion. The upper limit increases when the sensitivity is flat. .
[0040] The parameter update also includes parameter decoupling through orthogonal transformation:
[0041] Through orthogonal transformation matrix Original design parameter vector Mapping to the decoupled feature subspace The transformation relationship is as follows The sensitivity matrix is transformed into this characteristic subspace as follows: After parameter decoupling is completed, inverse transformation is performed. Map the updated results back to the original parameter space.
[0042] In step S4, if a parameter update is detected during the iteration process, resulting in simulation failure, calculation anomaly, or a performance index reduction exceeding a preset range, the system restores the system to the valid design state before the update and shrinks the upper limit of the allowed parameter adjustment step size to adjust the subsequent parameter update strategy.
[0043] Secondly, the present invention provides an integrated circuit parameter optimization system based on simulator sensitivity information, comprising:
[0044] The parsing and initialization module is used to obtain design parameters and constraints and to build a parametric model;
[0045] The simulation and evaluation module is used to call the simulator to obtain design performance response and sensitivity information, and to perform evaluation.
[0046] The algorithm optimization module is used to adjust the direction based on the sensitivity information analysis parameters and generate new design parameters;
[0047] The convergence verification module is used to control parameter updates, status judgment, and optimization result output.
[0048] The simulation and evaluation module includes a parallel task scheduling unit, which is used to execute multiple parameter perturbation simulation tasks simultaneously to obtain the sensitive relationship between design parameters and performance indicators.
[0049] The algorithm optimization module includes:
[0050] The data analysis unit is used to process simulation data and extract the characteristics affecting parameters;
[0051] An optimized computing unit is used to generate a parameter update scheme based on the parameter influence characteristics;
[0052] The feedback adjustment unit is used to adjust the optimization process based on the results of historical iterations.
[0053] Compared with the prior art, the beneficial effects of the present invention are:
[0054] This invention reduces the random trial-and-error simulations inherent in traditional optimization methods. By directly utilizing the sensitivity information within the simulator, the algorithm can identify performance improvement directions during iteration. This sensitivity-driven guided search reduces traversal of the invalid parameter space, decreases the number of simulation iterations, saves computational resources, and accelerates chip development iteration. Simultaneously, this invention transforms the manual fine-tuning process, which previously relied on the intuition and experience of senior engineers, into a standardized machine computation process. This effectively avoids omissions and subjective judgment errors that are prone to occur in manual parameter tuning, lowers the barrier to entry for high-performance analog and RF integrated circuit design, and realizes the assetization and standardization of design knowledge and processes. Furthermore, the algorithm-driven mechanism of this invention, through deep integration of high-dimensional sensitivity information, possesses stronger foresight and deadlock prevention capabilities, and can adaptively balance multi-variable coupling relationships, overcoming the predicament of traditional algorithms easily getting trapped in local suboptimal solutions. This mechanism enables circuits with performance shortcomings to achieve significant improvements in key performance within a shorter iteration cycle, fully leveraging the performance advantages of the circuit topology and providing a design solution with high engineering accuracy and robustness. Attached Figure Description
[0055] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments are briefly introduced below.
[0056] Figure 1 This is a flowchart of the automatic parameter optimization method in the embodiment;
[0057] Figure 2 This is a block diagram of the automatic parameter optimization system in the embodiment;
[0058] Figure 3This is a schematic diagram of part of the netlist contents of the operational transconductance amplifier in the example;
[0059] Figure 4 This is the gain curve of the operational transconductance amplifier in the initial state in the example;
[0060] Figure 5 This is a schematic diagram of the sensitivity simulation results of the operational transconductance amplifier in the example;
[0061] Figure 6 This is the gain curve of the operational transconductance amplifier after iterative optimization in the example. Detailed Implementation
[0062] To make the objectives, technical solutions, and advantages of this invention clearer, the specific embodiments of this invention will be described in detail below with reference to the accompanying drawings. The following embodiments are for illustrative purposes only and should not be considered as limiting the scope of this invention. Those skilled in the art can make various modifications or equivalent substitutions to the embodiments without departing from the concept of this invention, but all such modifications or substitutions should fall within the protection scope of this invention.
[0063] For ease of explanation, the underlying workflow steps, core algorithm mechanism, and system module architecture involved in this invention are analyzed in detail below. However, it should be understood that the specific execution order of each step and the physical deployment of system modules can be adaptively and dynamically adjusted according to actual engineering needs. It should be understood that the automatic parameter optimization method and system based on simulator sensitivity information proposed in this invention has underlying execution logic independent of specific semiconductor manufacturing processes. Whether it is traditional CMOS processes, advanced FinFET processes, nodes based on all-around gate architecture, or compound semiconductor processes such as silicon germanium and gallium arsenide, high underlying compatibility can be achieved. This method is also not limited to a specific analog, RF, or mixed-signal circuit topology. Furthermore, this method has high underlying compatibility and scalability at the software architecture level, and can be mounted, embedded, or bridged to various mainstream commercial high-precision circuit simulators and electromagnetic simulators through standard application programming interface protocols. The “design variables” mentioned in this invention refer to all physical and electrical parameters in the circuit netlist that can be quantified and allowed to be continuously or discretely adjusted within a certain physical space. These parameters include, but are not limited to: the physical channel width, channel length, number of finger crossings, and multiplication factor of various active devices; the geometric perimeter dimensions and metal layer properties of passive devices; and the absolute amplitude settings of bias voltage sources or current sources used to set the static operating point of the circuit.
[0064] Example 1
[0065] Reference Figure 1This system provides an integrated circuit parameter optimization method based on simulator-sensitive information. Its underlying workflow begins with a high-dimensional netlist parsing and parameter space initialization phase (S1). In this phase, which determines the overall optimization perspective, the system's underlying automated netlist parsing engine deeply intervenes, completely and accurately reading the original circuit's netlist file and its associated technical specification constraint files. During this large-scale data import process, the parsing engine automatically filters out non-critical text comments and physical redundancy information from the netlist, retaining only the core circuit topology, device interconnections, and port definition information. Through structured scanning and pattern matching, the system automatically identifies and extracts the set of device parameters to be optimized specified by the designer, thereby constructing a complex and deeply interwoven high-dimensional design variable space within the underlying mathematical model.
[0066] In the process of constructing this ultra-high-dimensional space, let the design parameter vector be... ,in This represents the number of parameters to be optimized. For each independent design variable in this vector, the system strictly checks the physical requirements and the physical limits defined by the designer based on engineering experience according to the design rules in the process document. It assigns legal and rigorous upper and lower limits for continuous or discrete values to each variable, thereby constructing a high-safety boundary to ensure that all subsequent evolution, mutation, and exploration actions of the algorithm engine are carried out within the convergent physical boundary, avoiding the generation of invalid parameter combinations that cannot be realized at the semiconductor manufacturing physical level.
[0067] At the same time, the system will deeply analyze the circuit design specifications and extract the key performance indicators that need to be optimized simultaneously. Let the system extract... Electrical performance indicators The target value for each indicator is Because different circuit performance indicators vary significantly in dimensions, orders of magnitude, and optimization directions, the system uses a built-in advanced nonlinear mapping mechanism to dynamically normalize all actual performance test values across different dimensions against the expected target values. Subsequently, it combines the weights of various indicators preset by the designers. Based on priority, the system constructs a comprehensive evaluation function. Represented as:
[0068] ;
[0069] in, This is the current calculated value of the j-th constraint (such as power consumption limit, area limit, etc.). Corresponding constraint boundary values, The penalty coefficient is... The function generates a positive penalty term when constraints are violated. This evaluation function transforms normalized, scattered data into a comprehensive system state evaluation index that can be globally assessed. During the fine-grained construction of this evaluation index, to avoid situations where a single performance indicator outperforms the expected indicator, leading to severe degradation of other key indicators, the system introduces a dynamic penalty mechanism targeting physical boundaries and special operating areas through the penalty term in the above formula. Once the system detects a trend where the current parameter combination leads to a violation of circuit operating conditions, the evaluation index will promptly generate feedback, thus forming a numerical penalty boundary at the algorithm level. After completing the rigorous spatial construction and evaluation system initialization, the system generates the first round of parameterized netlists, automatically formatting them into the standard syntax required by the corresponding target simulator, thereby completing the environment configuration and handshake communication with the underlying simulator.
[0070] Next, the system will proceed to the simulation verification and feature extraction phase (S2) of this invention. The system accurately injects the high-dimensional parameter combination of the current iteration into the temporarily updated netlist and issues a co-simulation command covering a specific analysis domain to the underlying circuit simulator. Within the lifecycle of a single simulation execution, this system not only directly obtains conventional macroscopic electrical performance values used to evaluate whether the circuit currently meets the standards, but more importantly, the system utilizes a highly customized extraction mechanism to actually complete the simulation verification of macroscopic performance and the extraction of underlying sensitivity feature data simultaneously in the same simulation solution process. This means that while the simulator solves the nonlinear differential equation system and outputs the current static operating point and dynamic response results, the system simultaneously extracts the physical and electrical sensitivity mapping data of all target performances relative to the entire vast design variable space at once through a specific underlying internal interface protocol, direct memory state reading, or an adaptive finite difference mechanism based on a minimal perturbation matrix.
[0071] This crucial sensitivity mapping data, acquired concurrently through a single simulation, is highly abstracted within the system and constructed as a high-dimensional tensor structure. Specifically, the sensitivity matrix S constructed by the system is defined as... ;
[0072] Among them, elements Represents the j-th design parameter When small changes occur, the first Performance indicators The rate of change. This matrix comprehensively and with high precision records the extent and direction to which a small change in a local physical parameter will cause numerical flow and directional shift in one or more macroscopic performance indicators under the current complex nonlinear operating point of the circuit. This large amount of sensitivity data constitutes a physical sensitivity field with clear directionality in the high-dimensional parameter space, depicting the local topography and undulation of the current nonlinear parameter space, and providing sensitive information with clear physical meaning and high confidence to guide the evolution direction selection of subsequent algorithms.
[0073] Based on the synchronously extracted macroscopic performance results, the system first determines whether the current circuit configuration meets all the threshold indicators set in the design specifications. If the determination is not yet met, the system immediately sends the sensitive data stream to the algorithm-driven optimization engine for high-frequency calculation of the next-generation optimal parameter evolution vector (S3). To effectively overcome the inherent algorithmic problems that are very easy to occur when processing large-scale complex analog and RF integrated circuits, such as severe numerical oscillations, iterative divergence, and getting trapped in local suboptimal extreme values, the optimization engine of this invention integrates customized and robust nonlinear multi-objective processing logic.
[0074] First, to achieve adaptive suppression of sensitive abnormal fluctuations, the algorithm engine incorporates a dynamic smoothing and step-size control mechanism based on nonlinear confidence intervals. The core of this mechanism is the following parameter update rule:
[0075] ;
[0076] in, For the first The design parameter vector during round iteration, The step size is adaptively adjusted for the current iteration step. To comprehensively evaluate the function on the parameter vector Total gradient, dimension .
[0077] Due to the comprehensive evaluation function The total gradient, comprising a performance error objective term based on absolute value and a constraint penalty term based on a penalty function, is analytically derived as a sum of two parts:
[0078] ;
[0079] In the above formula, This is the transpose of the sensitivity matrix at the current operating point; Let be the vector of partial derivatives of the objective term with respect to each performance index, and let its i-th... Each component introduces a sign function to indicate the direction of the error, expressed as:
[0080] ;
[0081] Penalty terms for design parameters The direct gradient vector, independent of the sensitivity matrix, is the first... Each design parameter component is represented as:
[0082] ;
[0083] If the engine detects a drastic distortion in local sensitivity while parsing the sensitivity matrix, the system will automatically and sensitively reduce the step size of the allowed evolution parameters. The upper limit strictly confines the algorithm's search range to a small and safe nonlinear neighborhood near the current operating point, preventing the entire system from diverging out of control due to excessive parameter adjustments crossing nonlinear boundaries. Conversely, if the system determines that its current multidimensional spatial position is very mildly sensitive, the engine will trigger momentum acceleration logic, dynamically increasing the upper limit. This avoids iterations from stalling in flat regions, thereby accelerating the convergence speed of the algorithm.
[0084] Secondly, in order to properly address the common challenges of strong physical coupling and decoupling of multiple variables in analog and RF integrated circuits, the algorithm engine transforms the original space of mutually restrictive physical variables. Implicit projection mapping through advanced algebraic transformations to an abstract feature subspace that is mutually orthogonal and does not interfere with each other. In this context, the transformation relationship is as follows:
[0085] ;
[0086] in Let the eigenvector matrix determined by the transformation satisfy the following conditions: ( (The identity matrix). Within this purely mathematical feature space, the algorithm precisely separates the independent control components that dominate the changes in different macroscopic performances, and independently calculates the optimal evolution adjustment increment for each of these components. Finally, a rigorous inverse projection transformation mechanism is used:
[0087] ;
[0088] These adjustment increments are then inversely mapped back to the actual physical device parameter space. Within the aforementioned orthogonal mapping subspace, the sensitivity matrix is transformed accordingly as follows:
[0089] ;
[0090] Its off-diagonal elements are significantly reduced, effectively mitigating conflicts and interference among multiple physical parameters during joint optimization from a mathematical perspective. More innovatively, the algorithm engine introduces a task adaptive decomposition mechanism based on sensitive data topological features combined with deep semantic parsing. This mechanism automatically identifies strong and weak correlations among numerous parameters, adaptively dividing a high-dimensional, massive, and complex global parameter optimization task into several locally optimized subtasks with low physical coupling. This allows for rapid dimensionality reduction parameter iteration in parallel or sequentially within local subspaces, resulting in a significant improvement in algorithm convergence efficiency.
[0091] After undergoing the aforementioned high-density matrix operations through the core algorithm engine to calculate a new combination of parameters, the system performs a rigorous final review of the physical boundary validity and mandatory truncation correction on this new parameter combination. Subsequently, the system formats and overwrites it back to the underlying temporary netlist, immediately initiating a new round of closed-loop iteration and defensive interception process (i.e., S4). In this critical stage determining system stability, the system is equipped with robust fault tolerance and system recovery mechanisms. If the newly generated parameter combination causes a drastic nonlinear change in the internal circuit state, leading to non-convergent computational overflow or abnormal interruption in the internal large matrix solution of the underlying simulator, or if the comprehensive performance evaluation indicators extracted by the system show an unreasonable large rebound or significant degradation, the system will immediately trigger a safety interception command. Once this command is triggered, the system will discard the current parameter combination causing the abnormal deterioration and directly restore the system's parameter state to the safe operating point that has been verified as stable and convergent in the previous round. Simultaneously, the system control center will apply a penalty coefficient to the internal algorithm engine, forcing it to significantly reduce the range of parameter adjustments in the next round of calculation, i.e., shrink the range. The system will determine the upper limit of the parameter evolution vector and regenerate a more conservative and robust one for another attempt. This rigorous and self-healing closed-loop iterative process will continue to operate adaptively with a high degree of automation until the system determines that the current comprehensive performance evaluation indicators have fully met or exceeded the threshold values preset by the designer. At this point, the system will automatically cut off and terminate the entire iterative closed-loop circuit, save and output the currently discovered globally optimal parameter configuration.
[0092] Corresponding to the above-mentioned rigorous underlying method flow logic, refer to Figure 2 The present invention also provides an automatic parameter optimization system based on simulator sensitivity information, which includes four interconnected core functional modules in its top-level software architecture.
[0093] The parsing management module, serving as the starting point for the entire system, is responsible for reading the user-submitted design constraint files and the massive original circuit topology. It rapidly establishes a multi-dimensional variable tree diagram with deep physical relationships within the system, efficiently initializing the physical boundaries of various variables. Furthermore, it accurately transforms the user's objective design requirements, expressed in engineering language, into a rigorous mathematical evaluation benchmark that can be directly invoked by the internal algorithm for high-frequency numerical calculations—the aforementioned comprehensive evaluation function. .
[0094] The simulation and feature extraction module can automatically and rapidly package perturbation parameter netlists with different detection intentions, and concurrently schedule a large number of underlying simulator processes to work in parallel using multi-threaded or multi-node concurrent scheduling mechanisms. In each independent simulation process, this module can accurately perform the synchronous stripping and cleaning of high signal-to-noise ratio underlying sensitive feature data (i.e., sensitivity matrix S) within a single process, filtering out a large amount of redundant simulation logs and reducing the time overhead required to obtain high-dimensional matrices.
[0095] The algorithm optimization module operates fully automatically based on the received pure sensitivity feature data stream, performing the abnormal fluctuation suppression mentioned in the previous method example steps with high throughput (through adaptive adjustment). Multidimensional space orthogonal dimensionality reduction decoupling (through transformation matrix) The process involves (and its inverse transformation), intelligent task adaptive decomposition, and orthogonal feature mapping solution, ultimately generating precise parameter tuning control instructions (i.e., the updated parameter vector) to guide the next stage of evolution. ).
[0096] The convergence verification module serves as the evaluation and control hub for the overall system operation status. It monitors the convergence health and evolution of the entire closed-loop iteration process and maintains a vast evolution database containing the trajectory of each historical exploration in the system background. When this module determines that the overall performance of the circuit has successfully exceeded the preset target limit, or when the bottom-line exit mechanism is triggered due to other safety reasons, this module is responsible for promptly sending an interrupt signal to cut off the iteration loop. It then performs standardized format script conversion on the final parameter configuration results, thereby completing an efficient data format handover to the next level of layout software or electronic design automation physical design stage.
[0097] See Figures 3 to 6 The automatic parameter optimization process of a typical circuit—an operational transconductance amplifier—is analyzed and explained in detail as a typical engineering application scenario.
[0098] like Figure 3As shown in the figure, this diagram presents the underlying netlist structure in this optimization task. In this example, the system primarily performs high-precision co-simulation on this circuit topology. The core of the optimization is the AC gain performance metric, which is calculated by dividing the voltage signal at the circuit output port by the difference between the excitation signals applied to the non-inverting and inverting inputs. The ultimate optimization goal of the system is to further coordinate and adjust the relevant physical parameters within the typical netlist, while strictly adhering to the physical limits of the devices, the overall static power consumption limit, and the physical size constraints of various process design rules, so as to improve this core target performance metric.
[0099] Regarding the initial state intervention and target baseline setting of the system, such as Figure 4 As shown in the initial performance curve, the circuit's initial gain is low, hovering around 50dB, given the unoptimized initial parameter configuration based on the design engineer's manual estimation and traditional rules of thumb. This initial performance falls significantly short of the high application requirements of advanced electronic systems; not only is the absolute value substandard, but the overall response also urgently needs improvement.
[0100] After entering the sensitivity-driven intelligent optimization process led by this invention, the system exhibits significant improvements. In the first iteration of the intervention optimization loop, the system simultaneously completes the benchmark verification of the current initial performance and the comprehensive extraction of a large amount of underlying sensitivity feature data through a precise single co-simulation, i.e., according to the formula... A sensitivity matrix (corresponding to S2) was constructed for the current operating point. For example... Figure 5 The typical sensitivity analysis results shown in the figure intuitively display the sensitivity data obtained after sensitivity analysis simulation, providing the system with a direct mapping of the internal physical coupling relationships of the circuit. Through the analysis of... Figure 5 Through in-depth analysis of typical sensitivity characteristic data, the system quickly and accurately located the key influencing parameters affecting performance indicators. It clearly revealed how the geometric parameters of typical active devices and the electrical properties of core bias nodes exert specific pulling effects on the overall performance curve and the magnitude of sensitivity information in different operating domains.
[0101] In this process, combined Figure 2 The system structure diagram shown above illustrates that the above operations are completed collaboratively by various modules:
[0102] The analysis and management module first establishes a parameterized model containing physical variables such as channel width and bias current based on the circuit topology to be optimized, and sets the physical boundaries of each variable. Upon receiving the current parameter vector, the simulation and feature extraction module's internal parallel task scheduling unit can simultaneously initiate multiple simulation tasks with perturbations. Using a finite difference method, it assists in constructing a complete sensitivity matrix S. This module simultaneously completes the routine extraction of macroscopic performance such as gain and the stripping of low-level sensitivity feature data in a single co-simulation process, achieving... Figure 2 The "Simulation and Evaluation Module" outputs performance response and sensitivity information in parallel; the algorithm optimization module receives the above data, its data analysis unit performs feature analysis on the sensitivity matrix, and the optimization calculation unit updates the parameters according to the rules. The process calculates the evolution direction and performs orthogonal dimensionality reduction and decoupling operations through the transformation matrix Q, ultimately generating a new generation of parameter combinations. This process fully corresponds to... Figure 2 The "algorithm optimization module" features a three-pronged internal architecture involving data analysis, optimization calculation, and feedback adjustment. The convergence verification module evaluates the overall performance of the current circuit after each iteration. When the gain reaches approximately 90dB and meets all the preset threshold values in the design specifications, this module determines that the convergence condition has been met, sends an interrupt signal to terminate the iteration loop, and encapsulates and outputs the final parameter configuration. This complete data flow, from parameter initialization, sensitivity-guided simulation evaluation, algorithm optimization to convergence decision, is integrated with... Figure 2 The interaction relationships and signal flow between the various modules are in one-to-one correspondence.
[0103] In subsequent rounds of compact and high-speed closed-loop iterations, the system's advanced task decomposition and multi-dimensional orthogonal decoupling mechanism came into play. The system operates based on the formula... The original physical parameters are mapped to the decoupling space, and based on the transformed sensitivity matrix... Perform independent optimization, and then use inverse transformation. A comprehensive adjustment strategy is generated. Unlike traditional manual parameter tuning, the system algorithm engine does not blindly enlarge the physical size of a core component to improve performance simply by increasing size, because the system's decoupling mechanism anticipates that such conventional single-variable adjustments will inevitably lead to a nonlinear surge in local parasitic effects. Instead, within a highly abstract orthogonal mapping subspace, the system algorithm adaptively calculates a comprehensive composite adjustment strategy through intensive multidimensional matrix solving and feature reconstruction: while making minute adjustments to the physical dimensions of key components, the system simultaneously and precisely corrects the electrical parameters of the associated bias network and reshapes the parameter values of related compensation devices with relatively low precision.
[0104] In terms of final result verification and data solidification, relying on this strategy of precise adjustment based on the underlying real physical sensitivity, the system effectively avoided simulator matrix solution crashes and iterative deadlock anomalies that could be caused by drastic and disordered changes in high-dimensional parameters. Within a relatively short lifespan, the system completed physical optimization of several key parameters of the circuit. For example... Figure 6 As shown in the performance curves after iterative optimization, the gain of the target circuit was successfully improved to approximately 90dB after automatic optimization by this system. Comparison and backtracking analysis of the system's backend running data reveal that the computational resources consumed and the number of high-precision simulation calls required for the entire system to complete this automatic solution process are significantly reduced compared to traditional blind global search methods such as Monte Carlo traversal or conventional heuristic algorithms. This demonstrates the high iterative efficiency and robust anti-divergence performance of the method described in this invention when dealing with high-dimensional, highly nonlinear parameter spaces.
[0105] The preferred embodiments of the present invention disclosed above are merely illustrative of the invention. These preferred embodiments do not describe all details exhaustively, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the content of this specification.
Claims
1. A method for optimizing integrated circuit parameters based on simulator sensitivity information, characterized in that, Includes the following steps: S1. Obtain the design parameters, constraints, and target performance requirements of the object to be optimized, determine the adjustable parameter range, and establish a parameterized description model; S2. Based on the parameterized description model, call the simulator to perform simulation calculations and obtain the performance response data of the object to be optimized and the sensitivity information corresponding to the design parameters; S3. Determine whether the current design state meets the optimization requirements based on the performance response data; If satisfied, output the current design parameters; If the conditions are not met, the influence of parameter changes on performance indicators is analyzed based on the aforementioned sensitivity information to determine the direction and strategy for parameter adjustment and generate new design parameters. S4. Re-enter the updated design parameters into the simulator for iterative optimization, and adjust the optimization strategy according to the performance changes during the iteration process until the preset termination condition is met.
2. The integrated circuit parameter optimization method based on simulator sensitivity information according to claim 1, characterized in that, The design parameters include at least one of the following: active device size parameters; Passive structure dimensions; circuit connection parameters; bias condition parameters; process-related parameters.
3. The integrated circuit parameter optimization method based on simulator sensitivity information according to claim 1, characterized in that, The target performance requirements in S1 include at least one electrical performance index, and multiple performance indexes obtained from simulation are comprehensively evaluated by a preset evaluation function; Let the design parameter vector be ,in Extract the number of parameters to be optimized. Electrical performance indicators The target value for each indicator is Then the evaluation function Represented as: ; in, The preset weighting coefficient for the i-th performance index is... Let j be the current calculated value of the j-th constraint. Corresponding constraint boundary values, The penalty coefficient is... The function is used to generate a positive penalty term when a constraint is violated; The evaluation function generates a comprehensive evaluation result for optimization decision-making by performing index normalization, weight combination, and constraint penalties.
4. The integrated circuit parameter optimization method based on simulator sensitivity information according to claim 1, characterized in that, The sensitivity information in S2 is used to characterize the correlation between changes in design parameters and changes in performance indicators, and is obtained through at least one of the following methods: The sensitivity analysis function provided by the simulator is used to obtain the results. Obtained based on parameter perturbation simulation; This was obtained based on the analysis of multiple simulation results; Obtained based on predictions using historical optimized data; The sensitivity information is represented in the form of a sensitivity matrix S: ; Among them, elements Represents the j-th design parameter When changing Performance indicators The rate of change.
5. The integrated circuit parameter optimization method based on simulator sensitivity information according to claim 1, characterized in that, The parameter adjustment strategy determined in S3 based on sensitivity information specifically includes: Based on the degree of influence of different design parameters contained in the sensitivity information on the target performance indicators, the priority of parameter adjustment is ranked. Based on the relationships between the parameters, multiple parameters are adjusted jointly; The parameter update magnitude is adaptively adjusted based on the performance change trend during the optimization process. The parameter update is performed according to the following rules: ; in, For the first The design parameter vector during round iteration, The step size is adaptively adjusted for the current iteration step. To comprehensively evaluate the function on the parameter vector Total gradient, dimension . Due to the comprehensive evaluation function The total gradient, comprising a performance error objective term based on absolute value and a constraint penalty term based on a penalty function, is analytically derived as a sum of two parts: ; In the above formula, This is the transpose of the sensitivity matrix at the current operating point; Let be the vector of partial derivatives of the objective term with respect to each performance index, and let its i-th... Each component introduces a sign function to indicate the direction of the error, expressed as: ; in, Penalty terms for design parameters The direct gradient vector, independent of the sensitivity matrix, is the first... Each design parameter component is represented as: ; The adaptive adjustment step size Dynamically adjust based on the numerical characteristics of the sensitivity matrix: shrink when the sensitivity shows drastic distortion. The upper limit increases when the sensitivity is flat. .
6. The integrated circuit parameter optimization method based on simulator sensitivity information according to claim 5, characterized in that, The parameter update also includes parameter decoupling through orthogonal transformation: Through orthogonal transformation matrix Original design parameter vector Mapping to the decoupled feature subspace The transformation relationship is as follows The sensitivity matrix is transformed into this characteristic subspace as follows: After parameter decoupling is completed, inverse transformation is performed. Map the updated results back to the original parameter space.
7. The integrated circuit parameter optimization method based on simulator sensitivity information according to claim 1, characterized in that, In step S4, if a parameter update is detected during the iteration process, resulting in simulation failure, calculation anomaly, or a performance index reduction exceeding a preset range, the system restores the system to the valid design state before the update and shrinks the upper limit of the allowed parameter adjustment step size to adjust the subsequent parameter update strategy.
8. An integrated circuit parameter optimization system based on simulator sensitivity information, characterized in that, include: The parsing and initialization module is used to obtain design parameters and constraints and to build a parametric model; The simulation and evaluation module is used to call the simulator to obtain design performance response and sensitivity information, and to perform evaluation. The algorithm optimization module is used to adjust the direction based on the sensitivity information analysis parameters and generate new design parameters; The convergence verification module is used to control parameter updates, status judgment, and optimization result output.
9. The integrated circuit parameter optimization system based on simulator sensitivity information according to claim 8, characterized in that, The simulation and evaluation module includes a parallel task scheduling unit, which is used to execute multiple parameter perturbation simulation tasks simultaneously to obtain the sensitive relationship between design parameters and performance indicators.
10. The integrated circuit parameter optimization system based on simulator sensitivity information according to claim 8, characterized in that, The algorithm optimization module includes: The data analysis unit is used to process simulation data and extract the characteristics affecting parameters; An optimized computing unit is used to generate a parameter update scheme based on the parameter influence characteristics; The feedback adjustment unit is used to adjust the optimization process based on the results of historical iterations.