System, apparatus, and method for pulse shaping in a high voltage power system

Abstract

A high-voltage pulse power supply system is provided with a dedicated safety function including fault detection and fault management. In addition to ordinary communication cables, the pulse power supply system provides remote power via standard multi-conductor cables without dedicated conduits or separation. This simplifies the installation of equipment, improves the overall speed of deployment, and significantly reduces deployment costs. The pulse power supply system is further configured to transport power through a pulse current waveform.

Description

Technical Field

[0001] Cross - Reference to Related Applications This application claims the benefit of U.S. Provisional Patent Application No. 63 / 344,920, filed May 23, 2022, which is hereby incorporated by reference in its entirety.

[0002] This disclosure describes systems and methods related to the technical field of high - voltage power supplies and safe power management and utilization for such high - voltage power systems. The high - voltage power system may be, for example, in the field of Class 4 fault - managed power distribution systems, as described in more detail herein.

Background Art

[0003] Effective power supply systems for controlled environments (e.g., networked devices within a building) are becoming more common. However, the design and capabilities of existing power supply systems are often insufficient for their desired applications. For example, they may not be able to provide sufficient power or may not be able to effectively reach remote locations.

[0004] Furthermore, existing systems have high equipment and installation costs and, at the same time, often do not comply with power or safety requirements and are not durable.

Summary of the Invention

[0005] A pulsar device included in a fault - managed power supply system is described. The pulsar device includes a signal - shaping component configured to generate a pulsed power signal by pulsing a power signal according to a periodic pulse scheme, and the pulses within the pulsed power signal include a first signal - smoothing portion generated at the rising edge of the pulses within the pulsed power signal and a power - supply portion generated following the first signal - smoothing portion.

Brief Description of the Drawings

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[0007] The methods, apparatuses, systems, and other features described below can be embodied in many different forms. However, not all of the illustrated components are required, and some embodiments may include additional, different, or fewer components than those explicitly described in this disclosure. Variations in the arrangement and type of components can be made without departing from the spirit and scope of the solutions described herein. Further, variations of the described processes, including the addition, deletion, or reordering of operations, can be made without departing from the spirit or scope of the solutions described herein.

[0008] The present disclosure describes embodiments of a pulsed power supply system that includes dedicated safety features including fault detection and fault management. Wireless systems are installed in various locations and venues. An exemplary pulsed power supply system provides a remote power supply solution that assists a wireless system integrator in designing and deploying a wireless system. This solution can be ideal for larger venues or complex installations that require cost-effective, safe, easily installed, and reachable centralized power at greater distances. Thus, a pulsed power supply system may be configured to remotely power electrical devices such as remote radios, small cells, security cameras, access control, and indoor and outdoor distributed antenna systems (DAS).

[0009] The pulsed power supply system, which is easy to install and designed for wireless solutions, uses a wiring method provided by communication wiring according to NEC (National Electrical Code) guidelines. In addition to normal communication cables, the pulsed power supply system can provide remote power with standard multi-conductor cables without dedicated conduits or separation. This simplifies equipment installation, improves the overall speed of deployment, and significantly reduces deployment costs. The pulsed power supply system is further configured to transport power by a pulsed current waveform (note that the pulsed power signal may also be referred to as a pulsed current signal). The pulsed power supply system also includes a fault prevention method that further improves its safety characteristics, as described in more detail herein.

[0010] FIG. 1 shows a simplified system diagram illustrating device components that may be included in an exemplary pulse power supply system 100. The pulse power supply 110 is configured to receive standard AC power (e.g., 110 / 220V outlet, or 208V power from a rack PDU), and then the pulse power supply 110 converts the received standard AC power to a higher voltage limited current DC power (e.g., 360V, up to 400V, or higher voltage according to some embodiments). From the pulse power supply 110, power is transmitted in a pulse current waveform through the multi-conductor cable feeder 102 and received by the pulse power converter 120. The pulse power converter 120 is configured to convert the received pulse power to power usable by the end device (e.g., 48V DC power). The pulse power converter 120 is typically distributed throughout a building near one or more end device loads that require power for operation.

[0011] FIG. 2 shows a more detailed system diagram illustrating exemplary device components of the pulse power supply 110 and how it communicates with the pulse power converter 120 within the pulse power supply system 100. As shown in FIG. 2, the pulse power supply 110 may include a chassis for holding one or more power modules 111, one or more pulsar modules 112, and one or more management cards 115. The management card 115 may include a processor, as well as software, hardware, middleware, and / or circuitry for implementing any one or more of the features described herein.

[0012] The rear side of the pulse power supply 110 is provided with one or more openings 113 (for example, three openings) for installing each power module 111, and the front side of the pulse power supply 110 is provided with one or more openings 114 (for example, nine openings) for installing each pulsar module 112. The front side also has an opening for installing the management card 115. Inside the pulse power supply 110, the power module 111 is configured to receive standard AC power, convert it to a higher voltage, and then transmit it to the pulsar module 112. The pulsar module 112 is configured to pulse this high-voltage power according to a pulse scheme and transmit it to the pulse power converter 120 through the power transmission line 102.

[0013] After receiving the high-voltage pulse power, the pulse power converter 120 is configured to down-convert it to a voltage (for example, 48V DC power) that can be used by the device and supply it to one or more end devices. The pulsar module 112 is coupled to the power transmission line 102 and monitors the voltage / power transmitted through the power transmission line. The pulsar module 112 is configured to control one or more of the fault management safety functions of the pulse power supply system 100 described herein.

[0014] The pulse power supply system 100 may be an embodiment of an NEC Class 4 power distribution system that can supply up to 400V for a limited period (for example, the on-time period), and then a period (for example, the off-time period) with a significantly reduced voltage is supplied. The reduced voltage supplied during this off-time period may be a predetermined voltage (for example, less than about 60V) with a limited current capacity. The on-time period and the off-time period are usually within the range of milliseconds, and the on-time period may be longer than the off-time period (for example, 2ms on-time, 1ms off-time), the on-time period may be shorter than the off-time period (for example, 1ms on-time, 2ms off-time), or the on-time period may be substantially the same as the off-time period (for example, 2ms on-time, 2ms off-time).

[0015] The off-time period can be utilized to determine an unsafe situation of the pulse power supply system. When an unsafe state is detected, the circuit prevents power from being turned on to the line. For example, FIG. 3 shows a voltage chart 300 illustrating exemplary voltage values of a pulse power signal transmitted over time by a pulsar module 112 via a power transmission line 102, and this pulse power signal is received by a pulse power converter 120. In the voltage chart 300 shown in FIG. 3, the on-time (e.g., V ON ) during which the voltage is on is longer than the off-time (e.g., V OFF ) during which the voltage is off. However, according to other embodiments, the on-time (e.g., V ON ) during which the voltage is on may be the same as or shorter than the off-time (e.g., V OFF ) during which the voltage is off.

[0016] A safety circuit is provided to perform safety fault detection in the pulse power supply system 100. For example, FIG. 4A shows an exemplary system diagram of a safety circuit 400 that may be included in the pulsar module 112. The safety circuit 400 is configured to include both a detection circuit and a prevention circuit, and the detection circuit and the prevention circuit are separate and independent of each other. Separating these two circuits helps improve the reliability (e.g., functional safety failure (FIT) rate) of the safety circuit 400 and also guarantees the fail-safe operation of the safety circuit 400. Further, to improve the FIT rate of the safety circuit 400, the only input to the safety circuit 400 is the power transmission line. The safety circuit 400 is further designed to utilize discrete components to improve its reliability (e.g., programmable devices are not used).

[0017] The safety circuit 400 includes a high voltage DC input 410 generated by the power supply module 111. The safety circuit 400 also includes an output terminal 420 coupled to the power transmission line 102. The safety circuit 400 also includes a first switch 401 (e.g., a current profile switch) coupled to the first logic / control circuit 403 and the first safety sense circuit 405. The safety circuit 400 also includes a second switch 402 (e.g., a power switch) coupled to the second logic / control circuit 404 and the second safety sense circuit 406.

[0018] FIG. 4B shows a flowchart 450 illustrating an exemplary fault detection process that may be implemented by the pulsar module 112 using the safety circuit 400. At step 451, a fault may be detected. Fault detection 451 may be performed during the startup initialization step of the pulsed power supply system 100. Additionally or alternatively, fault detection 451 may be performed following any normal operating time of the pulsed power supply system 100. Fault detection 451 may correspond to fault conditions including, but not limited to, a person touching the power transmission line 102, a load that was receiving pulsed power being disconnected during pulsed power transmission, an overvoltage condition being detected, an on-time period being detected as too long, an off-time period being detected as too short, and / or spurious on-voltage detection (e.g., detection of a voltage that turns on at the output terminal that is not the result of intentionally turning on the control system).

[0019] At step 452, the power path is disconnected by turning off the first switch 401.

[0020] At step 453, the power path is disconnected by turning off the second switch 402.

[0021] At step 454, the disconnected power path is maintained by keeping the first switch 401 and the second switch 402 in an open state (i.e., off state) for a predetermined time following the detection of the fault condition. For example, the predetermined time may be a minimum value of at least 5 seconds.

[0022] Following a predetermined time duration, the power path may be re-established. Alternatively, according to some embodiments, additional verification steps may be performed before the power path is re-established.

[0023] FIG. 5A shows an exemplary system diagram including components of a pulsed power supply system 500 with a safety detection circuit 512, according to some embodiments. The pulsed power supply system 500 includes a pulsed power pulser module 510, a pulsed power converter module 520, and a power transmission line 102 connecting two system components. In FIG. 5A, the component devices included in the pulsed power supply system 500 may be a system architecture representation of the same components shown as being included in the pulsed power supply system 100.

[0024] The pulsed power pulser module 510 includes a safety detection circuit 512, which may be a higher-level system representation of certain components of the safety circuit 400 shown in FIG. 4A. The safety detection circuit 512 includes a circuit component 518 (e.g., a zenode diode or a window voltage comparator), and the safety detection circuit 512 may be configured to detect a change in the voltage of the power transmission line 102 and / or a change in the characteristic impedance of the power transmission line 102.

[0025] The pulse power pulsar module 510 further includes a first switch 514 (for example, the first switch 514 may represent the first switch 401 and the second switch 402 included in the safety circuit 400 shown in FIG. 4A), a current source 513 connected in parallel with the switch 514, a second switch 516, a circuit component 517 (for example, a zenode diode or a window voltage comparator), and a safety detection circuit 512. The second switch 516 and the circuit component 517 together constitute a discharge circuit 511. The discharge circuit 511 discharges the power transmission line 102 to a safe voltage during the off-time, during which the power transmission line 102 is checked for faults. The safe voltage of the power transmission line 102 during the off-time is adjusted by the current source 513 and the load detection circuit 521 provided in the pulse power converter module 520. This will be described in more detail below.

[0026] The current source 525 and the circuit component 526 (for example, a zenode diode or a window voltage comparator) provided in the pulse power converter module 520 together constitute a load detection circuit 521. The load detection circuit 521 provides a constant current drop to the power transmission line 102 during the off-time. When the pulse power converter module 520 is not connected to the power transmission line 102, the voltage is not adjusted to a pre-specified threshold value. In this case, the pulse power pulsar module 510 does not detect the pulse power converter module 520 during initialization or detects the disconnected state of the pulse power converter module 520 during normal operation. In either case, the load detection circuit 521 cuts off the high voltage and brings the power transmission line 102 to a safe state until the pulse power converter module 520 is detected.

[0027] During initialization or off-time, the voltage of the power transmission line 102 is adjusted by a current source 513 (on the pulse power pulsar module 510) and a load detection circuit 521 (on the pulse power converter module 520). The load detection circuit 521 adjusts the power transmission line 102 to a safe voltage by dynamically changing a load resistor or by using circuit component 526. The load detection circuit 521 is coupled to a diode 524 and is further in parallel with a capacitor 522. The capacitor 522 is in parallel with a load device 523, and the load device 523 is an end device configured to receive the pulse power of the pulse power supply system 500. The combination of the capacitor 522 and the diode 524 functions as a pulse rectifier and provides a DC bus voltage to the load.

[0028] Figure 5B shows a flowchart 550 illustrating an exemplary circuit operation procedure during a power supply process, where power is transmitted according to a process controlled by a pulsar module 112 using a safety detection circuit 512.

[0029] In step 551, a first switch 514 closes at the start of an on-time period to provide power from a power source 515. This power is supplied to a load device 523 via a diode 524.

[0030] In step 552, the first switch 514 opens at the end of the on-time period, effectively shutting down the power transmitted via the power transmission line 102. The diode 524 operates to block the reverse DC current supplied back to the power transmission line 102 from the capacitor 522 on the pulse power converter module 520 side.

[0031] In step 553, a second switch 516 of a discharge circuit 511 is closed for a predetermined time duration (e.g., a short time that can be determined by the maximum capacity of the power transmission line 102). Closing the second switch 516 causes the residual voltage on the power transmission line 102 to decrease to a safe voltage level defined by the reference voltage of a circuit component 517 of the discharge circuit 511.

[0032] In step 554, the current source 513 supplies a low current to the power transmission line 102. The low current may be, for example, 2 mA. Alternatively, according to some embodiments, the low current may be lower than 2 mA, slightly higher than 2 mA, or within a predetermined low current range. The current source 525 provided in the load detection circuit 521 provides a path for holding / regulating the residual line voltage to a value defined by the circuit component 526 of the load detection circuit 521. According to a first example, as long as the voltage exceeds the value defined by the circuit component 526, the load detection circuit 521 implements a current sink as a load that draws current from the power transmission line 102 to hold the line voltage near the voltage value of the circuit component 526. According to a second example, the load detection circuit 521 implements a controlled current sink as a load and an analog window comparator that compares the line voltage with a reference voltage and switches the controlled current sink to maintain the line voltage within a predetermined window.

[0033] FIG. 6 shows three exemplary graphs 610, 620, 630 representing three different scenarios that can occur on the power transmission line 102 and be processed by the safety detection circuit 512.

[0034] The first graph 610 represents a normal state where, at the end of the off-time period, the line voltage detected on the power transmission line 102 should be close to the voltage set across the circuit component 526 (e.g., a zenode diode).

[0035] The second graph 620 represents a cut-off state where, at the end of the off-time period, the line voltage detected on the power transmission line 102 is higher than the voltage across the circuit component 517 (e.g., a zenode diode or a window voltage comparator).

[0036] The third graph 630 represents an unsafe state where, at the end of the off-time period, the line voltage detected on the power transmission line 102 is lower than the voltage across the circuit component 518 (e.g., a zenode diode or a window voltage comparator).

[0037] FIG. 7 shows an exemplary system diagram of a pulse power supply system 500-1, and the components of the pulse power supply system 500-1 are the same as those shown for the pulse power supply system 500, except for some parasitic capacitance elements 530 found in the transmission line 102 of the embodiment described by the pulse power supply system 5001. The parasitic capacitance elements 530 are represented by capacitors, but in other embodiments, they may represent other circuit components that impart parasitic capacitance characteristics.

[0038] The parasitic capacitance elements 530 are shown to represent unwanted elements that may be found on the transmission line 102 within the pulse power supply system 500-1, and also provide an opportunity to explain how such unwanted elements can be addressed by the safety detection circuit 512 of the pulse power supply system 500-1. Basically, the pulse power supply system 500-1 is designed such that the parasitic capacitance elements 530 do not change the operation of the safety detection circuit 512.

[0039] For example, FIG. 8 shows a voltage graph 800 including a first voltage plot 801 and a second voltage plot 802. The first voltage plot 801 shows the voltage characteristics of a first transmission line having a high parasitic capacitance, and the second voltage plot 802 shows the voltage characteristics of a second transmission line having a low parasitic capacitance.

[0040] In the first voltage plot 801 representing the first transmission line having a high parasitic capacitance, in a normal state, the voltage is seen to decrease slightly below the discharge voltage V disCharge and then, in an unsafe state, the voltage is seen to decrease significantly below the discharge voltage V disCharge and in a state where the pulse power converter module 520 is disconnected (i.e., another type of fault state), the voltage is seen to increase slightly above the discharge voltage V disCharge In the second voltage plot 802 representing the second transmission line having a low parasitic capacitance, in a normal state, the voltage is the discharge voltage V disChargeIt can be seen that it drops below the visible level, and then, in an unsafe state, the voltage drops significantly below the discharge voltage V disCharge to the level marked as -V / 2, and in the state where the pulse power converter module 520 is disconnected (i.e., another type of fault state), the voltage rises significantly above the discharge voltage V disCharge to the level marked as the surge voltage V surge . The pulse power supply system 500 can establish a limit value so that the parasitic capacitance seen on the transmission line 102 does not change the operation of the safety detection mechanism of the safety detection circuit 512. The voltage limit value is set by, for example, the discharge level defined by the window voltage comparator of the circuit component 517, the current source 513, and the circuit component 526.

[0041] For the purposes of this disclosure, the following definitions may be used.

[0042] "Touch": The detection of the voltage is below the threshold defined during the off-time period.

[0043] "Disconnection": The detection of the voltage rises above the threshold defined during the off-time period.

[0044] "Overvoltage": The detection of excessive voltage across the output terminals during the on-time period.

[0045] "On timing": The detection of the on-time period detected across the output terminals is determined to be too long.

[0046] "Off timing": The detection of the off-time period detected across the output terminals is determined to be too short or too long.

[0047] "On sense": The detection of the voltage that turns on at the output terminals, which is not caused by the control system turning on.

[0048] Figures 9 to 13 show exemplary circuit diagrams that may be included in the pulsar module 112 to generate some of the important signals used during operation. These signals are generated based on the output line status and are used in various parts of the safety detection circuit 512.

[0049] Figure 9 shows an exemplary circuit diagram of a circuit 900 that may be included in the pulsar module 112. The circuit 900 includes components and / or mechanisms for preventing a failure of one component from causing an unsafe state, which may be included in the pulsar module 112.

[0050] The circuit 900 includes a first current source 901 and a second current source 902, and the first current source 901 and the second current source 902 are configured in a two-stage cascaded configuration to prevent a failure of one component from causing an unsafe state. Each of the first current source 901 and the second current source 902 may be a 2 mA current source. The first current source 901 is coupled to the input to the DC bus 903, and the output of the second current source 902 is coupled to the terminal block 904 and to a series of circuit components including the ends of the voltage regulation and detection component 905, the pulse regeneration component 906, the sawtooth generator component 907, and the off-time clock generator component 908. Each of the first current source 901 or the second current source 902 may be controlled by an independent safety detection circuit within the pulsar module 112 and may be disabled from providing current.

[0051] Specifically, the voltage regulation and detection component 905 is configured to convert the line high voltage to a voltage level corresponding to an electronic logic component (e.g., a detection component).

[0052] The pulse regeneration component 906 functions as a comparator circuit together with the sawtooth generator component 907 and is configured to reproduce the on-time switching signal (OT_CLOCK) and the on-time ramping signal (ON_RAMP) from the power transmission line.

[0053] The end of the off-time clock generator component 908 is configured to generate a pulse EOF_CLK at the end of the off-time period, and this pulse is used by the fault detection logic latches 1003 and 1005 (shown in FIG. 10).

[0054] FIG. 10 shows an exemplary circuit diagram of a circuit 1000 that may be included in the pulsar module 112. The circuit 1000 includes components and / or mechanisms that are utilized to detect an unsafe state and generate a detection signal when a "touch" or "break" scenario is detected on the power transmission line 102.

[0055] The circuit 1000 includes an off-voltage detection component 1001 having a dedicated voltage divider block for converting the high voltage between lines to a corresponding voltage level for electronic logic components. This off-voltage detection component 1001 is utilized to assist in the fault detection operation during the off-time of the pulsed power transmitted on the power transmission line 102. This off-voltage detection component 1001 also extends the off-time voltage and "clips off" the on-time voltage.

[0056] The circuit 1000 includes a touch threshold comparator 1002 configured to compare this off-transition detection voltage from the off-voltage detection component 1001 with a predetermined threshold V T . The output from the touch threshold comparator 1002 is at a logic level "high" when the input exceeds the threshold V T . The output is coupled to the logic latch 1003, and as a result, at the end of the off-time, if the power transmission line 102 is in an unsafe state, for example, if a line touch is detected, the logic latch 1003 creates a latch signal at a logic level "low". The circuit 1000 is held at a logic level "high" (i.e., safe) when the line-to-line voltage detected by the VMINOK signal (for example, voltage minimum OK corresponding to 60V) falls below a predetermined touch-safe voltage level (for example, a voltage drop up to 60V).

[0057] Circuit 1000 includes a cut-off threshold comparator 1004 configured to compare the off-transition detection voltage from the off-voltage detection component 1001 with a predetermined threshold voltage V C . The output from the cut-off threshold comparator 1004 goes to logic "low" when the input voltage exceeds V C , and goes to logic "high" when the input voltage is below V C . Next, the output from the cut-off threshold comparator 1004 is latched by the logic latch 1005 at the end of the off-time. When it is detected that the power transmission line 102 is disconnected from the load (converter), the latched output is held at logic "low" (i.e., not ready / disconnected). Otherwise, the latched output is held at logic "high" (ready / connected). Therefore, circuit 1000 is held at the logic "high" level (i.e., safe) when the line voltage detected by the VMINOK signal is below a voltage (e.g., voltage drop up to 60V) that is safe to touch.

[0058] FIG. 11 shows an exemplary circuit diagram of a circuit 1100 that may be included in the pulsar module 112. Circuit 1100 includes components and / or mechanisms utilized to generate a signal indicating that the on-time is too long at the end of one period, which is used in various parts of the safety detection circuit. The described embodiments are described as measuring both the on-time and the off-time as periods, but other embodiments where the period is measured from one on-time to the subsequent on-time (e.g., from the rising edge of one on-time to the rising edge of the subsequent on-time) are also contemplated.

[0059] Circuit 1100 includes a sawtooth generator 1101, which is triggered by the end of the off-time clock generator and is configured to discharge the RC circuit at the end of the off-time period. The voltage level of the output from the sawtooth generator 1101 reflects time over the entire period. Circuit 1100 also includes a period maximum threshold exceed detector 1103 configured to transition to a "low" logic level when the period is too short (e.g., problems with the system clock causing a longer pulse period).

[0060] Circuit 1100 also includes an on-time maximum threshold detector 1105 triggered by a lamp signal generated by an on-time RC circuit. Detector 1105 is configured to transition to a "high" logic level when the input voltage exceeds a predetermined threshold V T corresponding to an excessive on-time. The output of detector 1105 is coupled to a logic latch 1106, which is configured to hold logic latch 1106 at a "high" logic level (i.e., safe) when the line voltage falls below 60V as detected by the VMINOK signal. The detection may represent an overvoltage condition at power line 102 due to the possibility of an increased duty cycle. In all cases, the detection represents a system timing error, in which case logic latch 1106 may be configured to hold circuit 1100 at a "low" logic level (i.e., fault detection).

[0061] Circuit 1100 also includes an on-time end clock generator 1104 configured to create a positive edge near the end of the on-time period.

[0062] FIG. 12 shows an exemplary circuit diagram of a circuit 1200 comprising components and / or mechanisms utilized to generate a signal indicative of when the line voltage outlet maximum allowable voltage is present on the line and a signal indicative that the line voltage is a safe voltage (e.g., 60V) even if touched. This circuit 1200 may be used in various parts of the safety detection circuit provided in the pulse power supply system 100.

[0063] Circuit 1200 includes an on / off voltage transition detection component 1201 comprising a dedicated voltage divider block configured to convert the line high voltage to a voltage level corresponding to an electronic logic component (e.g., 3.3V, or about 3.3V).

[0064] The circuit 1200 also includes an overvoltage detection component 1202 configured to decrease when the line voltage exceeds the maximum allowable voltage (e.g., 385V, or about 385V). The output from the overvoltage detection component 1202 is latched into a logic latch 1204 at the end of the on-time period, and when this condition occurs, a logic "low" signal is generated. When the line voltage is detected to be below 60V such that it is detected by the VMINOK signal, the circuit is held at a "high" logic level (i.e., safe).

[0065] The circuit also includes a high voltage detector component 1203 configured to go "high" and enable a safety detection circuit when the line voltage exceeds a touch-safe voltage (e.g., a voltage drop up to 60V). This circuit 1200 remains active during an off-time period that occurs after an on-time period in which the touch-safe voltage (e.g., 60V) is exceeded.

[0066] FIG. 13 shows an exemplary circuit diagram of a circuit 1300 that may be included in the pulse power pulsar module 112.

[0067] The circuit 1300 includes a coincidence IO (MIO_OK) detector latch 1301 that latches the level of a main timing PWM signal generated by a control system at the start of an on-time detected from the power transmission line 102. If the main timing PWM signal is not high when the power transmission line 102 is detected to be high, the output from the latch 1301 goes low, indicating a fault.

[0068] FIG. 14 shows an exemplary circuit diagram of a circuit 1400 that includes the integration of circuits and corresponding fault signals analyzed by a redundant circuit within the pulsar module 112.

[0069] As described, the pulsar module 112 may be configured to generate fault detection signals for the 14:NO_TOUCH signal 1401, CONNECT signal 1402, VMAXOK signal 1403, ON_OK signal 1404, PERIOD_OK signal 1405, and MIO_OK signal 1406, as shown in FIG. 14. When an unsafe state is detected, one or more of these six fault detection signals go low. The unsafe state forces the output of the latch 1410 low, thereby disabling each switch and sending a "high" signal to the MCU.

[0070] Each detection signal also reaches the MCU via respective resistors 1421 - 1426 for error reporting. The resistors 1421 - 1426 are large enough that the MCU cannot change the logic levels presented at the inputs to the AND component 1411. Activation of the latch 1410 starts a 3 - 5 second delay in the fault clear logic 1412. This output clocks the latch 1410, and when all detection signals go "high" (i.e., the inactive state), the fault state is cleared. The fault state remains while any detection signal is active.

[0071] The circuit 1400 also includes a power - on delay component 1413 configured to forcibly block a temporary clear of the latch 1410 upon power - on. A fault reset switch can also manually force a clear signal to the latch 1410. The circuit 1400 also includes a delay - end pulse component 1414 configured to convert a power - on delay signal to a pulse rather than a continuous logic high or low signal.

[0072] These described circuits are completely redundant and can be replicated.

[0073] Signal shaping In the field of power electronics, switching the on and off of high-voltage signals to a transmission line to control current or voltage may be applicable to certain embodiments of packet-based power transmission applications (i.e., NEC class 4 power supplies). This is the solution provided by the pulsed power supply system 100. Here, the voltage is turned on and off at certain intervals. The off-time may be used to detect the status of the transmission line 102.

[0074] The basic rate of switching power between the on-time and the off-time may be in the low-frequency range, but depending on the period, the slope of the transition, and the amplitude of the switched voltage, there is a possibility of introducing high-frequency spectra / harmonics. This phenomenon is best understood as the Fourier spectrum representation of a trapezoidal clock signal.

[0075] Since transmission lines are often selected based on their rated current capacity and rated voltage levels, the cable impedance does not necessarily match the high-frequency (HF) impedance of the source and the HF impedance of the load. The HF impedances of the source and the load are characterized as the power source impedance and the power load impedance during the transition time. The HF impedance can cause reflections if it mismatches with the transmission line. As shown in the exemplary power system 1510 of FIG. 15, the reflected signal of the transmission line may travel back and forth between the power source 1511 and the power supply sink 1512 (i.e., the load) several times until it attenuates, which is an undesirable occurrence on the transmission line.

[0076] FIG. 15 also includes a corresponding exemplary pulse power signal 1520, with the intended pulse signal profile depicted by a dashed line, and also superimposes, with a solid line, unwanted signal reflections that can actually occur from the power system 1510. Such reflections appear as ringing, standing waves, and overshoot, as illustrated by the pulse power signal 1520. This can result in high voltage spikes, which can have damaging effects on installed equipment and / or can cause EMI / EMC problems. As shown by the pulse power signal 1520, the actual signal propagating on the transmission line has ringing and overshoot in the transition time and deviates from the intended (ideal) signal. The propagation time of the reflected signal through the transmission line indicates the frequency components that form the ripple signal.

[0077] This specification describes a signal smoothing solution that eliminates or at least significantly reduces this overshoot phenomenon and thus reduces the undesirable adverse effects resulting therefrom. The signal smoothing solution is described as being applied to the pulse power signal generated by the pulse power supply system 100, but more generally, it may be applied to other systems and different applications that utilize or do not utilize pulse power, such as, for example, motor control.

[0078] Reduction of the high frequency components of the switched signal and / or reduction of the higher order harmonics of the switched signal can be achieved by changing the slope (e.g., rise and fall times) of the switched signal at the transition time. This concept is realized by utilizing pulse control signal techniques (see, e.g., FIG. 17A) to control the slope of the transition without additional power loss. This is implemented by combining a smoothing circuit at the output of the switching device to generate a much higher rate of switching control signal with a duty cycle that varies at the transition time. The higher rate of switching control signal can be implemented for variable frequencies with various duty cycles.

[0079] FIG. 16 shows an exemplary simplified system diagram of a switching control system 1600 for generating pulsed power. The switching control system generates a switching power signal, which may cause ripples and / or overshoots (hereinafter may be referred to as signal defects) on the power transmission line at the transition intervals. The switching control system 1600 includes a switching control component 1603 disposed on a power transmission line 1602 supplied by a DC voltage source 1601. FIG. 16 also includes an exemplary control signal 1620 showing the timing of a control signal 1620 for controlling the opening and closing of the switching control component 1603. FIG. 16 also includes an exemplary voltage power signal 1630 resulting from the switching control system 1600, and the voltage power signal 1630 is shown to include unwanted signal defects 1631, 1632 at pulse start (see signal defect 1631) and pulse down (see signal defect 1631).

[0080] FIG. 17A shows an exemplary system diagram of a switching control system 1700 that includes a smoothing circuit 1704 according to the present solution. The switching control system 1700 includes a switching control component 1703 disposed on a transmission line 1702 supplied by a DC voltage source 1701. In addition to these power pulse components, the switching control system 1700 further includes a smoothing circuit 1704 (i.e., a high-voltage integrator). Different from the aforementioned pulse power signal 1520 that simply goes high and then low to control the pulse power period, the smoothing circuit 1704 is configured to control the switching control signal 1720 such that the switching control signal 1720 itself is pulsed a number of times (e.g., a predetermined number of times) at the rising and falling edges of the switching control signal 1720. This is implemented by pulsing the switching control component 1703 a plurality of times at the rising edge 1740 and pulsing the switching control component 1703 a plurality of times at the falling edge 1750. Thereby, the rising and falling edges / portions of the entire switching control signal 1720, which is the active power signal 1745 being shortened, are modulated or shaped. For example, the overall switching control signal 1720 may be high or may have an on-time for a time duration of about 2 ms, the rising edge 1740 is about 50 μs, and the falling edge is about 50 μs at that time. Thus, in this embodiment, the signals smoothed at the rising and falling edges include less than 5% of the entire pulse, and each is less than 2.5% of the entire pulse.

[0081] The length of time during which the pulse is implemented at the rising edge 1740 and / or the falling edge 1750 can be adjusted to be longer or shorter (e.g., a predetermined time duration). For example, the time during which the pulse is implemented at the rising edge 1740 and / or the falling edge 1750 can be adjusted to a longer or shorter amount of time (e.g., a predetermined amount of time) based on external factors such as the known physical characteristics of the transmission line cable.

[0082] As can be seen from the enlarged view of the rising edge 1740 portion of the switching control signal 1720, the rising edge 1740 includes several individual pulses 1741 to 1744. Although four pulses 1741 to 1744 are shown, in alternative embodiments, the number of pulses may be more or less than that shown in FIG. 17A. Further, each subsequent pulse 1741 to 1744 may be slightly longer in time length, as shown in FIG. 17A, or alternatively, each pulse 1741 to 1744 may have an equal time length. The pulses at the falling edge 1750 may reflect the pulses at the rising edge 1740. Although it is shown that both the rising edge 1740 and the falling edge 1750 include pulses, according to some embodiments, the pulses may be included only in one of the rising edge 1740 or the falling edge 1750. Also, it is shown that the pulses at the rising edge 1740 have approximately the same time duration as the pulses at the falling edge 1750, but according to some embodiments, the pulses may have different time durations. For example, the rising edge 1740 may last for a period less than, or more than, or between the periods or number of pulses of the falling edge 1750.

[0083] As shown by the voltage signal 1730 in FIG. 17A, the voltage signal 1730 resulting from the signal shaping / smoothing solution has a much smoother rising edge without the ripple and / or overshoot signal defects 1631 seen in the voltage power signal 1630.

[0084] Different embodiments of the switching control signal 1720 controlled by the smoothing circuit 1704 may be adjusted according to known physical characteristics of the power transmission line cable. The current solution of the smoothing circuit 1704 is that it can detect the type of cable including one or more cable attributes and select a specific signal shaping solution that matches the detected cable type. The cable type may be detected based on the load characteristics of the cable, and the selected signal shaping solution is optimized according to the load characteristics of a specific type of cable. The cable attributes may also be input by the user so that the pulser module 112 determines the optimal signal shaping solution based on the received cable attributes.

[0085] FIG. 17B shows an exemplary flow diagram 1760 illustrating a process for implementing the signal shaping solution described herein. This process may be implemented, for example, by a pulser module 112 provided in the pulse power supply system 100.

[0086] In step 1761, the cable attributes of the cable used as the power transmission line 102 are collected. The cable attributes may be collected according to any of the methods described herein. For example, the cable attributes may be detected based on the load characteristics of the cable that can be determined following a load detection test performed on the power transmission line 102. The cable attributes may be manually input into the pulse power supply system 100. The cable attributes may be retrieved from a database. The user inputs the cable ID, and the pulse power supply system 100 searches for the cable ID in the database that stores the cables and their respective attributes. Then, when a match is found in the database, the corresponding cable attributes can be obtained. The cable attributes may include one or more of the following: characteristic impedance, capacitance, inductance, DC impedance, AC impedance, or other measurable cable attributes.

[0087] In step 1762, the pulsar module 112 can select a made-to-order signal shaping solution based on the previously detected cable attributes. In this way, the signal shaping for the switching control signal may be adjusted to be adapted to the specific cable used as the power transmission line 102. The adjustment may follow any one or more of the adjustments described herein. Alternatively, if the cable attributes are not specifically detected, or if the default signal shaping is selected to be applied, the default signal shaping may be selected.

[0088] In step 1763, the switching control signal previously selected in step 1762 is generated and applied to the switching control component of the pulse power supply system 100.

[0089] RF data link via a pair of high-voltage conductors Pulse current (i.e., fault management power distribution) is a method for transmitting and supplying high power (e.g., class 4) in a more efficient and safe manner. In the event of a fault (e.g., cable power distribution), the power is immediately turned off. Pulse current (PC) is discontinuous DC, and the DC is segmented into on / off intervals, and the fault condition is tested at each interval before other pulses can be transmitted. PC power may be transmitted via a pair of copper conductors in the same way as in the case of DC power. When a fault is detected in the power transmission line, the pulse power supply system (e.g., the pulse power supply system 100) may be configured to be controlled such that the pulses stop immediately. This makes it safe to touch the copper conductors, simplifies the installation regulations (e.g., no cable conduit is required, no certified electrician is required, etc.), and reduces the deployment time and cost.

[0090] Furthermore, unlike AC power, using PC power enables centralized power management, distribution, power measurement, and power backup without the need for cable conduits. Compared to Class 2 DC power (e.g., ESLV power, PoE, etc.), PC power is Class 4 power (e.g., up to 400V DC) that can supply more power over longer distances while having the advantage of using thinner copper conductors. Some of the advantages of using thinner copper conductors can include weight savings, cost savings, footprint savings, and ease of installation.

[0091] As described, the pulsed power supply system 100 provides Class 4 PC power by periodically and repeatedly pulsing high voltage DC (i.e., 300V - 600V) on and off for a predetermined pulse duration. Before another high voltage pulse is transmitted, a fully redundant and independent fault detection circuit that utilizes discrete hardware checks the power line 102 for one or more fault events including, but not limited to, cable touch or short circuit, cable break, undervoltage, overvoltage, pulse timing skew, or presence of an unsafe voltage during off time.

[0092] In addition to the features already described above, the pulsed power supply system 100 may also have the feature of overlaying low data rate communication signals on the same power line 102 to provide a solution for system management, control, and data reporting for a scalable and manageable PC power distribution system. To implement these features, various technologies and methods are integrated to provide an RF (radio frequency) communication link via a high voltage single pair cable for PC applications such as the pulsed power supply system 100.

[0093] FIG. 18 shows another depiction of the pulsed power supply system 100. In FIG. 18, it is shown that the pulsar module 112 transmits a pulsed power signal to the pulsed power converter 120 via the transmission line 102. The pulsed power supply system 100 may include up to 12 pulsar modules 112 that transmit over 12 PPP channels with 12 single pair transmission lines 102 in a point-to-point manner. This closed system may be extended to connect to a more closed system under a centralized management point.

[0094] FIG. 19 shows an exemplary pulsed power supply system 1900 constructed in the architecture of the pulsed power supply system 100. The interconnection between the pulsar module 112 and the pulsed power converter 120 need not be limited to the point-to-point connection topology provided in the pulsed power supply system 100 shown in FIG. 18, and may be modified to couple a plurality of pulsed power converters 120 in a daisy chain topology as shown in FIG. 19. In the exemplary pulsed power supply system 1900, a single pulsar module 112 is configured to drive up to n PPC (pulsed power converter) channels and connect to n pulsed power converters 120-1 to 120-n. Here, n is an integer greater than or equal to 1. This is made possible by daisy chain connecting the n pulsed power converters 120-1 to 120-n to a common transmission line 102. Each PPC channel is addressed with a unique address assigned at startup of the pulsed power supply system 100 via an RF communication link.

[0095] FIG. 20 shows another exemplary pulse power supply system 2000 constructed on the architecture of the pulse power supply system 100. The pulse power supply system 2000 supports several PPC channels 2001, 2002, 2003 that are outputs from a plurality of unique pulse power converters 120-1, 120-2, 120-n (n is an integer greater than or equal to 1). Each of the pulse power converters 120-1, 120-2, 120-n is supplied with a unique pulse power signal from each of the pulsar modules 112-1, 112-2, 112-n. The PPC channels 2001, 2002, 2003 are combined to form a combined output signal 2004 that supports higher output power. To achieve the combination of the plurality of PPC channels 2001, 2002, 2003, the pulse power supply system 2000 includes an integrated power combiner circuit 2010 that employs n controlled output switches, n reverse current / polarity blocking / protection controllers, n load sharing controllers, and an advanced load start algorithm. Next, the load device is configured to connect to the combined output signal 2004.

[0096] FIG. 21 shows the system architecture of an exemplary single-channel pulse power system 2100 according to some embodiments, where the pulsar module 112 is directly coupled to the pulse power converter 120 via a single-channel power transmission line 102. This architecture shown in FIG. 21 incorporates an essential subsystem that superimposes high-voltage power and RF communication data via the power transmission line 102.

[0097] The pulsar module 112 includes a pulsar component 2106 (which may represent, for example, a combined pulsar module and power source), and the pulsar component 2106 is configured to obtain high-voltage DC power (e.g., ±150V to ±200V) and subdivide it into on / off intervals (e.g., 2 ms on / 1 ms off) to generate a train of pulse power on the power transmission line 102. The output of this block is managed by a redundant safety circuit (e.g., safety circuit 400) described herein.

[0098] The train generated by the pulse component 2106 is supplied to a high-voltage / high-power common-mode rejection filter (CMRF) 2107. The CMRF 2107 provides attenuation close to zero at the pulse power switching frequency (e.g., 333 Hz), and transitions to higher attenuation over a wide band at higher frequencies. The CMRF 2107 is configured to have a peak attenuation of 50 dB at the RF communication carrier frequency. This CMRF 2107 is utilized to prevent any in-band switching harmonics from intermodulating with the modulated RF signal.

[0099] The output of the CMRF 2107 is supplied to a high-voltage / high-power, very narrow-band resonant band-stop filter (BSF) 2108. The BSF 2108 is composed of high-power and high-voltage resonant inductors and capacitors, and provides a very high characteristic impedance (notch) at the RF communication carrier frequency and a very low impedance otherwise. Without this BSF 2108, the RF signal would be short-circuited by electromagnetic interference (EMI) and the bulk capacitor on the left side of the BSF 2108.

[0100] The RF communication signal is a half-duplex signal transmission modulated and demodulated by an RF communication unit 2110. The inputs and outputs of the RF communication unit 2110 are differential signals connected to a differential, high-voltage, wide-band, resonant band-pass filter (BPF) 2109. The BPF 2109 is composed of high-power and high-voltage resonant inductors and X1Y1 capacitors, and these are used to provide a 3KV reinforced insulation barrier between the primary circuit (HV) and the secondary circuit (LV), blocking the DC component so that only the low-voltage, low-frequency components of the filter band are seen by the RF front-end of the RF communication unit 2110. The detailed system architecture of the RF communication unit 2110 is shown in Figure 21.

[0101] Circuit components 2111 and 2112 provide a synchronization signal to the data modulator / coder and demodulator / encoder of the RF communication unit 2110. The high-voltage pulse current (PC) is first converted to a low voltage via a resistor network. An X1Y1 capacitor is used to provide enhanced insulation of 3 KV between the primary circuit (HV) and the secondary circuit (LV) within circuit component 2111. The low-voltage insulation signal at the output of circuit component 2111 represents a logic-level pulse signal, and the logic-level pulse signal is used to generate a reference signal for the rising edge and falling edge at circuit component 2112, which is supplied to the RF communication unit 2110.

[0102] This RF communication signal with a carrier frequency of 1 MHz is superimposed on the 333 Hz HV pulse current in the power transmission line 102. The 1 MHz carrier frequency was experimentally selected to compensate for a maximum 50 dB attenuation due to a maximum average cable insertion loss of 1 MHz for a 2 KM long cable, and at the same time, to be far enough away from the power switching frequency harmonics that are dominant below 800 KHz and acceptable.

[0103] The PPC within the power transmission line 102 utilizes the same architecture / elements for the BSF2128, RF communication unit 2120, circuit component 2121, and circuit component 2122 included in the pulse power converter 120. The high voltage / high power common mode rejection filter (CMRF) 2123 provides attenuation close to zero at the PP switching frequency (i.e., 333 Hz), and transitions to higher attenuation over a wide band around the harmonic of the DC-DC phase shift converter switching frequency of the converter circuit component 2124 at higher frequencies. The CMRF 2123 is designed to have a peak attenuation of 50 dB at the RF communication carrier frequency. This CMRF 2123 is important to prevent the in-band switching harmonics generated by the converter circuit component 2124 from intermodulating with the RF signal. The converter circuit component 2124 converts the PC to a DC voltage and supplies it to the DC bus of the phase shift full bridge DC-DC converter. The output of the converter circuit component 2124 is supplied to a load device (e.g., load device 523). Thus, the RF communication unit 2110 may communicate on the power transmission line 102 in synchronization with the period of the pulse power signal, among other circuit components, by using a band rejection filter and a band pass filter.

[0104] As described above, FIG. 22 shows a more detailed system diagram of components including the RF communication unit 2110 subsystem. The RF communication unit 2110 is connected to the BPF2109 using bidirectional communication via the differential RF front end 2201. The current compensation common mode rejection filter (CMRF) 2215 blocks common mode interference caused by the high power DC-DC switching converter from entering the differential RF front end 2201. It is designed to provide a common mode impedance of 10 KΩ to 15 KΩ and a differential impedance close to zero across the RF communication band.

[0105] The RF communication unit 2110 also includes an impedance matching network 2216 that can be adjusted to match the transmission line impedance according to the characteristic impedance of the cable used in the power transmission line 102 and the number of multiple drop points connected on the bus in the case of a daisy chain usage scenario. The impedance matching network 2216 also includes an RF limiter and provides capacitive coupling between the CMRF 2215 and the band-pass filter (BPF) 2217.

[0106] The BPF 2217 may be an 8th-order Butterworth-Vessel 0.5, 200 kHz passband, 1 MHz center frequency active band-pass filter, which is designed to form an in-band attenuation of 40 - 48 dB to remove frequency components outside the RF communication signal band over the full range of signal strengths (i.e., ±5 mV to ±200 mV). The BPF 2217 may be designed to have less than 220 uVrms noise, a spectral noise density of 800 nV / √Hz at 1 MHz, a group delay of <7 us, and a fast step response.

[0107] The RF communication unit 2110 may also include an amplifier 2218, which may be a multi-stage fully differential input, demodulating logarithmic amplifier with a very high-speed voltage-mode output. The amplifier 2218 can provide a very high dynamic range using a continuous detection technique. With the unique integration of this stage and all filtering at the front end, the pulse power supply system 100 can provide a demodulated output with an insertion loss of up to 50 dB on the cable of the power transmission line 102. The single-ended output from the amplifier 2218 is supplied to the RF detector 2219, and the RF detector 2219 is used to generate a demodulated output represented as the envelope of the amplified input signal.

[0108] The demodulated signal from the RF detector 2219 is supplied to a self - biasing discriminator 2220 that includes a time - varying delay to provide a dynamic reference to the non - inverting input of a comparator within the pulse power supply system 100. The output of the discriminator 2220 is a digitized signal, and this signal is supplied to a synchronous decoder 2221 that employs a bit - banging algorithm to decode the received data. The decoded data is analyzed and then stored in a memory storage device 2222 (e.g., a memory unit that may include a database).

[0109] For data transmission, binary data is supplied from a memory storage device 2223 (e.g., the memory storage device 2223 may be the same as or different from the memory storage device 2222) to an encoder / modulator 2224. The encoder / modulator 2224 encodes the binary data from the memory storage device 2223 and generates the corresponding baseband frequency (fm) and carrier frequency (fC) in digital form. Two outputs from the encoder / modulator 2224 are synchronized to the rising edge of a pulse reference signal received from the circuit component 2112 before being supplied to a digital inter - modulator 2225. Next, the output of the digital inter - modulator 2225 is supplied to a unidirectional differential digital line driver 2226.

[0110] The RF communication unit 2110 may also include a differential, high - Q, resonant band - pass filter (BPF) 2227. This BPF 2227 has a narrow band adjusted to the modulation frequency band. The output of the BPF 2227 is a balanced CW - modulated RF signal that is connected to an impedance - matching network 2216. The drive impedance of the transmitter imposes the impedance of the impedance - matching network 2216 during the data - transmission cycle. That is, the drive impedance is always fixed and lower than the detection impedance in the listening mode. When the transmission cycle is completed, the line driver is disabled and the RF communication unit 2110 is returned to the detection - mode impedance (i.e., the listening mode).

[0111] Figure 23 shows an exemplary timing graph 2310 showing the timing of the periodic pulse power signal 2312 and the transmission of data packets in the data signal 2311 via the RF communication link. Figure 23 also shows an exemplary data packet 2302 that may be included as part of the data signal 2311 transmitted via the RF communication link on the power transmission line 102. Data encoding by the encoder / modulator 2224 and data decoding by the decoder 2221 may be performed as shown in Figure 23 to generate the fixed data packet 2302 as follows. - Start bit: Provides the known power transmission line (PTL) status and the first ID. - Address bit: Identifies remote nodes in both point-to-point and multi-drop communication links. - Payload: The data being transmitted - CRC: Detection of data transmission errors In the encoding / modulation performed by the encoder / modulator 24, an 8-bit word of data is mapped to a 10-bit symbol to achieve DC balance and limited mismatch while providing sufficient state changes to enable reasonable clock recovery.

[0112] Depending on whether the characteristic impedance of the cable is inductive or capacitive, the on / off transitions on the power transmission line 102 can create a very low impedance state that shorts the RF signal for a very short time during the transition, which changes the "high" logic of the coupled bit to "low" logic. This problem is solved by this solution by inserting an image of the 10-bit mapped symbol after each 10-bit symbol to provide a simple and effective way to provide error correction to the data packet 2320. The image portion of the data bits is shown within the data packet 2320 by underlining and prime notation.

[0113] The decode / demodulation stage, which is operated by decoder 2221, analyzes the data and cross-correlates each 10-bit symbol with its respective image for error correction. Even if all the bits of a word are changed, the original word can be recovered. The worst-case scenario occurs when the last 5 bits of a 10-bit symbol and the first 5 bits of a 10-bit symbol image are changed. Even in this scenario, since the last 5 bits of the 10-bit symbol image are not yet changed and can be used to correct the last 5 bits of the 10-bit symbol, the original data can still be recovered. In this scheme, bit error correction is possible for up to 10-bit alternations. Here, if more than 10 bits (i.e., the full word) are damaged, the CRC detects this error and a retransmission of the data is required to ensure that the damaged data is not used incorrectly.

[0114] The length of the payload can be adjusted based on the on / off interval. In data packet 2320 shown in FIG. 23, the data packet structure has an on-time period of 2.00 ms and an off-time period of 1 ms. In this case, the payload can be adapted to 120 bits representing 6 data bytes mapped to 10-bit symbols with corresponding images.

[0115] Even in a point-to-point topology (e.g., see FIG. 18) and / or a daisy-chain topology (e.g., see FIG. 19), the pulse power supply system 100 utilizes only a single pulsar module 112 that switches on / off and causes bit changes to be processed for data error correction. However, when multiple pulsar modules 112 are shared over a multi-pair cable (e.g., a 3-pair cable), crosstalk between pairs (e.g., crosstalk due to capacitive coupling) may also change the RF signal during on / off transitions. If the on / off transitions of multiple pulsar modules 112 are asynchronous, this becomes a complex problem, and as a result, bits beyond 10 bits may be damaged and thus cannot be recovered.

[0116] To overcome this problem, a master clock may be provided to provide synchronization between the parser modules 112 that utilize the same multi-pair cable. In these cases, a slot number is assigned to each parser module 112. Next, based on the slot number, the parser module 112 adds a phase shift to the master clock to create a trigger for generating a pulse current (PC) to reference the output of the parser component 2106 of each parser module 112.

[0117] FIG. 24 shows an exemplary timing graph 2400 showing three pulse current signals (PC signals) 2401, 2402, 2403 on the power transmission line 102, and each of the PC current signals 2401-2403 is generated by a first parser module 241, a second parser module, and a third parser module, respectively. The timing graph 2400 shown in FIG. 24 represents a scenario in which three parser modules that generate three PC signals 2401, 2402, 2403 are synchronized. Each of the PC signals 2401, 2402, 2403 is 120 degrees out of phase with each other, which corresponds to "1 ms delay × slot number" from the master clock. In this case, only two parser modules become active at the same time (i.e., the time when the parser module is logically "high" at the same time). The on / off transitions are configured to occur every 1 ms.

[0118] FIG. 25 shows an exemplary timing graph 2500 showing nine pulse current signals (PC signals) 2501-2509 on the power transmission line 102, and each of the PC signals 2501-2509 is generated by each parser module. The nine PC signals 2501-2509 generated by each respective parser module are synchronized. For example, each of the nine PC signals 2501-2509 is phase-shifted 40 degrees from each other, which corresponds to "0.333 ms delay × slot number" from the master clock. In this case, six parser modules become active at the same time (i.e., the time when the parser module is logically "high" at the same time). It is shown that the on / off transitions occur every 0.333 ms.

[0119] This synchronization strategy for the on / off transitions between several pulsar modules has other advantages including reducing stress on the main power supply, reducing EMI, and providing stable power consumption at the system level. For example, by utilizing the synchronization strategy, the number of pulsar modules 112 that need to be turned on simultaneously is minimized or at least reduced, thereby reducing the power draw from the power supply required simultaneously and reducing the stress on the power supply. Embodiments have three PC signals (see, for example, FIG. 24), and embodiments have nine PC signals (see, for example, FIG. 25), but the synchronization strategy may be employed in other embodiments with different numbers of pulsar modules that generate PC signals for transmission over a multi-pair cable.

[0120] While specific embodiments described herein have been illustrated and described, it will be apparent to those skilled in the art that changes and modifications may be made without departing from the teachings of the features described herein. For example, the pulse power supply system may comprise different combinations of the components described herein and still be within the scope of the present disclosure. Further, features of fault detection, signal smoothing, or error detection are described as being implemented on the pulsar device, but according to other embodiments, features of fault detection, signal smoothing, or error detection may be implemented as a software-centric solution executed by a management card. For example, the management card may comprise a memory storage device configured to store instructions for implementing the features of fault detection, signal smoothing, or error detection described herein, and a processor configured to execute the instructions stored in the memory storage device to control components of the pulse power supply system for implementing the features of fault detection, signal smoothing, or error detection.

[0121] The matters described in the above description and the accompanying drawings are provided only by way of illustration and not limitation. The actual scope is intended to be defined by the following claims when evaluated from an appropriate perspective.

Claims

1. A pulsar device, A signal shaping component, By pulsing a power signal according to a periodic pulse scheme, a pulsed power signal, wherein the pulses in the pulsed power signal are A first signal smoothing portion generated at the rising edge of the pulse in the pulsed power signal; A power supply portion generated following the first signal smoothing portion; The pulsed power signal including The signal shaping component configured to generate The pulsar device including.

2. The pulsar device according to claim 1, wherein the first signal smoothing portion includes 2.5% or less of the pulse.

3. The pulsar device according to claim 1, wherein the first signal smoothing portion includes a plurality of rapid pulses up to the rising edge of the pulse.

4. The pulsar device according to claim 1, wherein the plurality of rapid pulses up to the rising edge of the pulse includes a predetermined number of pulses.

5. The pulsar device according to claim 4, wherein the predetermined number of pulses includes at least 4 pulses.

6. The pulsar device according to claim 1, wherein the plurality of rapid pulses up to the rising edge of the pulse persists for a predetermined time duration.

7. The pulsar device according to claim 6, wherein the pulse persists for about 2 milliseconds, and the plurality of rapid pulses up to the rising edge of the pulse persists for about 2.5 milliseconds.

8. The pulsar device according to claim 1, wherein the pulsar device is configured to generate the first signal smoothing portion based on the characteristics of the transmission line.

9. The pulsar device according to claim 1, wherein the pulse further includes a second signal smoothing portion generated at the falling edge of the pulse in the pulsed power signal.

10. The pulsar device according to claim 9, wherein the second signal smoothing portion includes 2.5% or less of the pulse.

11. The pulsar device according to claim 9, wherein the second signal smoothing portion includes a plurality of rapid pulses up to the falling edge of the pulse.

12. The pulsar device according to claim 9, wherein the plurality of rapid pulses up to the falling edge of the pulse includes a predetermined number of pulses.

13. The pulsar device according to claim 12, wherein the predetermined number of pulses includes at least 4 pulses.

14. The pulsar device according to claim 9, wherein the plurality of rapid pulses up to the falling edge of the pulse persists for a predetermined time duration.

15. The pulsar device according to claim 14, wherein the pulse lasts for about 2 milliseconds, and the plurality of rapid pulses up to the falling edge of the pulse last for about 2.5 milliseconds.

16. The pulsar device according to claim 9, wherein the pulsar device is configured to generate the second signal smoothing portion based on characteristics of a power transmission line.

17. The pulsar device according to claim 1, wherein the signal shaping component includes an LC filter and a freewheel diode.

Images