Method and system for achieving hard real-time in a non-real-time system in HILS
The method allows for hard real-time simulation in non-real-time systems by adapting thread execution to processor cores, reducing hardware needs and enhancing simulation flexibility.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Patents
- Current Assignee / Owner
- SHANGHAI TOSUN TECH LTD
- Filing Date
- 2025-05-21
- Publication Date
- 2026-06-25
AI Technical Summary
Existing HILS systems require real-time systems for task execution, leading to increased hardware costs and limitations in local observation and modification of simulation signals.
A method for achieving hard real-time in non-real-time systems by creating a real-time model task that adjusts thread execution based on processor core count, using single or multiple threads depending on core availability, and employing critical sections for thread synchronization.
Enables hard real-time simulation without additional hardware, improving development efficiency and flexibility in signal observation and modification.
Smart Images

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Abstract
Description
Technical Field
[0001] This application claims priority based on Chinese Patent Application No. 202311360067.1 filed on October 19, 2023, and US Patent Application No. 18 / 371,543 filed on September 22, 2023, the entire contents of which are incorporated herein by reference. The present invention belongs to the technical field of vehicle software development, and specifically relates to a method and system for realizing hard real-time in a non-real-time system in Hardware-in-the-Loop Simulation (HILS).
Background Art
[0002] In order to execute the tasks of Hardware-in-the-Loop Simulation (HILS), it is always necessary to rely on a real-time system to arrange the execution of tasks in the real-time system. The real-time system is in another computer, not local, and any operation needs to be completed by remote calls, which causes problems such as the key signals of the related signals that determine the algorithm function and performance cannot be directly observed.
Summary of the Invention
[0003] The present invention relates to a method for realizing hard real-time in a non-real-time system in HILS. This method includes the following. Create a real-time model task to form a task program. [[ID=二十二]] The task program automatically reads the computer configuration to determine the number of processor cores Z (number Z of kernels of a processor) of the current computer device. If the number of cores Z is X or less, it sets the number of threads n=1 and executes the real-time model task. If the number of cores Z exceeds X, it sets the number of threads n=(ZX) / Y and executes the real-time model task. Y represents the number of threads on one physical core of the processor.
[0004] In a second aspect, the present invention further provides a computer-readable storage medium. This storage medium stores computer-readable commands, which, when executed by at least one processor, cause a method to achieve hard real-time in a non-real-time system in the HILS.
[0005] In a third aspect, the present invention further provides an electronic device comprising a processor, a readable storage medium, a communication bus, and a communication interface, wherein the processor, the readable storage medium, and the communication interface communicate with each other via the communication bus. The above-mentioned readable storage medium is used to store a program that performs a method for achieving hard real-time in a non-real-time system in the HILS, and the program causes the processor to perform an operation corresponding to the method for achieving hard real-time in a non-real-time system in the HILS.
[0006] In a fourth aspect, the present invention further provides a system for achieving hard real-time in a non-real-time system in HILS. This system includes a computer device, which is configured to run a task creation module and a task thread setting module. The task creation module is configured to create real-time model tasks and form task programs. The task thread configuration module is configured so that the task program automatically reads the computer configuration and determines the number of processor cores Z of the current computer device. If the number of cores Z is X or less, the number of threads n=1 and the real-time model task is executed. If the number of cores Z is greater than X, the number of threads n=(ZX) / Y and the real-time model task is executed. Y represents the number of threads on one physical core of the processor.
[0007] In a fifth aspect, the present invention further provides a computer program product comprising a computer-readable storage medium in which computer-readable program code is stored. The computer-readable program code includes commands which cause at least one processor or at least one computer device to execute a method for achieving hard real-time in a non-real-time system in the HILS.
[0008] Other features and advantages of the present invention are described in the following specification, and some are evident from the specification or understood by practicing the invention. The object and other advantages of the present invention are realized and obtained by the structures specifically pointed out in the specification and drawings.
[0009] To make the above-mentioned objectives, features, and advantages of the present invention easier to understand, preferred embodiments will be given below and described in detail in conjunction with the accompanying drawings. To more clearly describe specific embodiments of the present invention or technical solutions of the prior art, the drawings that are necessary for describing specific embodiments or prior art are briefly described below. The drawings described below are some embodiments of the present invention, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without any creative effort. [Brief explanation of the drawing]
[0010] [Figure 1]Figure 1 is a flowchart illustrating a method for achieving hard real-time in a non-real-time system in HILS according to several embodiments. [Figure 2] Figure 2 shows a principle block diagram of a system that achieves hard real-time in a non-real-time system in HILS according to several embodiments. [Figure 3] Figure 3 shows a principle block diagram of an electronic device according to several embodiments. [Modes for carrying out the invention]
[0011] To further clarify the object, technical aspects and advantages of the embodiments of the present invention, the technical aspects of the present invention will be described below clearly and completely in reference to the accompanying drawings, although it is clear that the embodiments described are only some embodiments of the present invention and not all embodiments. All other embodiments obtained based on the embodiments of the invention, without creative work by a person skilled in the art, are within the scope of the protection of the invention.
[0012] Currently, when similar software performs HILS tasks, hard real-time is generally achieved through real-time systems, which increases hardware investment and deployment costs. Methods for achieving hard real-time in non-real-time systems in HILS, as described in some embodiments, do not require the addition of a separate real-time system and can achieve hard real-time even in non-real-time systems.
[0013] Specifically, several embodiments provide a method for achieving hard real-time in non-real-time systems in HILS, which includes the following: creating a real-time model task to form a task program. The task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device. If the number of cores Z is X or less, it sets the number of threads n=1 and executes the real-time model task. If the number of cores Z exceeds X, it sets the number of threads n=(ZX) / Y and executes the real-time model task, where Y represents the number of threads on one physical core of the processor.
[0014] In some HILS implementations, a method for achieving hard real-time performance in a non-real-time system involves directly running a virtual hard real-time environment on a PC when performing HILS tasks, thus eliminating the need to purchase a real-time system. Furthermore, since all operations are performed locally, development and testing efficiency is significantly improved, and the flexibility of simulation signal observation and modification is enhanced. For example, if it is desired to observe a local variable, the local program code can be modified at any time, adding functions such as print information, observation information, and curve plotting signal information, and then immediately executed after local compilation, resulting in high efficiency. In conventional methods, it is necessary to design input and output interfaces for this local variable, update the simulation model interface table, compile the entire code program, relocate the real-time system software, remotely execute the simulation model, and then perform the observation.
[0015] Various non-limiting embodiments of the embodiments of this disclosure are described in detail below in relation to the drawings. As shown in Figure 1, several embodiments provide a method for achieving hard real-time in non-real-time systems in HILS. This method includes the following: Create a real-time model task to form the task program. The task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device. If the number of cores Z is X or less, it sets the number of threads n=1 and executes the real-time model task. If the number of cores Z exceeds X, it sets the number of threads n=(ZX) / Y and executes the real-time model task. Y represents the number of threads in one physical core of the processor.
[0016] Specifically, a real-time model task is a timing program. First, a timer is created to create the real-time model task. After creating the timer, the timer's period is set, for example, 500 microseconds. Then, the model's step function is called according to this period. The resulting task program is a code module for real-time model task simulation.
[0017] The number of processor cores Z is determined by the processor model, and the number of cores Z will be completely different for different processor models. For example, the Intel Xeon Platinum 9282 has 56 cores Z, while the Intel Core i5-2520M has 2 cores Z.
[0018] If Z is less than or equal to X, the current computer performance is weak and unsuitable for running simulations using multiple threads. If the number of cores Z exceeds X, it will cause the local computer to freeze, making it suitable for running real-time model tasks in a single thread; that is, the number of threads n=1 and the real-time model task is executed.
[0019] On the one hand, when Z exceeds X, in order to prevent the simulation from being executed in a multi-threaded manner when the computer performance is weak, it is necessary to limit the minimum value of X. That is, limit the minimum value of the number of cores Z of the computer that executes the simulation task in a multi-threaded manner. When taking the limit situation X = 0, the number of threads n = Z / Y is equal to the number of true physical cores. When X is not zero, it means reserving X / Y true physical cores as self-cores, and these self-cores do not participate in the simulation, thereby ensuring the smooth operation of the software system and other software.
[0020] As an implementation situation of some embodiments, setting the number of threads n = 1 to execute the real-time model task includes the following. Define the real-time time interval m of the real-time model task execution. The above thread obtains the current time t in real time and determines in real time whether the current time t is greater than the next execution time t_next. When t > t_next, t_next = t_next + m, and execute the real-time model task.
[0021] When the real-time model task is first executed, t_next = m and t = 0. Specifically, the execution method of the real-time model task when n = 1 will be described in detail with examples. Set X = 4, and when the processor model of the computer device is Intel Core i5-2520M, the number of cores Z = 2, which is less than 4, and the current computer performance is weak, so it is not suitable to execute the simulation in a multi-threaded manner. Otherwise, it will cause problems with the local computer. At this time, it is suitable to execute the real-time model task in a single thread, that is, set the number of threads n = 1 to execute the real-time model task.
[0022] Only one thread executes the real-time model task. During the execution, since there is no preemption in the multi-thread environment, there is no need to perform thread synchronization using means such as critical sections, and thus the performance cost introduced by introducing critical sections can be reduced. However, the defects of the single thread itself are also manifested. When the processor time slice of the single thread is deprived by the OS scheduling, the processor may start a new time slice, which will reduce the lock accuracy at the time of t_next, that is, the execution time accuracy level of locking the next time will decrease.
[0023] When executing the real-time mode task in a single thread, set the real-time time interval m for executing the real-time mode task to 500 microseconds. The pseudo-code for the thread to execute the real-time model task is as follows. m = 0.00005; while (is_running) { t = get_current_time_stamp_us(); if (t > t_next){ t_next_ = t_next + m; run_model_task(); } other_task(); } Here, “is_running” is the simulation execution enable flag; if the simulation is terminated by the user or exits naturally, this flag is false and the algorithm does not execute the while loop. “get_current_time_stamp_us()” is an internal Windows system function used to obtain the timestamp of the current time, in microseconds. “run_model_task()” is an internal Windows system function used to periodically call the model's step function. “other_task()” is another Windows system task; for example, Sleep(1) can be executed here to reduce the current processor's consumption of processor time.
[0024] As another implementation of some examples, we demonstrate that when the number of threads is n=(ZX) / Y, and the number of cores Z exceeds X, the processor of the current computer device is suitable for launching multithreaded simulations. Methods for performing real-time model tasks include the following: Define the real-time time interval m for executing the real-time model task. Each thread simultaneously obtains its corresponding current time t in real time and determines in real time whether its corresponding current time t is greater than the next execution time t_next. When at least one thread recognizes that t > t_next, that thread attempts to enter the critical section, preventing other threads from entering at this time. After that thread successfully enters the critical section, the flag that the previous thread used to determine t > t_next becomes invalid, and the thread that successfully entered the critical section then executes the following actions within the critical section. The current time t is repeatedly obtained, and it is determined whether the current time t is greater than the next execution time t_next. If so, t_next = t_next + m, and simultaneously the real-time model task is executed, and the thread exits the critical section. Otherwise, the thread exits the critical section directly.
[0025] Specifically, we will explain in detail, with examples, how to perform a real-time model task when n = (ZX) / Y. If X=2 and Y=2, and the computer's processor model is Intel Core i7-8700, the number of cores Z=6, and if it is greater than 2, the number of threads n=(ZX) / Y=(6-2) / 2=2, and the real-time model task is executed.
[0026] Let's define the two threads as thread 0 and thread 1, respectively. If we define a real-time time interval m = 500 microseconds for executing real-time model tasks, the pseudocode for each thread executing the model task would look like this: m = 0.00005; while (is_running) { t = get_current_time_stamp_us(); if (t > t_next){ EnterCriticalSection(FSection); t = get_current_time_stamp_us(); if (t > t_next){ t_next_ = t_next + m; run_model_task(); } LeaveCriticalSection(FSection); } other_task(); } Here, “is_running” is the simulation execution enable flag; if the simulation is terminated by the user or exits naturally, this flag is false and the algorithm does not perform a while loop. “get_current_time_stamp_us()” is an internal Windows system function used to obtain the timestamp of the current time, in microseconds. “EnterCriticalSection” is a Windows system API function whose role is to enter a critical section. “FSection” is a multithreaded shared critical section object. “LeaveCriticalSection” is a Windows API function that works to leave a critical section. “run_model_task()” is an internal Windows system function used to periodically call the model's step function. “other_task()” is another Windows system task, for example, where Sleep(1) can be executed to reduce the current processor's processor time consumption.
[0027] The above pseudocode effectively mitigates the decrease in simulation time accuracy caused by a single thread losing processor time due to system scheduling, thereby effectively guaranteeing simulation time accuracy and thus ensuring real-time simulation.
[0028] Threads that do not successfully enter the critical section are prevented from entering it, and only after a thread that has entered the critical section has left it can it attempt to enter again.
[0029] Furthermore, taking the aforementioned method of executing a real-time model task with n=2 threads as an example, if thread 0 is unable to determine the next execution time t_next in a timely manner due to system scheduling, thread 1 has a very high probability of determining the next execution time t_next, and when it recognizes that t > t_next, it succeeds in entering the critical section, thereby prioritizing the execution of the model task. At this time, thread 0 is blocked by the line of code that enters the critical section. After thread 1 executes and completes the real-time model task and exits the critical section, thread 0 begins to determine whether the current time t is greater than or equal to the next execution time t_next. At this point, after thread 0 successfully enters the critical section, it updates the current time t again, that is, it repeatedly obtains the current time t, and if it determines that the current time t is less than the next execution time t_next (the next execution time t_next is updated by thread 1), thread 0 does not execute the real-time model task, immediately exits the critical section, and waits for the next determination.
[0030] The threads that successfully enter the critical section are determined by the critical section itself. In other words, the threads that successfully enter the critical section are randomly determined by the Windows system.
[0031] t_next is a common global variable shared by each thread. This means that multiple threads can access the same variable simultaneously. Each thread can share and access the same variable, and in this way, when any thread first discovers that the current time t is greater than the next execution time t_next, it attempts to immediately enter the critical section. This effectively mitigates the situation where a single thread's processor time is taken up by system scheduling, reducing simulation time accuracy, and effectively guarantees simulation time accuracy.
[0032] Each configured thread occupies one physical core of the processor. The physical core index of the processor occupied by each thread is equal to the value obtained by performing a modulo operation on the corresponding thread number index and the total number of processor physical cores.
[0033] Each configured thread occupies a physical core of a single processor, allowing the computer to perform at its optimal level.
[0034] For example, if you set up a total of 10 threads and the total number of physical cores in the processor is 8, the processor physical core index occupied by thread 0 is equal to the value obtained by performing a modulo operation on 0 and 8, and that value is 0. The processor physical core index occupied by thread 9 is equal to the value obtained by performing a modulo operation on 9 and 8, and that value is 1.
[0035] In the HILS of this disclosure, the method for achieving hard real-time in a non-real-time system is to achieve hard real-time by directly running a virtual hard real-time environment on a personal computer when performing HILS tasks. In other words, there is no need to purchase a real-time system, and all operations are performed locally, which greatly improves development and testing efficiency and increases the degree of freedom for simulation signal observation and modification.
[0036] As shown in Figure 2, some embodiments further provide a system that achieves hard real-time in a non-real-time system in HILS, and include a computer device. The computer device is configured to run a task creation module and a task thread setting module. The task creation module is configured to create real-time model tasks and form task programs. The task thread configuration module is configured so that the task program automatically reads the computer configuration and determines the number of processor cores Z of the current computer device. If the number of cores Z is X or less, the number of threads n=1 and the real-time model task is executed. If the number of cores Z is greater than X, the number of threads n=(ZX) / Y and the real-time model task is executed. Y represents the number of threads on one physical core of the processor.
[0037] In some embodiments, the functions performed by the task creation module and the task thread configuration module are implemented in a computer device. Specifically, you can refer to the detailed explanation of how to achieve hard real-time in a non-real-time system in the aforementioned HILS, and the explanation will be omitted here.
[0038] The following describes electronic devices in several embodiments from the perspective of hardware processing. As shown in Figure 3, some embodiments of this disclosure do not limit the specific realization of electronic devices. When the above-mentioned processor executes the above-mentioned program, it implements the steps in the embodiment of the method for achieving hard real-time in a non-real-time system in the HILS shown in Figure 1, for example, steps S101 and S102 shown in Figure 1. Alternatively, when the processor executes the computer program, it implements the functions of each module or unit in the embodiment of each of the above-mentioned devices.
[0039] In some embodiments, the processor is used to specifically accomplish the following steps. Create a real-time model task to form the task program. The task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device. If the number of cores Z is X or less, it sets the number of threads n=1 and executes the real-time model task. If the number of cores Z exceeds X, it sets the number of threads n=(ZX) / Y and executes the real-time model task. Y represents the number of threads in one physical core of the processor.
[0040] Selectively, in possible embodiments, the processor can be used to accomplish the following steps: Running a real-time model task with the number of threads set to n=1 includes the following: Define the real-time time interval m for executing the real-time model task. The above thread obtains the current time t in real time and determines in real time whether the current time t is greater than the next execution time t_next. If t > t_next, then t_next = t_next + m, and the real-time model task is executed simultaneously.
[0041] Selectively, in possible embodiments, the processor can be used to accomplish the following steps: When the real-time model task is first executed, t_next=m and t=0.
[0042] Selectively, in possible embodiments, the processor can be used to accomplish the following steps: To perform the real-time model task, set the number of threads to n=(ZX) / Y, including the following: Define the real-time time interval m for executing the real-time model task. Each thread simultaneously obtains its corresponding current time t in real time and determines in real time whether its corresponding current time t is greater than the next execution time t_next. If at least one thread recognizes that t > t_next, that thread will attempt to enter the critical section, and any thread that successfully enters the critical section will execute the following within the critical section. The current time t is repeatedly obtained, and it is determined whether the current time t is greater than the next execution time t_next. If so, t_next = t_next + m, and simultaneously the real-time model task is executed, and the thread exits the critical section. Otherwise, the thread exits the critical section directly.
[0043] Selectively, in possible embodiments, the processor can be used to accomplish the following steps: Threads that have not successfully entered a critical section will be prevented from entering it, and will only attempt to enter the critical section again after a thread that has entered it has left the critical section.
[0044] Selectively, in possible embodiments, the processor can be used to accomplish the following steps: The threads that successfully enter a critical section are determined by the critical section itself.
[0045] Selectively, in possible embodiments, the processor can be used to accomplish the following steps: t_next is a common global variable for each thread.
[0046] Selectively, in possible embodiments, the processor can be used to accomplish the following steps: Each configured thread occupies a physical core of a single processor and includes the following: The physical core index of the processor occupied by each thread is equal to the value obtained by performing a modulo operation on the corresponding thread number index and the total number of physical cores of the processor.
[0047] Some embodiments provide a computer-readable storage medium on which computer-readable commands are stored and, when executed by at least one processor, cause a method to be implemented in the HILS of the above embodiments that achieves hard real-time in a non-real-time system.
[0048] Some embodiments provide a computer program product which includes a computer-readable storage medium in which computer-readable program code is stored, the computer-readable program code includes commands, these commands cause at least one processor or at least one computer device to execute a method for achieving hard real-time in a non-real-time system in any of the possible HILS described above.
[0049] In other embodiments, computer devices and industrial computers can also be considered types of electronic devices.
[0050] Note that the configuration shown in Figure 3 is not limited to electronic devices and may include fewer or more components than those shown, may be a combination of several components, or may have different components arranged.
[0051] In some embodiments, the communication interface may be a communication interface that can be connected to an external bus adapter, such as an RS232, RS485, USB port, and TYPE port. A wired or wireless network interface may also be included, and the network interface may optionally include wired and / or wireless interfaces (e.g., a Wi-Fi interface, a Bluetooth® interface, etc.) that are typically used to establish a communication connection between the computer device and other electronic devices. A memory module, readable storage medium, or computer-readable storage medium includes at least one type of memory. Memory includes flash memory, hard disks, multimedia cards, card-type memory (e.g., SD or DX memory), magnetic memory, magnetic disks, optical disks, etc. In some embodiments, it may be an internal storage unit of a computer device, such as a hard disk. In other embodiments, memory may be an external storage device of a computer device, such as a plug-in hard disk, SmartMedia® card (SMC), Secure Digital (SD), or flash card. Furthermore, memory may include both internal and external storage devices of a computer device. Memory is used to store various data, such as application software and computer program code installed on the computer device, as well as to temporarily store output data or data to be output.
[0052] In some embodiments, the processor may be a central processing unit (CPU), controller, microcontroller, microprocessor, or other data processing chip that executes program code stored in memory or processes data, for example, to run a computer program.
[0053] In some embodiments, the communication bus may be an input / output bus, such as a Peripheral Component Interconnect (PCI) bus or an Enhanced Industry Standard Architecture (EISA) bus. This bus can be divided into an address bus, a data bus, a control bus, etc.
[0054] Optionally, the computer device may further include a user interface. The user interface may include input units such as a display and a keyboard, and optionally, the user interface may also include a standard wired interface and a wireless interface. Optionally, in some embodiments, the display or display module may be an LED display, a liquid crystal display, a touch-sensitive liquid crystal display, and an OLED (Organic Light-Emitting Diode) touch device, etc. In this case, the display or display module is also called a display screen or display unit for displaying information processed within the computer device and for displaying a visualized user interface.
[0055] In some embodiments of the present invention, the disclosed apparatus and methods can, of course, be implemented in other ways. The embodiments of the apparatus described above are merely illustrative; for example, flowcharts and block diagrams in the drawings illustrate the implementable architectures, functions, and operations of apparatus, methods, and computer program products according to some embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, program segment, or part of code. The module, program segment, or part of code contains executable instructions for implementing one or more predetermined logical functions. In some alternative implementations, the functions represented in the blocks may occur in an order different from that shown in the drawings. For example, two consecutive blocks can actually be executed substantially in parallel, and sometimes in reverse order depending on the related functions. It should also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in a block diagram and / or flowchart, may be implemented in a dedicated hardware-based system that performs a predetermined function or operation, or in a combination of dedicated hardware and computer instructions.
[0056] Furthermore, in each embodiment of the present invention, each functional module may be integrated to form a single independent part, each module may exist individually, or two or more modules may be integrated to form a single independent part.
[0057] The above functions can be implemented in the form of software function modules and, when sold or used as independent products, can be stored on a single computer-readable storage medium. Based on this understanding, the technical solutions of the present invention, in their essence or in parts that contribute to the prior art, or parts of said technical solutions, can be represented in the form of a software product. The computer software product is stored on a storage medium and contains a plurality of instructions that cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention.
[0058] By illustrating the preferred embodiments of the present invention described above, those skilled in the art can make various changes and modifications to the above-described content without departing from the technical spirit of the present invention. The technical scope of the present invention is not limited to the contents of the specification and must be determined based on the claims.
Claims
1. A method for achieving hard real-time in a non-real-time system in HILS, The task program automatically reads the computer configuration to determine the number of processor cores Z of the current computer device, and when X is set such that (Z - X) / Y is a natural number and the number of self-cores that do not participate in HILS is X / Y, if the number of cores Z is X or less, the number of threads to be allocated to the real-time model task is set to n=1 and the real-time model task is executed, and if the number of cores Z exceeds X, the number of threads to be allocated to the real-time model task is set to n=(Z - X) / Y and the real-time model task is executed. A method for achieving hard real-time in a non-real-time system in HILS, characterized by the above.
2. Running a real-time model task with the number of threads set to n=1 means This involves defining the real-time time interval m for executing the real-time model task, The aforementioned thread obtains the current time t in real time and determines in real time whether the current time t is greater than the next execution time t_next, A method for achieving hard real-time in a non-real-time system in HILS according to claim 1, characterized in that when t > t_next, t_next = t_next + m and simultaneously execute a real-time model task.
3. A method for achieving hard real-time in a non-real-time system in HILS according to claim 2, characterized in that when the real-time model task is first executed, t_next = m and t = 0.
4. Setting the number of threads to n = (Z - X) / Y and executing a real-time model task is, This involves defining the real-time time interval m for executing the real-time model task, Each thread simultaneously obtains its corresponding current time t in real time, and determines in real time whether the corresponding current time t is greater than the next execution time t_next. When at least one thread recognizes that t > t_next, that thread attempts to enter the critical section, and the thread that succeeds in entering the critical section then... (1) The current time t is repeatedly obtained, and it is determined whether the current time t is greater than the next execution time t_next, (2) If it is large, set t_next = t_next + m and run the real-time model task simultaneously, exit from the critical section, (3) If not too large, including exiting directly from the critical section, A method for achieving hard real-time in a non-real-time system in HILS as described in claim 1.
5. A method for achieving hard real-time in a non-real-time system in HILS as described in 4, characterized in that threads that have not successfully entered a critical section are prevented from entering the critical section, and after a thread that has entered a critical section leaves the critical section, the next attempt is initiated.
6. A method for achieving hard real-time in a non-real-time system in HILS according to claim 5, characterized in that the threads that successfully enter the critical section are determined by the critical section itself.
7. The method for achieving hard real-time in a non-real-time system in HILS according to claim 4, characterized in that t_next is a common global variable for each thread.
8. Each configured thread occupies one physical core of the processor. A method for achieving hard real-time in a non-real-time system in HILS according to claim 1, characterized in that the physical core index of the processor occupied by each thread is equal to the value obtained by performing a modulo operation with the corresponding thread number index as the dividend and the total number of physical cores of the processor as the divisor.
9. A computer-readable storage medium, A computer-readable storage medium that stores computer-readable commands and, when executed by at least one processor, causes a method for achieving hard real-time in a non-real-time system in a HILS according to any one of claims 1 to 8.
10. It is an electronic device, It includes a processor, a readable storage medium, a communication bus, and a communication interface. The processor, the readable storage medium, and the communication interface communicate with each other via the communication bus. The electronic device is characterized in that the readable storage medium is configured to store a program for a method of achieving hard real-time in a non-real-time system in a HILS as described in any one of claims 1 to 8, and the program is configured to cause a processor to perform an operation corresponding to the method of achieving hard real-time in a non-real-time system in a HILS.
11. A system that achieves hard real-time in a non-real-time system in HILS, The computer device includes a computer device configured to execute a task thread setting module, The task thread setting module is configured so that the task program automatically reads the computer configuration and determines the number of processor cores Z of the current computer device. When Y is the maximum number of threads supported by one physical core of the processor, and (Z - X) / Y is a natural number, and X is set so that the number of self-cores that do not participate in HILS is X / Y, then if the number of cores Z is X or less, the number of threads to be allocated to the real-time model task is set to n = 1 and the real-time model task is executed; otherwise, the number of threads to be allocated to the real-time model task is set to n = (Z - X) / Y and the real-time model task is executed. A system that achieves hard real-time in a non-real-time system in HILS, characterized by the above.
12. The computer device is configured to execute a task thread setting module by the method described in any one of claims 2 to 8, characterized in that the system for achieving hard real-time in a non-real-time system in HILS according to claim 11.
13. A computer program characterized by causing at least one processor or at least one computer device to execute a method for realizing hard real-time in a non-real-time system in a HILS as described in any one of claims 1 to 8.
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Patent Citations
Rail transit network passenger flow parallel simulation method
CN117634189A