Laser processing equipment and laser processing methods

Abstract

A laser processing apparatus includes a control unit; the control unit performs: a first process, which controls a laser irradiation unit with first processing conditions, the first processing conditions being set in such a way that modified regions are formed within a wafer; a second process, which specifies the state of the modified regions and determines whether the first processing conditions are appropriate; a third process, which controls the laser irradiation unit with second processing conditions, the second processing conditions being set in such a way that modified regions are formed within the wafer and between modified regions in the thickness direction of the wafer; and a fourth process, which specifies the state of the modified regions and determines whether the second processing conditions are appropriate.

Description

Technical Field

[0001] One aspect of this invention relates to a laser processing apparatus and a laser processing method. Prior Technology

[0002] A known laser processing apparatus irradiates a wafer, which has a semiconductor substrate and a functional element layer formed on one side of the semiconductor substrate, along a plurality of dicing lines. Laser light is then irradiated onto the wafer from the other side of the semiconductor substrate, thereby forming a plurality of altered regions within the semiconductor substrate along the dicing lines. The laser processing apparatus described in Patent Document 1 includes an infrared camera, enabling observation from the back side of the semiconductor substrate of the altered regions formed inside the semiconductor substrate and processing damage formed on the functional element layer. [Previous Technical Documents] [Patent Literature]

[0003] Patent Document 1: Japanese Patent Application Publication No. 2017-64746 Summary of the Invention

[0004] [The problem that the invention aims to solve] In laser processing apparatuses as described above, the formation speed of the processing layer is sometimes improved by forming multiple laser beam focusing points while simultaneously forming the processing layer. However, according to the inventors' knowledge, when multiple focusing points are simultaneously formed in the thickness direction of the object and laser light is irradiated, cracks extending from the modified region formed at one focusing point can affect the formation of the modified region at another focusing point and the progression of the cracks. As a result, the amount of cracks (crack length) may become unstable. This problem can still occur even when multiple focusing points are formed at different times (in the case of a single focus). That is, for example, in a single focus, after forming the initially modified region farther from the incident surface, a modified region closer to the incident surface is formed. Because the modified region closer to the incident surface is processed before the cracks on the side farther from the incident surface have fully extended, the total amount of cracks may become unstable. When the amount of cracking becomes unstable, the quality of the cut surface (i.e., the processing quality) when cutting the object with the cracks as the boundary will decrease.

[0005] To suppress the instability of cracking, one approach could be to first form a plurality of modified regions that are sufficiently separated from each other, ensuring the cracks do not connect. Then, modified regions are formed between these regions (in the thickness direction of the wafer), ultimately forming cracks that extend throughout all the modified regions. This prevents cracks extending from simultaneously formed modified regions (or from a plurality of modified regions formed in a single focal continuity) from connecting with each other. However, this method of forming inner modified regions after outer modified regions is complex and makes it difficult to set appropriate processing conditions. Without properly setting the processing conditions, the quality of the processed wafer may not be adequately guaranteed.

[0006] One aspect of the present invention was developed in view of the above-mentioned actual situation, and its purpose is to provide a laser processing apparatus and laser processing method that can guarantee the quality of the wafer when an outer modified region and an inner modified region are formed in the thickness direction of the wafer. [Methods for solving problems]

[0007] One aspect of the laser processing apparatus of the present invention comprises: an irradiation unit that irradiates laser light onto a wafer having a first surface and a second surface; an imaging unit that outputs light that is penetrable through the wafer and detects the light that has propagated through the wafer; and a control unit. The control unit is configured to perform the following processes: a first process that controls the irradiation unit with a first processing condition, the first processing condition being set such that a first modified region and a second modified region located further on the incident surface of the laser light than the first modified region are formed inside the wafer by irradiating the wafer with laser light; and a second process that, after the first process, based on the signal output from the imaging unit that has detected the light, specifically... The first processing condition is determined based on the state of the first and second modified regions and specific information to determine whether the first processing condition is appropriate; the third processing condition is to control the irradiation unit with the second processing condition, which is set in such a way that the first and second modified regions are formed inside the wafer by irradiating the wafer with laser light, and a third modified region is formed between the first and second modified regions in the thickness direction of the wafer; and the fourth processing condition is to determine the state of the first, second, and third modified regions based on the signal output from the camera unit that has detected the light after the third processing condition, and to determine whether the second processing condition is appropriate based on specific information.

[0008] In one embodiment of the laser processing apparatus of the present invention, in the third process, based on the second processing conditions, an outer modified region (first modified region and second modified region) and an inner modified region (third modified region) in the thickness direction of the wafer are formed. In the fourth process, the state of each modified region is specifically determined based on the signal output from the camera unit, and the appropriateness of the second processing conditions is determined based on the specific result. Thus, by processing in a manner that actually forms the outer and inner modified regions, and determining the appropriateness of the processing conditions based on the state of each modified region after processing, the appropriateness of the processing conditions can be determined based on the final processed state of the wafer. This allows for accurate determination of the appropriateness of the processing conditions and ensures the quality of the processed wafer. Furthermore, in one embodiment of the laser processing apparatus of the present invention, in the first process, based on the first processing conditions, only the outer modified regions (first modified region and second modified region) in the thickness direction of the wafer are formed. In the second process, the state of the outer modified regions is specifically determined based on the signal output from the camera unit, and the appropriateness of the first processing conditions is determined based on the specific result. For example, in the final wafer processing state, where the wafer is processed into a full-cut state (the cracks extending from the modified regions have extended to both ends of the wafer), there is less information about the modified regions obtained from the final wafer processing state, which may make it difficult to accurately determine whether the processing conditions are appropriate. In this case, when only a portion of the modified region (the outer modified region) is formed, the appropriateness of the processing conditions (first processing conditions) for the formation of that portion of the modified region is determined based on information about that portion of the modified region. This allows for a more precise determination of the appropriateness of the processing conditions based on a wafer processing state that provides more information (information about the modified region) than the final wafer processing state. Furthermore, according to the inventors' knowledge, it is believed that in cases where an outer modified region and an inner modified region are formed in the thickness direction of the wafer, the state of the outer modified region is affected by the quality or dicing of the processed wafer. Therefore, in the second process, by determining the appropriateness of the processing conditions (first processing conditions) for the formation of the outer modified region, the quality of the processed wafer can be better guaranteed.

[0009] The control unit can also specify the state of the modified region as at least one of the states of the modified region and the state of the cracks extending from the modified region. This allows for appropriate specification of the state of the processed wafer and enables more precise determination of the suitability of processing conditions. Consequently, wafer quality can be better guaranteed.

[0010] The control unit can also specify the location of the modified area and determine whether the processing conditions are appropriate based on that location. In cases where processing conditions are inappropriate, the modified area may not be in the desired location. By determining whether the processing conditions are appropriate based on whether the modified area is in the desired location, the appropriateness of the processing conditions can be determined. This allows for better assurance of the quality of the processed wafer.

[0011] The control unit can also determine whether the crack extends to at least one of the first and second surfaces, and determine whether the processing conditions are appropriate based on whether the crack extends to either surface. For example, if the final wafer is to be fully diced, the processing conditions can be appropriately determined by determining whether the crack did not extend to the first and second surfaces in the second processing stage, or whether the crack extended to the first and second surfaces in the fourth processing stage. This can better guarantee the quality of the processed wafer.

[0012] The control unit can also determine that the first processing condition is inappropriate if, during the second processing, the crack extends to at least one of the first and second surfaces. This allows for a reliable ST state (a state easily observable internally) where the crack has not reached the back surface in a processing state earlier than the final processing state. This provides appropriate and comprehensive information about the processing state. Furthermore, even if the final processing state is set to a fully diced state, it can still be assumed that if the crack reaches the back surface in an earlier state (a state that is still being processed), the chip quality and dicing performance will deteriorate in the final processing state. Therefore, by assuming the processing conditions are appropriate, a ST state in a processing state earlier than the final processing state can be used as a condition to guarantee chip quality and dicing performance.

[0013] The control unit can also specify the amount of crack extension and determine whether the processing conditions are appropriate based on that extension. If the processing conditions are not appropriate, the crack extension may not reach the desired length. By determining the appropriateness of the processing conditions based on the amount of crack extension, the processing conditions can be properly determined. This can better guarantee the quality of the processed wafer.

[0014] The control unit can also specify the width of the crack's serpentine path in the direction intersecting the wafer's thickness direction, and determine whether the processing conditions are appropriate based on this serpentine width. In cases where processing conditions are inappropriate, the width of the crack's serpentine path may increase. By determining the appropriateness of the processing conditions based on the width of the crack's serpentine path, the appropriateness of the processing conditions can be determined. This allows for better assurance of the quality of the processed wafer.

[0015] The control unit can also specifically determine whether cracks extending from different modified regions are connected to each other, and determine whether the processing conditions are appropriate based on whether they are connected. In cases where processing conditions are inappropriate, cracks may connect even when they are not intended to be connected, or they may not connect even when they are intended to be connected. By determining the appropriateness of the processing conditions based on whether the cracks are connected, the processing conditions can be appropriately determined. This allows for better assurance of the quality of the processed wafer.

[0016] The control unit may further be configured to perform the following processes: a fifth process, which controls the irradiation unit with a third processing condition, wherein the third processing condition is set to form a third modified region inside the wafer by irradiating the wafer with laser light; and a sixth process, which, after the fifth process, specifies the state of the third modified region based on the signal output from the camera unit that has detected the light, and determines whether the third processing condition is appropriate based on the specified information. With this configuration, even when only the inner modified region is formed, the appropriateness of the processing condition (third processing condition) for the formation of the inner modified region can be determined based on information about the inner modified region. In addition to the cases of forming both outer and inner modified regions, and the case of forming only the outer modified region, even in the case of forming only the inner modified region, the appropriateness of the processing condition can be determined with higher precision by using information about the modified region to determine whether the processing condition is appropriate.

[0017] The control unit can also determine that the third processing condition is inappropriate if, during the sixth processing, the crack extends to at least one of the first and second surfaces. This allows for a reliable ST state (a state easily observable internally) where the crack has not reached the back surface in a processing state earlier than the final processing state. This provides appropriate and comprehensive information about the processing state. Furthermore, even if the final processing state is set to a full-cut state, it can still be assumed that if the crack reaches the back surface in an earlier state (a state that is still being processed), the wafer quality and dicing performance will deteriorate in the final processing state. Therefore, by assuming the processing condition is appropriate, a ST state in a processing state earlier than the final processing state can be used as a condition to guarantee wafer quality and dicing performance.

[0018] The control unit can also determine that the first processing condition is inappropriate if, in the second processing, the crack extends to at least one of the first and second surfaces, and in the sixth processing, if the crack extends to at least one of the first and second surfaces, the third processing condition is inappropriate. This allows for a reliable ST state (a state easily observable internally) where the crack has not reached the back surface in a processing state earlier than the final processing state. This allows for appropriate and comprehensive acquisition of information regarding the processing state. Furthermore, even when the final processing state is set to a full-cut state, it is still considered that if the crack reaches the back surface in an earlier state (a state that is still being processed), the wafer quality and dicing performance will deteriorate in the final processing state. Therefore, by assuming that the processing conditions are appropriate in an ST state earlier than the final processing state, wafer quality and dicing performance can be guaranteed.

[0019] The control unit is configured to further execute a seventh process, which corrects the processing conditions based on the determination that the processing conditions are inappropriate. This configuration allows for the correction of processing conditions according to the determination result, thus better ensuring the quality of the processed wafer.

[0020] The control unit can also be configured to perform luminance calibration processing. This luminance calibration process involves performing imaging with a predetermined brightness for each region along the thickness direction of the wafer captured by the imaging unit, and controlling the imaging unit to output light in an amount corresponding to the position of each region along the wafer's thickness direction. Based on this configuration, the amount of light from the imaging unit can be determined to achieve a fixed or optimal brightness for each imaging region along the wafer's thickness direction (depth direction). This allows for appropriate specification of the state of each modified region.

[0021] The control unit can further perform shading compensation processing. This shading compensation processing involves controlling the camera unit to capture shading images of various areas along the thickness direction of the wafer before processing the modified area. After processing the modified area, the system specifically obtains the difference data between the images of each area captured by the camera unit and the corresponding shading images. In the second and fourth processes, the state of the modified area is determined based on this difference data. The difference data obtained through shading compensation processing is image data after noise such as device patterns, point defects, and uneven brightness has been removed; it only contains image data of the modified area and crack conditions to be observed. By determining the state of the modified area based on this difference data, the state of the processed wafer can be appropriately determined. This better ensures the quality of the processed wafer.

[0022] The control unit can also be configured to perform aberration correction processing. This aberration correction processing controls at least one of the irradiation unit and the imaging unit by performing aberration corrections corresponding to the position in the thickness direction of each region of the wafer being imaged by the imaging unit. For example, in the case of full dicing, since the intervals between each modified region are narrow and the amount of crack propagation is also small, it is impossible to obtain a clear observation without applying aberration correction to each position in the thickness direction of the wafer. As mentioned above, by performing aberration corrections corresponding to the thickness of the wafer for each region in the thickness direction of the wafer, a clear observation can be obtained, and the state of the modified region can be more appropriately identified.

[0023] One aspect of the laser processing method of the present invention includes the following steps: processing a wafer according to a first processing condition, the first processing condition being set such that a first modified region and a second modified region located further on the incident surface of the laser light than the first modified region are formed inside the wafer by irradiating the wafer with laser light; and determining whether the first processing condition is appropriate based on the imaging results of the wafer processed according to the first processing condition, specifying the state of the first modified region and the second modified region, and determining whether the first processing condition is appropriate based on the specified information; and processing a wafer according to a second processing condition, the second processing condition being set such that a first modified region and a second modified region are formed inside the wafer by irradiating the wafer with laser light, and a third modified region is formed between the first modified region and the second modified region in the thickness direction of the wafer; and determining whether the second processing condition is appropriate based on the imaging results of the wafer processed according to the second processing condition, specifying the state of the first modified region, the second modified region and the third modified region, and determining whether the second processing condition is appropriate based on the specified information. [Invention Effects]

[0024] According to one aspect of the present invention, a laser processing apparatus and a laser processing method can be provided that can guarantee the quality of a wafer when an outer modified region and an inner modified region are formed in the thickness direction of the wafer. Simple Explanation of the Diagram

[0025] [Figure 1] is a structural diagram of a laser processing apparatus in one embodiment. [Figure 2] is a top view of a wafer in one embodiment. [Figure 3] is a cross-sectional view of a portion of the wafer shown in Figure 2. [Figure 4] is a structural diagram of the laser irradiation unit shown in Figure 1. [Figure 5] is a diagram of the structure of the inspection camera unit shown in Figure 1. [Figure 6] is a diagram of the camera unit for alignment correction shown in Figure 1. [Figure 7] is a cross-sectional view of a wafer used to illustrate the imaging principle performed by the inspection camera unit shown in Figure 5, and the images of various parts generated by the inspection camera unit. [Figure 8] is a cross-sectional view of a wafer used to illustrate the imaging principle caused by the inspection camera unit shown in Figure 5, and images of various parts caused by the inspection camera unit. [Figure 9] is a SEM image of the modified region and cracks that have formed inside the semiconductor substrate. [Figure 10] is a SEM image of the modified region and cracks that have formed inside the semiconductor substrate. [Figure 11] is an optical path diagram illustrating the imaging principle performed by the inspection camera unit shown in Figure 5, and a schematic diagram showing the image at the focal point caused by the inspection camera unit. [Figure 12] is an optical path diagram illustrating the imaging principle performed by the inspection camera unit shown in Figure 5, and a schematic diagram showing the image at the focal point caused by the inspection camera unit. [Figure 13] is a diagram illustrating an example of processing performed by a laser irradiation unit. [Figure 14] is a diagram illustrating an example of processing performed by a laser irradiation unit. [Figure 15] is a diagram illustrating the process of deriving the processing conditions. [Figure 16] is a diagram illustrating the state of the wafer corresponding to the processing state of the outer SD layer. [Figure 17] is a diagram illustrating the state of the wafer corresponding to the processing state of the inner SD layer. [Figure 18] is a diagram illustrating the judgment and processing. [Figure 19] is a diagram illustrating the judgment and processing. [Figure 20] is a diagram illustrating the detection of cracks. [Figure 21] is a diagram illustrating the detection of cracks. [Figure 22] is a diagram illustrating indentation detection. [Figure 23] is a diagram illustrating indentation detection. [Figure 24] is a diagram illustrating indentation detection. [Figure 25] is a screen image related to the processing conditions exported. [Figure 26] is a screen image related to the processing conditions exported. [Figure 27] is a screen image related to the processing conditions exported. [Figure 28] is a flowchart of one example of a laser processing method (processing condition derivation process). [Figure 29] is a flowchart of another example of a laser processing method (processing condition derivation process). [Figure 30] is a diagram illustrating the difference in the imaging range caused by the processing method. [Figure 31] is a flowchart of the brightness correction process. [Figure 32] is a flowchart of shadow compensation processing. [Figure 33] is a flowchart of the laser processing method (processing condition derivation process) with various correction processes. [Figure 34] shows the image after various corrections. Implementation

[0026] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Furthermore, the same or equivalent parts in each drawing are marked with the same symbols, and repeated descriptions are omitted. [Composition of Laser Processing Equipment]

[0027] As shown in Figure 1, the laser processing apparatus 1 includes a stage 2, a laser irradiation unit 3 (irradiation section), multiple camera units 4, 5, and 6, a drive unit 7, a control unit 8, and a display 150 (input section, display section). The laser processing apparatus 1 is a device that forms a modified region 12 on an object 11 by irradiating the object 11 with laser light L.

[0028] The stage 2 supports the object 11 by adsorbing, for example, a film already attached to the object 11. The stage 2 is movable in both the X and Y directions and can rotate about an axis parallel to the Z direction as its center line. Furthermore, the X and Y directions are mutually perpendicular first and second horizontal directions; the Z direction is the vertical direction.

[0029] The laser irradiation unit 3 focuses the laser light L, which is penetrable to the object 11, and irradiates the object 11. When the laser light L is focused inside the object 11, which is supported by the stage 2, the laser light L will be absorbed in the part corresponding to the focusing point C of the laser light L, and a modified region 12 will be formed inside the object 11.

[0030] The modified region 12 is a region whose density, refractive index, mechanical strength, and other physical properties differ from those of the surrounding unmodified regions. Examples of modified regions 12 include melt-processed regions, cracked regions, regions with insulation failure, and regions with changes in refractive index. The modified region 12 has the characteristic that cracks easily extend from the modified region 12 toward the incident side of the laser light L and to the opposite side. This characteristic of the modified region 12 is utilized in the cutting of the object 11.

[0031] As an example, it is formed in the following manner: when the stage 2 is moved along the X direction and the focusing point C is moved relative to the object 11 along the X direction, a plurality of modified light spots 12s will be arranged in a row along the X direction. A modified light spot 12s is formed by irradiation with a single pulse of laser light L. A row of modified regions 12 is a collection of a plurality of modified light spots 12s arranged in a row. Adjacent modified light spots 12s may be connected to each other or separated by the relative moving speed of the focusing point C relative to the object 11 and the repetition frequency of the laser light L.

[0032] The camera unit 4 is used to capture images of the modified region 12 formed on the object 11, and the front end of the crack extending from the modified region 12.

[0033] Camera units 5 and 6, under the control of control unit 8, use light passing through the object 11 to photograph the object 11 supported by the platform 2. The images obtained by camera units 5 and 6 are used to provide an example of aligning the position of the laser light L.

[0034] The drive unit 7 supports the laser irradiation unit 3 and a plurality of camera units 4, 5, and 6. The drive unit 7 moves the laser irradiation unit 3 and the plurality of camera units 4, 5, and 6 along the Z direction.

[0035] The control unit 8 controls the operation of the stage 2, the laser irradiation unit 3, the plurality of camera units 4, 5, and 6, and the drive unit 7. The control unit 8 is configured as a computer device including a processor, memory, storage, and communication devices. In the control unit 8, the processor executes software (programs) loaded into the memory, controls the reading and writing of data in the memory and storage, and performs communication via the communication devices.

[0036] The display 150 has the functions of an input section for receiving information from a user and a display section for displaying information to the user.

[0037] [The Composition of Objects] As shown in Figures 2 and 3, the object 11 of this embodiment is a wafer 20. The wafer 20 includes a semiconductor substrate 21 and a functional element layer 22. Furthermore, although the wafer 20 is described in this embodiment as having a functional element layer 22, the wafer 20 may or may not have a functional element layer 22, and may also be a bare wafer. The semiconductor substrate 21 has a surface 21a (second surface) and a back surface 21b (first surface). The semiconductor substrate 21 is, for example, a silicon substrate. The functional element layer 22 is formed on the surface 21a of the semiconductor substrate 21. The functional element layer 22 includes a plurality of functional elements 22a arranged in two dimensions along the surface 21a. The functional elements 22a are, for example, light-receiving elements such as photodiodes, light-emitting elements such as laser diodes, and circuit elements such as memory. Functional element 22a may also be formed by stacking multiple layers to form a three-dimensional structure. Furthermore, although a notch 21c indicating the crystal orientation is provided on the semiconductor substrate 21, an orientation flat may be provided instead of the notch 21c.

[0038] The wafer 20 is cut along a plurality of dicing lines 15, one for each functional element 22a. The plurality of dicing lines 15, when viewed from the thickness direction of the wafer 20, pass between the individual elements of the plurality of functional elements 22a. More specifically, the dicing lines 15, when viewed from the thickness direction of the wafer 20, pass through the center (center in the width direction) of the street region 23. The street region 23 extends within the functional element layer 22, passing between adjacent functional elements 22a. In this embodiment, the plurality of functional elements 22a are arranged in a matrix along the surface 21a; the plurality of dicing lines 15 are arranged in a grid pattern. Furthermore, although the dicing lines 15 are virtual lines, they can also be actual drawn lines.

[0039] [Composition of the laser irradiation unit] As shown in Figure 4, the laser irradiation unit 3 includes a light source 31, a spatial light modulator 32, and a focusing lens 33. The light source 31 outputs laser light L, for example, through pulse oscillation. The spatial light modulator 32 modulates the laser light L output from the light source 31. The spatial light modulator 32 can be, for example, a spatial light modulator (SLM) for reflective liquid crystal on silicon (LCOS). The focusing lens 33 focuses the laser light L modulated by the spatial light modulator 32. Alternatively, the focusing lens 33 can also be a correction ring lens.

[0040] In this embodiment, the laser irradiation unit 3 irradiates the wafer 20 with laser light L from the back side 21b of the semiconductor substrate 21 along a plurality of dicing lines 15, thereby forming two rows of modified regions 12a and 12b inside the semiconductor substrate 21 along the plurality of dicing lines 15. Modified region 12a is the modified region closest to the surface 21a among the two rows of modified regions 12a and 12b. Modified region 12b is the modified region closest to modified region 12a among the two rows of modified regions 12a and 12b, and is also the modified region closest to the back side 21b.

[0041] The two modified regions 12a and 12b are adjacent in the thickness direction (Z direction) of the wafer 20. The two modified regions 12a and 12b are formed by moving two focusing points C1 and C2 relative to the semiconductor substrate 21 along the dicing line 15. The laser light L is modulated, for example, by a spatial light modulator 32 so that focusing point C2 is positioned behind focusing point C1 in the travel direction and on the incident side of the laser light L. Furthermore, the formation of the modified regions can be single-focus or multi-focus, and can be a single pulse or multiple pulses.

[0042] Laser irradiation unit 3 irradiates laser light L from the back side 21b of semiconductor substrate 21 toward wafer 20 along a plurality of dicing lines 15. As an example, this is relative to a single-crystal silicon substrate with a thickness of 400 μm. <100> The semiconductor substrate 21 is used as a substrate. Two focusing points C1 and C2 are aligned at positions 54 μm and 128 μm away from the surface 21a, respectively, and laser light L is irradiated from the back side 21b of the semiconductor substrate 21 toward the wafer 20 along a plurality of dicing lines 15. At this time, for example, under the condition that the cracks 14 covering the two rows of modified regions 12a and 12b reach the surface 21a of the semiconductor substrate 21, the wavelength of the laser light L is set to 1099 nm, the pulse width is set to 700 nm, and the repetition frequency is set to 120 kHz. Furthermore, the output of the laser light L in focusing point C1 is set to 2.7 W, the output of the laser light L in focusing point C2 is set to 2.7 W, and the relative moving speed of the two focusing points C1 and C2 relative to the semiconductor substrate 21 is set to 800 mm / s. Furthermore, for example, when the number of processing paths is set to 5, relative to the aforementioned wafer 20, for example, ZH80 (position 328 μm from surface 21a), ZH69 (position 283 μm from surface 21a), ZH57 (position 234 μm from surface 21a), ZH26 (position 107 μm from surface 21a), and ZH12 (position 49.2 μm from surface 21a) can also be set as processing positions. In this case, for example, the wavelength of the laser light L can also be 1080 nm, the pulse width can also be 400 nsec, the repetition frequency can also be 100 kHz, and the moving speed can also be 490 mm / s.

[0043] The formation of the modified regions 12a and 12b and the crack 14 in these two columns is performed under the following conditions. That is, in subsequent processes, for example, the semiconductor substrate 21 is thinned by grinding the back side 21b of the semiconductor substrate 21 to expose the crack 14 on the back side 21b, and the wafer 20 is cut into a plurality of semiconductor devices along a plurality of dicing lines 15.

[0044] [Composition of the inspection camera unit] As shown in Figure 5, the imaging unit 4 (imaging section) includes a light source 41, a mirror 42, an objective lens 43, and a light detection unit 44. The imaging unit 4 is used to image the wafer 20. The light source 41 outputs light I1 that is penetrable to the semiconductor substrate 21. The light source 41 is, for example, composed of a halogen lamp and a filter, and is used to output light I1 in the near-infrared region. The light I1 output from the light source 41 is reflected by the mirror 42 and passes through the objective lens 43, and illuminates the wafer 20 from the back side 21b of the semiconductor substrate 21. At this time, the stage 2 supports the wafer 20, which has two rows of modified regions 12a and 12b, as described above.

[0045] Objective lens 43 allows light I1 reflected from the surface 21a of semiconductor substrate 21 to pass through. In other words, objective lens 43 allows light I1 that has propagated through semiconductor substrate 21 to pass through. The aperture number (NA) of objective lens 43 is, for example, 0.45 or more. Objective lens 43 has a correction ring 43a. The correction ring 43a corrects aberrations generated in light I1 within semiconductor substrate 21, for example, by adjusting the distance between the plurality of lenses constituting objective lens 43. Furthermore, the means of correcting aberrations is not limited to correction ring 43a, and may also include other correction means such as spatial light modulators. Light detection unit 44 detects light I1 that has passed through objective lens 43 and lens 42. Light detection unit 44 is, for example, constructed using an InGaAs camera, and is used to detect light I1 in the near-infrared region. Furthermore, the means of detecting (capturing) light I1 in the near-infrared region is not limited to InGaAs cameras; any other imaging method can be used, such as a confocal microscope or other transmission imaging techniques.

[0046] Camera unit 4 is capable of capturing images of the front ends of each of the two modified regions 12a and 12b, and each of the plurality of cracks 14a, 14b, 14c, and 14d (details will be described later). Crack 14a is a crack extending from the modified region 12a to the surface 21a side. Crack 14b is a crack extending from the modified region 12a to the back side 21b side. Crack 14c is a crack extending from the modified region 12b to the surface 21a side. Crack 14d is a crack extending from the modified region 12b to the back side 21b side.

[0047] [Composition of the camera unit for alignment correction] As shown in Figure 6, the imaging unit 5 includes a light source 51, a lens 52, a lens 53, and a light detection unit 54. The light source 51 outputs light I2 that is permeable to the semiconductor substrate 21. The light source 51 is, for example, composed of a halogen lamp and a filter, and is used to output light I2 in the near-infrared region. The light source 51 may also be common to the light source 41 of the imaging unit 4. The light I2 output from the light source 51 is reflected by the lens 52 and passes through the lens 53, and illuminates the wafer 20 from the back side 21b of the semiconductor substrate 21.

[0048] Lens 53 allows light I2 reflected from the surface 21a of the semiconductor substrate 21 to pass through. In other words, lens 53 allows light I2 that has already propagated on the semiconductor substrate 21 to pass through. The number of apertures in lens 53 is 0.3 or less. That is, the number of apertures in the objective lens 43 of the imaging unit 4 is greater than the number of apertures in lens 53. Light detection unit 54 detects the light I2 that has passed through lens 53 and lens 52. Light detection unit 54 is, for example, constructed using an InGaAs camera, and is used to detect light I2 in the near-infrared region.

[0049] Camera unit 5, under the control of control unit 8, illuminates wafer 20 with light I2 from the back side 21b and detects the light I2 returning from surface 21a (functional element layer 22), thereby capturing an image of functional element layer 22. Similarly, camera unit 6, also under the control of control unit 8, illuminates wafer 20 with light I2 from the back side 21b and detects the light I2 returning from the formation locations of modified regions 12a and 12b in semiconductor substrate 21, thereby acquiring an image of the area including modified regions 12a and 12b. These images are used for aligning the irradiation position of laser light L. Camera unit 6 has the same configuration as camera unit 5, except that lens 53 has a lower magnification (e.g., 6x in camera unit 5, 1.5x in camera unit 6), and is used for alignment in the same way.

[0050] [By examining the imaging principles employed by the camera unit] As shown in Figure 7, using the imaging unit 4 shown in Figure 5, the focus F (the focus of the objective lens 43) is moved from the back side 21b towards the surface 21a to the semiconductor substrate 21 where the cracks 14 extending from the modified regions 12a and 12b in the two columns reach the surface 21a. In this case, when the focus F is aligned from the back side 21b to the leading edge 14e of the cracks 14 extending from the modified region 12b to the back side 21b, the leading edge 14e can be identified (the image on the right side of Figure 7). However, even if the focus F is aligned from the back side 21b to the cracks 14 themselves and the leading edge 14e of the cracks 14 reaching the surface 21a, they cannot be identified (the image on the left side of Figure 7). Furthermore, when the focus F is aligned from the back side 21b to the surface 21a of the semiconductor substrate 21, the functional element layer 22 can be identified.

[0051] Furthermore, as shown in Figure 8, using the camera unit 4 shown in Figure 5, the focus F is moved from the back side 21b towards the surface 21a for the semiconductor substrate 21 where the cracks 14 extending from the modified regions 12a and 12b in the two columns do not reach the surface 21a. In this case, even if the focus F is aligned with the front end 14e of the crack 14 extending from the modified region 12a to the surface 21a from the back side 21b, the front end 14e cannot be identified (the image on the left in Figure 8). However, when the focus F is aligned with the region opposite to the back side 21b from the back side 21b (that is, the region opposite to the functional element layer 22 from the surface 21a), and a virtual focus Fv symmetrical to the focus F on the surface 21a is located at the front end 14e, the front end 14e can be identified (the image on the right in Figure 8). Furthermore, the virtual focus Fv is a point symmetrical to the focus F on the surface 21a after considering the refractive index of the semiconductor substrate 21.

[0052] If the crack 14 itself cannot be confirmed as described above, it is assumed that this is because the width of the crack 14 is smaller than the wavelength of the light ray I1 used as illumination. Figures 9 and 10 are SEM (Scanning Electron Microscope) images of the modified region 12 and the crack 14 formed inside the semiconductor substrate 21 belonging to the silicon substrate. Figure 9(b) is a magnified image of region A1 shown in Figure 9(a); Figure 10(a) is a magnified image of region A2 shown in Figure 9(b); Figure 10(b) is a magnified image of region A3 shown in Figure 10(a). Thus, the width of the crack 14 is about 120 nm, which is smaller than the wavelength of the light ray I1 in the near-infrared region (e.g., 1.1 μm to 1.2 μm).

[0053] Based on the assumed imaging principle above, the following applies. As shown in Figure 11(a), when the focal point F is in the air, the light ray I1 does not return, thus a black image can be obtained (the image on the right side of Figure 11(a)). As shown in Figure 11(b), when the focal point F is located inside the semiconductor substrate 21, the light ray I1 reflected from the surface 21a returns, thus a white image can be obtained (the image on the right side of Figure 11(b)). As shown in Figure 11(c), when the focal point F is aligned with the modified region 12 from the back side 21b, due to the modified region 12, a portion of the light ray I1 reflected and returned from the surface 21a will be absorbed and scattered, thus an image of the modified region 12 blackly projected onto a white background can be obtained (the image on the right side of Figure 11(c)).

[0054] As shown in Figures 12(a) and (b), when the focal point F is aligned with the front end 14e of the crack 14 from the back side 21b, due to optical specificities (stress concentration, distortion, atomic density discontinuity, etc.) generated near the front end 14e, and the closure of light rays generated near the front end 14e, a portion of the light rays I1 reflected and returned from the surface 21a will be scattered, reflected, interfered with, or absorbed. Therefore, an image of the front end 14e with a black tint against a white background can be obtained (the image on the right side of Figures 12(a) and (b)). As shown in Figure 12(c), when the focal point F is aligned with a portion other than the front end 14e of the crack 14 from the back side 21b, at least a portion of the light rays I1 reflected from the surface 21a will return, thus obtaining a white image (the image on the right side of Figure 12(c)).

[0055] [Processing Conditions Export Processing] The following describes the processing condition derivation process performed before processing to form modified regions for purposes such as dicing wafer 20. Furthermore, the processing condition determination process described below can also be performed in processes other than the processing condition derivation process, such as various inspection processes after the processing conditions are derived. Processing conditions refer to the recipe indicating the conditions and sequence under which wafer 20 is processed.

[0056] First, the processing method for the object with derived processing conditions will be explained with reference to Figures 13 and 14. Figures 13 and 14 illustrate an example of processing performed by the laser irradiation unit 3. As shown in Figure 13, the laser irradiation unit 3 aims to increase the formation speed of the modified region by forming a plurality of laser light focusing points while simultaneously forming a modified region. In the example shown in Figure 13, the spatial light modulator 32 displays at least a plurality of (in this case, two) branching patterns for splitting the laser light L into a plurality of (two in this case) branching patterns. Thereby, the laser light L incident on the spatial light modulator 32 is split into two laser lights L1 and L2 in the spatial light modulator 32, and focused by the focusing lens 33 to form focusing points C1 and C2.

[0057] The spatial light modulator 32 splits the laser light L by forming focal points C1 and C2 at different positions along the Z direction, at least intersecting with the back surface 21b of the incident surface of the laser light L on the wafer 20. That is, the laser irradiation unit 3 irradiates the laser light by simultaneously forming a plurality of focal points along the thickness direction of the wafer 20. Therefore, by moving the focal points C1 and C2 relative to the wafer 20, two rows of modified regions 121 and 122 are formed at different positions along the Z direction, serving as the modified region 12. Modified region 121 corresponds to the laser light L1 and its focal point C1; modified region 122 corresponds to the laser light L2 and its focal point C2. The focusing point C1 and the modified region 121 are located on the opposite side of the back surface 21b (the surface 21a side of the wafer 20) relative to the focusing point C2 and the modified region 122. The spatial light modulator 32 makes the distance Dz (vertical divergence) between the focusing point C1 and the focusing point C2 in the Z direction variable by adjusting the divergence pattern. Furthermore, the spatial light modulator 32 can change the horizontal distance Dx (lateral divergence) between the focusing point C1 and the focusing point C2 in the X direction (in the illustrated example) when splitting the laser light L into laser light L1 and L2. In the example of Figure 13, the spatial light modulator 32 makes the distance Dx larger than 0 by positioning the focusing point C1 further forward than the focusing point C2 in the X direction (processing travel direction).

[0058] In the case where laser light is irradiated by simultaneously forming a plurality of focal points C1 and C2 along the thickness direction of wafer 20, cracks extending from the modified region (e.g., modified region 121) formed at one focal point (e.g., focal point C1) may affect the formation of the modified region (e.g., modified region 122) and the propagation of cracks at the other focal point (e.g., focal point C2). In this case, the amount of cracks at the other focal point may become unstable, and the quality of the cut surface, i.e., the processing quality, when the wafer 20 is cut with the cracks as the boundary may be reduced.

[0059] In contrast, for example, in the processing example shown in FIG14, the distance Dz in the Z direction between the focal points C1 and C2 is set to be relatively large. Therefore, as shown in FIG14(a) and (b), the cracks 121c extending from the modified region 121 and 122c extending from the modified region 122 are irradiated with laser beams L1 and L2 in a manner that they are not connected to each other. Then, in the processing example shown in FIG14, as shown in FIG14(b) and (c), laser beam L3 is irradiated in such a way that a focal point C3 for laser beam L3 is formed at a position between focal points C1 and C2, thereby forming cracks 123c extending from the modified region 123 formed on the third focal point C3 and extending throughout the modified regions 121 and 122. Cracks 122c and 121c extend further by forming crack 123c, and together form crack 12c that extends from the surface 21a to the back surface 21b.

[0060] Thus, based on the processing method of forming sufficiently separated outer SD layers (modified regions 121, 122) in a manner where the cracks are not interconnected, and then forming inner SD layers (modified regions 123) between the outer SD layers in the thickness direction of wafer 20, the cracks extending from one modified region of the simultaneously formed modified regions will not affect the formation of the other modified region or the extension of its cracks. Furthermore, it is possible to suppress the degradation of processing quality while appropriately setting wafer 20 to a fully diced state. A fully diced state refers to a state where the cracks in wafer 20 have reached the back surface 21b and the surface 21a. Moreover, the following level of state is assumed to be a fully diced state: even if there are very small unconnected cracks 14 inside wafer 20, these unconnected areas can still be connected using standard expanded tape (e.g., expanded tape with an expansion amount of 15 mm and an expansion speed of 5 mm / sec) and wafer 20 can be diced. The term "parts where the microcracks 14 are not connected" refers to resolidified areas in the modified layer (areas that melt and then resolidify during laser irradiation), or black stripe areas where the cracks 14 are not connected to improve wafer quality. However, the processing method described above is complex, and it is difficult to properly set processing conditions suitable for this method. Hereinafter, the processing conditions for processing wafer 20 using the above-described processing method (forming outer SD layers with sufficiently separated cracks and then forming inner SD layers between the outer SD layers) will be explained. The processing conditions for setting wafer 20 to a fully diced state using the above-described processing method will also be explained. Furthermore, the full dicing process can be performed either by incident laser light from the back side 21b of wafer 20, as described above, or by incident laser light from the surface side 21a of wafer 20.

[0061] In the above-described processing method, inner SD layers are formed between the outer SD layers after the outer SD layers are formed. For example, as shown in FIG15(a), such a processing method can be considered as follows: at two focal points, a pattern of forming a pair of outer SD layers (SD1, SD2) is initially formed, followed by forming a pair of inner SD layers (SD2, SD2); or, at one focal point, a pattern of forming an outer SD layer (SD1) on the surface 21a side, an outer SD layer (SD2) on the back surface 21b side, an inner SD layer (SD3) on the surface 21a side, and an inner SD layer (SD4) on the back surface 21b side is formed in sequence. In either pattern, the aspect of forming inner SD layers after forming outer SD layers is common. Then, in such a processing method, it is necessary, for example, to separately set the processing conditions for the formation of outer SD layers and the processing conditions for the formation of inner SD layers. Therefore, as shown in Figure 15(b), in the processing condition derivation process of this embodiment, not only in the final processing state of wafer 20, but also in the state after processing only the outer SD layer and the state after processing only the inner SD layer, the appropriateness of the processing conditions will be determined, and the processing conditions will be derived based on the determination results of the appropriateness of each processing condition.

[0062] Specifically, the control unit 8 sequentially executes the following: an outer SD layer formation process (first process), which controls the laser irradiation unit 3 with a first processing condition set to form only the outer SD layer; a second process, which determines the appropriateness of the first processing condition based on the state of the outer SD layer formed in the outer SD layer formation process; an inner SD layer formation process (fifth process), which controls the laser irradiation unit 3 with a third processing condition set to form only the inner SD layer; a sixth process, which determines the appropriateness of the third processing condition based on the state of the inner SD layer formed in the inner SD layer formation process; a full SD layer formation process (third process), which controls the laser irradiation unit 3 with a second processing condition set to form both the outer and inner SD layers; and a fourth process, which determines the appropriateness of the second processing condition based on the state of the outer and inner SD layers formed in the full SD layer formation process. Then, the control unit 8 determines the final processing conditions based on the judgment results of each processing condition (details will be described later). The following is a detailed explanation of each process performed by the control unit 8.

[0063] (The process of forming the outer SD layer and determining the suitability of the first processing conditions) The control unit 8 performs a first processing condition to control the formation of the outer SD layer of the laser irradiation unit 3 by irradiating the wafer 20 with laser light. This first processing condition is set such that, as shown in FIG16, a modified region 121 (first modified region) serving as the outer SD layer and a modified region 122 (second modified region) located further inside the wafer 20 on the back surface 21b, which is the incident surface of the laser light, are formed. The control unit 8, for example, temporarily determines the first processing condition, which includes the irradiation conditions of the laser light performed by the laser irradiation unit 3, based on information received by the display 150 (see FIG25). The processing condition includes, for example, the laser light pulse energy (including output and frequency adjustment), aberration correction, pulse width, pulse pitch, number of modified layers, and number of focus points. The information received by the display 150 (see Figure 25) includes, for example, wafer thickness, final processing target (full dicing, etc.).

[0064] After the outer SD layer is formed, the control unit 8 specifies the state of the modified regions 121 and 122, which are the outer SD layer, based on the signal output from the camera unit 4 (i.e., the imaging result), and determines whether the first processing condition (temporarily determined first processing condition) for forming the outer SD layer is appropriate based on the specified information. The control unit 8 specifies the state of the modified regions 121 and 122 and the state of the cracks 14 extending from the modified regions 121 and 122 as the state of the modified regions 121 and 122.

[0065] Figure 16 illustrates the states of wafer 20 corresponding to the processing state of the outer SD layer. In Figures 16(a) to 16(c), the upper layer shows the cross-sectional state of wafer 20 with only the outer SD layer formed, and the lower layer shows the cross-sectional state of wafer 20 with the inner SD layer further formed from the upper layer state. Figure 16(a) shows the state where the breaking force (related cutting force) applied to wafer 20 by the laser light irradiated to form the outer SD layer is relatively weak, Figure 16(b) shows the state where the breaking force is optimal, and Figure 16(c) shows the state where the breaking force is relatively strong.

[0066] As shown in Figure 16(b), when the breaking force of the laser light used to form the outer SD layer is appropriate, as shown in the lower layer of Figure 16(b), when the inner SD layer (modified regions 123a and 123b) continues to be formed on the outer SD layer, the wafer 20 will be in a fully cut state where the crack 14 has reached the back surface 21b and the surface 21a. Furthermore, the width of the crack 14 serpentinizing in the direction intersecting the thickness direction of the wafer 20 can be suppressed to below a predetermined value (e.g., below 2 μm). In this case, the wafer 20 can be completely cut (divided) without producing any debris residue after processing. Therefore, the control unit 8 determines that the first processing condition is appropriate when the state of the modified regions 121 and 122, which are the outer SD layers, is the state shown in the upper layer of Figure 16(b) (details of the determination method will be described later).

[0067] On the other hand, as shown in the upper layer of FIG16(a), when the breaking force used to form the outer SD layer is weak, the extension of the cracks 14 extending from the modified regions 121 and 122 will be shorter. Furthermore, as shown in the lower layer of FIG16(a), even if the inner SD layer (modified regions 123a and 123b) is subsequently formed, it will not reach the fully cut state where the cracks 14 in the wafer 20 have reached the back surface 21b and the surface 21a. In this case, fragment residue (e.g., about 30% fragment residue) will be generated after processing, and the processing quality cannot be guaranteed. Therefore, the control unit 8 determines that the first processing condition is inappropriate when the state of the modified regions 121 and 122, which are the outer SD layers, is the state shown in the upper layer of FIG16(a) (details of the determination method will be described later). Furthermore, as shown in the upper layer of Figure 16(c), when the breaking force used to form the outer SD layer is strong, the extension of the crack 14 will become excessively large, and regardless of whether it is before the formation of the inner SD layer, it will become a half-cut (hall-cut: HC) state where the crack 14 has reached the back surface 21b, or a BHC (bottom side half-cut) state where the crack 14 has reached the surface 21a. In this case, the serpentine amount of the crack 14 will also increase. Then, as shown in the lower layer of Figure 16(c), because the crack 14 of the outer SD layer with a large extension will hinder the formation of the inner SD layer, it is not easy to become a full-cut state, and fragment residue (e.g., about 10% fragment residue) will be generated after processing, and the processing quality cannot be guaranteed. Therefore, the control unit 8 determines that the first processing condition is not appropriate when the state of the modified region 121 and modified region 122, which are the outer SD layer, is the state shown in the upper layer of Figure 16(c) (details of the determination method will be described later).

[0068] The method for determining the first processing condition will be explained in detail with reference to Figures 18(a) and 19(a). The control unit 8 determines the appropriateness of the first processing condition based on the internal observation results obtained by focusing the focal point F on each point from the back side 21b using the camera unit 4. As shown in Figure 18(a), the control unit 8 determines information such as whether the crack 14 extends to the back side 21b (whether it is in the HC state), the amount of cracks inside the wafer 20 (the extension amount of crack 14), the presence or absence of unevenness of crack 14 inside the wafer 20, the presence or absence of black stripes (whether the upper crack leading to crack 14 extending from the modified region 121 towards the back side 21b can be observed), the position of the modified layer (the position of the modified regions 121, 122), and whether crack 14 extends to the surface 21a (whether it is in the BHC state). Figure 19(a) shows a portion of the internal observation results of the wafer 20 with the outer SD layer formed (including the observation results of the back side 21b, which is the incident surface). The upper layer of Figure 19(a) shows the observation results of the back side 21b, which is the incident surface. As shown in the upper layer of Figure 19(a), when the crack 14 reaches the back side 21b (HC state), the crack 14 can be observed in the back side 21b, which is the incident surface. On the other hand, when the crack 14 does not reach the back side 21b (ST state), the crack 14 cannot be observed in the back side 21b. Furthermore, whether the crack 14 reaches the back side 21b can also be determined by whether the leading end of the crack 14 extending from the modified region 122 in the upward direction (back side 21b direction) can be observed. That is, if the crack 14 extending from the modified region 122 to the back surface 21b is observable, it can be determined to be in the ST state and the crack 14 does not reach the back surface 21b; if the crack 14 is not observable at its tip, it can be determined to be in the HC state and the crack 14 reaches the back surface 21b. The intermediate layer of Figure 19(a) shows the observation results of the area between the modified region 121 and the modified region 122 in the thickness direction of the wafer 20. As shown in the intermediate layer of Figure 19(a), the observation results can be used to distinguish between the case with black stripes (the case where the tip of the upper crack can be confirmed, and the upper crack is the crack 14 extending from the modified region 121 to the back surface 21b) and the case without black stripes (the case where the tip of the upper crack cannot be confirmed). The lower layer of Figure 19(a) shows the observation results of the area between the modified region 121 and the surface 21a in the thickness direction of the wafer 20. As shown in the lower layer of Figure 19(a), based on the observation results, it is possible to distinguish between the case where the crack 14 reaches the surface 21a and the front end of the crack 14 extending from the modified region 121 to the surface 21a side cannot be identified (the case of BHC state), and the case where the crack 14 does not reach the surface 21a and the front end of the crack 14 can be observed (the case of ST state).

[0069] The control unit 8 can also specify whether the crack 14 extends to the back surface 21b in an HC state, and determine whether the first processing condition is appropriate based on whether it is in an HC state. Specifically, the control unit 8 can also determine that the first processing condition is inappropriate if it is in an HC state. Furthermore, the control unit 8 can also specify whether the crack 14 extends to the surface 21a in a BHC state, and determine whether the first processing condition is appropriate based on whether it is in a BHC state. Whether it is appropriate or not, the control unit 8 can also determine that the first processing condition is inappropriate if it is in a BHC state. These determinations are performed by the following judgment: "In the case where the final state is set to full cut, if the crack 14 still reaches the back surface 21b (or surface 21a) regardless of whether it is in a state where only the outer SD layer is formed, the breaking force of the first processing condition is too strong."

[0070] The control unit 8 can also specify the amount of cracks inside the wafer 20 and determine whether the first processing conditions are appropriate based on the amount of cracks. Specifically, the control unit 8 can also determine that the first processing conditions are appropriate when, for example, the amount of cracks is within approximately ±5 μm of the optimal value. Furthermore, the control unit 8 can also specify the presence or absence of unevenness in the cracks 14 inside the wafer 20 and determine whether the first processing conditions are appropriate based on the presence or absence of such unevenness. Specifically, the control unit 8 can also determine that the first processing conditions are appropriate when there are no unevenness in the cracks 14 inside the wafer 20.

[0071] The control unit 8 can also specify the presence or absence of black stripes, specifically whether the leading edge of the upper crack can be observed. This upper crack is the crack 14 extending from the modified region 121 to the back surface 21b side. The fact that the leading edge of the upper crack can be observed means that the crack 14 extending from the modified regions 121 and 122, which are mutually exclusive modified regions, are not connected to each other. That is, the control unit 8 can also specify whether the crack 14 extending from the modified regions 121 and 122, which are mutually exclusive modified regions, are connected to each other. Then, the control unit 8 can also determine that the first processing condition is inappropriate if the crack 14 extending from the modified regions 121 and 122 are connected to each other (in the case of no black stripes). This determination is performed by the following judgment: "Since the cracks in the outer SD layer are connected to each other, the extension of the mutual cracks will be affected, therefore the breaking force of the first processing condition is too strong."

[0072] The control unit 8 can also specify the location of the modified layer (the location of the modified regions 121 and 122) and determine whether the first processing conditions are appropriate based on that location. Specifically, the control unit 8 can also determine that the first processing conditions are appropriate when, for example, the location of the modified layer is within approximately ±4 μm of the optimal value.

[0073] (The process of forming the inner SD layer and determining the suitability of the third processing condition) The control unit 8 performs a third processing condition control on the formation of the inner SD layer of the laser irradiation unit 3 by irradiating the wafer 20 with laser light. This third processing condition is set in a manner shown in FIG. 17, forming modified regions 123a and 123b (third modified regions) as the inner SD layer inside the wafer 20. The control unit 8 temporarily determines the third processing condition, which includes the irradiation conditions of the laser light performed by the laser irradiation unit 3, based on information received, for example, by the display 150 (see FIG. 25). The processing condition includes, for example, the laser light pulse energy (including output and frequency adjustment), aberration correction, pulse width, pulse spacing, number of modified layers, and number of focus points. The information received by the display 150 (see FIG. 25) includes, for example, the wafer thickness and the final processing target (full dicing, etc.).

[0074] After the inner SD layer formation process, the control unit 8 specifies the state of the modified regions 123a and 123b, which are the inner SD layer, based on the signal output from the camera unit 4 (i.e., the imaging result), and determines whether the third processing condition (temporarily determined third processing condition) for forming the inner SD layer is appropriate based on the specified information. The control unit 8 specifies the state of the modified regions 123a and 123b and the state of the cracks 14 extending from the modified regions 123a and 123b as the state of the modified regions 123a and 123b.

[0075] Figure 17 illustrates the state of wafer 20 corresponding to the processing state of the inner SD layer. In Figures 17(a) to 17(d), the upper layer shows the cross-sectional state of wafer 20 with only the inner SD layer formed, and the lower layer shows the cross-sectional state of wafer 20 with the outer SD layer formed in addition to the state of the upper layer. Figure 17(a) shows a state where the cutting force applied to wafer 20 by the laser light irradiated for forming the inner SD layer is weak, resulting in a positional shift related to the formation of the inner SD layer; Figure 17(b) shows a state where the cutting force is weak; Figure 17(c) shows a state where the cutting force is optimal; and Figure 17(d) shows a state where the cutting force is strong.

[0076] When the laser beam breaking force for forming the inner SD layer, as shown in Figure 17(c), is appropriate, as shown in the lower layer of Figure 17(c), when the outer SD layer and the inner SD layer are formed, the wafer 20 will be in a fully cut state until the crack 14 reaches the back surface 21b and the surface 21a. Furthermore, the width of the crack 14 serpentinizing in the direction intersecting the thickness direction of the wafer 20 can be suppressed to below a predetermined value (e.g., below 2 μm). In this case, the wafer 20 can be completely cut (divided) without producing any debris residue after processing. Therefore, the control unit 8 determines that the third processing condition is appropriate when the state of the modified regions 123a and 123b, which are the inner SD layers, is the state shown in the upper layer of Figure 17(c) (details of the determination method will be described later).

[0077] Here, under the condition that the cracking state of the outer SD layer is optimal, the cracking state of the inner SD layer has a relatively wide margin. Even in cases where the breaking force for forming the inner SD layer is weak, as shown in FIG17(b), or where the breaking force for forming the inner SD layer is strong, as shown in FIG17(d), the state of forming both the outer and inner SD layers may still be appropriately set to a full-cut state, and the width of the serpentine crack 14 can be suppressed to below a predetermined value (e.g., below 2 μm). In this case, the wafer 20 can be completely divided (cut) in a way that no fragment residue is generated after processing. Therefore, the control unit 8 can also determine that the third processing condition is appropriate when the state of the modified regions 123a and 123b, which are the inner SD layers, is the state above that in FIG17(b) or FIG17(d) (details of the determination method will be described later). However, even if the boundary of the cracked state of the inner SD layer widens, if the breaking force is too weak and it does not eventually become a fully cut state, or if the breaking force is too strong and the amount of serpentine crack 14 increases, the control unit 8 will still determine that the third processing condition is not appropriate (details of the determination method will be described later).

[0078] Furthermore, as shown in the upper layer of Figure 17(a), when the breaking force is weak and a positional shift occurs related to the formation of the inner SD layer, the cracks 14 extending from the modified regions 123a and 123b do not connect to the cracks 14 of the outer SD layer and do not achieve a complete cut. As a result, fragment residue (e.g., about 80% fragment residue) will be generated after processing, and the processing quality cannot be guaranteed. In such cases, the control unit 8 determines that the third processing condition is not appropriate (details of the determination method will be described later).

[0079] The method for determining the third processing condition will be explained in detail with reference to Figures 18(b) and 19(b). The control unit 8 determines the appropriateness of the third processing condition based on internal observations obtained by focusing the camera unit 4 on various points from the back side 21b. As shown in Figure 18(b), the control unit 8, based on the internal observations, specifies information such as whether the crack 14 extends to the back side 21b (whether it is in the HC state), the amount of cracks inside the wafer 20 (the extent of crack 14 extension), the presence or absence of unevenness in the crack 14 inside the wafer 20, the position of the modified layer (the position of modified regions 123a, 123b), and whether the crack 14 extends to the surface 21a (whether it is in the BHC state). Figure 19(b) shows a portion of the internal observation results of the wafer 20 with the inner SD layer already formed. As shown in Figure 19(b), the size of the unevenness in the cracks inside the wafer 20 can be specified based on the internal observation results. The left image in Figure 19(b) shows an example where the crack's unevenness is less than 2 μm, while the right image in Figure 19(b) shows an example where the crack's unevenness is 5.6 μm.

[0080] The control unit 8 can also specify whether the crack 14 extends to the back surface 21b in an HC state, and determine whether the third processing condition is appropriate based on whether it is in an HC state. Specifically, the control unit 8 can also determine that the third processing condition is inappropriate if the crack 14 is in an HC state. Furthermore, the control unit 8 can also specify whether the crack 14 extends to the surface 21a in a BHC state, and determine whether the third processing condition is appropriate based on whether it is in a BHC state. Whether it is appropriate or not, the control unit 8 can also determine that the third processing condition is inappropriate if the crack 14 is in a BHC state. These determinations are performed by the following judgment: "When the final state is set to full cut, if the crack 14 still reaches the back surface 21b (or surface 21a) regardless of whether it is in a state where only the inner SD layer is formed, the breaking force of the third processing condition is too strong."

[0081] The control unit 8 can also specify the amount of cracks inside the wafer 20 and determine whether the third processing condition is appropriate based on the amount of cracks. Specifically, the control unit 8 can also determine that the third processing condition is appropriate when, for example, the amount of cracks is within approximately ±5 μm of the optimal value. Furthermore, the control unit 8 can also specify the presence or absence of unevenness in the cracks 14 inside the wafer 20 and determine whether the third processing condition is appropriate based on the presence or absence of such unevenness. Specifically, the control unit 8 can also determine that the third processing condition is appropriate when there are no unevenness in the cracks 14 inside the wafer 20 (for example, less than 2 μm).

[0082] The control unit 8 can also specify the location of the modified layer (the location of the modified regions 123a and 123b) and determine whether the third processing condition is appropriate based on that location. Specifically, the control unit 8 can also determine that the third processing condition is appropriate when, for example, the location of the modified layer is within approximately ±4 μm of the optimal value.

[0083] (Full SD layer formation process and determination of the suitability of the second processing conditions) The control unit 8 performs a full SD layer formation process of the laser irradiation unit 3 under second processing conditions by irradiating the wafer 20 with laser light. These second processing conditions are set such that an outer SD layer (modified regions 121, 122) is formed inside the wafer 20, and an inner SD layer (modified regions 123a, 123b) is formed between modified regions 121 and 122 in the thickness direction of the wafer 20. The control unit 8 temporarily determines the second processing conditions, including the irradiation conditions of the laser light performed by the laser irradiation unit 3, based on information received, for example, by the display 150 (see Figure 25). The processing conditions include, for example, the laser light pulse energy (including output and frequency adjustment), aberration correction, pulse width, pulse spacing, number of modified layers, and number of focus points. The information received by the display 150 (see Figure 25) includes, for example, the wafer thickness and the final processing target (full dicing, etc.).

[0084] After the full SD layer formation process, the control unit 8 specifies the state of the outer SD layer (modified regions 121, 122) and the inner SD layer (modified regions 123a, 123b) based on the signal output from the camera unit 4 (i.e., the imaging result), and determines whether the second processing condition (temporarily determined second processing condition) for full SD layer formation is appropriate based on the specified information. The control unit 8 specifies the state of the modified regions 121, 122, 123a, 123b and the state of the cracks 14 extending from the modified regions 121, 122, 123a, 123b as the state of the modified regions 121, 122, 123a, 123b.

[0085] The method for determining the second processing condition will be explained in detail with reference to Figures 18(c) and 19(c). The control unit 8 determines the appropriateness of the second processing condition based on internal observations obtained by focusing the focal point F on various points from the back surface 21b using the camera unit 4. As shown in Figure 18(c), the control unit 8 specifies information such as whether the crack 14 extends to the back surface 21b (whether it is in the HC state), the amount of serpentine movement of the crack 14 in the back surface 21b (HC serpentine movement), the clarity of the modified layer and the crack tip, and whether the crack 14 extends to the surface 21a (whether it is in the BHC state) based on the internal observations. Figure 19(c) shows a portion of the internal observations of the wafer 20 with the outer and inner SD layers formed (including the observations of the back surface 21b as the incident surface). The upper part of Figure 19(c) shows the observations of the back surface 21b as the incident surface. As shown in the upper layer of Figure 19(c), there is a specific serpentine amount (HC serpentine amount) of the crack 14 in the back side 21b. Here, serpentine amount refers to the width of the crack 14 serpentine in the direction intersecting the thickness direction of wafer 20 (the direction intersecting the back side 21b). The left image of Figure 19(c) shows an example where the HC serpentine amount is less than 2 μm. The right image of Figure 19(c) shows an example where the HC serpentine amount is 5.2 μm. The middle layer of Figure 19(c) shows the internal observation results of wafer 20. As shown in the middle layer of Figure 19(c), the presence or absence of distinctness of the modified layer and crack tip within wafer 20 can be distinguished based on the observation results. The lower layer of Figure 19(c) shows the internal observation results of wafer 20. As shown in the lower layer of Figure 19(c), based on the observation results, we can distinguish between the case where the crack 14 reaches the surface 21a and the front end of the crack 14 cannot be observed (the case of BHC) and the case where the crack 14 does not reach the surface 21a and the front end of the crack 14 can be observed (the case of ST).

[0086] The control unit 8 can also specify whether the crack 14 extends to the back surface 21b in an HC state, and determine whether the second processing condition is appropriate based on whether it is in an HC state. Specifically, the control unit 8 can also determine that the second processing condition is appropriate if it is in an HC state. Furthermore, the control unit 8 can also specify whether the crack 14 extends to the surface 21a in a BHC state, and determine whether the second processing condition is appropriate based on whether it is in a BHC state. Whether it is appropriate or not, the control unit 8 can also determine that the second processing condition is appropriate if it is in a BHC state. These determinations are performed by the following judgment: "In the case where the final state is set to full cutting, if the crack 14 in the state of forming a full SD layer reaches the back surface 21b (or surface 21a), the breaking force of the second processing condition is appropriate."

[0087] The control unit 8 can also specify the amount of serpentine (HC serpentine) of the crack 14 in the back side 21b, and determine whether the second processing conditions are appropriate based on the HC serpentine. Specifically, the control unit 8 can also determine that the second processing conditions are appropriate when, for example, the HC serpentine is within about 5 μm.

[0088] The control unit 8 can also determine whether the second processing condition is appropriate based on the sharpness of the modified layer and the crack tip inside the wafer 20. Specifically, the control unit 8 can also determine that the second processing condition is inappropriate if at least one of the modified layer and the crack tip is sharp. This determination is performed by the following judgment: "Although it should be set to a full dicing state, it is not a full dicing state when the modified layer or the crack tip is sharp, and the breaking force of the second processing condition is too weak."

[0089] (Algorithm for making decisions based on internal observations) Among the various determinations performed based on the above internal observations, the algorithms for detecting (specific) cracks 14 and for detecting (specific) indentations in the modified regions are described in detail.

[0090] Figures 20 and 21 illustrate crack detection. Figure 20 shows the internal observation results (image of the interior of wafer 20). The control unit 8 first detects the group of straight lines 140 based on the image of the interior of wafer 20 shown in Figure 20(a). For the detection of the group of straight lines 140, algorithms such as Hough transform or LSD (Line Segment Detector) can be used. Hough transform refers to a method that detects all straight lines passing through a point in the image while weighting the lines passing through more feature points. LSD refers to a method that estimates the region that is a line segment by calculating the gradient and angle of the brightness value in the image, and detects straight lines by approximating the region as a rectangle.

[0091] Next, as shown in Figure 21, the control unit 8 detects the crack 14 from the line group 140 by calculating the similarity to the crack line. As shown in the upper part of Figure 21, the crack line has the characteristic of being very bright in the Y direction relative to the brightness value on the line. Therefore, the control unit 8, for example, compares the brightness values ​​of all pixels of the detected line group 140 with the values ​​in the Y direction, and uses the number of pixels whose difference is above the threshold value as the similarity score. Then, the one with the highest similarity score to the crack line among the detected line groups 140 is taken as the representative value in its image. The higher the representative value, the more likely it is that the crack 14 exists. The control unit 8 compares the representative values ​​in multiple images and uses the one with the relatively high score as a candidate image for the crack.

[0092] Figures 22 to 24 illustrate the indentation detection. Figure 22 shows the internal observation results (image of the interior of wafer 20). The control unit 8 detects corners (concentrations of edges) within the image of the interior of wafer 20 as shown in Figure 22(a) as key points, and detects their position, size, and orientation, as well as feature points 250. Known methods for detecting feature points include Eigen, Harris, Fast, SIFT, SURF, STAR, MSER, ORB, and AKAZE.

[0093] Here, as shown in Figure 23, since the indentations 280 are arranged in circular or rectangular shapes at fixed intervals, they have strong corner characteristics. Therefore, the indentations 280 can be detected with high precision by summing the feature quantities of the feature points 250 in the image. As shown in Figure 24, when the feature quantities of each image captured by displacement in the depth direction are compared, the change in the mountain shape representing the amount of cracks in each modified layer can be confirmed. The control unit 8 estimates the position of the indentation 280 by taking the peak of this change as the position of the indentation. By summing the feature quantities in this way, not only the position of the indentation can be estimated, but also the pulse interval can be estimated.

[0094] (Handling of decisions regarding processing conditions) Control unit 8 determines the final processing conditions based on the judgment results of each of the aforementioned processing conditions. Control unit 8, regarding the first processing condition (temporarily determined first processing condition) for the formation of the outer SD layer, changes the first processing condition if it is inappropriate based on the judgment result of the first processing condition obtained from the state of the outer SD layer formed under the first processing condition. Control unit 8, when the first processing condition is changed, performs a correction process (seventh process) that modifies the first processing condition according to the judgment result. In the correction process, new first processing conditions are set, such as the laser pulse energy (including output and frequency adjustment), aberration correction, pulse width, pulse spacing, number of modified layers, and number of focusing points, after correction. Control unit 8 performs reprocessing with the reset first processing conditions and determines whether to use the first processing condition as the processing condition for the outer SD layer based on the judgment result of the first processing condition. Control unit 8 repeats the correction process, reprocessing, and judgment until the first processing condition becomes an appropriate processing condition.

[0095] Similarly, the control unit 8, regarding the third processing condition (temporarily determined third processing condition) for the formation of the inner SD layer, changes the third processing condition if it is not appropriate, based on the determination result of the third processing condition obtained from the state of the inner SD layer formed under the third processing condition. When the third processing condition is changed, the control unit 8 performs a correction process (seventh process) to modify the third processing condition according to the determination result. The control unit 8 reprocesses the material using the reset third processing condition and determines whether to use the third processing condition as the processing condition for the inner SD layer based on the determination result of the third processing condition. The control unit 8 repeats the correction process, reprocessing, and determination until the third processing condition becomes an appropriate processing condition.

[0096] Control unit 8 temporarily determines a second processing condition (processing conditions related to the formation of the outer SD layer and the inner SD layer) by considering the first and third processing conditions optimized by the above-described processing. Then, control unit 8 changes the second processing condition if it is not appropriate, based on the determination result of the second processing condition obtained based on the state of the outer SD layer and the inner SD layer formed by the second processing condition. When the second processing condition is changed, control unit 8 performs a correction process (seventh process) to modify the second processing condition according to the determination result. When the second processing condition is changed, control unit 8 determines, according to the determination result, whether to change the processing condition related to the formation of the outer SD layer or the processing condition related to the formation of the inner SD layer. Control unit 8 performs reprocessing with the reset second processing condition and determines whether to use the second processing condition as the final processing condition based on the determination result of the second processing condition. Control unit 8 repeats the correction process, reprocessing, and determination until the second processing condition becomes an appropriate processing condition.

[0097] Furthermore, while the process for deriving processing conditions has been described as performing processing and determination on the outer SD layer, processing and determination on the inner SD layer, and processing and determination on both the outer and inner SD layers to derive the final processing conditions, it is not limited to this. For example, in the process for deriving processing conditions, it is also possible to derive the final processing conditions by performing only processing and determination on the outer SD layer, and processing and determination on both the outer and inner SD layers, without performing processing and determination on the inner SD layer alone.

[0098] (Images showing the processing conditions exported) Next, an example of a GUI (Graphical User Interface) for deriving processing conditions will be described with reference to Figures 25 to 27. The following describes examples of deriving final processing conditions by performing processing and determination only on the outer SD layer, and processing and determination on both the outer and inner SD layers (without performing processing and determination on the inner SD layer alone). Figures 25 to 27 are images of the display 150 related to the processing condition deriving processing.

[0099] Figure 25 shows an example of a wafer processing information setting screen (user input reception screen). As shown in Figure 25, the display 150 shows the judgment content, processing quality, and judgment method and criteria. At least the items for the judgment content are set based on user input. Furthermore, the items for the judgment content can also be set to fixed values. Additionally, the items for processing quality and judgment method and criteria can be set either based on user input or automatically based on content already set in the judgment content.

[0100] The judgment content displays information about the judgment being performed, including "FC Condition Proposal" and "Wafer Thickness". "FC Condition Proposal" refers to the information indicating the determination and (derived) of processing conditions after the formation of the modified region, assumed to be in a fully diced state. In the example shown in Figure 25, "FC Condition Proposal" is set to "Execute". "Wafer Thickness" refers to information indicating the thickness of wafer 20. "Wafer Thickness" is, for example, entered by the user through selection from multiple options.

[0101] The processing quality section displays the required quality for the processed wafer 20, including "crack condition," "HC straightness," and "endface unevenness width." "Crack condition" refers to information about cracks in the fully diced or ST (Skip) state. "HC straightness" refers to information about the HC (Hydrogen Carrier) travel distance. "Endface unevenness width" refers to information about the width of the cracks on the end face.

[0102] The judgment method and criteria include acceptance criteria for the processing conditions, including "back cracking state", "crack amount of SD1 (modified region 121)", "crack amount of SD2 (modified region 122)", "lower position of SD1", "lower position of SD2", "end face unevenness width", "black stripes", and "surface cracking state", which serve as acceptance criteria for the first processing condition related to the formation of the outer SD layer. Since these are acceptance criteria for the first processing condition, "back cracking state" is set to ST, "black stripes" is set to present, and "surface cracking state" is set to ST. Furthermore, acceptance criteria for "back cracking state", "HC serpentine amount", "modified layer imaging state", "surface cracking state", and "cracking state" are displayed as acceptance criteria for the second processing condition related to the formation of the outer and inner SD layers. Since this is the qualification standard for the second processing condition, "backside cracking state" is set to HC, "modified layer imaging state" (clarity of modified layer) is set to not clear, "surface cracking state" is set to BHC, and "cracking state" (comprehensive cracking state) is set to FC (full cut).

[0103] Figure 26 shows an example of the processing result screen for the outer SD layer. The processing result confirmation screen displays the judgment result after processing (in this case, the judgment result of the first processing condition) and accepts user input regarding modifications to the first processing condition. In the example shown in Figure 26, the display 150 shows the judgment content, processing quality, and judgment result. The judgment content and processing quality refer to the information set in the wafer processing information setting screen (Figure 25) mentioned above. Specifically, in addition to the information set in the wafer processing information setting screen (Figure 25), the processing position (in this case, the outer SD layer) is also displayed as a judgment content item in the processing result confirmation screen.

[0104] In the example shown in Figure 26, the left side of the area displaying the judgment results shows the judgment items, the benchmark (pass / fail benchmark), the result, and pass / fail status. The central part of the area displaying the judgment results shows a diagram depicting the outer SD layer and cracks under the assumption that the processing result is the benchmark value (estimated processing result), and a diagram depicting the outer SD layer and cracks of the actual processing result. The right side of the area displaying the judgment results shows the observation results of the upper crack tip of the crack 14 extending from SD1 (modified region 121) to the back surface 21b side, and the observation results of the lower crack tip of the crack 14 extending from SD1 (modified region 121) to the surface 21a side. Now, in the items of SD1 crack amount and SD2 crack amount, the pass / fail benchmark of 60±5μm is not met; specifically, the crack amount is smaller than the pass / fail benchmark, thus it is considered non-compliant (pass / fail NG). In this case, because the first processing condition is recommended for modification, a message "Re-processing recommended. Do?" is displayed, and the modification and re-processing of the first processing condition are implemented in response to user input. Here, it is assumed that after the modification and re-processing of the first processing condition have been implemented, the first processing condition will meet the qualification criteria. Then, the processing of the outer SD layer and the inner SD layer is performed, and the processing results of the outer SD layer and the inner SD layer shown in Figure 27 are displayed.

[0105] Figure 27 shows an example of the processing result screen for the outer SD layer and the inner SD layer. The processing result confirmation screen displays the judgment result after processing (in this case, the judgment result of the second processing condition) and accepts user input regarding modifications to the second processing condition. In the example shown in Figure 27, the judgment content, processing quality, and judgment result are displayed on the monitor 150.

[0106] In the example shown in Figure 27, the left side of the area displaying the judgment results shows the judgment items, the benchmark (pass / fail benchmark), the result, and pass / fail status. The central part of the area displaying the judgment results shows diagrams depicting the outer and inner SD layers and their cracks under the assumption that the processing result is the benchmark value, and diagrams depicting the outer and inner SD layers and their cracks under the actual processing result. The right side of the area displaying the judgment results shows the observation results of the HC straightness (HC meandering) and the width of the end face unevenness of crack 14 in the back surface 21b. Currently, in the HC meandering item, it does not meet the pass / fail benchmark of within 5μm, thus becoming a fail (pass / fail NG). In this case, because a second processing condition correction is recommended, the message "Reprocessing of the outer SD layer is recommended. To implement?" is displayed. The user can choose to modify and reprocess the first processing condition of the outer SD layer or the third processing condition of the inner SD layer in response to non-compliant content. Then, the user can implement the modification and reprocessing of the first processing condition or the third processing condition in response to user input.

[0107] [Laser processing methods] The laser processing method of this embodiment will be described with reference to Figures 28 and 29. Figures 28 and 29 are flowcharts of the laser processing method. Figure 28 shows the process of deriving the final processing conditions by performing processing and determination on the outer SD layer, processing and determination on the inner SD layer, and processing and determination on both the outer and inner SD layers. Figure 29 shows the process of deriving the final processing conditions by performing only processing and determination on the outer SD layer, and processing and determination on both the outer and inner SD layers, without performing separate processing and determination on the inner SD layer.

[0108] In the process shown in Figure 28, the initial display 150 receives user input of wafer processing information (step S1). Specifically, the display 150 receives at least information about the wafer thickness. Therefore, for a processing method that processes the outer SD layer and the inner SD layer in a fully diced state, the first processing condition for the formation of the outer SD layer and the third processing condition for the formation of the inner SD layer can be automatically determined.

[0109] Next, the control unit 8 controls the laser irradiation unit 3 according to the tentatively determined first processing conditions, thereby processing the outer SD layer on the wafer 20 (step S2). Then, the camera unit 4 captures an image of the processed wafer 20 (step S3). Finally, the control unit 8 controls the display 150 to display the image capture results on the display 150 (step S4).

[0110] Next, the control unit 8 determines the state of the outer SD layer based on the camera results, and determines whether the processing is appropriate (i.e., whether the first processing condition is appropriate) based on the specific information (step S5). If the first processing condition is not appropriate, the control unit 8 accepts the input of a new first processing condition (step S1) and repeats the processing after step S2. On the other hand, if the first processing condition is appropriate, the control unit 8 formally decides that the first processing condition as the first processing condition. Then, the processing of step S6 is executed.

[0111] In step S6, the laser irradiation unit 3 is controlled according to the temporarily determined third processing conditions to process the inner SD layer of the wafer 20 (step S6). Next, the processed wafer 20 is photographed by the camera unit 4 (step S7). Then, the control unit 8 controls the display 150 to display the imaging results on the display 150 (step S8).

[0112] Next, the control unit 8 determines the state of the inner SD layer based on the camera results, and determines whether the processing is appropriate (i.e., whether the third processing condition is appropriate) based on the specific information (step S9). If the third processing condition is not appropriate, the control unit 8 accepts the input of a new third processing condition (step S10) and repeats the processing after step S6. On the other hand, if the third processing condition is appropriate, the control unit 8 formally decides that the third processing condition as the third processing condition. Then, the processing in step S11 is executed.

[0113] In step S11, the laser irradiation unit 3 is controlled according to a second processing condition that is temporarily determined based on the first and third processing conditions that have been formally determined, thereby processing the outer SD layer and the inner SD layer on the wafer 20 (step S11). Next, the image unit 4 is used to capture an image of the processed wafer 20 (step S12). Then, the control unit 8 controls the display 150 to display the image capture results on the display 150 (step S13).

[0114] Next, the control unit 8, based on the camera results, specifies the states of the outer SD layer and the inner SD layer, and determines whether the processing is appropriate (i.e., whether the second processing condition is appropriate) based on the specified information (step S14). If the second processing condition is not appropriate, the control unit 8 determines, according to the determination result, whether to readjust the first processing condition for the formation of the outer SD layer (or readjust the third processing condition for the formation of the inner SD layer) (step S15). The control unit 8 may also perform this determination according to user input. In the case of readjusting the first processing condition, the control unit 8 accepts the input of a new first processing condition (step S1) and performs the processing after step S2 again. In the case of readjusting the third processing condition, the control unit 8 accepts the input of a new third processing condition (step S16) and performs the processing after step S6 again. On the other hand, if the second processing condition is appropriate, the control unit 8 formally decides that the second processing condition as the final processing condition.

[0115] In the process shown in Figure 29, the initial display 150 receives user input of wafer processing information (step S21). Specifically, the display 150 receives at least information about the wafer thickness. Thereby, for a processing method that processes the outer SD layer and the inner SD layer in a fully diced state, the first processing conditions for the formation of the outer SD layer are automatically and temporarily determined.

[0116] Next, the control unit 8 controls the laser irradiation unit 3 according to the tentatively determined first processing conditions, thereby processing the outer SD layer on the wafer 20 (step S22). Then, the camera unit 4 captures an image of the processed wafer 20 (step S23). Finally, the control unit 8 controls the display 150 to display the image capture results on the display 150 (step S24).

[0117] Next, the control unit 8 determines the state of the outer SD layer based on the camera results, and determines whether the processing is appropriate (i.e., whether the first processing condition is appropriate) based on the specific information (step S25). If the first processing condition is not appropriate, the control unit 8 accepts the input of a new first processing condition (step S1) and repeats the processing after step S2. On the other hand, if the first processing condition is appropriate, the control unit 8 formally decides that the first processing condition as the first processing condition. Then, the processing of step S26 is executed.

[0118] In step S26, the laser irradiation unit 3 is controlled according to a second processing condition temporarily determined based on the first processing condition that has been formally determined, thereby processing the outer SD layer and the inner SD layer on the wafer 20 (step S26). Next, the image unit 4 captures an image of the processed wafer 20 (step S27). Then, the control unit 8 controls the display 150 to display the image capture results on the display 150 (step S28).

[0119] Next, the control unit 8 determines the state of the outer SD layer and the inner SD layer based on the camera results, and determines whether the processing is appropriate (i.e., whether the second processing condition is appropriate) based on the specific information (step S29). If the second processing condition is not appropriate, the control unit 8 accepts the input of a new first processing condition (step S1) and repeats the processing after step S2. On the other hand, if the second processing condition is appropriate, the control unit 8 formally decides that the second processing condition as the final processing condition.

[0120] [Effects and Benefits] Next, the function and effect of the laser processing apparatus 1 in this embodiment will be explained.

[0121] The laser processing apparatus 1 of this embodiment includes: a laser irradiation unit 3, which irradiates laser light onto the wafer 20 from the back side 21b of the wafer 20; an imaging unit 4, which outputs light that is penetrable through the wafer 20 and detects the light that has propagated through the wafer 20; and a control unit 8. The control unit 8 is configured to perform the following processes: a first process, which controls the laser irradiation unit 3 according to a first processing condition, the first processing condition being set such that modified regions 121 and modified regions 122 are formed inside the wafer 20 by irradiating the wafer 20 with laser light; and a second process, which, after the first process, identifies the modified regions 121 and 122 based on the signal output from the imaging unit 4 that has detected the light. The first processing condition is determined based on the state of 122 and specific information. The third processing condition controls the laser irradiation unit 3 with the second processing condition, which is set by irradiating the wafer 20 with laser light to form modified regions 121 and 122 inside the wafer 20, and forming modified regions 123a and 123b between the modified regions 121 and 122 in the thickness direction of the wafer 20. The fourth processing condition is determined after the third processing based on the signal output from the camera unit 4 that has detected the light to determine the state of the modified regions 121, 122, 123a, and 123b, and based on specific information, to determine whether the second processing condition is appropriate.

[0122] In the laser processing apparatus 1 of this embodiment, in the third process, based on the second processing conditions, an outer SD layer (modified regions 121, 122) and an inner SD layer (modified regions 123a, 123b) in the thickness direction of the wafer 20 are formed. In the fourth process, the state of the outer and inner SD layers is specified based on the signal output from the camera unit 4, and the appropriateness of the second processing conditions is determined based on the specific result. Thus, by processing in a manner that actually forms the outer and inner SD layers, and by determining the appropriateness of the processing conditions based on the state of the outer and inner SD layers after processing, the appropriateness of the processing conditions can be determined based on the final processing state of the wafer 20. This allows for accurate determination of the appropriateness of the processing conditions and ensures the quality of the processed wafer 20. Furthermore, in the laser processing apparatus 1 of this embodiment, in the first process, only the outer SD layer is formed based on the first processing conditions. In the second process, the state of the outer SD layer is specified based on the signal output from the camera unit 4, and the appropriateness of the first processing conditions is determined based on the specific result. For example, in the final processing state of the wafer 20, where it is processed into a fully diced state (the cracks extending from the modified region have extended to both ends of the wafer 20), there is less information about the modified region obtained from the final processing state of the wafer 20, which may make it difficult to determine the appropriateness of the processing conditions with high precision. In this regard, in the state where only a portion of the modified region (outer SD layer) is formed, the appropriateness of the processing conditions (first processing conditions) for the formation of that portion of the modified region is determined based on the information about that portion of the modified region. This allows for a more precise determination of the appropriateness of the processing conditions based on the processing state of the wafer 20, which provides more information about the modified region than the final processing state of the wafer 20. Furthermore, based on the inventors' knowledge and understanding, it is believed that in the case where an outer SD layer and an inner SD layer are formed in the thickness direction of wafer 20, the state of the outer SD layer will be affected by the quality of the processed wafer 20. In this respect, in the second process, the quality of the processed wafer 20 can be better guaranteed by determining whether the processing conditions (first processing conditions) for the formation of the outer SD layer are appropriate.

[0123] The control unit 8 uses at least one of the states of a specific modified region and the states of cracks 14 extending from the modified region as the state of the modified region. This allows for appropriate determination of the state of the processed wafer 20 and more precise assessment of the suitability of the processing conditions. Consequently, the quality of the wafer 20 can be better guaranteed.

[0124] Control unit 8 determines the location of a specific modification area and, based on that location, whether the processing conditions are appropriate. In cases where processing conditions are inappropriate, the location of the modification area may not be the desired location. By determining the appropriateness of the processing conditions based on whether the modification area is in the desired location, the processing conditions can be appropriately determined. This allows for better assurance of the quality of the processed wafer 20.

[0125] The control unit 8 determines whether the processing conditions are appropriate based on whether a specific crack 14 extends to at least one of the back surface 21b and the surface 21a. For example, if the final wafer 20 is to be processed into a fully diced state, the processing conditions can be appropriately determined by determining whether the crack 14 extends to the back surface 21b and the surface 21a during the second processing stage where only the outer SD layer is formed, and during the fourth processing stage where both the outer and inner SD layers are formed. This better ensures the quality of the processed wafer 20.

[0126] The control unit 8 measures the extension amount of a specific crack 14 and determines whether the processing conditions are appropriate based on this extension amount. If the processing conditions are not appropriate, the extension amount of the crack 14 may not reach the desired length. By determining the appropriateness of the processing conditions based on the extension amount of the crack 14, the processing conditions can be appropriately determined. This allows for better assurance of the quality of the processed wafer 20.

[0127] The control unit 8 determines the width of the snake-like path of the specific crack 14 in the direction intersecting the thickness direction of the wafer 20, and judges whether the processing conditions are appropriate based on the width of this snake-like path. If the processing conditions are not appropriate, the width of the snake-like path of the crack 14 may increase. By judging the appropriateness of the processing conditions from the width of the snake-like path of the crack 14, the appropriateness of the processing conditions can be determined. This allows for better assurance of the quality of the processed wafer 20.

[0128] The control unit 8 determines whether the cracks 14 extending from different modified regions are connected to each other, and judges whether the processing conditions are appropriate based on whether they are connected. If the processing conditions are inappropriate, the cracks 14 may connect even when they are not intended to be connected, or they may not connect even when they are intended to be connected. By determining the appropriateness of the processing conditions based on whether the cracks 14 are connected, the processing conditions can be properly determined. This can better guarantee the quality of the processed wafer 20.

[0129] The control unit 8 is configured to further perform the following processes: a fifth process, which controls the laser irradiation unit 3 with a third processing condition, which is set to form an inner SD layer inside the wafer 20 by irradiating the wafer 20 with laser light; and a sixth process, which, after the fifth process, specifies the state of the inner SD layer based on the signal output from the camera unit 4 that has detected the light, and determines whether the third processing condition is appropriate based on the specified information. With this configuration, even in the case where only the inner SD layer is formed, the appropriateness of the processing condition (third processing condition) for the formation of the inner SD layer can be determined based on information about the inner SD layer. In addition to the cases of forming both the outer and inner SD layers, and the case of forming only the outer SD layer, even in the case of forming only the inner SD layer, the appropriateness of the processing condition can be determined with higher precision by using information about the modified region to determine whether the processing condition is appropriate.

[0130] The control unit 8 can also determine that the first processing condition is inappropriate if the crack 14 extends to at least one of the back surface 21b and the surface 21a when the first processing condition is derived, and determine that the third processing condition is inappropriate if the crack 14 extends to at least one of the back surface 21b and the surface 21a when the third processing condition is derived. This allows for a reliable ST state (a state easily observable internally) in a processing state earlier than the final processing state. This allows for appropriate and comprehensive acquisition of information about the processing state. Furthermore, even when the final processing state is set to the full-cut state, it is still considered that if the crack 14 reaches the back surface 21b or the surface 21a in an earlier state (a state that is still being processed), the wafer quality and dicing performance will deteriorate in the final processing state. Therefore, by setting the processing state to ST in an earlier processing state than the final processing state as a condition presumed to be appropriate, wafer quality and dicing performance can be guaranteed.

[0131] The control unit 8 is configured to further perform a seventh process, which corrects the processing conditions based on the determination result when the processing conditions have been determined to be inappropriate. With this configuration, the processing conditions can be corrected according to the determination result, and the quality of the processed wafer 20 can be better guaranteed.

[0132] [Example of variation] While embodiments of the present invention have been described above, the present invention is not limited to the above embodiments. For example, in the embodiments, although the processing method for an object with derived processing conditions has been described in which an inner SD layer is formed after an outer SD layer is formed, the present invention is not limited thereto. In the processing method for an object with derived processing conditions, both the outer SD layer and the inner SD layer can be formed simultaneously, and the inner SD layer can be formed earlier than the outer SD layer.

[0133] Furthermore, there are cases where, for example, after irradiating a wafer 20 with laser light along a first direction (X direction) to form a modified region, a second direction (Y direction) different from the first direction is irradiated with laser light in a manner that crosses the already formed modified region to form a modified region. In such cases, the different processing conditions for processing in the X direction (pre-processing) and processing in the Y direction (post-processing) can be derived based on the internal observation results (position of the modified layer, presence or absence of black stripes) or the back surface observation results (HC serpentine / BHC serpentine) as described above. Specifically, for example, different processing conditions can be derived for processing in the X direction (pre-processing) and Y direction (post-processing) in cases where the length of the wafer edge is different in the X and Y directions (e.g., 0.2mm×15mm), where the quality requirements of the user are different in the X and Y directions (e.g., cracking within 2μm in the X direction and cracking within 10μm in the Y direction), or in cases where the wafer size of RF-ID is very small and the quality is prone to difference in pre-processing or post-processing.

[0134] (Adjustments to the settings for internal observation) Furthermore, for example, laser processing equipment can be adjusted in more detail when observing the interior of the wafer. Figure 30 illustrates the difference in imaging range caused by the processing method. Figure 30(a) shows the imaging range when a full dicing is performed, and Figure 30(b) shows the imaging range when other processing (e.g., BHC processing) is performed. In both processing methods, imaging is performed on a virtual focus symmetrical to surface 21a. That is, the lower half of the SD layer in the wafers of Figures 30(a) and (b) is the area of ​​the virtual focus. As shown in Figure 30, in the case of a full dicing, the total imaging range in the thickness direction of wafer 20 becomes wider. Also, in the case of a full dicing, the interval between the various modified regions (SD1 to SD4) becomes narrower, and the extension of crack 14 also decreases. Therefore, it can be concluded that, under the condition of full dicing, unless more detailed adjustments are made to the settings for internal observation in the thickness direction of wafer 20, it is impossible to clearly observe the modified areas and cracks.

[0135] Specifically, the control unit 8 is designed to allow for clear observation of the modified area, even during full-cutting processes, as follows.

[0136] First, the control unit 8 is configured to further perform aberration correction processing. This aberration correction processing controls the imaging unit 4 to perform aberration correction (optimal aberration correction in each thickness direction) for each region of the wafer 20 being imaged by the imaging unit 4 in the thickness direction, corresponding to the position of the wafer 20 in the thickness direction. For example, the control unit 8 performs optimal aberration correction by adjusting the spatial light modulator 32 or the correction ring 43a of the objective lens 43 for each region corresponding to the SD processing position (modified region formation position) estimated from the processing conditions.

[0137] Secondly, the control unit 8 is configured to further perform brightness correction processing. This brightness correction processing controls the imaging unit 4 to perform imaging in the thickness direction of each area of ​​the wafer 20 being imaged by the imaging unit 4 at a predetermined (e.g., fixed or optimal) brightness, and to output light from the imaging unit 4 in a manner corresponding to the position of each area of ​​the wafer 20 in the thickness direction. In internal observation, the deeper the observation depth, the more light is needed to ensure sufficient brightness. That is, the required light varies with each depth. Therefore, it is necessary to determine the required light amount for each depth before each observation, when the laser device is started, or when components are changed, in order to achieve the optimal brightness value. In the brightness correction processing, the amount of light when observing each position in the thickness direction is determined, and the light output from the imaging unit 4 is set according to that amount when observing each position.

[0138] As shown in Figure 31, in the brightness correction process, the initial input related to brightness correction is received (step S71). This brightness correction input could be, for example, wafer thickness input derived from processing conditions. Next, the control unit 8 determines the correction implementation range based on the brightness correction input (e.g., wafer thickness). Here, the correction implementation range refers to information on a plurality of ZHs for which brightness correction is performed. Furthermore, the correction implementation range can also be determined and input by the user. Next, the camera position executed by the camera unit 4 is set as one ZH of the correction implementation range (step S73). Then, the light intensity of the light source 41 is adjusted to achieve the optimal brightness when captured within that ZH (step S74), and a correspondence is established between the ZH and the light intensity, which is then memorized (step S75). The adjustment of the light source 41 can be achieved using an aperture, etc. Steps S73 to S75 are performed until the light intensity adjustment is completed for all ZHs. Then, the adjusted light intensity is output from the light source 41 of the camera unit 4 when observing various positions, thereby allowing for appropriate observation of various positions with appropriate brightness.

[0139] Third, the control unit 8 is configured to further perform shadow compensation processing. This shadow compensation processing involves controlling the camera unit 4 to capture shadow images of various regions along the thickness direction of the wafer 20 being imaged by the camera unit 4 before processing the modified region. Furthermore, after processing the modified region, the control unit 8 specifies the difference data between the images of each region captured by the camera unit 4 and the corresponding shadow images. In this case, the control unit 8 specifies the state of the modified region based on this difference data.

[0140] As shown in Figure 32(a), in shadow compensation processing, shadow images are obtained at each internal observation position (judgment position) before SD processing (processing of the modified area). Then, SD processing is performed, and for each internal observation position (judgment position), the SD-processed image shown in Figure 32(b) is obtained. Then, for each internal observation position, the difference data between the SD-processed image and the shadow image is obtained (refer to Figure 32(c)) (shadow compensation is performed). Furthermore, if there is a positional offset between the SD-processed image and the shadow image, a correction corresponding to the offset amount can be performed. Shadow processing performed by shadow compensation can be used to address, for example, element patterns, point defects, and uneven brightness of the image.

[0141] The laser processing method (processing condition derivation processing) for the aforementioned aberration correction processing, brightness correction processing, and shadow compensation processing will be explained with reference to FIG33. Furthermore, FIG33 simplifies and describes the processing and determination processes (without distinguishing between processing related to the first processing condition, processing related to the second processing condition, etc.). As shown in FIG33, initially, the display 150 receives user input of wafer processing information (step S51). Specifically, the display 150 receives at least wafer thickness information as input. This automatically and temporarily determines the processing conditions.

[0142] Next, the control unit 8 performs brightness correction processing (step S52). Specifically, the control unit 8 sets the camera unit 4 to perform imaging by the camera unit 4 at a predetermined (e.g., fixed or optimal) brightness for each region of the wafer 20 being imaged by the camera unit 4 in the thickness direction, and outputs light from the camera unit 4 in a manner that corresponds to the position of each region of the wafer 20 in the thickness direction.

[0143] Next, the control unit 8 acquires images for shadow compensation (shadow images) (step S53). Specifically, the control unit 8 acquires images from each internal observation position before SD processing as shadow images.

[0144] Next, the control unit 8 controls the laser irradiation unit 3 according to the processing conditions, thereby processing the SD layer on the wafer 20 (step S54). Next, the control unit 8 performs aberration correction corresponding to the position in the thickness direction of the wafer 20 (step S55). The control unit 8 performs optimal aberration correction for each region corresponding to, for example, the SD processing position (modified region formation position) estimated from the processing conditions, by adjusting the spatial light modulator 32 or the correction ring 43a of the objective lens 43.

[0145] Next, the processed wafer 20 is photographed using the camera unit 4 (step S56). The control unit 8 performs shadow compensation (step S57). Specifically, the control unit 8 acquires the difference data between the images of each area captured by the camera unit 4 and the shadow images of the corresponding areas.

[0146] Then, the control unit 8 controls the display 150 to display the imaging results (step S58). Next, the control unit 8 determines the state of the SD layer based on the imaging results and determines whether the processing is appropriate (i.e., whether the processing conditions are appropriate) based on the specified information (step S59). For this determination process, the control unit 8 uses differential data after shadow compensation. If the processing conditions are not appropriate in step S59, the control unit 8 accepts the input of new processing conditions and performs reprocessing. In this case, as shown in FIG33, it can start again from the brightness correction process (step S52) or from the SD processing (step S54). On the other hand, if the processing conditions are appropriate, the control unit 8 formally determines the processing conditions as the processing conditions and ends the processing.

[0147] As described above, the control unit 8 is configured to further perform brightness correction processing. This brightness correction processing involves performing imaging by the imaging unit 4 at a predetermined brightness for each region along the thickness direction of the wafer 20 being imaged by the imaging unit 4, and controlling the imaging unit 4 to output light from the imaging unit 4 in a manner corresponding to the position of each region along the thickness direction of the wafer 20. Based on this configuration, the light output of the imaging unit 4 can be determined for each imaging region along the thickness direction (depth direction) of the wafer 20 in a way that achieves a fixed or optimal brightness. This allows for appropriate and specific targeting of the state of each modified region.

[0148] The control unit 8 is configured to further perform shadow compensation processing. This shadow compensation processing involves controlling the camera unit 4 to capture shadow images of various areas along the thickness direction of the wafer 20 captured by the camera unit 4 before processing the modified area. After processing the modified area, it specifically obtains the difference data between the images of each area captured by the camera unit 4 and the corresponding shadow images. In the judgment processing, the state of the modified area is determined based on this difference data. The difference data obtained through shadow compensation processing is image data after noise such as component patterns or point defects, and uneven brightness of the image has been removed. It only contains image data of the modified area and crack conditions to be observed. By specifying the state of the modified area based on this difference data, the state of the processed wafer 20 can be appropriately determined. This better ensures the quality of the processed wafer 20.

[0149] The control unit 8 is configured to further perform aberration correction processing. This aberration correction processing controls the imaging unit 4 by performing aberration corrections corresponding to the position in the thickness direction of the wafer 20 for each region of the wafer 20 being imaged by the imaging unit 4. For example, in the case of full dicing, since the intervals between each modified region are narrow and the amount of crack propagation is also small, it is impossible to observe clearly without applying aberration correction to each position in the thickness direction of the wafer 20. As mentioned above, by performing aberration corrections corresponding to the thickness of the wafer 20 for each region in the thickness direction of the wafer 20, clear observation can be achieved, and the state of the modified region can be more appropriately identified.

[0150] Figure 34 illustrates the effects of aberration correction, luminance correction, and shadow compensation processing. Figure 34(a) shows an image without any of these processing steps; Figure 34(b) shows an image after aberration correction processing only; Figure 34(c) shows an image after aberration correction and luminance correction processing; and Figure 34(d) shows an image after aberration correction, luminance correction, and shadow compensation processing. As shown in Figure 34, it can be seen that by applying these processing steps, the sharpness of cracks 14 and other features in the image is significantly improved.

[0151] (Automation of processing condition export) In the above-described embodiment, it has been explained that: by inputting wafer processing information, temporary processing conditions can be automatically exported, and based on these processing conditions, a projected processing result image can be automatically exported and displayed. An image showing the actual processing result is also displayed, and the processing conditions are corrected until the actual processing result matches the projected processing result, and finally, the final processing conditions are exported. However, this entire processing condition export process can also be performed without automation.

[0152] For example, in the first step of automating the export of processing conditions, the user can manually generate and set processing conditions (temporary processing conditions) based on wafer processing information. Then, the actual processing results under the generated processing conditions can be obtained, and a correspondence can be established between each combination of input wafer processing information and manually generated processing conditions and the actual processing results, which are then stored in a database.

[0153] Furthermore, in the second step, by learning from the information stored in the aforementioned database, a model can be generated that derives the estimated processing results from wafer processing information and conditions. Then, by analyzing the data in the aforementioned database, a regression model can be generated that derives the optimal (highest accuracy) estimated processing results from wafer processing information and conditions. As an analytical method for this situation, multivariate analysis or machine learning can also be used. Specifically, analytical methods such as single regression, multiple regression, SGD regression, Lasso regression, Ridge regression, decision trees, support vector regression, Bayesian linear regression, deep learning, and the k-neighborhood method can also be used.

[0154] Furthermore, in the third step, a regression model can be automatically generated to derive the optimal processing conditions (formula) from the input wafer processing information to achieve the target processing result. That is, the parameters of the processing conditions can be adjusted based on the input wafer processing information while being input into this regression model (simulation), and the optimal processing conditions for the target processing result can be searched and output. Such optimization methods can include, for example, grid search, random search, and Bayesian optimization.

[0155] Furthermore, in the fourth step, the simulated results (estimated processing results) can be compared with the actual processing results. If necessary, the data can be stored in a database and the regression model can be regenerated (active learning). This allows for practical application to improve the accuracy of the regression model. In this way, the processing conditions can be adjusted based on the difference between the estimated and actual processing results, thus providing feedback to the actual processing results and improving the accuracy of the regression model.

[0156] 1: Laser processing equipment 2: Platform 3: Laser Irradiation Unit (Irradiation Section) 4, 5, 6: Camera Unit (Camera Section) 7: Drive Unit 8: Control Department 11: Object 12, 12a, 12b, 121, 122, 123, 123a, 123b: Modified regions 12s: Modified light spot 12c, 14a~14d, 121c, 122c, 123c: Cracks 14e: Frontend 15: Cutting line 20: Wafer 21: Semiconductor substrate 21a: Surface (Second Surface) 21b: Back side (first surface) 21c: Groove 22: Functional Component Layer 22a: Functional element 31: Light source 32: Spatial Light Modulator 33: Condensing Lens 41, 51: Light source 42, 52: Lenses 43: Objective lens 43a: Calibration ring 44, 54: Optical Detection Unit 53: Lens 140: Line Group 150: Monitor (input section, display section) 250: Feature points 280: Indentation C, C1, C2, C3: Focusing points Dx: Distance (lateral bifurcation) Dz: Distance (vertical divergence) F: Point Fv: Virtual Focus I1, I2: Light rays L, L1, L2, L3: Laser light

Claims

1. A laser processing apparatus, characterized by comprising: an irradiation unit that irradiates laser light onto a wafer having a first surface and a second surface from the first surface side; an imaging unit that outputs light that is penetrable through the wafer and detects the light that has propagated through the wafer; and a control unit configured to perform the following processes: The first processing involves controlling the aforementioned irradiation unit with a first processing condition, which is set such that a first modified region is formed inside the aforementioned wafer by irradiating the aforementioned wafer with the aforementioned laser light; the second processing involves, after the aforementioned first processing, specifying the state of the aforementioned first modified region based on the signal output from the aforementioned imaging unit that has detected the aforementioned light; and the brightness correction processing involves controlling the aforementioned imaging unit to perform imaging by the aforementioned imaging unit with a predetermined brightness for each region in the thickness direction of the aforementioned wafer that is being imaged by the aforementioned imaging unit, and to output light from the aforementioned imaging unit with a light amount corresponding to the position of each region in the thickness direction of the aforementioned wafer.

2. The laser processing apparatus as described in claim 1, wherein, The aforementioned control unit performs the aforementioned brightness correction process each time before observation, when the laser processing device is started, or when components are changed.

3. The laser processing apparatus as described in claim 1, wherein, The aforementioned control unit is configured to perform the following steps in the aforementioned brightness correction process: receiving input related to brightness correction; determining the correction implementation range in accordance with the aforementioned input; and adjusting the amount of light output from the aforementioned camera unit for each region in the aforementioned correction implementation range so that the brightness when the aforementioned camera unit captures an image becomes a predetermined brightness.

4. The laser processing apparatus as described in claim 1, wherein, The aforementioned control unit controls the aforementioned irradiation unit in the aforementioned first process, which is set by the aforementioned first processing conditions. The first processing conditions are set such that a second modified region is further formed that is located on the incident surface of the aforementioned laser light, which is located further than the aforementioned first modified region. In the aforementioned second process, the state of the aforementioned second modified region is further specified, and the appropriateness of the aforementioned first processing conditions is determined based on the specified information.

5. The laser processing apparatus as described in claim 4, wherein, The aforementioned control unit is configured to further perform the following processes: a third process, which controls the aforementioned irradiation unit with a second processing condition, wherein the second processing condition is set such that by irradiating the aforementioned wafer with the aforementioned laser light, the aforementioned first modified region and the aforementioned second modified region are formed inside the aforementioned wafer, and a third modified region is formed between the aforementioned first modified region and the aforementioned second modified region in the thickness direction of the aforementioned wafer; and a fourth process, which, after the aforementioned third process, specifies the state of the aforementioned first modified region, the aforementioned second modified region and the aforementioned third modified region based on the signal output from the aforementioned camera unit that has detected the aforementioned light, and determines whether the aforementioned second processing condition is appropriate based on the specified information; the aforementioned control unit performs the aforementioned brightness correction process each time before observation, when the laser processing device is started, or when the component is changed.

6. The laser processing apparatus as described in claim 5, wherein, The aforementioned control unit refers to at least one of the state of the aforementioned modified region and the state of cracks extending from the aforementioned modified region as the state of the aforementioned modified region.

7. The laser processing apparatus as described in claim 6, wherein, The aforementioned control unit is located in the aforementioned modified area, and determines whether the aforementioned processing conditions are appropriate based on that location.

8. The laser processing apparatus as described in claim 6 or 7, wherein, The aforementioned control unit determines whether the aforementioned crack extends to at least one of the aforementioned first surface and the aforementioned second surface, and determines whether the aforementioned processing conditions are appropriate based on whether the crack extends.

9. The laser processing apparatus as described in claim 8, wherein, The aforementioned control unit determines that the aforementioned first processing conditions are inappropriate when the aforementioned crack extends to at least one of the aforementioned first surface and the aforementioned second surface during the aforementioned second processing.

10. The laser processing apparatus as described in claim 6 or 7, wherein, The aforementioned control unit determines the appropriateness of the aforementioned processing conditions based on the extent of the aforementioned crack extension.

11. The laser processing apparatus as described in claim 6 or 7, wherein, The aforementioned control unit specifies the width of the snake that the aforementioned cracks travel in the direction intersecting with the thickness direction of the aforementioned wafer, and determines whether the aforementioned processing conditions are appropriate based on the width of the snake.

12. The laser processing apparatus as described in claim 6 or 7, wherein, The aforementioned control unit determines whether the aforementioned processing conditions are appropriate based on whether the cracks extending from the aforementioned different modified regions are connected to each other.

13. The laser processing apparatus as described in claim 6, wherein, The aforementioned control unit is configured to further perform the following processes: a fifth process, which controls the aforementioned irradiation unit with a third processing condition, the third processing condition being set in such a way that the aforementioned third modified region is formed inside the aforementioned wafer by irradiating the aforementioned wafer with the aforementioned laser light; and a sixth process, which, after the aforementioned fifth process, specifies the state of the aforementioned third modified region based on the signal output from the aforementioned camera unit that has detected the aforementioned light, and determines whether the aforementioned third processing condition is appropriate based on the specified information.

14. The laser processing apparatus as described in claim 13, wherein, The aforementioned control unit determines that the aforementioned third processing condition is inappropriate when, in the aforementioned sixth process, the aforementioned crack extends to at least one of the aforementioned first surface and the aforementioned second surface.

15. The laser processing apparatus as described in claim 5, wherein, The aforementioned control unit is configured to further execute a seventh process: the seventh process is to modify the aforementioned processing conditions in accordance with the determination result of the processing conditions if the aforementioned processing conditions have been determined to be inappropriate.

16. The laser processing apparatus as described in claim 5, wherein, The aforementioned control unit is configured to further perform shadow compensation processing. This shadow compensation processing controls the aforementioned control unit by capturing shadow images of each region in the thickness direction of the aforementioned wafer, which is being imaged by the aforementioned camera unit, before the processing of the aforementioned modified region. After the processing of the aforementioned modified region, the difference data between the images of each region captured by the aforementioned camera unit and the shadow images of the corresponding regions is specified. In the aforementioned second and fourth processes, the state of the relevant modified region is specified based on the aforementioned difference data.

17. The laser processing apparatus as claimed in claim 1, wherein, The aforementioned control unit is configured to further perform aberration correction processing. This aberration correction processing controls at least one of the aforementioned irradiation unit and the aforementioned imaging unit by performing aberration correction on each region in the thickness direction of the aforementioned wafer that is being photographed by the aforementioned imaging unit, in a manner corresponding to the position in the thickness direction of the aforementioned wafer.

18. A laser processing method, characterized by comprising the following steps: processing a wafer according to first processing conditions, the first processing conditions being set such that a first modified region is formed inside the wafer by irradiating the wafer with laser light; and specifying the state of the first modified region based on the imaging results of the wafer processed according to the first processing conditions; and performing a brightness correction process, the brightness correction process being performed such that imaging is performed on each region in the thickness direction of the wafer at a predetermined brightness, and outputting light related to imaging with a light amount corresponding to the position of each region in the thickness direction of the wafer.

Images