Data processing method, apparatus and system

Abstract

Embodiments of the present application disclose a data processing method, apparatus and system, which achieve simple hardware implementation, low power consumption, and good compatibility with various coherent transmission scenarios. The method comprises: first, adding dCP bits to first data comprising din bits, so as to obtain second data comprising dscr bits, wherein din and dCP are both integers greater than or equal to 1, and dscr=din+dCP; and then performing data processing, including encoding, dual-polarization symbol mapping, and framing, on the second data so as to obtain at least one super-frame. The first data is represented by r rows that each contain q=2056 bits; compared with the existing solutions of 10280 bits in each row, q=2056 allows better compatibility with further implementation of probabilistic constellation shaping (PCS), that is, the present application is better compatible with a 1.6T ZR+ data processing method using PCS in the future. The number of dual-polarization symbols in the at least one super-frame is an integer multiple of 172032, and thus, the present application is compatible with a 1.6T ZR+ data processing method using multi-subcarrier or multi-channel optical signal transmission in the future.

Description

A data processing method, apparatus and system

[0001] This application claims priority to Chinese Patent Application No. 202411767109.8, filed with the State Intellectual Property Office of China on December 3, 2024, entitled “A Data Processing Method, Apparatus and System Thereof”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to a data processing method, apparatus and system thereof. Background Technology

[0003] Driven by 5G, cloud computing, big data, and artificial intelligence, high-speed optical transmission networks are developing towards high capacity, packetization, and intelligence. Coherent optical communication systems utilize the amplitude, phase, polarization, or frequency of light waves to carry information. To combat optical signal distortion caused by dispersion, polarization-related impairments, noise, nonlinear effects, and other factors during transmission and to maintain long-distance transmission, coherent optical communication systems typically employ efficient forward error correction (FEC) codes to combat optical impairments during optical transmission, ensuring a sufficiently low bit error rate over long distances. For example, in an 800G ZR scenario, the optical module uses open FEC (OFEC), where the multiple bits to be transmitted are considered as a set of bits comprising multiple rows, with each row containing 10280 bits. Every 116 rows of these bit sets, totaling 116 × 10280 = 1192480 bits, undergo cyclic redundancy check (CRC) and pad insertion to obtain 1193472 bits. The 1,193,472 bits were scrambled and OFEC encoded to obtain 1,376,256 bits, which were then subjected to dual polarization 16-state quadrature amplitude modulation (DP-16QAM) to obtain 172,032 DP-16QAMs, and finally framed by DSP to obtain a super-frame.

[0004] For future metropolitan area telecommunications transmission and metropolitan area data center interconnect (DCI) scenarios, especially higher-speed transmission scenarios such as 1.6T ZR scenarios using 16QAM modulation, directly adopting the existing 800ZR data processing schemes mentioned above is not optimal in terms of power consumption and complexity. Furthermore, when designing 1.6T ZR schemes, data processing schemes for longer-distance transmission are usually designed simultaneously, such as the 1.6T ZR+ data processing scheme using probabilistic constellation shaping (PCS), 16QAM modulation, and multi-subcarrier, or the 800G ZR++ data processing scheme using quadrature phase shift keying (QPSK) modulation. In other words, when designing 1.6T ZR data processing schemes, it is also necessary to consider their compatibility with other data processing schemes (including 1.6T ZR+ using 16QAM modulation and 800G ZR++ using QPSK), which is a problem that urgently needs to be solved in the future. Summary of the Invention

[0005] This application provides a data processing method, apparatus and system, which are simple to implement in hardware, have low power consumption and are well compatible with various coherent transmission scenarios.

[0006] Firstly, embodiments of this application provide a data processing method. Firstly, for data including d... in Add d to the first data of bits CP bits to obtain including d scr The second data, d, is 1 bit. in and d CP All are integers greater than or equal to 1, d scr =d in +d CP Furthermore, the second data undergoes data processing including encoding, dual-polarization symbol mapping, and framing to obtain at least one superframe. The dual-polarization symbol mapping employs 16-ary dual-polarization quadrature amplitude modulation (DP-16QAM). The number of bits in the encoded second data is d. FEC The first data consists of r rows and q columns of bits, d in =r×q, the number of dual-polarization symbols in at least one superframe is d DP-16QAM d in d scr d FEC dDP-16QAM r, q and d CP The following table shows the relationships represented by any of the indices: .

[0007] In this implementation, the first data is represented by r rows, with each row containing q = 2056 bits. Compared to the existing scheme of 10280 bits per row, q = 2056 bits is more compatible with future implementations of probabilistic constellation shaping (PCS), meaning it is more compatible with future 1.6T ZR+ data processing methods that employ PCS. Furthermore, d DP-16QAM The specific value is relatively large and is an integer multiple of 172032, which is compatible with future 1.6T ZR+ data processing methods that use multi-subcarrier or multi-path optical signal transmission. For example, d DP-16QAM =344064, using the existing superframe structure including 172032 dual-polarization symbols, is equivalent to obtaining 2 superframes, which can be carried on 2 subcarriers or 2 optical signals respectively; for example, d DP-16QAM =688128, using the existing superframe structure which includes 172032 dual polarization symbols, is equivalent to obtaining 4 superframes. The 4 superframes can be carried on 4 subcarriers or 4 optical signals respectively. In this way, it can be compatible with scenarios with multiple subcarriers or multiple optical signals, and can also directly use the existing superframe structure, thereby reusing the existing framing operation and achieving a lower cost.

[0008] In some possible implementations, d is added to the first data. CP bits to obtain including d scr The second data, consisting of 1 bit, includes: performing a cyclic redundancy check (CRC) on the first data or inserting padding bits to obtain the result. scr The second data, consisting of 10 bits, helps improve the reliability of data transmission. This second data includes d... CRC One CRC check bit or d PAD One padding bit, d CRC and d PAD All are integers greater than or equal to 0, d CP =d CRC +d PAD .

[0009] In some possible implementations, the first data undergoes CRC once every 20 rows of bits. It can be seen that regardless of whether r = 1160 or r = 2320, r is divisible by 20, and the first data can undergo CRC exactly an integer number of times, making the implementation cost of CRC for the first data lower.

[0010] In some possible implementations, the CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =2384960, the first data underwent 58 CRC checks, d CRC =1856, d PAD =128.

[0011] In some possible implementations, the CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =4769920, the first data underwent 116 CRC checks, d CRC =3712, d PAD =256.

[0012] In some possible implementations, every 3552 bits in the second data are encoded to obtain 4096 bits. The encoded data includes the second data and the check bits obtained by encoding the second data. This helps to improve the reliability of data transmission and reuses the already defined OFEC encoding, making hardware implementation simpler.

[0013] In some possible implementations, the second data undergoes data processing including encoding, dual-polarization symbol mapping, and framing to obtain a superframe, which comprises 344,064 or 688,128 dual-polarization symbols. In other words, this superframe differs from existing superframes containing 172,032 dual-polarization symbols. This new superframe structure facilitates application in future single-carrier transmission scenarios.

[0014] In some possible implementations, d in =2384960. After the second data is processed, including encoding, dual polarization symbol mapping and framing, two superframes are obtained. The number of dual polarization symbols in each superframe is 172032. That is, each superframe can reuse the existing technology to provide the superframe structure, thereby reusing the existing framing operation and making the hardware implementation simpler.

[0015] In some possible implementations, the two superframes are carried on two subcarriers respectively; or, the two superframes are carried on two optical signals with different wavelengths. That is, it is compatible with future 1.6TZR+ data processing methods that use either two subcarriers or two optical signals for transmission.

[0016] In some possible implementations, d in=4769920. After the second data is processed, including encoding, dual polarization symbol mapping and framing, four superframes are obtained. Each of the four superframes includes 172032 dual polarization symbols. That is, each superframe can reuse the existing technology to provide the superframe structure, thereby reusing the existing framing operation and making the hardware implementation simpler.

[0017] In some possible implementations, the four superframes are carried on four subcarriers respectively; or, the four superframes are carried on four optical signals, each with a different wavelength. In other words, it is compatible with future 1.6TZR+ data processing methods that use either four subcarriers or four optical signals for transmission.

[0018] In some possible implementations, before performing data processing on the second data, including encoding, dual-polarization symbol mapping, and framing, to obtain at least one superframe, the method further includes scrambling the second data. Scrambling does not change the number of bits in the second data and is beneficial for improving the reliability of data transmission.

[0019] Secondly, embodiments of this application provide a data processing method. First, for data including d in Add d to the first data of bits CP bits to obtain including d scr The second data, d, is 1 bit. in and d CP All are integers greater than or equal to 1, d scr =d in +d CP Furthermore, the second data undergoes data processing including encoding, dual-polarization symbol mapping, and framing to obtain at least one superframe. The dual-polarization symbol mapping employs dual-polarization quadrature phase shift keying (QPSK). The number of bits in the encoded second data is d. FEC The first data consists of r rows and q columns of bits, d in =r×q, the number of dual-polarization symbols in at least one superframe is d DP-QPSK d in d scr d FEC d DP-QPSK r, q and d CP The following table shows the relationships represented by any of the indices: .

[0020] In this implementation, the first data is represented by r rows, with each row containing q = 2056 bits. Compared to the existing scheme of 10280 bits per row, q = 2056 provides better compatibility with future PCS implementations, meaning it is more compatible with future 1.6T ZR+ data processing methods that utilize PCS. Furthermore, d DP-QPSK The specific value is relatively large and is an integer multiple of 172032, which is compatible with future 1.6T ZR+ data processing methods that use multi-subcarrier or multi-path optical signal transmission. For example, d DP-QPSK =344064, using the existing superframe structure including 172032 dual-polarization symbols, is equivalent to obtaining 2 superframes, which can be carried on 2 subcarriers or 2 optical signals respectively; for example, d DP-QPSK =688128, using the existing superframe structure which includes 172032 dual polarization symbols, is equivalent to obtaining 4 superframes. The 4 superframes can be carried on 4 subcarriers or 4 optical signals respectively. In this way, it can be compatible with scenarios with multiple subcarriers or multiple optical signals, and can also directly use the existing superframe structure, thereby reusing the existing framing operation and achieving a lower cost.

[0021] In some possible implementations, d is added to the first data. CP bits to obtain including d scr The second data, consisting of 1 bit, includes: performing a CRC check on the first data or inserting padding bits to obtain the result containing d. scr The second data, consisting of 10 bits, helps improve the reliability of data transmission. This second data includes d... CRC One CRC check bit or d PAD One padding bit, d CRC and d PAD All are integers greater than or equal to 0, d CP =d CRC +d PAD .

[0022] In some possible implementations, the first data undergoes CRC once every 20 rows of bits. It can be seen that regardless of whether r = 1160 or r = 2320, r is divisible by 20, and the first data can undergo CRC exactly an integer number of times, making the implementation cost of CRC for the first data lower.

[0023] In some possible implementations, the CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =1192480, the first data underwent 29 CRC checks, d CRC =928,d PAD =64.

[0024] In some possible implementations, the CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =2384960, the first data underwent 58 CRC checks, d CRC =1856, d PAD =128.

[0025] In some possible implementations, every 3552 bits in the second data are encoded to obtain 4096 bits. The encoded data includes the second data and the check bits obtained by encoding the second data, which helps to improve the reliability of data transmission.

[0026] In some possible implementations, the second data undergoes data processing including encoding, dual-polarization symbol mapping, and framing to obtain a superframe, which comprises 344,064 or 688,128 dual-polarization symbols. In other words, this superframe differs from existing superframes containing 172,032 dual-polarization symbols. This new superframe structure facilitates application in future single-carrier transmission scenarios.

[0027] In some possible implementations, d in =1192480. After the second data is processed, including encoding, dual polarization symbol mapping and framing, two superframes are obtained. The number of dual polarization symbols in each superframe is 172032. That is, each superframe can reuse the existing technology to provide the superframe structure, thereby reusing the existing framing operation and making the hardware implementation simpler.

[0028] In some possible implementations, the two superframes are carried on two subcarriers respectively; or, the two superframes are carried on two optical signals with different wavelengths. That is, it is compatible with future 1.6TZR+ data processing methods that use either two subcarriers or two optical signals for transmission.

[0029] In some possible implementations, d in =2384960. After the second data is processed, including encoding, dual polarization symbol mapping and framing, four superframes are obtained. Each of the four superframes includes 172032 dual polarization symbols. That is, each superframe can reuse the existing technology to provide the superframe structure, thereby reusing the existing framing operation and making the hardware implementation simpler.

[0030] In some possible implementations, the four superframes are carried on four subcarriers respectively; or, the four superframes are carried on four optical signals, each with a different wavelength. In other words, it is compatible with future 1.6TZR+ data processing methods that use either four subcarriers or four optical signals for transmission.

[0031] In some possible implementations, before performing data processing on the second data, including encoding, dual-polarization symbol mapping, and framing, to obtain at least one superframe, the method further includes scrambling the second data. Scrambling does not change the number of bits in the second data and is beneficial for improving the reliability of data transmission.

[0032] Thirdly, embodiments of this application provide a data processing apparatus, which includes a first processing unit and a second processing unit. The first processing unit is configured to: process data including d in Add d to the first data of bits CP bits to obtain including d scr The second data, d, is 1 bit. in and d CP All are integers greater than or equal to 1, d scr =d in +d CP The second processing unit is used to perform data processing on the second data, including encoding, dual-polarization symbol mapping, and framing, to obtain at least one superframe. The dual-polarization symbol mapping uses DP-16QAM. The number of bits in the encoded second data is d. FEC The first data consists of r rows and q columns of bits, d in =r×q, the number of dual-polarization symbols in at least one superframe is d DP-16QAM d in d scr d FEC d DP-16QAM r, q and d CP The following table shows the relationships represented by any of the indices: .

[0033] In some possible implementations, the first processing unit is specifically configured to: perform CRC on the first data or insert padding bits to obtain data including d scr The second data consists of 1 bit. CRC One CRC check bit or d PAD One padding bit, d CRC and d PAD All are integers greater than or equal to 0, d CP =d CRC +d PAD .

[0034] In some possible implementations, the first data undergoes a CRC check every 20 rows of bits.

[0035] In some possible implementations, the CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =2384960, the first data underwent 58 CRC checks, d CRC =1856, d PAD =128.

[0036] In some possible implementations, the CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =4769920, the first data underwent 116 CRC checks, d CRC =3712, d PAD =256.

[0037] In some possible implementations, every 3552 bits in the second data is encoded to obtain 4096 bits.

[0038] In some possible implementations, the second data is processed into a superframe after data processing including encoding, dual polarization symbol mapping, and framing.

[0039] In some possible implementations, d in =2384960. After data processing including encoding, dual polarization symbol mapping and framing, the second data is used to obtain two superframes. The number of dual polarization symbols in each superframe is 172032.

[0040] In some possible implementations, the two superframes are carried on two subcarriers respectively; or, the two superframes are carried on two optical signals with different wavelengths.

[0041] In some possible implementations, d in =4769920. After data processing including encoding, dual polarization symbol mapping and framing, the second data is used to obtain 4 superframes. Each of the 4 superframes includes 172032 dual polarization symbols.

[0042] In some possible implementations, the four superframes are carried on four subcarriers respectively; or, the four superframes are carried on four optical signals, each with a different wavelength.

[0043] In some possible implementations, the data processing apparatus further includes a third processing unit, which scrambles the second data before the second processing unit performs data processing including encoding, dual polarization symbol mapping and framing on the second data to obtain at least one superframe.

[0044] Fourthly, embodiments of this application provide a data processing apparatus, which includes a first processing unit and a second processing unit. The first processing unit is configured to: process data including d in Add d to the first data of bits CP bits to obtain including d scr The second data, d, is 1 bit. in and d CP All are integers greater than or equal to 1, d scr =d in +d CP The second processing unit is used to perform data processing on the second data, including encoding, dual-polarization symbol mapping, and framing, to obtain at least one superframe. The dual-polarization symbol mapping uses DP-QPSK. The number of bits in the encoded second data is d. FEC The first data consists of r rows and q columns of bits, d in =r×q, the number of dual-polarization symbols in at least one superframe is d DP-QPSK d in d scr d FEC d DP-QPSK r, q and d CP The following table shows the relationships represented by any of the indices: .

[0045] In some possible implementations, the first processing unit is specifically configured to: perform CRC on the first data or insert padding bits to obtain data including d scr The second data consists of 1 bit. CRC One CRC check bit or d PAD One padding bit, d CRC and d PAD All are integers greater than or equal to 0, d CP =d CRC +d PAD .

[0046] In some possible implementations, the first data undergoes a CRC check every 20 rows of bits.

[0047] In some possible implementations, the CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =1192480, the first data underwent 29 CRC checks, d CRC =928,d PAD =64.

[0048] In some possible implementations, the CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =2384960, the first data underwent 58 CRC checks, d CRC =1856, d PAD =128.

[0049] In some possible implementations, every 3552 bits in the second data is encoded to obtain 4096 bits.

[0050] In some possible implementations, the second data is processed into a superframe after data processing including encoding, dual polarization symbol mapping, and framing.

[0051] In some possible implementations, d in =1192480. After data processing including encoding, dual polarization symbol mapping and framing, the second data is used to obtain two superframes. The number of dual polarization symbols in each superframe is 172032.

[0052] In some possible implementations, the two superframes are carried on two subcarriers respectively; or, the two superframes are carried on two optical signals with different wavelengths.

[0053] In some possible implementations, d in =2384960. After data processing including encoding, dual polarization symbol mapping and framing, the second data is divided into 4 superframes. Each of the 4 superframes contains 172032 dual polarization symbols.

[0054] In some possible implementations, the four superframes are carried on four subcarriers respectively; or, the four superframes are carried on four optical signals, each with a different wavelength.

[0055] In some possible implementations, the data processing apparatus further includes a third processing unit, which scrambles the second data before the second processing unit performs data processing including encoding, dual polarization symbol mapping and framing on the second data to obtain at least one superframe.

[0056] Fifthly, embodiments of this application provide a chip for performing the methods described in any of the first or second aspects.

[0057] Sixthly, embodiments of this application provide an optical module, which includes a processor and an interface. The interface is used to transmit and receive signals, and the processor is used to execute the methods described in either the first or second aspect. For example, the interface is used to transmit signals from the processor or to transmit received signals to the processor.

[0058] In a seventh aspect, embodiments of this application provide a network device. The network device includes a host-side device and an optical module as described in the sixth aspect. For example, the optical module is used to convert electrical signals from the host-side device into optical signals and transmit the optical signals. As another example, the optical module is used to convert received optical signals into electrical signals and transmit the electrical signals to the host-side device.

[0059] Eighthly, embodiments of this application provide a communication system that includes multiple network devices as described in the seventh aspect, wherein the multiple network devices are used to send optical signals to each other.

[0060] Ninthly, this application provides a computer-readable storage medium storing instructions that, when executed by a computer, cause the method described in any of the embodiments of the first or second aspect to be implemented.

[0061] In a tenth aspect, this application provides a computer program product including program instructions that, when executed, implement the method described in any of the embodiments of the first or second aspect. Attached Figure Description

[0062] Figure 1 is a schematic diagram of a communication system applied in an embodiment of this application;

[0063] Figure 2 is a schematic diagram of a data frame structure;

[0064] Figure 3 is a schematic diagram of an implementation of a data processing method in this application;

[0065] Figure 4 is a schematic diagram of one embodiment of performing CRC or inserting padding bits on the first data in this embodiment;

[0066] Figure 5 is a schematic diagram of another implementation method for performing CRC or inserting padding bits on the first data in this embodiment;

[0067] Figure 6 is a schematic diagram of another implementation method for performing CRC or inserting padding bits on the first data in this embodiment;

[0068] Figure 7 is a schematic diagram of a data processing device in an embodiment of this application;

[0069] Figure 8 is a schematic diagram of a structure of an optical module in an embodiment of this application;

[0070] Figure 9 is a schematic diagram of a network device in an embodiment of this application. Detailed Implementation

[0071] This application provides a data processing method, apparatus and system, which are simple to implement in hardware, have low power consumption and are well compatible with various coherent transmission scenarios.

[0072] It should be noted that the terms "first," "second," etc., in this application specification, claims, and the accompanying drawings are used to distinguish similar objects, not to limit a specific order or sequence. It should be understood that the above terms can be interchanged where appropriate so that the embodiments described in this application can be implemented in an order other than that described in this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or devices. It should be noted that in the embodiments of this application, unless otherwise stated, "a plurality of" refers to two or more. The "or" in the embodiments of this application is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A or B can be represented as: A existing alone, A and B existing simultaneously, and B existing alone.

[0073] Figure 1 is a schematic diagram of a communication system applied in an embodiment of this application. As shown in Figure 1, at the transmitting end, the data stream to be transmitted provided by the source undergoes forward error correction (FEC) encoding. The codeword information obtained by FEC encoding is processed by the transmitting end signal, which includes dual polarization symbol mapping and framing, and then transmitted through the channel to the receiving end. After receiving the distorted signal caused by noise or other impairments in the channel, the receiving end performs receiving end signal processing, including dispersion compensation, synchronization, and phase recovery, and then decodes it to recover the original data and send it to the destination. The above-mentioned framing can also be called digital signal processing (DSP) framing.

[0074] Figure 2 is a schematic diagram of a data frame structure. As shown in Figure 2, a data frame includes multiple rows of bits, with each row containing q bits. As an example, an 800G frame is represented as 512 rows, with each row containing q = 10280 bits. As another example, to better adapt to PCS processing, an 800G frame is represented as 2560 rows, with each row containing q = 2056 bits. In this application, to facilitate simultaneous compatibility with both 1.6T ZR and 1.6T ZR+ applications, the data frame is considered to be represented as multiple rows of q = 2056 bits.

[0075] Figure 3 is a schematic diagram of an embodiment of a data processing method according to this application. As shown in Figure 3, the first data to be transmitted is first subjected to cyclic redundancy check (CRC) or padding bits to obtain the second data. The second data is then subjected to data processing including encoding, dual polarization symbol mapping, and framing to obtain at least one superframe to be transmitted. This data processing may also include other operations such as interleaving. Optionally, before performing the above data processing on the second data, the second data may be scrambled, where scrambling does not change the number of bits in the second data. It should be understood that in practical applications, at least one of the CRC and padding bit operations can be performed; that is, only the CRC operation can be performed, or only the padding bit operation can be performed, or both the CRC operation and the padding bit operation can be performed.

[0076] As an example, the first data includes a total of d in =q×r bits, perform CRC or insert padding on the first data to obtain the second data. In the CRC operation, d is added... CRC Each CRC check bit will be inserted during the padding bit insertion operation. PAD 1000 padding bits. Where d CRC d is an integer greater than or equal to 0. PAD For integers greater than or equal to 0, we can denote them as d. CP =d CRC +d PAD At this time d scr =q×r+d CP It should be understood that if only the CRC operation is performed, then d PAD =0; if only the insertion of padding bits is performed, then d CRC =0. The redundancy corresponding to the CRC check performed on the first data or the insertion of padding bits is OH. CP =(d CRC +d PAD ) / (q×r). It should be noted that in some specific applications, the padding bits are all 0 bits.

[0077] As an example, when d PAD When = 0, the CRC result is q×r+d CRC Instead of inserting padding bits, the bits are directly scrambled, resulting in d bits. scr =q×r+d CRC As another example, to achieve lower latency and lower complexity, CRC is bypassed and replaced with padding bits, i.e., d... CRC =0, therefore d scr =q×r+d PAD .

[0078] It should be noted that in some specific application scenarios, CRC-32 is used. As an example, the first data is subjected to p CRC-32 operations, where p is an integer greater than 1 and the integer r is divisible by p, i.e., m = r / p is an integer. In this case, d... CRC = 32 × p. More specifically, for r lines of data obtained from the data frame, a CRC-32 operation is performed once for every m = r / p lines, totaling q × r / p bits, to add 32 CRC check bits. This CRC-32 operation is repeated p times to add a total of d CRC check bits. CRC = 32 × p CRC check bits. It should be noted that in some specific implementations, q × r / p = 41120 is chosen. In this case, the CRC-32 encoding and corresponding CRC detection operations can directly adopt the existing CRC-32 operation in the 800G-ZR, where the existing 800G-ZR performs a single CRC-32 operation on 4 rows and 10280 columns, totaling 41120 bits. In some specific implementations, q = 2056 and m = r / p = 20 are chosen. It should be understood that using r divisible by m simplifies the CRC operation.

[0079] In some specific applications, d PAD Some bits in the padding bits are used as link status indicators, such as d PAD-0 One bit is used to indicate link delay, where 0 <d PAD-0 <d PAD It should be understood that this includes d. scr In the second data of 1 bit, excluding those containing d in The first data of bits and d CRC One CRC check bit, and the remaining bits are considered as padding bits.

[0080] It should be noted that encoding the second data involves encoding every 3552 bits of the second data to obtain 4096 bits. (Including d) scr The second data of 1 bit is obtained after encoding. The encoded data consists of bits, including second data and a check bit obtained by encoding the second data. Dual-polarization symbol mapping includes symbol mapping and polarization distribution. Symbol mapping methods include, but are not limited to, quadrature amplitude modulation (QAM) and quadrature phase shift keying (QPSK). Typically, multiple bits are symbolized to obtain multiple symbols, and these symbols are polarized to obtain multiple dual-polarization (DP) symbols. This application does not limit the specific method used for dual-polarization symbol mapping; the following descriptions use DP-16QAM and DP-QPSK as examples.

[0081] Firstly, the dual-polarization symbol mapping employs DP-16QAM modulation. After encoding, the data undergoes interleaving and dual-polarization symbol mapping to obtain d... DP-16QAM =d FEC / 8 dual-polarization symbols. In the embodiments of this application, d is considered. DP-16QAM Each dual-polarization symbol is framed by a DSP to obtain at least one super-frame. DP-16QAM The dual-polarization symbol is also called the payload symbol, and the superframe is also called the multi-frame. Here, we consider d DP-16QAM =344064 or d DP-16QAM = 688128. At this point, the number of bits in the first data is denoted as d. in The number of bits in the second data is denoted as d. scr The number of bits in the encoded data is denoted as d. FEC The number of dual-polarization symbols in at least one superframe is denoted as d. DP-16QAM Let r be the number of rows and q be the number of columns in the first data set, and d be the total number of bits for CRC checksum and padding. CP These parameters satisfy a set of correspondences shown by any of the serial numbers in Table 1 below. It should be understood that the "serial number" in each table provided in the embodiments of this application is only for statistical purposes and to distinguish how many sets of parameter correspondences there are in the table. The "serial number" itself is not a parameter in the table. For example, there are two serial numbers, 1 and 2, in Table 1, indicating that there are two sets of parameter correspondences in Table 1.

[0082] Table 1

[0083] In Table 1, the parameter r for both sequence numbers 1 and 2 is divisible by m = 20. The CRC operation can be performed as follows: For the first data containing r rows, each containing q = 2056 bits, perform a CRC-32 operation once every m = 20 rows (a total of q × m = 41120 bits) to add 32 CRC check bits. Repeat this process p = r / m times to add a total of d bits. CRC = 32 × p CRC check bits.

[0084] Based on Table 1, as shown in Table 2 below, the number of rows corresponding to one CRC-32 operation is denoted as m, the number of CRC-32 operations is denoted as p, and the number of CRC check bits is denoted as d. CRC The number of padding bits is denoted as d. PAD These parameters satisfy a set of correspondences shown in any of the serial numbers in Table 2 below.

[0085] Table 2

[0086] In this embodiment, the first data can be processed by the data processing method described in Figure 3 to obtain at least one superframe (or multiple frames), and the CRC operation is performed once every 41120 bits using a CRC-32 operation. This allows the CRC operation to reuse the existing CRC scheme used in the 800ZR, facilitating compatibility with the existing 800ZR scheme. In other words, the data processing method provided in this embodiment is simple to implement, has low hardware complexity, and consumes less power.

[0087] Secondly, the dual-polarization symbol mapping employs DP-QPSK modulation. After encoding, the data undergoes interleaving and dual-polarization symbol mapping to obtain d... DP-QPSK =d FEC / 4 dual-polarization symbols. In the embodiments of this application, d is considered. DP-QPSK Each dual-polarization symbol is framed by a DSP to obtain at least one super-frame. DP-QPSK The dual-polarization symbol is also called the payload symbol, and the superframe is also called the multi-frame. Here, we consider d DP-QPSK =344064 or d DP-QPSK = 688128. At this point, the number of bits in the first data is denoted as d. in The number of bits in the second data is denoted as d. scr The number of bits in the encoded data is denoted as d. FEC The number of dual-polarization symbols in at least one superframe is denoted as d. DP-QPSK Let r be the number of rows and q be the number of columns in the first data set, and d be the total number of bits for CRC checksum and padding. CP These parameters satisfy a set of correspondences shown in any of the serial numbers in Table 3 below.

[0088] Table 3

[0089] In Table 3, the parameter r for both sequence numbers 1 and 2 is divisible by m = 20. The CRC operation can be performed as follows: For the first data containing r rows, each containing q = 2056 bits, perform a CRC-32 operation once every m = 20 rows (a total of q × m = 41120 bits) to add 32 CRC check bits. Repeat this CRC-32 operation p = r / m times to add a total of d bits. CRC = 32 × p CRC check bits.

[0090] Based on Table 3, as shown in Table 4 below, the number of rows corresponding to one CRC-32 operation is denoted as m, the number of CRC-32 operations is denoted as p, and the number of CRC check bits is denoted as d. CRC The number of padding bits is denoted as d. PAD These parameters satisfy a set of correspondences shown in any of the serial numbers in Table 4 below.

[0091] Table 4

[0092] It should be noted that when d DP-QPSK When the value is 172032, the number of bits in the first data is denoted as d. in The number of bits in the second data is denoted as d. scr The number of bits in the encoded data is denoted as d. FEC The number of payload symbols in each superframe is denoted as d. DP-QPSK Let r be the number of rows and q be the number of columns in the first data set, and d be the total number of bits for CRC checksum and padding. CP These parameters satisfy a set of correspondences shown in any of the numbers in Table 5 below. As can be seen from Table 5, when d... DP-QPSK When m = 172032, the parameter r cannot be divided by m = 20, which is not conducive to CRC operation.

[0093] Table 5

[0094] In this embodiment, the first data can be processed by the data processing method described in Figure 3 to obtain at least one superframe (or multiple frames), and the CRC operation is performed once every 41120 bits using a CRC-32 operation. This allows the CRC operation to reuse the existing CRC scheme used in the 800ZR, facilitating compatibility with the existing 800ZR scheme. In other words, the data processing method provided in this embodiment is simple to implement, has low hardware complexity, and consumes less power.

[0095] Combining the first and second aspects mentioned above, the first data is represented by r rows with each row containing q = 2056 bits. Compared with the existing scheme of 10280 bits per row, q = 2056 is more compatible with future probabilistic constellation shaping (PCS) implementations, which means it is more compatible with the 1.6T ZR+ data processing method that adopts PCS in the future.

[0096] In one possible implementation, the data processing shown in Figure 3 above yields a superframe, which includes 344,064 or 688,128 dual-polarization symbols. This superframe differs from existing superframes containing 172,032 dual-polarization symbols. The new superframe structure provided here facilitates application in future single-carrier transmission scenarios.

[0097] In another possible implementation, the data processing shown in Figure 3 above yields w superframes, where w is an integer greater than 1. Each of the w superframes includes 172,032 dual-polarization symbols. This means the superframe structure can reuse existing technologies. As an example, considering the future use of multi-subcarrier 1.6T ZR+ data processing methods, each subcarrier typically employs the same superframe structure, and the payload symbols corresponding to each superframe likely use the existing 172,032 symbols, meaning each superframe includes 172,032 dual-polarization symbols. The w superframes are carried on w subcarriers, and digital subcarrier multiplexing of the w subcarriers yields one optical signal for transmission. Typically, the w superframes corresponding to the w subcarriers are combined to contain w × 172,032 payload symbols. As another example, the w superframes are carried on w optical signals, each with a different wavelength. In summary, d DP-16QAM and d DP-QPSK The specific value is relatively large and is an integer multiple of 172032, which is compatible with the 1.6T ZR+ data processing method that will adopt multi-subcarrier or multi-channel optical signal transmission in the future.

[0098] Tables 2 and 4 also show that, considering at least one superframe with a payload symbol count of 344,064 (or 688,128), it can effectively support DP-16QAM and DP-QPSK modulation. In other words, the data processing method proposed in this application is compatible with 1.6T ZR scenarios with a transmission distance of approximately 80-120km and using DP-16QAM modulation, 1.6T ZR+ scenarios with a transmission distance of approximately 500-1000km and using DP-16QAM modulation, PCS, and multiple subcarriers, and 800G ZR++ scenarios with a transmission distance of over 1000km and using DP-QPSK modulation.

[0099] The following section provides further details with reference to several specific embodiments.

[0100] Example 1:

[0101] Taking parameter combination 1 in Table 2 as an example, the first data to be sent includes r = 1160 rows with a total length of d. in =q×r=2056×1160=2384960 bits. The first data is then subjected to CRC or padding bits are inserted to obtain the second data. During the CRC operation, d is added... CRC =1856 CRC check bits, and d will be inserted during the padding bit insertion operation. PAD = 128 padding bits. Figure 4 is a schematic diagram of one implementation of CRC or padding bit insertion for the first data in this embodiment. As shown in Figure 4, for the first data containing r rows of data, a CRC-32 operation is performed once for every m = 20 rows, totaling q × m = 2056 × 20 = 41120 bits, to add 32 CRC check bits. This process is repeated p = 58 times to add a total of d bits. CRC =32×p=32×58=1856 CRC check bits. Optionally, it is also possible to add d scr =q×r+d CRC +d PAD The second data, consisting of 2,386,944 bits, is scrambled. In some specific applications, the padding bits are all zero bits.

[0102] Includes d scr The second data of 1 bit is obtained after encoding. The encoded data consists of bits. After interleaving and DP-16QAM symbol mapping, the encoded data is obtained... A double-polarization symbol. Typically, d DP-16QAM = 344064 dual-polarization symbols are used as payload symbols in at least one superframe.

[0103] It should be understood that the first data is represented using r rows, with each row containing q = 2056 bits. Compared to the existing scheme of 10280 bits per row, q = 2056 provides better compatibility with future PCS implementations, meaning it is more compatible with future 1.6T ZR+ data processing methods that use PCS. Furthermore, the CRC operation is performed once every 41120 bits using a CRC-32 operation. This allows the CRC operation to reuse the existing CRC scheme used in 800ZR, facilitating compatibility with the existing 800ZR scheme. In other words, the data processing method provided in this application embodiment is simple to implement, has low hardware complexity, and lower power consumption.

[0104] In one possible implementation, the first data can be processed by the data processing method provided in this application to obtain one superframe (or multiple frames), wherein the superframe includes 344,064 dual-polarization symbols. That is, this superframe is different from the superframe in the prior art that includes 172,032 dual-polarization symbols. The new superframe structure provided herein is designed to facilitate application in future single-carrier transmission scenarios.

[0105] In another possible implementation, the first data, processed by the data processing method provided in this application, can yield two superframes (or more frames). Each superframe includes 172,032 dual-polarization symbols, meaning that the superframe can reuse existing technologies to provide a superframe structure. As an example, considering the future use of multi-subcarrier 1.6T ZR+ data processing methods, each subcarrier typically employs the same superframe structure, and the payload symbols corresponding to each superframe will most likely use the existing 172,032 symbols, i.e., each superframe includes 172,032 dual-polarization symbols. The two superframes are carried on two subcarriers respectively. Digital subcarrier multiplexing of the two subcarriers can yield one optical signal for transmission. Typically, the two superframes corresponding to the two subcarriers are combined to contain a total of 2 × 172,032 payload symbols. As another example, the two superframes are carried on two optical signals, each with a different wavelength. DP-16QAM The specific value is relatively large and is an integer multiple of 172032, which is compatible with the future 1.6T ZR+ data processing method using two subcarriers.

[0106] Example 2:

[0107] Taking the parameter combination of serial number 2 in Table 2 as an example. Figure 5 is a schematic diagram of another implementation method for performing CRC or inserting padding bits on the first data in this embodiment. As shown in Figure 5, for a total of d rows containing r = 2320 rows... in =q×r=2056×2320=4769920 bits, each m=20 rows, totaling q×m=2056×20=41120 bits, performs one CRC-32 operation to add 32 CRC check bits, repeating p=116 CRC-32 operations to add a total of d CRC =32 × p = 32 × 116 = 3712 CRC check bits. Additionally, the number of padding bits inserted is d. PAD =256. Optionally, it is also possible to include d scr =q×r+d CRC +d PAD The second data, consisting of 4,773,888 bits, is scrambled. In some specific applications, the padding bits are all zero bits.

[0108] Includes d scrThe second data of 1 bit is obtained after encoding. The encoded data consists of bits. After interleaving and DP-16QAM symbol mapping, the encoded data is obtained... A double-polarization symbol. Typically, d DP-16QAM =688128 dual-polarization symbols are used as payload symbols in at least one superframe.

[0109] It should be understood that the first data is represented using r rows, with each row containing q = 2056 bits. Compared to the existing scheme of 10280 bits per row, q = 2056 provides better compatibility with future PCS implementations, meaning it is more compatible with future 1.6T ZR+ data processing methods that use PCS. Furthermore, the CRC operation is performed once every 41120 bits using a CRC-32 operation. This allows the CRC operation to reuse the existing CRC scheme used in 800ZR, facilitating compatibility with the existing 800ZR scheme. In other words, the data processing method provided in this application embodiment is simple to implement, has low hardware complexity, and lower power consumption.

[0110] In one possible implementation, the first data can be processed by the data processing method provided in this application to obtain one superframe (or multiple frames), that is, the superframe includes 688,128 dual-polarization symbols. In other words, this superframe is different from the superframe in the prior art that includes 172,032 dual-polarization symbols. The new superframe structure provided herein is designed to facilitate application in future single-carrier transmission scenarios.

[0111] In another possible implementation, the first data, processed by the data processing method provided in this application, can yield four superframes (or more). Each of the four superframes includes 172,032 dual-polarization symbols. This means that the superframe structure can reuse existing technologies. As an example, considering the future use of multi-subcarrier 1.6T ZR+ data processing methods, each subcarrier typically employs the same superframe structure, and the payload symbols corresponding to each superframe will most likely use the existing 172,032 symbols, i.e., each superframe includes 172,032 dual-polarization symbols. The four superframes are carried on four subcarriers respectively. Digital subcarrier multiplexing of the four subcarriers can yield one optical signal for transmission. Typically, the four superframes corresponding to the four subcarriers combined contain a total of 4 × 172,032 payload symbols. As another example, the four superframes are carried on four optical signals, each with a different wavelength. DP-16QAM The specific value is relatively large and is an integer multiple of 172032, which is compatible with the future 1.6T ZR+ data processing method using 4 subcarriers.

[0112] Example 3:

[0113] Taking parameter combination 1 in Table 4 as an example, the first data to be sent includes r = 580 rows with a total length of d. in =q×r=2056×580=1192480 bits. The first data is then subjected to CRC or padding bits are inserted to obtain the second data. During the CRC operation, d is added... CRC = 928 CRC check bits, and d will be inserted during the padding bit insertion operation. PAD =64 padding bits. Figure 6 is a schematic diagram of another implementation of CRC or padding bit insertion for the first data in this embodiment. As shown in Figure 6, for the first data containing r rows of data, a CRC-32 operation is performed once for every m = 20 rows, totaling q × m = 2056 × 20 = 41120 bits, to add 32 CRC check bits. This is repeated p = 29 times to add a total of d... CRC =32×p=32×29=928 CRC check bits. Optionally, it is also possible to add d scr =q×r+d CRC +d PAD The second data, consisting of 1,193,472 bits, is scrambled. In some specific applications, the padding bits are all zero bits.

[0114] Includes d scr The second data of 1 bit is obtained after encoding. The encoded data consists of bits. After interleaving and DP-QPSK symbol mapping, the encoded data is obtained... A double-polarization symbol. Typically, d DP-QPSK = 344064 dual-polarization symbols are used as payload symbols in at least one superframe.

[0115] It should be understood that the first data is represented using r rows, with each row containing q = 2056 bits. Compared to the existing scheme of 10280 bits per row, q = 2056 provides better compatibility with future PCS implementations, meaning it is more compatible with future 1.6T ZR+ data processing methods that use PCS. Furthermore, the CRC operation is performed once every 41120 bits using a CRC-32 operation. This allows the CRC operation to reuse the existing CRC scheme used in 800ZR, facilitating compatibility with the existing 800ZR scheme. In other words, the data processing method provided in this application embodiment is simple to implement, has low hardware complexity, and lower power consumption.

[0116] In one possible implementation, the first data can be processed by the data processing method provided in this application to obtain one superframe (or multiple frames), wherein the superframe includes 344,064 dual-polarization symbols. That is, this superframe is different from the superframe in the prior art that includes 172,032 dual-polarization symbols. The new superframe structure provided herein is designed to facilitate application in future single-carrier transmission scenarios.

[0117] In another possible implementation, the first data, processed by the data processing method provided in this application, can yield two superframes (or more frames). Each superframe includes 172,032 dual-polarization symbols, meaning that the superframe can reuse existing technologies to provide a superframe structure. As an example, considering the future use of multi-subcarrier 1.6T ZR+ data processing methods, each subcarrier typically employs the same superframe structure, and the payload symbols corresponding to each superframe will most likely use the existing 172,032 symbols, i.e., each superframe includes 172,032 dual-polarization symbols. The two superframes are carried on two subcarriers respectively. Digital subcarrier multiplexing of the two subcarriers can yield one optical signal for transmission. Typically, the two superframes corresponding to the two subcarriers are combined to contain a total of 2 × 172,032 payload symbols. As another example, the two superframes are carried on two optical signals, each with a different wavelength. DP-QPSK The specific value is relatively large and is an integer multiple of 172032, which is compatible with the future 1.6T ZR+ data processing method using two subcarriers.

[0118] As can be seen from Embodiments 1 and 3, considering that the number of payload symbols in at least one superframe is 344064, it can well support DP-16QAM modulation and DP-QPSK modulation. That is to say, the data processing method proposed in this application embodiment is compatible with 1.6T ZR scenarios with a transmission distance of about 80-120km and using DP-16QAM modulation, and is also compatible with 1.6T ZR+ scenarios with a transmission distance of about 500-1000km and using DP-16QAM modulation, PCS and multiple subcarriers, and is also compatible with 800G ZR++ scenarios with a transmission distance of more than 1000km and using DP-QPSK modulation.

[0119] Example 4:

[0120] Take the parameter combination of serial number 2 in Table 4 as an example. As shown in Figure 4, for a total of d rows containing r = 1160... in The first data consists of q × r = 2056 × 1160 = 2384960 bits. Every m = 20 rows, totaling q × m = 2056 × 20 = 41120 bits, undergoes a CRC-32 operation to add 32 CRC check bits. This process is repeated p = 58 times to add a total of d bits.CRC =32 × p = 32 × 58 = 1856 CRC check bits. Additionally, the number of padding bits inserted is d. PAD =128. Optionally, it is also possible to include d scr =q×r+d CRC +d PAD The second data, consisting of 2,386,944 bits, is scrambled. In some specific applications, the padding bits are all zero bits.

[0121] Includes d scr The second data of 1 bit is obtained after encoding. The encoded data consists of bits. After interleaving and DP-QPSK symbol mapping, the encoded data is obtained... A double-polarization symbol. Typically, d DP-QPSK =688128 dual-polarization symbols are used as payload symbols in at least one superframe.

[0122] It should be understood that the first data is represented using r rows, with each row containing q = 2056 bits. Compared to the existing scheme of 10280 bits per row, q = 2056 provides better compatibility with future PCS implementations, meaning it is more compatible with future 1.6T ZR+ data processing methods that use PCS. Furthermore, the CRC operation is performed once every 41120 bits using a CRC-32 operation. This allows the CRC operation to reuse the existing CRC scheme used in 800ZR, facilitating compatibility with the existing 800ZR scheme. In other words, the data processing method provided in this application embodiment is simple to implement, has low hardware complexity, and lower power consumption.

[0123] In one possible implementation, the first data can be processed by the data processing method provided in this application to obtain one superframe (or multiple frames), that is, the superframe includes 688,128 dual-polarization symbols. In other words, this superframe is different from the superframe in the prior art that includes 172,032 dual-polarization symbols. The new superframe structure provided herein is designed to facilitate application in future single-carrier transmission scenarios.

[0124] In another possible implementation, the first data, processed by the data processing method provided in this application, can yield four superframes (or more). Each of the four superframes includes 172,032 dual-polarization symbols. This means that the superframe structure can reuse existing technologies. As an example, considering the future use of multi-subcarrier 1.6T ZR+ data processing methods, each subcarrier typically employs the same superframe structure, and the payload symbols corresponding to each superframe will most likely use the existing 172,032 symbols, i.e., each superframe includes 172,032 dual-polarization symbols. The four superframes are carried on four subcarriers respectively. Digital subcarrier multiplexing of the four subcarriers can yield one optical signal for transmission. Typically, the four superframes corresponding to the four subcarriers combined contain a total of 4 × 172,032 payload symbols. As another example, the four superframes are carried on four optical signals, each with a different wavelength. DP-QPSK The specific value is relatively large and is an integer multiple of 172032, which is compatible with the future 1.6T ZR+ data processing method using 4 subcarriers.

[0125] As can be seen from Embodiments 2 and 4, considering that the number of payload symbols in at least one superframe is 688,128, it can well support DP-16QAM modulation and DP-QPSK modulation. That is to say, the data processing method proposed in this application embodiment is compatible with 1.6T ZR scenarios with a transmission distance of about 80-120km and using DP-16QAM modulation, and is also compatible with 1.6T ZR+ scenarios with a transmission distance of about 500-1000km and using DP-16QAM modulation, PCS and multiple subcarriers, and is also compatible with 800G ZR++ scenarios with a transmission distance of more than 1000km and using DP-QPSK modulation.

[0126] Figure 7 is a schematic diagram of a data processing device according to an embodiment of this application. As shown in Figure 7, the data processing device includes a first processing unit 101 and a second processing unit 102. The first processing unit 101 is used to perform the operation of performing CRC on the first data or inserting padding bits to obtain the second data in the embodiment shown in Figure 3. The second processing unit 102 is used to perform the data processing operation of the second data, including encoding, dual polarization symbol mapping and framing, in the embodiment shown in Figure 3 to obtain at least one superframe to be sent. The dual polarization symbol mapping can use DP-16QAM or DP-QPSK, and the specific details can be found in the relevant description of the embodiment shown in Figure 3, which will not be repeated here. Optionally, the data processing device further includes a third processing unit 103, which is used to perform the operation of scrambling the second data in the embodiment shown in Figure 3.

[0127] It should be understood that the data processing device shown in Figure 7 can also be implemented in other ways. For example, the unit division in the above device is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components may be combined or integrated into another system. In addition, the functional units in the various embodiments of this application may be integrated into one processing unit, or they may be independent physical units, or two or more functional units may be integrated into one processing unit. The integrated unit described above can be implemented in hardware or as a software functional unit.

[0128] Figure 8 is a schematic diagram of an optical module structure according to an embodiment of this application. As shown in Figure 8, the optical module includes a processor 201 and an interface 202. The interface 202 can be a transceiver or an input / output interface, and is used to receive signals from other devices and transmit them to the processor 201 or to send signals from the processor 201 to other devices. Optionally, the optical module may also include a memory 203, wherein the memory 203 is used to store program instructions and data.

[0129] In one possible scenario, processor 201 is used to execute the operations of the embodiment shown in FIG3 above. For example, processor 201 includes a first processing unit 101, a second processing unit 102, and a third processing unit 103 as shown in FIG7. As an example, processor 201 executes the operations of the embodiment shown in FIG3 above to obtain at least one superframe, and sends at least one superframe through interface 202. In this example, interface 202 may specifically refer to an electrical interface. As another example, processor 201 executes the operations of the embodiment shown in FIG3 above to obtain at least one superframe, and the modulator in the optical module performs signal processing such as electro-optic conversion according to at least one superframe to obtain an optical signal, and then sends the optical signal through interface 202. In this example, interface 202 may specifically refer to an optical interface.

[0130] Typically, an optical module consists of optoelectronic devices, a processor, and an interface. The optoelectronic devices include transmitting and receiving devices. The transmitting end of the optical module converts electrical signals into optical signals and transmits them through optical fibers. The receiving end of the optical module receives the optical signals and converts them back into electrical signals.

[0131] It should be noted that the types of optical modules in this application embodiment include, but are not limited to, normal optical modules, near package optics (NPO) modules, and co-packaged optics (CPO) modules. Normal optical modules can perform functions including, but not limited to, digital signal processing (DSP) and clock data recovery (CDR). For example, a normal optical module converts analog signals to digital signals, performs DSP on the digital signals, and then converts them back to analog signals before sending them to the host device. Because DSP requires retiming, a normal optical module can also be called a retimed module. Normal optical modules are connected to the host device via an attachment unit interface (AUI). NPO and CPO modules do not have pluggable physical packaging and are closer to the host device. NPO and CPO modules can also be called optical engines. NPO or CPO technology is a technology that "packages" the host device (or host chip) and the optical engine. When NPO technology is used to encapsulate the host-side device and the optical engine, the optical engine can be called an NPO module. When CPO technology is used to encapsulate the host-side device and the optical engine, the optical engine can be called a CPO module.

[0132] Figure 9 is a schematic diagram of a network device according to an embodiment of this application. As shown in Figure 9, the network device includes a host-side device 301 and an optical module 302. In one possible scenario, the network device acts as a data transmitter, with the host-side device 301 sending electrical signals to the optical module 302. The optical module 302 converts the electrical signals into optical signals and transmits them through a channel. In another possible scenario, the network device acts as a data receiver, with the optical module 302 converting the received optical signals into electrical signals and sending them to the host-side device 301. For example, the host-side device 301 may specifically be a switch, router, or server. It should be understood that the network device in this embodiment of the application has both transmitting and receiving functions.

[0133] This application also provides an Optical Transport Network (OTN) device, which includes line-side equipment and client-side equipment. The client-side equipment may also be referred to as a tributary-side equipment in some scenarios. The line-side equipment includes a processor and an interface. In one possible scenario, the processor is used to perform the operations of the embodiment shown in FIG3. The interface can be a transceiver or an input / output interface, used to receive signals from other devices outside the line-side equipment and transmit them to the processor, or to send signals from the processor to other devices outside the line-side equipment.

[0134] This application also provides a chip. The chip integrates circuitry for implementing the functions of the processor 201 described above and one or more interfaces. As an example, the chip integrates a memory. As another example, when the chip does not integrate a memory, it can be connected to an external memory via the interface. The chip can perform the method steps of any one or more of the foregoing embodiments. Alternatively, the chip can implement the actions performed by the processing and transmission device in the foregoing embodiments based on program code stored in the memory.

[0135] As an example, the chip in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor can be a microprocessor, any conventional processor, or a processing circuit that implements a specific function.

[0136] This application also provides a computer-readable storage medium including a program or instructions that, when run on a computer, cause the method performed as described in the above method embodiments to be implemented.

[0137] It should be understood that the processor mentioned in the embodiments of this application can be implemented in hardware or software. When implemented in hardware, the processor can be a logic circuit, integrated circuit, etc. When implemented in software, the processor can be a general-purpose processor that reads software code stored in memory. The memory can exist independently and be connected to the processor, or the memory can be integrated with the processor.

[0138] As an example, the processor in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor can be a microprocessor, any conventional processor, or a processing circuit that implements a specific function.

[0139] In embodiments of this application, the memory may be random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and storage medium may reside in an ASIC. Additionally, the ASIC may reside in a network device or a terminal device. Alternatively, the processor and storage medium may exist as discrete components in the network device or terminal device.

[0140] In the above embodiments, it can be implemented entirely or partially by software, hardware, firmware, or any combination thereof.

[0141] When implemented in hardware, the data transmission method provided in this application embodiment may be implemented without reading software code or instructions. For example, it may be implemented by CPU, DSP, ASIC, FPGA, other programmable logic devices, transistor logic devices, hardware components, or any combination thereof.

[0142] When implemented using software, it can be implemented entirely or partially in the form of a computer program product. A computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, all or part of the processes or functions of the embodiments of this application are performed. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a terminal device, or other programmable device. The computer program or instructions can be stored in or transmitted through a computer-readable storage medium. The computer-readable storage medium can be any available medium that a computer can access, or a data storage device such as a server that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a Digital Versatile Disc (DVD); or it can be a semiconductor medium, such as a solid-state disk (SSD).

[0143] Finally, it should be noted that the above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A data processing method, characterized in that, include: For including d in Add d to the first data of bits CP bits to obtain including d scr The second data, d, is 1 bit. in and d CP All are integers greater than or equal to 1, d scr =d in +d CP ; The second data is subjected to data processing including encoding, dual polarization symbol mapping and framing to obtain at least one superframe. The dual polarization symbol mapping adopts hexadecimal dual polarization orthogonal amplitude modulation DP-16QAM. Wherein, the number of bits of the second data after encoding is d. FEC The first data includes r rows and q columns of bits, d in =r×q, where the number of dual-polarization symbols in the at least one superframe is d. DP-16QAM d in d scr d FEC d DP-16QAM r, q and d CP The following table shows the relationships represented by any of the indices:

2. The method according to claim 1, characterized in that, Add d to the first data CP bits to obtain including d scr The second data, consisting of 1 bit, includes: Perform Cyclic Redundancy Check (CRC) or insert padding bits on the first data to obtain a result including d scr The second data consists of bits, the second data including d CRC One CRC check bit or d PAD One padding bit, d CRC and d PAD All are integers greater than or equal to 0, d CP =d CRC +d PAD .

3. The method according to claim 2, characterized in that, In the first data, every 20 rows of bits undergo CRC once.

4. The method according to claim 3, characterized in that, The CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =2384960, the first data underwent 58 CRC checks, d CRC =1856, d PAD =128.

5. The method according to claim 3, characterized in that, The CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =4769920, the first data underwent 116 CRC checks, d CRC =3712, d PAD =256.

6. The method according to any one of claims 1 to 5, characterized in that, In the second data, every 3552 bits are encoded to obtain 4096 bits.

7. The method according to any one of claims 1 to 6, characterized in that, The second data is processed through data processing including encoding, dual polarization symbol mapping and framing to obtain a superframe.

8. The method according to any one of claims 1 to 6, characterized in that, d in =2384960, the second data is processed by encoding, dual polarization symbol mapping and framing to obtain 2 superframes, and each superframe includes 172032 dual polarization symbols.

9. The method according to claim 8, characterized in that, The two superframes are carried on two subcarriers respectively; or, the two superframes are carried on two optical signals respectively, and the wavelengths of the two optical signals are different.

10. The method according to any one of claims 1 to 6, characterized in that, d in =4769920, the second data is processed by encoding, dual polarization symbol mapping and framing to obtain 4 superframes, and each of the 4 superframes includes 172032 dual polarization symbols.

11. The method according to claim 10, characterized in that, The four superframes are carried on four subcarriers respectively; or, the four superframes are carried on four optical signals respectively, and the wavelengths of the four optical signals are all different.

12. The method according to any one of claims 1 to 11, characterized in that, Before performing data processing on the second data, including encoding, dual polarization symbol mapping, and framing, to obtain at least one superframe, the method further includes: The second data is scrambled.

13. A data processing method, characterized in that, include: For including d in Add d to the first data of bits CP bits to obtain including d scr The second data, d, is 1 bit. in and d CP All are integers greater than or equal to 1, d scr =d in +d CP ; The second data is subjected to data processing including encoding, dual polarization symbol mapping and framing to obtain at least one superframe, wherein the dual polarization symbol mapping adopts dual polarization orthogonal phase shift keying DP-QPSK; Wherein, the number of bits of the second data after encoding is d. FEC The first data includes r rows and q columns of bits, d in =r×q, where the number of dual-polarization symbols in the at least one superframe is d. DP-QPSK d in d scr d FEC d DP-QPSK r, q and d CP The following table shows the relationships represented by any of the indices:

14. The method according to claim 13, characterized in that, Add d to the first data CP bits to obtain including d scr The second data, consisting of 1 bit, includes: Perform Cyclic Redundancy Check (CRC) or insert padding bits on the first data to obtain a result including d scr The second data consists of bits, the second data including d CRC One CRC check bit or d PAD One padding bit, d CRC and d PAD All are integers greater than or equal to 0, d CP =d CRC +d PAD .

15. The method according to claim 14, characterized in that, In the first data, every 20 rows of bits undergo CRC once.

16. The method according to claim 15, characterized in that, The CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =1192480, the first data underwent 29 CRC checks, d CRC =928,d PAD =64.

17. The method according to claim 14, characterized in that, The CRC uses CRC-32, where every 20 rows of bits in the first data undergoes a CRC checksum once to add 32 CRC check bits. in =2384960, the first data underwent 58 CRC checks, d CRC =1856, d PAD =128.

18. The method according to any one of claims 13 to 17, characterized in that, In the second data, every 3552 bits are encoded to obtain 4096 bits.

19. The method according to any one of claims 13 to 18, characterized in that, The second data is processed through data processing including encoding, dual polarization symbol mapping and framing to obtain a superframe.

20. The method according to any one of claims 13 to 18, characterized in that, d in =1192480, the second data is processed by encoding, dual polarization symbol mapping and framing to obtain 2 superframes, and each superframe includes 172032 dual polarization symbols.

21. The method according to claim 20, characterized in that, The two superframes are carried on two subcarriers respectively; or, the two superframes are carried on two optical signals respectively, and the wavelengths of the two optical signals are different.

22. The method according to any one of claims 13 to 18, characterized in that, d in =2384960, the second data is processed by encoding, dual polarization symbol mapping and framing to obtain 4 superframes, each of the 4 superframes includes 172032 dual polarization symbols.

23. The method according to claim 22, characterized in that, The four superframes are carried on four subcarriers respectively; or, the four superframes are carried on four optical signals respectively, and the wavelengths of the four optical signals are all different.

24. The method according to any one of claims 13 to 23, characterized in that, Before performing data processing on the second data, including encoding, dual polarization symbol mapping, and framing, to obtain at least one superframe, the method further includes: The second data is scrambled.

25. A data processing apparatus, characterized in that, include: First processing unit and second processing unit; The first processing unit is configured to: process d in Add d to the first data of bits CP bits to obtain including d scr The second data, d, is 1 bit. in and d CP All are integers greater than or equal to 1, d scr =d in +d CP ; The second processing unit is used to: perform data processing on the second data, including encoding, dual polarization symbol mapping and framing, to obtain at least one superframe, wherein the dual polarization symbol mapping adopts hexadecimal dual polarization orthogonal amplitude modulation DP-16QAM; Wherein, the number of bits of the second data after encoding is d. FEC The first data includes r rows and q columns of bits, d in =r×q, where the number of dual-polarization symbols in the at least one superframe is d. DP-16QAM d in d scr d FEC d DP-16QAM r, q and d CP The following table shows the relationships represented by any of the indices:

26. A data processing apparatus, characterized in that, include: First processing unit and second processing unit; The first processing unit is configured to: process d in Add d to the first data of bits CP bits to obtain including d scr The second data, d, is 1 bit. in and d CP All are integers greater than or equal to 1, d scr =d in +d CP ; The second processing unit is used to: perform data processing on the second data, including encoding, dual polarization symbol mapping and framing, to obtain at least one superframe, wherein the dual polarization symbol mapping adopts dual polarization orthogonal phase shift keying DP-QPSK; Wherein, the number of bits of the second data after encoding is d. FEC The first data includes r rows and q columns of bits, d in =r×q, where the number of dual-polarization symbols in the at least one superframe is d. DP-QPSK d in d scr d FEC d DP-QPSK r, q and d CP The following table shows the relationships represented by any of the indices:

27. A chip, characterized in that, The chip is used to perform the method as described in any one of claims 1 to 24.

28. An optical module, characterized in that, The optical module includes a processor and an interface, the processor being configured to perform the method as described in any one of claims 1 to 24 and to transmit signals through the interface.

29. A network device, characterized in that, The network device includes a host-side device and an optical module as described in claim 28, wherein the optical module is used to convert electrical signals from the host-side device into optical signals and transmit the optical signals.

30. A communication system, characterized in that, The communication system includes a plurality of network devices as described in claim 29, wherein the plurality of network devices are used to send optical signals to each other.

Images