Amplifier linearity boosting circuit and method for post distortion feedback cancellation

Abstract

An amplifier circuit is provided, comprising an amplifier, a feedback path, and an amplifier linearity enhancement circuit. The amplifier has a signal input and a signal output and is configured to generate an amplified signal at the signal output. The feedback path is coupled between the signal output and the signal input, and the amplifier linearity enhancement circuit is located in the feedback path. The amplifier linearity enhancement circuit includes a nonlinear current generator and a phase shift circuit. The nonlinear current generator is configured to provide a nonlinear current based on the amplified signal, and the phase shift circuit is configured to adjust the phase of the nonlinear current to reduce intermodulation distortion of the amplified signal.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to U.S. Provisional Patent Application Serial No. 62 / 694,488, filed July 6, 2018, entitled “Amplifier Linearity Enhancement Circuit and Method for Post-Distortion Feedback Cancellation,” the entire contents of which are incorporated herein by reference for all purposes. Background Technology

[0003] Many wireless device designs, such as those for smartphones and tablets, require signal amplification without significant distortion. While amplifier architectures are designed to reduce distortion, virtually all wireless device designs experience some degree of intermodulation distortion. Intermodulation distortion involves amplitude modulation of two or more signals at different frequencies and is quantized by adding non-harmonic frequencies to the input signal. Intermodulation distortion typically occurs due to nonlinearity in the amplifier or preamplifier system. When uncontrolled, intermodulation distortion can increase bandwidth and introduce channel interference, as well as various other undesirable effects. Summary of the Invention

[0004] The various aspects and examples described herein relate to electronic systems, and more particularly to amplifier circuits for electronic systems and devices. The various example configurations of the amplifier circuits described herein are designed to reduce intermodulation distortion in amplified signals and improve system linearity over a wide range of temperature and process variations.

[0005] According to one aspect of the present invention, an amplifier circuit is provided, comprising: an amplifier having a signal input and a signal output, the amplifier being configured to generate an amplified signal at the signal output; a feedback path coupled between the signal output and the signal input; and an amplifier linearity enhancement circuit located in the feedback path. The amplifier linearity enhancement circuit includes a nonlinear current generator and a phase shift circuit, the nonlinear current generator being configured to provide a nonlinear current based on the amplified signal, and the phase shift circuit being configured to adjust the phase of the nonlinear current to reduce intermodulation distortion of the amplified signal.

[0006] According to one embodiment, the nonlinear current generator includes a transistor. According to one aspect of this embodiment, the nonlinear current generator includes a bias circuit coupled to the transistor, the bias circuit being configured to selectively bias the transistor. According to another aspect of this embodiment, the phase shift circuit includes a capacitor coupled in series with a resistor. According to one example, the capacitor is a variable capacitor, the resistor is a variable resistor, and the capacitor and the resistor are coupled between the nonlinear current generator and the signal input. In some embodiments, the transistor is a metal-oxide-semiconductor field-effect transistor (MOSFET) having a gate, a source, and a drain, the drain being coupled to the signal output, and the source being coupled to the phase shift circuit. In some examples, the bias circuit includes a first bias resistor coupled between the gate and electrical ground, a second bias resistor coupled between the source and electrical ground, and a bias switch coupled in parallel with the bias capacitor between the gate and the drain. In other examples, the amplifier circuitry further includes a bypass switch located in the feedback path and interposed between the signal output and the nonlinear current generator, the bypass switch being configured to selectively decouple the amplifier linearity boosting circuitry from the signal output. According to some embodiments, during feedback operation mode, a bias switch is disconnected to decouple the gate from electrical ground.

[0007] In other examples, the bias circuitry includes a first bias resistor coupled between the gate and a first bias input, a second bias resistor coupled between the source and a second bias input, and a bias capacitor coupled between the drain and the gate. In some examples, the amplifier circuitry also includes a bypass switch located in the feedback path and interposed between the signal output and the nonlinear current generator, the bypass switch being configured to selectively decouple the amplifier linearity boosting circuitry from the signal output. According to some embodiments, during feedback operation mode, the bias circuitry is configured to bias the transistor at least in part based on a first control signal received at the first bias input and a second control signal received at the second bias input.

[0008] In a further example, the bias circuitry includes a bias switch coupled between the gate and electrical ground, and a current source coupled between the source and electrical ground. In some examples, the amplifier circuitry also includes a bypass switch located in the feedback path and interposed between the signal output and the nonlinear current generator, the bypass switch being configured to selectively decouple the amplifier linearity boosting circuitry from the signal output. According to some embodiments, during feedback operation mode, the bias switch is open to decouple the gate from electrical ground.

[0009] According to other examples, the bias circuit includes a current source coupled to the drain via a first bias switch, a bias resistor coupled between the source and electrical ground, and a second bias switch coupled between the gate and electrical ground. In some examples, the amplifier circuit also includes a DC blocking component located in the feedback path and interposed between the amplifier linearity boosting circuit and the signal output. The amplifier circuit may also include a bypass switch located in the feedback path and interposed between the signal output and the nonlinear current generator, the bypass switch being configured to selectively decouple the amplifier linearity boosting circuit from the signal output. According to some embodiments, during feedback operation mode, the first bias switch is closed to couple the current source to the drain, and the second bias switch is open to decouple the gate from electrical ground.

[0010] According to some embodiments, the amplifier is configured to apply a variable gain to a signal received at the signal input to generate an amplified signal at the signal output. In some embodiments, the phase-shifting circuit is configured to shift the phase of a nonlinear current at least partially based on a gain setting of the amplifier, and the phase-shifting circuit includes a variable capacitor coupled in series with a variable resistor. In at least one embodiment, at least one of the variable capacitor and the variable resistor is adjustable to change the phase of the nonlinear current. According to some embodiments, the amplifier circuit further includes a bypass switch located in the feedback path and interposed between the signal output and the nonlinear current generator, the bypass switch being configured to selectively decouple the amplifier linearity enhancement circuitry from the signal output at least partially based on a gain setting of the amplifier. In at least some embodiments, at least one of the variable capacitor and the variable resistor is adjustable to change the amplitude of the nonlinear current.

[0011] According to one aspect of this application, the amplifier circuit may be included in a module, and the module may be included in an electronic device. According to one aspect of this application, the amplifier circuit may be included in a system including an antenna for transmitting and / or receiving signals, a transceiver, and the amplifier circuit coupled between at least the antenna and the transceiver.

[0012] According to another aspect of this application, an amplifier feedback method is provided. The method includes: receiving a signal at a signal input of an amplifier; amplifying the signal to provide an amplified signal at a signal output of the amplifier; applying a nonlinear current to the signal received at the signal input based on the amplified signal; and shifting the phase of the nonlinear current to reduce intermodulation distortion of the amplified signal. According to one aspect, shifting the phase of the nonlinear current includes adjusting the complex impedance of a phase-shifting circuit, and adjusting the complex impedance of the phase-shifting circuit includes adjusting the value of at least one of a capacitor and a resistor. According to another aspect, applying the nonlinear current to the signal received at the signal input includes coupling a transistor in a feedback path between the signal input and the signal output, and applying the nonlinear current using the transistor. According to yet another aspect, the method may further include adjusting the amplitude of the nonlinear current to reduce intermodulation distortion of the amplified signal, and adjusting the amplitude of the nonlinear current includes adjusting the complex impedance of the phase-shifting circuit. In some embodiments, adjusting the amplitude of the nonlinear current includes adjusting the amplitude of the nonlinear current based on a gain setting of the amplifier, and in some embodiments, shifting the phase of the nonlinear current includes performing a phase shift based on a gain setting of the amplifier.

[0013] According to another aspect of this application, the amplifier feedback method may include amplifying a signal to provide an amplified signal at the signal output of the amplifier, generating a nonlinear current based on the amplified signal, adjusting the complex impedance of a phase shift circuit to adjust at least one of the amplitude and phase of the nonlinear current, and applying the nonlinear current to a signal at the signal input of the amplifier to reduce intermodulation distortion of the amplified signal.

[0014] Other aspects, examples, and advantages of these exemplary aspects and embodiments are discussed in detail below. The examples disclosed herein may be combined with other examples in any manner consistent with at least one of the principles disclosed herein, and references to “example,” “some examples,” “alternative examples,” “various examples,” “an example,” etc., are not necessarily mutually exclusive and are intended to indicate that a particular feature, structure, or characteristic described may be included in at least one example. These terms appearing herein do not necessarily all refer to the same example. Attached Figure Description

[0015] The following discussion of at least one example, with reference to the accompanying drawings, is not intended to be drawn to scale. The drawings are included to provide illustration and further understanding of the various aspects and examples, and are incorporated into and constitute a part of this specification, but are not intended to define limitations of this disclosure. In the drawings, each identical or substantially identical component shown in the various figures is represented by the same numerals. For clarity, not every component is labeled in every figure. In the figures:

[0016] Figure 1 These are block diagrams of amplifier circuits based on the various examples described herein;

[0017] Figure 2 It is based on the various examples described in this article. Figure 1 A schematic diagram of the amplifier circuit;

[0018] Figure 3 It is based on the various examples described in this article. Figure 1 Another schematic diagram of the amplifier circuit;

[0019] Figure 4 It is based on the various examples described in this article. Figure 1 Another schematic diagram of the amplifier circuit;

[0020] Figure 5 It is based on the various examples described in this article. Figure 1 Another schematic diagram of the amplifier circuit;

[0021] Figure 6 These are block diagrams of amplifier circuits based on the various examples described herein;

[0022] Figure 7 This is a block diagram of an example of an RF module based on the examples described herein;

[0023] Figure 8 This is a block diagram of one example of a wireless device based on the various examples described herein, in which wireless devices can be used. Figure 7 The implementation method of the radio frequency module; and

[0024] Figure 9A This is a Monte Carlo simulation response graph of the amplifier circuit, showing the intermodulation distortion of a typical amplifier circuit; and

[0025] Figure 9B It is based on the various examples described in this article. Figure 1 The Monte Carlo simulation response of the amplifier circuit is plotted, showing the reduced intermodulation distortion. Detailed Implementation

[0026] The various aspects and examples described herein relate to electronic systems, and more particularly to amplifier circuits for electronic systems and devices. In various examples, the described amplifier circuits include amplifier linearity enhancement circuitry coupled along a feedback path between the amplifier's signal input and signal output. The amplifier may include a low-noise amplifier, a power amplifier, or any other radio frequency amplifier found in electronic devices. Based on the amplified signal at the amplifier's signal output, the amplifier linearity enhancement circuitry is configured to apply a nonlinear current to the amplifier's signal input to reduce intermodulation distortion of the amplified signal.

[0027] As mentioned above, virtually all wireless device designs will experience some degree of intermodulation distortion. To reduce intermodulation distortion, an intermodulation distortion absorber is typically coupled to the output of the amplifier system. An intermodulation distortion absorber can comprise a transistor, capacitor, or resistor configured as a diode, series-coupled between the output and electrical ground. While providing improved performance for certain operating conditions, intermodulation distortion absorbers do not scale well over a wide temperature range or a wide range of process variations. In some cases (e.g., at certain temperatures, at certain amplifier gain settings, etc.), an intermodulation distortion absorber may not provide any improvement in the linearity of the amplifier system, and instead, it may limit the performance of the amplifier system.

[0028] The aspects and examples discussed herein reduce intermodulation distortion of amplified signals over a wide range of temperature and process variations. Furthermore, the aspects and examples discussed herein allow for adaptation to fluctuating (e.g., varying) intermodulation distortion. This capability may be highly desirable in many applications. For example, in many wireless devices, it is desirable for the components to exhibit minimal distortion under a variety of conditions. The various aspects and examples of amplifier circuits, devices, systems, modules, and processes discussed herein can meet these objectives for a range of such conditions, providing stable performance regardless of temperature or process conditions. Therefore, the aspects and examples disclosed herein provide important functionality not available from conventional wireless devices.

[0029] It should be understood that the examples of methods and apparatus discussed herein are not limited to the construction details and component arrangements set forth in the following description or shown in the accompanying drawings. The methods and apparatus can be implemented in other examples and can be practiced or performed in various ways. The examples of specific embodiments provided herein are for illustrative purposes only and are not intended to be limiting. Furthermore, the wording and terminology used herein are for descriptive purposes and should not be considered limiting. The terms “comprising,” “including,” “having,” “containing,” “involving,” and variations thereof, as used herein, are intended to cover the items listed thereafter and their equivalents, as well as additional items. References to “or” are to be interpreted as inclusive, such that any term described using “or” can refer to a single, more than one, or any of the terms described. Any references to front and back, left and right, top and bottom, upper and lower, and vertical and horizontal are intended for descriptive convenience and not to limit the system and methods or their components to any one location or spatial orientation.

[0030] Figure 1 This is a block diagram of an amplifier circuit 100 according to various examples described herein. The amplifier circuit 100 is shown as including an amplifier 102, a feedback path 104, and an amplifier linearity enhancement circuit 106. The amplifier 102 includes a signal input 108 and a signal output 110. The feedback path 104 is connected at a first end to the signal input 108 and at a second end to the signal output 110. The amplifier linearity enhancement circuit 106 is located in the feedback path 104 between the signal input 108 and the signal output 110. Figure 1 As shown, amplifier circuit 100 may include a bypass switch 112, which is coupled and interposed along feedback path 104 between amplifier linearity enhancement circuit 106 and signal output 110. Therefore, bypass switch 112 can be closed or opened to couple or decouple amplifier linearity enhancement circuit 106 from signal output 110. However, in some other examples, bypass switch 112 can be removed, and signal output 110 can be directly coupled to amplifier linearity enhancement circuit 106. In various examples, and as... Figure 1 As shown, the amplifier linearity enhancement circuit 106 may include a nonlinear current generator 114 and a phase shift circuit 116. Each of the nonlinear current generator 114 and the phase shift circuit 116 is coupled along a feedback path 104 between the signal output 110 and the signal input 108.

[0031] Amplifier 102 is arranged to receive a signal at signal input 108 and generate an amplified signal at signal output 110. In many of the examples described herein, the signal is a radio frequency (RF) signal. Accordingly, for example, amplifier 102 may be a low-noise amplifier, a power amplifier, or an RF amplifier. In a particular example, amplifier 102 is an RF amplifier coupled within the front-end receive path of a wireless device such as a smartphone or tablet. In such an example, amplifier 102 may receive a signal at signal input 108 from an antenna or one or more switching components coupled to an antenna and may provide an amplified signal to an RF transceiver at signal output 110. However, other examples are not so limited, and in other embodiments, amplifier 102 may be another type of amplifier, and in particular, it may be an amplifier other than an RF amplifier (e.g., an audio amplifier).

[0032] Although Figure 1 The amplifier 102 is shown with a single input, but in various other examples, it may have different types of inputs or an arrangement of more than one input (e.g., differential inputs). In some examples, the amplifier 102 provides gain to the signal received at signal input 108 to produce an amplified signal at signal output 110. The amplifier 102 may have one or more gain stages, and in some examples, it may provide variable gain (e.g., adjustable gain) to the received signal. For example, the amplifier 102 may have a low-gain stage configured to provide a first gain, a medium-gain stage configured to increase the gain relative to the low-gain stage, and a high-gain stage configured to increase the gain relative to the medium-gain stage. Each gain stage may correspond to a corresponding gain setting of the amplifier 102, such as a low-gain setting, a medium-gain setting, and a high-gain setting. It should be understood that in various other examples, the amplifier 102 may have any other number of gain stages, and therefore any number of gain settings. In some examples, the amplifier 102 may also have an amplifier bypass setting, during which the gain stages are disabled or bypassed, and the amplifier 102 provides no gain.

[0033] In various examples, the amplified signal at signal output 110 exhibits undesirable intermodulation distortion. For instance, this intermodulation distortion might be due to the nonlinearity of amplifier 102. Thus, amplifier linearity enhancement circuit 106 is configured to reduce intermodulation distortion of the amplified signal and improve the linearity of amplifier 102. As further described below, various examples of amplifier linearity enhancement circuit 106 provide the benefit of adapting to variations in intermodulation distortion caused by changes in temperature or process conditions (e.g., varying gain settings).

[0034] Specifically, the nonlinear current generator 114 is configured to generate a nonlinear current based on the amplified signal at signal output 110. As shown, the nonlinear current generator 114 is coupled to the phase shift circuit 116 and configured to provide a nonlinear current to the phase shift circuit 116. The phase shift circuit 116 is configured to adjust at least one of the phase and amplitude of the nonlinear current and provide the nonlinear current to the signal input of amplifier 102. In various examples, the phase and / or amplitude of the nonlinear current is controlled by the phase shift circuit 116 such that when the nonlinear current is provided to signal input 108, it reduces (or completely eliminates) intermodulation distortion of the amplified signal. In particular, the phase and / or amplitude of the nonlinear current can be adjusted such that the nonlinear current cancels out and thus reduces or eliminates intermodulation distortion of the amplified signal at signal output 110. Reference is made here. Figures 2-6 Each of them and continue to refer to Figure 1 The specific components of the nonlinear current generator 114 and the phase shift circuit 116 are further described.

[0035] Although this document describes it as typically providing a nonlinear current, in various examples, the nonlinear current generator 114 is based on an amplified signal S. x Specifically, it generates a nonlinear response S. y For example, the nonlinear response S y It can be represented as:

[0036]

[0037] When adjusting one or both of the phase and amplitude of the nonlinear current, the phase shift circuit 116 is configured to adjust the nonlinear response S respectively. y The polynomial terms (i.e., a0, a1, a2, a3, ..., a...) n The phase and amplitude of the polynomial terms are adjusted. Specifically, the phase-shifting circuit is configured to adjust the phase and amplitude of the polynomial terms so that the amplifier signal response is linearized.

[0038] Although the components in the accompanying drawings may be shown and described as discrete elements in the block diagrams and may be referred to as “circuit” or “circuit system”, unless otherwise indicated, these elements may be implemented as one or a combination of analog circuit systems, digital circuit systems, or one or more microprocessors executing software instructions. Unless otherwise indicated, signal lines may be implemented as discrete analog or digital signal lines. Unless otherwise indicated, signals may be encoded in digital or analog form; conventional digital-to-analog converters or analog-to-digital converters may not be shown in the drawings.

[0039] Figure 2 It is based on the various examples described in this article. Figure 1 A schematic diagram of amplifier circuit 100. Specifically, Figure 2An example implementation of a nonlinear current generator 114 and a phase shift circuit 116 is shown. As illustrated, the nonlinear current generator 114 may include a transistor 200 and a bias circuit 202. Although the transistor 200 is shown as a three-terminal metal-oxide-semiconductor field-effect transistor (MOSFET) with a source, drain, and gate, in various other examples, the transistor 200 may be a different type of transistor or may be a MOSFET with more than three terminals. Figure 2 As shown, the drain is selectively coupled to the signal output 110 via a bypass switch 112, and the source is coupled to the phase shift circuit 116.

[0040] The bias circuit 202 may include various circuit elements configured to control the bias of the transistor 200, and thus control the operating mode of the amplifier linearity boosting circuit 106. In various examples, the amplifier linearity boosting circuit 106 may operate in a bypass operating mode or a feedback operating mode. During the bypass operating mode, the bypass switch 112 may be turned off to decouple or bypass the amplifier linearity boosting circuit 106, particularly the nonlinear current generator 114, from the signal output 110. Thus, during the bypass operating mode, no nonlinear current is generated or applied to the signal input 108 through the amplifier linearity boosting circuit 106. As discussed, in some examples, the bypass switch 112 is optional and may be removed from the feedback path 104. In these examples, one or more components of the nonlinear current generator 114 may be controlled to decouple the amplifier linearity boosting circuit 106 from the signal output 110.

[0041] During feedback operation mode, bypass switch 112 closes to couple amplifier linearity boosting circuit 106, specifically nonlinear current generator 114, to signal output 110. During feedback operation mode, bias circuit 202 is configured to bias transistor 200, which applies a nonlinear current to signal input 108. Although shown as a single-pole single-throw switch for ease of illustration, in various other examples, bypass switch 112 may include any suitable device for controlling the current flow between signal output 110 and amplifier linearity boosting circuit 106.

[0042] exist Figure 2 In the diagram, bias circuit 202 is shown to include bias switch 204, first bias resistor 206, bias capacitor 214, and second bias resistor 208. The drain of transistor 200 is selectively coupled to signal output 110 via bypass switch 112 and also coupled to the gate of transistor 200 via bias capacitor 214. First bias resistor 206 is coupled between the gate and ground. Bias switch 204 is selectively coupled in parallel with bias capacitor 214 between the gate and drain. Second bias resistor 208 is coupled between the source and ground.

[0043] During bypass operation mode, bias switch 204 is turned off to couple the gate to electrical ground (e.g., via first bias resistor 206). Therefore, during bypass operation mode, transistor 200 is biased to the off state, and no conduction occurs between the source and drain. In the example where bypass switch 112 has been removed, transistor 200 functions as a switch during bypass mode to decouple amplifier linearity boosting circuitry 106 from signal output 110.

[0044] During the feedback operation mode, bias switch 204 is closed to short-circuit the gate and drain. Therefore, during the feedback operation mode, the amplified signal at signal output 110 at the drain of transistor 200 is received, the transistor is biased to the ON state, and conduction occurs between the source and drain to provide a nonlinear current to phase shift circuit 116. In various examples, the value of the first bias resistor 206 (e.g., a resistor) and / or the value of the second bias resistor 208 (e.g., a resistor) can be selected to control the operating point of transistor 200. For example, the first bias resistor 206 (e.g., over 100 kΩ) may have a significantly larger resistance value than the second bias resistor 208 (e.g., 1 kΩ–10 kΩ). It should be understood that the specific values ​​of bias resistors 206 and 208 will depend on the supply voltage and current and can be selected to set the bias point of transistor 200 between approximately 100 μA and 700 μA. Although bias switch 204 is shown as a single-pole single-throw switch, in various other examples, bias switch 204 can be implemented as any other suitable switch.

[0045] like Figure 2 As further shown in the schematic diagram, the phase shift circuit 116 may include a capacitor 210, which is coupled in series with a resistor 212 between the nonlinear current generator 114 and the signal input 108. Specifically, Figure 2 A capacitor 210 is shown coupled between the source of transistor 200 and resistor 212, and a resistor 212 is coupled between capacitor 210 and signal input 108. In various examples, and as shown... Figure 2 As shown, capacitor 210 is a variable capacitor, and resistor 212 is a variable resistor. Therefore, phase shift circuit 116 can have a complex impedance that can be adjusted via the values ​​of capacitor 210 and resistor 212. Capacitor 210 and resistor 212 are used to adjust the phase and amplitude of the nonlinear current. Therefore, the values ​​of capacitor 210 and resistor 212 can be increased or decreased to adjust the amount of phase or amplitude shift, and in particular, to adjust the nonlinear response S. y The phase and magnitude of the polynomial terms.

[0046] During feedback operation, phase shift circuit 116 receives a nonlinear current from nonlinear current generator 114 and shifts the phase and / or amplitude of the nonlinear current such that when the nonlinear current is applied to signal input 108, intermodulation distortion of the amplified signal is reduced. In various examples, the values ​​of capacitor 210 and resistor 212 are chosen to shift the phase of the nonlinear current out of phase (e.g., out of phase) from the intermodulation distortion of the amplified signal by 180 degrees. Therefore, when applied to the signal input, the nonlinear current and intermodulation distortion cancel each other out, thereby reducing (or completely eliminating) intermodulation distortion. In some examples, phase shift circuit 116 may be coupled with additional circuit elements such as unit buffers and / or inductors to collectively provide the desired phase or amplitude shift. Such additional circuit elements may also be arranged along feedback path 104 and interposed between nonlinear current generator 114 and signal input 108.

[0047] While in one example, phase shift circuit 116 may shift the phase of the nonlinear current by 180 degrees relative to intermodulation distortion, in various other examples, the phase of the nonlinear current may be shifted by different amounts. For example, phase shift circuit 116 may shift the phase of the nonlinear current by an arbitrary amount that may vary over time to achieve a 180-degree phase difference relative to intermodulation distortion. That is, it should be understood that in some examples, a phase shift greater than or less than 180 degrees may be required to achieve the desired reduction in intermodulation distortion. In a particular example, the values ​​of capacitor 210 and / or resistor 212 may be adjusted during the operation of amplifier 102 to accommodate various operating conditions that may affect intermodulation distortion, such as temperature variations, process variations, and / or other variations. Specifically, the values ​​of capacitor 210 and / or resistor 212 may be adjusted based on a specific gain setting of amplifier 102.

[0048] For example, a low-gain setting of amplifier 102 may require a more aggressive (e.g., larger amplitude and / or larger phase offset) nonlinear current than a medium-gain setting of amplifier 102 to achieve the same amount of relative intermodulation distortion reduction. Similarly, a medium-gain setting of amplifier 102 may require a more aggressive (e.g., larger amplitude and / or larger phase offset) nonlinear current than a high-gain setting of amplifier 102 to achieve the same amount of relative intermodulation distortion reduction. In some examples, amplifier circuitry 100 may be controlled to a bypass operation mode during the high-gain setting of the amplifier. That is, during the high-gain setting, amplifier linearity boosting circuitry 106 may be decoupled from signal output 110 and no nonlinear current may be applied to the signal input.

[0049] Figure 3 It is based on the various examples described in this article. Figure 1 Another schematic diagram of the amplifier circuit 100. Similar to... Figure 2 , Figure 3An example embodiment of a nonlinear current generator 114 and a phase shift circuit 116 is shown. As illustrated, the nonlinear current generator 114 may include a transistor 300 and a bias circuit 302. Although the transistor 300 is shown as a three-terminal metal-oxide-semiconductor field-effect transistor (MOSFET) with a source, drain, and gate, in various other examples, the transistor 300 may be a different type of transistor or may be a MOSFET with more than three terminals. Figure 3 In the diagram, the drain is selectively coupled to the signal output 110 via a bypass switch 112, and the source is coupled to the phase shift circuit 116.

[0050] The bias circuit 302 may include various circuit elements configured to control the bias of the transistor 300, and thus control the operating mode of the amplifier linearity boosting circuit 106. As previously referenced, at least... Figure 2 The amplifier linearity enhancement circuit 106 discussed can operate in one of two modes: bypass mode and feedback mode. During bypass mode, bypass switch 112 is open, and during feedback mode, bypass switch 112 is closed. However, in some examples, bypass switch 112 is optional and can be removed from feedback path 104. In these examples, one or more components of nonlinear current generator 114 can be controlled to decouple or couple amplifier linearity enhancement circuit 106 from signal output 110. For example, in an example where bypass switch 112 has been removed, transistor 300 acts as a switch during bypass mode to decouple amplifier linearity enhancement circuit 106 from signal output.

[0051] exist Figure 3 In the diagram, bias circuit 302 is shown including a first bias resistor 304, a second bias resistor 306, and a bias capacitor 308. The drain of transistor 300 is selectively coupled to signal output 110 via bypass switch 112 and also coupled to the gate of transistor 300 via bias capacitor 308. The first bias resistor 304 is coupled between the gate and the first bias input 310, and the second bias resistor 306 is coupled between the source and the second bias input 312. The first bias input 310 is configured to receive a first control signal, and the second bias input 312 is configured to receive a second control signal.

[0052] During the feedback operation mode, the bias circuit 302 is configured to bias the transistor 300 based on a first control signal received at the first bias input 310 and a second control signal received at the second bias input 312. (Compared to the previous reference...) Figure 2 The described arrangement allows for the provision of a first control signal and a second control signal to directly control and bias transistor 300. For example, the first bias input 310 may be coupled to a high DC power supply (e.g., V0). DDThe second bias input 312 can be coupled to a low DC power supply (i.e., a low-value DC power supply). In some examples, the second bias input 312 can also be electrically grounded. Therefore, when a first control signal is received at the first bias input 310 and a second control signal is received at the second bias input 312, the transistor 300 is biased to the ON state, and conduction occurs between the source and drain to provide a nonlinear current to the phase shift circuit 116.

[0053] During bypass operation mode, transistor 300 is biased to the OFF state via a first control signal and a second control signal. Therefore, no conduction occurs between the source and drain. For example, relative to feedback mode, the voltage applied to the gate via the first bias input 310 can be reduced to keep transistor 300 OFF. In some examples, transistor 300 can also be reverse biased to improve isolation and ensure that amplifier 102 is not loaded when disabled. For example, a larger bias voltage than the bias voltage applied to the first bias input 310 can be applied to the second bias input 312 to reverse bias transistor 300. Such examples can minimize spurious intermodulation distortion (IMD) when amplifier linearity enhancement circuit 106 is disabled. In various examples, the values ​​of the first bias resistor 304, the second bias resistor 306, and / or the bias capacitor 308 can be selected to control the operating point of transistor 300.

[0054] In various examples, Figure 3 The embodiments of the phase shift circuit 116 shown may include many similar... Figure 2 The phase shift circuit 116 shown in the illustration uses the same components. For example, the phase shift circuit 116 may include a capacitor 210, which is coupled in series with a resistor 212 between the nonlinear current generator 114 and the signal input 108. Therefore, as Figure 3 As shown, capacitor 210, resistor 212, and more generally phase shift circuit 116 can be used in conjunction with the previously referenced Figure 2 The operation is similar to the description.

[0055] Figure 4 It is based on the various examples described in this article. Figure 1 Another schematic diagram of the amplifier circuit. Similar to... Figure 2 and Figure 3 , Figure 4An example implementation of a nonlinear current generator 114 and a phase shift circuit 116 is shown. As illustrated, the nonlinear current generator 114 may include a transistor 400 and a bias circuit 402. Although the transistor 400 is shown as a three-terminal metal-oxide-semiconductor field-effect transistor (MOSFET) with a source, drain, and gate, in various other examples, the transistor 400 may be a different type of transistor or may be a MOSFET with more than three terminals. Figure 4 In the diagram, the drain is selectively coupled to the signal output 110 via a bypass switch 112, and the source is coupled to the phase shift circuit 116.

[0056] The bias circuit 114 may include various circuit elements configured to control the bias of the transistor 400, and thus control the operating mode of the amplifier linearity boosting circuit 106. As previously referenced, at least... Figure 2 and Figure 3 The amplifier linearity enhancement circuit 106 discussed can operate in one of two modes: a bypass mode and a feedback mode. During bypass mode, bypass switch 112 is open, and during feedback mode, bypass switch 112 is closed. However, as mentioned above, in some examples, bypass switch 112 is optional and can be removed from the feedback path 104. In these examples, one or more components of the nonlinear current generator 114 can be controlled to decouple or couple amplifier linearity enhancement circuit 106 and signal output 110. For example, in an example where bypass switch 112 has been removed, transistor 400 acts as a switch during bypass mode to decouple amplifier linearity enhancement circuit 106 from the signal output.

[0057] exist Figure 4 In the diagram, bias circuit 402 is shown as including bias switch 404 and current source 406. The drain of transistor 400 is selectively coupled to signal output 110 via bypass switch 112, and is also coupled to the gate of transistor 400. Bias switch 404 is arranged to selectively short-circuit the gate to electrical ground. Current source 406 is coupled between the source and electrical ground. Figure 4 In the diagram, current source 406 is shown as a variable current source. For example, current source 406 may include a current mirror. However, in other examples, other types of current sources may be used.

[0058] During the feedback operation mode, bias switch 404 is open to decouple the gate from electrical ground. Therefore, during the feedback operation mode, current source 406 draws current from the source of transistor 400, and transistor 400 is biased to the ON state. During the feedback mode, conduction occurs between the source and drain to provide a nonlinear current to phase shift circuit 116 based on the amplified signal. During the bypass operation mode, bias switch 404 is closed to short-circuit the gate to electrical ground. Therefore, during the bypass operation mode, transistor 400 is biased to the OFF state, and no conduction occurs between the source and drain. In various examples, the characteristics of current source 406 can be selected (e.g., dynamically) to control the operating point of transistor 400. For example, current source 406 may include at least two transistors (e.g., NFET transistors). The first of the two transistors may operate as a diode, and the second of the two transistors may operate as a current source (e.g., a current mirror). The second transistor is coupled to the source of transistor 400. By controlling the current through the first transistor (i.e., the diode transistor), the second transistor (i.e., the current mirror) can be operated to adjust the current through transistor 400. Although the bias switch 404 is shown as a single-pole single-throw switch, in some other examples, the bias switch 404 can be implemented as any other suitable switch.

[0059] In various examples, Figure 4 The embodiments of the phase shift circuit 116 shown include many similar... Figure 2 The phase shift circuit 116 shown in the illustration uses the same components. For example, the phase shift circuit 116 may include a capacitor 210, which is coupled in series with a resistor 212 between the nonlinear current generator 114 and the signal input 108. Therefore, as Figure 4 As shown, capacitor 210, resistor 212, and more generally phase shift circuit 116 can be used in conjunction with the previously referenced Figure 2 The operation is similar to the description. It should be understood that, although... Figures 2-4 Each of the bias circuits 114 includes three-terminal transistors 200, 300, and 400, but each of the transistors may alternatively be replaced by a diode (not shown) connected between the bypass switch 112 and the phase shift circuit 116.

[0060] Figure 5 It is based on the various examples described in this article. Figure 1 Another schematic diagram of the amplifier circuit 100. Similar to... Figures 2-4 , Figure 5An example implementation of a nonlinear current generator 114 and a phase shift circuit 116 is shown. As illustrated, the nonlinear current generator 114 may include a transistor 500 and a bias circuit 502. Although the transistor 500 is shown as a three-terminal metal-oxide-semiconductor field-effect transistor (MOSFET) with a source, drain, and gate, in various other examples, the transistor 500 may be a different type of transistor or may be a MOSFET with more than three terminals. Figure 5 In the diagram, the drain is selectively coupled to the signal output 110 via a bypass switch 112, and the source is coupled to the phase shift circuit 116.

[0061] The bias circuit 502 may include various circuit elements configured to control the bias of the transistor 500, and thus control the operating mode of the amplifier linearity boosting circuit 106. As previously referenced, at least... Figure 2-4 The amplifier linearity enhancement circuit 106 discussed can operate in one of two modes: bypass mode and feedback mode. During bypass mode, bypass switch 112 is open, and during feedback mode, bypass switch 112 is closed. However, in some examples, bypass switch 112 is optional and can be removed from the feedback path 104. In these examples, one or more components of the nonlinear current generator 114 can be controlled to decouple or couple the amplifier linearity enhancement circuit 106 and the signal output 110. For example, in an example where bypass switch 112 has been removed, transistor 500 acts as a switch during bypass mode to decouple the amplifier linearity enhancement circuit 106 from the signal output.

[0062] exist Figure 5 In the diagram, bias circuit 502 is shown including a first bias switch 504, a second bias switch 506, a bias resistor 508, and a current source 510. The drain of transistor 500 is selectively coupled to signal output 110 via bypass switch 112, selectively coupled to current source 510 via first bias switch 504, and also coupled to the gate of transistor 500. In some examples, amplifier linearity enhancement circuit 106 may include a DC blocking component located in feedback path 104 between signal output 110 and amplifier linearity enhancement circuit 106. Figure 5 As shown, the DC blocking component can be a DC blocking capacitor 512 inserted between the bypass switch 112 and the signal output 110. A first bias switch 504 is arranged to selectively couple the current source 510 to the drain of the transistor 500. A second bias switch 506 is arranged to selectively short-circuit the gate of the transistor 500 to electrical ground. A bias resistor 508 is inserted between the source and electrical ground.

[0063] During the feedback operation mode, the first bias switch 504 is closed to couple the current source 510 to the drain of the transistor 500. Furthermore, during the feedback mode, the second bias switch 506 is open to decouple the gate from electrical ground. Therefore, during the feedback operation mode, the current source 510 supplies current to the transistor 500, which is biased to the ON state, and conduction occurs between its source and drain to provide a nonlinear current to the phase shift circuit 116 based on the amplified signal. During the feedback operation mode, a DC blocking component (e.g., the illustrated DC blocking capacitor 512) is located in the feedback path 104 to prevent current from being fed back from the current source 510 to the signal output 110.

[0064] During bypass operation mode, the first bias switch 504 is open to decouple the current source 510 from the drain, and the second bias switch 506 is closed to short-circuit the gate to ground. Therefore, during bypass operation mode, transistor 500 is biased to the OFF state, and no conduction occurs between the source and drain. In various examples, the value of resistor 508 and / or the characteristics of current source 510 can be (e.g., dynamically) selected to control the operating point of transistor 500. For example, as shown, current source 510 can be a variable current source. In some examples, as referenced... Figure 4 The current source 510 discussed may include a current mirror. Although each of the first bias switch 504 and the second bias switch 506 is shown as a single-pole single-throw switch, in various other examples, each of the first bias switch 504 and the second bias switch 506 may also be implemented as any other suitable switch.

[0065] In various examples, Figure 5 The embodiments of the phase shift circuit 116 shown include many similar... Figure 2 The phase shift circuit 116 shown in the diagram uses the same components. For example, the phase shift circuit 116 may include a capacitor 210 coupled in series with a resistor 220 between the nonlinear current generator 114 and the signal input 108. Therefore, as Figure 5 As shown, capacitor 210, resistor 220, and more generally phase shift circuit 116 can be used in conjunction with the previously referenced Figure 2 The operation is similar to the description.

[0066] Figure 6 This is a block diagram of amplifier circuit 610 based on the various examples described herein. Figure 6 Includes many references to previous articles Figure 1The amplifier circuit 100 described uses the same components. For example, amplifier circuit 610 may include amplifier 102, feedback path 104, and amplifier linearity enhancement circuit 106. As previously described, amplifier linearity enhancement circuit 106 may include nonlinear current generator 114 and phase shift circuit 116. Each of nonlinear current generator 114 and phase shift circuit 116 is coupled along feedback path 104 between signal output 110 and signal input 108.

[0067] For example Figure 6 As shown, amplifier circuit 100 may include impedance matching circuit 600. Impedance matching circuit 600 is located at signal output 110 of amplifier 102. Although in Figure 6 In the diagram, feedback path 104 is shown coupled to signal output 110 at a node between the output of amplifier 102 and impedance matching circuit 600. However, in some other examples, impedance matching circuit 600 may also be coupled between the output of amplifier 102 and feedback path 104. That is, in some examples, feedback path 104 may receive an amplified signal from impedance matching circuit 600. In the example shown, impedance matching circuit 600 is shown as including inductor 602, first matching circuit capacitor 604, and second matching circuit capacitor 606. Inductor 602 and first matching circuit capacitor 604 are each coupled to a voltage source (e.g., shown as V). DD Between the voltage source and the signal output 110. A second matching circuit capacitor 606 is connected in series between the amplifier 102 and the signal output 110. Each of the first matching circuit capacitor 604 and the second matching circuit capacitor 606 can be a variable capacitor as shown. In various examples, the impedance matching circuit 600 is configured to set the output impedance to a specific value, such as 50Ω. The specific impedance value may depend on the specific implementation of the amplifier circuit 100 and / or the specific amplifier 102. Reference Figure 6 The impedance matching circuit 600 shown and described can be referenced from previous documents. Figures 2-5 Any schematic implementation of the amplifier circuit 100 shown.

[0068] As discussed, in various examples, amplifier circuit 100 may include one or more switching components, such as a bypass switch and one or more bias switches. Reference Figure 1 , 2 Each of the switches discussed and described in 3, 4, 5, or 6 may be coupled to and operated by a controller. The controller may provide one or more switching signals to open or close each corresponding switch. In some examples, the controller may be coupled to other components of the bias circuit and / or a reference. Figure 1 , 2 The components of the phase shift circuit described in 1, 2, 3, 4, 5 or 6.

[0069] For example, the controller can be coupled to Figure 4 The current source 406 shown is in Figure 5 The current source 510, and / or the capacitor 210 and variable resistor 212 of the phase shift circuit 116 are shown. A controller can control one or more values ​​or characteristics of these components via one or more control signals. That is, the controller can provide control signals to adjust (e.g., increase or decrease) the current supplied or consumed by the current source, to adjust (e.g., increase or decrease) the resistance of the resistor, and / or to adjust (e.g., increase or decrease) the capacitance of the capacitor. In various examples, the controller can use lookup tables to determine and set the characteristics of the current source, the resistance of the resistor, and / or the capacitance of the capacitor. The lookup table can include any array that employs indexing operations to replace runtime calculations. For example, the lookup table can include an array of pre-calculated and indexed current source characteristics, resistor values, and capacitor values ​​stored in static program memory. In some other examples, the controller can perform one or more runtime calculations to dynamically determine the characteristics of the current source, the resistance of the resistor, and / or the capacitance of the capacitor required to achieve a desired reduction in intermodulation distortion.

[0070] The controller can also be coupled to Figure 3 The bias inputs 310 and 312 are shown and can be supplied with bias voltages to directly control and bias transistor 300. The control signal value (e.g., a voltage value) of each of the bias inputs 310 and 312 can be retrieved from a lookup table or dynamically determined based on one or more runtime calculations. In various examples, the controller includes a processor, which can be implemented, for example, using hardware, software, or a combination of hardware and software. The processor can provide one or more switching or control signals via a hardware or software system interface. This document references at least... Figure 8 Further description of various examples of processors (and more generally, controllers).

[0071] As discussed earlier, although in Figures 1-6 The amplifier 102 shown has a single input, but in various other examples, amplifier 102 may have different types of inputs. In particular, amplifier 102 may be a differential amplifier with differential inputs. In these examples, amplifier 102 may have separate feedback paths, such as feedback path 104, between each signal input and signal output pair. A corresponding amplifier linearity enhancement circuit 106 may be coupled along each corresponding feedback path. Each amplifier linearity enhancement circuit may include elements referenced earlier herein. Figures 1-6 The components discussed in the amplifier linearity enhancement circuit 106 are similar to those components and can operate in a similar manner.

[0072] Figure 7This is a block diagram of an example of module 700, which may include... Figure 1 An embodiment of the amplifier circuit 100 shown is illustrated. (Continue referring to...) Figure 1 The amplifier circuit 100 shown is discussed. Figure 7 The module 700 is shown.

[0073] exist Figure 7 In the illustrated example, module 700 includes a package substrate 702 configured to receive a plurality of components. In some examples, such components may include a wafer 704 having components of the amplifier circuit 100 described herein, such as amplifier 102 and / or amplifier linearity enhancement circuit 106. In some examples, additional circuit systems or components 706 may be coupled to wafer 704. Other circuit systems or components 708 may be mounted or formed on the package substrate 702. In some examples, the package substrate 702 may include a multilayer substrate.

[0074] In some examples, module 700 may also include one or more package structures to, for example, provide protection and facilitate easier handling of module 700. Such package structures may include an overmold formed over package substrate 702 and sized to substantially seal various wafers and components thereon. As noted above, it should be understood that although module 700 is described in the context of wire-bonded electrical connections, one or more features of this disclosure may also be implemented in other package configurations, including flip-chip configurations.

[0075] Figure 8 This is a block diagram of an example of a wireless communication device 800, in which a wireless communication device can be used. Figure 7 Example module 700. Example wireless device 800 can be a mobile device, such as a smartphone or tablet. As an example, wireless device 800 can communicate according to Long Term Evolution (LTE). In this example, wireless device 800 can be configured to operate in one or more frequency bands defined by the LTE standard. Wireless device 800 can alternatively or additionally be configured to communicate according to one or more other communication standards, including but not limited to one or more of the following: Wi-Fi standard, Bluetooth standard, 3G standard, 4G standard, or LTE-A standard.

[0076] like Figure 8As shown, the wireless device 800 may include a transceiver 802, an antenna 804, a switching component 806, a control component 808 (e.g., a controller), a computer-readable storage medium 810, at least one processor 812, and an amplifier circuit 100. The amplifier circuit 100 may be electrically coupled to one or more components of one or more transceivers 802 and switching components 806 and may function as a low-noise receiving amplifier (amplifier circuit 100a shown), or may be electrically coupled to one or more components of one or more transceivers 802 and switching components 806 and may function as a power amplifier (amplifier circuit 100b shown). As those skilled in the art will understand, the wireless device 800 may include components not in... Figure 8 The additional components and / or sub-combinations of the components shown are explicitly illustrated. Although a first instance of amplifier circuit 100a is shown located within the receiving path and a second instance of amplifier circuit 100b is shown located within the transmitting path, in some examples, the first instance of amplifier circuit 100a may be replaced by a conventional low-noise amplifier, or the second instance of amplifier circuit 100b may be replaced by a conventional power amplifier.

[0077] Transceiver 802 can generate radio frequency (RF) signals transmitted via antenna 804. Furthermore, transceiver 802 can receive input RF signals from antenna 804. It should be understood that various functions associated with the transmission and reception of RF signals can be achieved through… Figure 8 This is collectively referred to as one or more components implementing transceiver 802. For example, a single component may be configured to provide both transmit and receive functions. In another example, transmit and receive functions may be provided by separate components.

[0078] exist Figure 8 In this example, one or more output signals from transceiver 802 are depicted as being provided to antenna 804 via one or more transmit paths 814, through a second instance of amplifier circuit 100b. In the example shown, the different transmit paths 814 may represent outputs associated with different frequency bands (e.g., high frequency and low frequency bands) and / or different power outputs. Although shown as a single amplifier circuit 100b, in some examples, each of the different transmit paths 814 may have a separate amplifier circuit 100.

[0079] Similarly, one or more signals from antenna 804 are depicted as being provided to transceiver 802 via one or more receive paths 816, through a first instance of amplifier circuit 100a. Although shown as a single amplifier circuit 100a, in some other examples, each of the one or more different receive paths 816 may have a separate amplifier circuit 100. Switching component 806 may guide any given radio frequency signal along one or more transmit paths 814 or one or more receive paths 816. In the example shown, different receive paths 816 may represent paths associated with different signaling modes and / or different receive frequency bands. Wireless device 800 may be adapted to include any suitable number of transmit paths 814 or receive paths 816. When arranged in one or more transmit paths, a second instance of amplifier circuit 100b may help boost a relatively low-power radio frequency signal to a higher power suitable for transmission. As discussed, in other arrangements, this function may be provided by one or more power amplifiers.

[0080] In some examples, antenna 804 may be connected to an antenna terminal on switching component 806. Transceiver 802 may be connected to an RF terminal on switching component 806 via one or more transmit paths 814 or one or more receive paths 816. As described above, according to some examples, by selectively electrically connecting antenna 804 to a selected transmit or receive path, switching component 806 may route received RF signals and facilitate switching between receive and / or transmit paths. Thus, one or more of transmit paths 814 may be active, while one or more of the other transmit paths 814 may be inactive, and the same applies to receive paths 816. Switching component 806 may provide multiple switching functions associated with the operation of wireless device 800.

[0081] In some examples, at least one processor 812 may be configured to facilitate the implementation of various processes on the wireless device 800. At least one processor 812 may be implemented, for example, using hardware, software, or a combination of hardware and software. For example, at least one processor 812 may include one or more microprocessors or other types of controllers capable of executing a series of instructions for manipulating data. However, in other examples, processor 812 may include specially programmed special-purpose hardware, such as an application-specific integrated circuit (ASIC) dedicated to performing the specific operations disclosed herein. In some embodiments, the wireless device 800 may include a non-transitory computer-readable medium 810, such as memory, which may store computer program instructions that can be provided to and executed by at least one processor 812. Various components (one of) 806, 100a, 100b, 808 and one or more transmit and receive paths 814, 816 may be implemented on the same chip as amplifier circuit 100 or integrated within the same module as amplifier circuit 100.

[0082] Some of the embodiments described above have been provided as examples in conjunction with mobile devices. However, the principles and advantages of these examples can be used in any other system or device that may benefit from any circuitry described herein, such as any uplink cellular device. Any principles and advantages discussed herein can be implemented in electronic systems using transistor-based switches. Therefore, aspects of this disclosure can be implemented in a wide variety of electronic devices. Examples of electronic devices may include, but are not limited to, consumer electronics, components of consumer electronics, electronic test equipment, cellular communication infrastructure such as base stations, mobile phones such as smartphones, telephones, televisions, computer monitors, computers, modems, handheld computers, laptops, tablets, e-book readers, wearable computers such as smartwatches, personal digital assistants (PDAs), microwave ovens, refrigerators, automobiles, stereo systems, DVD players, CD players, digital music players such as MP3 players, radios, portable video cameras, cameras, digital cameras, portable storage chips, healthcare monitoring devices, vehicle electronic systems such as automotive or avionics systems, peripherals, clocks, etc. Furthermore, electronic devices may include unfinished products.

[0083] As discussed herein, various examples of amplifier circuits described include amplifier linearity boosting circuits coupled along the feedback path between the amplifier's signal input and signal output. Based on the amplified signal at the amplifier's signal output, the amplifier linearity boosting circuit is configured to apply a nonlinear current to the amplifier's signal input to reduce intermodulation distortion of the amplified signal. Figure 9AThis is a Monte Carlo simulation response graph (900) of a typical amplifier circuit, showing the intermodulation distortion experienced by the typical amplifier. For example... Figure 9A The Monte Carlo analog response of the amplifier is shown, exhibiting a medium gain of approximately 15 dB at a supply current of 4 mA. Figure 9A In graph 900, the vertical axis represents the number of samples, and the horizontal axis represents the third-order intermodulation cutoff point (IIP3) value of a typical amplifier circuit's sampling (or measurement). The plotted bars in graph 900 represent the third-order intermodulation cutoff point (IIP3), and the plotted lines represent the nominal value.

[0084] Figure 9B yes Figure 1 The Monte Carlo simulation response of the amplifier circuit is plotted in Figure 902, and various examples according to the description herein are shown, relative to the response of the amplifier circuit. Figure 9A The curve 900 represents the reduction of intermodulation distortion. Similar to... Figure 9A The curve graph 900, Figure 9B The curve graph 902 has a vertical axis representing the number of samples, and a horizontal axis representing... Figure 1 The horizontal axis represents the third-order intermodulation cutoff point (IIP3) value sampled (or measured) by the amplifier circuit. The bars in graph 902 represent the third-order intermodulation cutoff point (IIP3), and the lines represent the nominal values. Figure 9A Compared to the curve 900, Figure 9B The curve 902 shows an average improvement of approximately 6 dB over 200 samples. Figure 9B This description represents only one implementation of the amplifier circuit described herein. It should be understood that the described amplifier circuit can provide different levels of improvement in various other examples.

[0085] Having described at least one example and several aspects above, it should be understood that various changes, modifications, and improvements will readily occur to those skilled in the art. These changes, modifications, and improvements are intended to be part of this disclosure and are intended to fall within its scope. Therefore, the foregoing description and figures are merely exemplary, and the scope of this disclosure should be determined by a proper interpretation of the appended claims and their equivalents.

Claims

1. An amplifier circuit, comprising: An amplifier having a signal input and a signal output, the amplifier being configured to generate an amplified signal at the signal output; A feedback path, which is coupled between the signal output and the signal input; as well as An amplifier linearity enhancement circuit, located in the feedback path, includes a nonlinear current generator and a phase shift circuit. The nonlinear current generator includes a transistor and a bias circuit coupled to the transistor and configured to selectively bias the transistor. The phase shift circuit includes a capacitor coupled in series with a resistor. The capacitor and the resistor are coupled between the nonlinear current generator and the signal input. The nonlinear current generator is configured to provide a nonlinear current based on the amplified signal, and the phase shift circuit is configured to adjust the phase of the nonlinear current to reduce intermodulation distortion of the amplified signal.

2. The amplifier circuit according to claim 1, wherein, The transistor is a metal-oxide-semiconductor field-effect transistor, which has a gate, a source, and a drain. The drain is coupled to the signal output, and the source is coupled to the phase shift circuit.

3. The amplifier circuit according to claim 2, wherein, The bias circuit includes a first bias resistor coupled between the gate and electrical ground, a second bias resistor coupled between the source and electrical ground, and a bias switch selectively coupled in parallel with a bias capacitor between the gate and the drain.

4. The amplifier circuit of claim 3 further includes a bypass switch located in the feedback path and inserted between the signal output and the nonlinear current generator, the bypass switch being configured to selectively decouple the amplifier linearity enhancement circuit from the signal output.

5. The amplifier circuit according to claim 3, wherein, During the feedback operation mode, the bias switch is turned off to decouple the gate from the electrical ground.

6. The amplifier circuit according to claim 2, wherein, The bias circuit includes a first bias resistor coupled between the gate and the first bias input, a second bias resistor coupled between the source and the second bias input, and a bias capacitor coupled between the drain and the gate.

7. The amplifier circuit of claim 6, further comprising a bypass switch located in the feedback path and inserted between the signal output and the nonlinear current generator, the bypass switch being configured to selectively decouple the amplifier linearity enhancement circuit from the signal output.

8. The amplifier circuit according to claim 6, wherein, During the feedback operation mode, the bias circuit is configured to bias the transistor at least in part based on a first control signal received at the first bias input and a second control signal received at the second bias input.

9. The amplifier circuit according to claim 2, wherein, The bias circuit includes a bias switch coupled between the gate and electrical ground, and a current source coupled between the source and electrical ground.

10. The amplifier circuit of claim 9, further comprising a bypass switch located in the feedback path and inserted between the signal output and the nonlinear current generator, the bypass switch being configured to selectively decouple the amplifier linearity enhancement circuit from the signal output.

11. The amplifier circuit according to claim 9, wherein, During the feedback operation mode, the bias switch is turned off to decouple the gate from the electrical ground.

12. The amplifier circuit according to claim 2, wherein, The bias circuit includes a current source coupled to the drain via a first bias switch, a bias resistor coupled between the source and ground, and a second bias switch coupled between the gate and ground.

13. The amplifier circuit of claim 12 further includes a DC blocking component located in the feedback path and inserted between the amplifier linearity enhancement circuit and the signal output.

14. The amplifier circuit of claim 12, further comprising a bypass switch located in the feedback path and interposed between the signal output and the nonlinear current generator, the bypass switch being configured to selectively decouple the amplifier linearity enhancement circuit from the signal output.

15. The amplifier circuit according to claim 14, wherein, During the feedback operation mode, the first bias switch is closed to couple the current source to the drain, and the second bias switch is open to decouple the gate from the electrical ground.

16. The amplifier circuit according to claim 1, wherein, The amplifier is configured to apply a variable gain to the signal received at the signal input to produce an amplified signal at the signal output.

17. The amplifier circuit according to claim 16, wherein, The phase-shifting circuit is configured to shift the phase of the nonlinear current at least in part based on the gain setting of the amplifier.

18. The amplifier circuit according to claim 17, wherein, The phase shift circuit includes a variable capacitor coupled in series with a variable resistor, and wherein at least one of the variable capacitor and the variable resistor is adjustable to change the phase of the nonlinear current.

19. The amplifier circuit of claim 18, further comprising a bypass switch located in the feedback path and interposed between the signal output and the nonlinear current generator, the bypass switch being configured to selectively decouple the amplifier linearity enhancement circuit from the signal output, at least in part based on the gain setting of the amplifier.

20. The amplifier circuit according to claim 16, wherein, The phase-shift circuit is configured to adjust the amplitude of the nonlinear current based at least in part on the gain setting of the amplifier.

21. The amplifier circuit according to claim 20, wherein, The phase shift circuit includes a variable capacitor coupled in series with a variable resistor, and wherein at least one of the variable capacitor and the variable resistor is adjustable to change the amplitude of the nonlinear current.

22. An amplifier feedback method, comprising: Receive the signal at the signal input of the amplifier; Amplify the signal to provide an amplified signal at the signal output of the amplifier; In response to a first gain setting of the amplifier, the signal output is electrically coupled to the signal input; A nonlinear current is applied to the signal received at the signal input based on the amplified signal; Furthermore, a nonlinear current is applied to the signal received at the signal input, and the phase of the nonlinear current is shifted to reduce the intermodulation distortion of the amplified signal; as well as In response to the second gain setting of the amplifier, the signal output is electrically decoupled from the signal input.

23. The amplifier feedback method according to claim 22, wherein, Shifting the phase of the nonlinear current includes adjusting the complex impedance of the phase shift circuit.

24. The amplifier feedback method of claim 22, further comprising adjusting the amplitude of the nonlinear current in response to the first gain setting to reduce the intermodulation distortion of the amplified signal.

25. The amplifier feedback method according to claim 24, wherein, Adjusting the amplitude of the nonlinear current includes adjusting the complex impedance of the phase shift circuit.

26. The amplifier feedback method according to claim 24, wherein, Adjusting the amplitude of the nonlinear current includes adjusting the amplitude of the nonlinear current based on the first gain setting of the amplifier.

27. The amplifier feedback method according to claim 24, wherein, Shifting the phase of the nonlinear current involves performing a phase shift based on the first gain setting of the amplifier.

28. An amplifier feedback method, comprising: The signal is amplified at the signal input of the amplifier to provide an amplified signal at the signal output of the amplifier; A nonlinear current is generated based on the amplified signal; Adjust the complex impedance of the phase shift circuit to adjust at least one of the amplitude and phase of the nonlinear current; In response to a first gain setting of the amplifier, the signal output is electrically coupled to the signal input to apply the nonlinear current to the signal input of the amplifier, thereby reducing intermodulation distortion of the amplified signal. In response to a second gain setting of the amplifier, the signal output is electrically decoupled from the signal input.

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