Thin film transistor element substrate and manufacturing method thereof, and organic EL display device

Abstract

Provided are a thin film transistor element substrate using an oxide semiconductor, a method for manufacturing the same, and an organic EL display device using the thin film transistor element substrate. The thin film transistor element substrate achieves low resistance in the contact region while further improving the barrier property to moisture. The thin film transistor element substrate (1) comprises a first moisture barrier layer (6), the first moisture barrier layer (6) being arranged to cover a gate insulating layer (4) and a gate electrode (5), and being arranged to cover a contact region (3) of an oxide semiconductor layer (3). a1 , 3 a2 ) except the contact area (3 a1 ) and the source electrode (8), and the region other than the junction between the contact region (3a2) and the drain electrode (9), and the region on the substrate (2) where the oxide semiconductor layer (3) is not present. The first moisture barrier layer (6) comprises a metal oxide and is formed by atomic layer deposition.

Description

[0001] The present application is a divisional application of the application with application number 201510007493.6, application date January 7, 2015, and invention name “Thin film transistor element substrate and manufacturing method thereof, and organic EL display device”. Technical Field

[0002] The present application relates to a thin film transistor element substrate using an oxide semiconductor, a method for manufacturing the same, and an organic EL display device using the thin film transistor element substrate using an oxide semiconductor. Background Art

[0003] In recent years, research and development of thin-film transistor substrates using oxide semiconductors represented by In-Ga-Zn-O in the channel layer has been prevalent. Hereinafter, thin-film transistor substrates are sometimes referred to as TFT substrates. The structure of TFT substrates using oxide semiconductors is generally the same bottom gate structure as the previous TFT substrates using amorphous silicon. However, research and development of TFT substrates with higher performance top gate structures that reduce parasitic capacitance between the gate electrode and the source electrode and drain electrode is also prevalent (Patent Documents 1 and 2).

[0004] use Figure 8 The TFT substrate described in Patent Document 2 is described below. The TFT substrate 901 described in Patent Document 2 is a top-gate TFT substrate. The TFT substrate 901 includes an oxide semiconductor layer 903 formed on a glass substrate 902, a gate insulating layer 904 formed on a channel region 903b in the center of the oxide semiconductor layer 903, and a gate electrode 905. The TFT substrate 901 also includes an aluminum oxide layer 906, an interlayer insulating layer 907, a source electrode 908, and a drain electrode 909. The source electrode 908 is in contact with the oxide semiconductor layer 903 in the contact hole CH1. a1 The drain electrode 909 is in contact with the oxide semiconductor layer 903 in the contact hole CH2. a2 Engagement.

[0005] The contact region 903 sandwiches the channel region 903b in the center of the oxide semiconductor layer 903. a1 and 903 a2 The resistance of the contact region 903b needs to be lower than that of the channel region 903b. Here, first, an aluminum layer is formed on the oxide semiconductor layer 903, the gate insulating layer 904, and the gate electrode 905 using a sputtering method. Then, the aluminum layer is heat-treated to modify the aluminum layer into an aluminum oxide layer 906. At this time, the contact region 903 a1 and 903 a2 The contact area 903 is doped with aluminum. a1 and 903a2 The resistance of the channel region 903b is lower than that of the channel region 903b. In this way, the TFT substrate 901 has a contact region with a relatively simple structure that achieves low resistance. In addition, the aluminum oxide layer 906 also has a barrier property against moisture.

[0006] Prior art literature

[0007] Patent Literature

[0008] Patent Document 1: Japanese Patent Application Laid-Open No. 2009-278115

[0009] Patent Document 2: Japanese Patent Application Laid-Open No. 2011-228622 Summary of the Invention

[0010] However, the TFT substrate 901 described in Patent Document 2 does not have sufficient moisture barrier properties, and further improvement of the moisture barrier properties is desired.

[0011] Therefore, the present application provides a TFT substrate having a top gate structure using an oxide semiconductor, which achieves low resistance in the contact region while further improving the barrier property against moisture.

[0012] A technical solution of the present application involves a thin film transistor element substrate, comprising: a substrate; an oxide semiconductor layer, which is arranged on a portion of the substrate and has a channel region and a pair of contact regions sandwiching the channel region along the surface of the substrate; a gate electrode, which is arranged on the channel region via a gate insulating layer; a source electrode, which is bonded to one of the pair of contact regions; a drain electrode, which is bonded to the other of the pair of contact regions; and a first moisture barrier layer, which is arranged to cover the gate insulating layer and the gate electrode, and is arranged to cover the following areas, which are areas on the pair of contact regions of the oxide semiconductor layer except for the bonding portion between the contact region and the source electrode and the bonding portion between the contact region and the drain electrode, and areas on the substrate where the oxide semiconductor layer is not provided, the first moisture barrier layer containing a metal oxide and formed by atomic layer deposition, the first moisture barrier layer formed by the atomic layer deposition method being in contact with the pair of contact regions.

[0013] In a thin-film transistor device substrate according to one technical solution of the present application, simply by forming a first moisture barrier layer, the resistance of the contact region of the oxide semiconductor layer can be reduced. Furthermore, since the first moisture barrier layer is formed using atomic layer deposition, the film quality is dense and the water vapor transmission rate is lower than that of a layer formed using sputtering.

[0014] Therefore, according to a thin film transistor element substrate according to one aspect of the present application, it is possible to provide a thin film transistor element substrate that achieves low resistance in the contact region and has improved moisture barrier properties. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a cross-sectional view and an enlarged view of a main part of the TFT substrate according to the first embodiment.

[0016] Figure 2 It is a graph showing the measurement results of water vapor transmission rates of Examples and Comparative Examples.

[0017] Figure 3A This is a schematic diagram showing a manufacturing process of a TFT substrate according to the first embodiment.

[0018] Figure 3B This is a schematic diagram showing a manufacturing process of a TFT substrate according to the first embodiment.

[0019] Figure 3C This is a schematic diagram showing a manufacturing process of a TFT substrate according to the first embodiment.

[0020] Figure 3D This is a schematic diagram showing a manufacturing process of a TFT substrate according to the first embodiment.

[0021] Figure 3E This is a schematic diagram showing a manufacturing process of a TFT substrate according to the first embodiment.

[0022] Figure 3F This is a schematic diagram showing a manufacturing process of a TFT substrate according to the first embodiment.

[0023] Figure 3G This is a schematic diagram showing a manufacturing process of a TFT substrate according to the first embodiment.

[0024] Figure 3H This is a schematic diagram showing a manufacturing process of a TFT substrate according to the first embodiment.

[0025] Figure 4 It is a plan view showing an organic EL display device according to Embodiment 2.

[0026] Figure 5A This is a cross-sectional view of a display region of an organic EL display device according to Embodiment 2.

[0027] Figure 6 This is a circuit configuration diagram of a sub-pixel in an organic EL display device according to Embodiment 2.

[0028] Figure 7AThis is a cross-sectional view of a portion from a display region to a peripheral region of an organic EL display device according to a second embodiment.

[0029] Figure 8 It is a cross-sectional view of a TFT substrate according to the prior art.

[0030] Description of Reference Numerals

[0031] 1 Thin-film transistor (TFT) substrate

[0032] 2 substrate

[0033] 21 Resin substrate

[0034] 22 Second moisture barrier layer

[0035] 3 Oxide semiconductor layer

[0036] 3 a1 , 3 a2 contact area

[0037] 3b channel region

[0038] 4 Gate insulation layer

[0039] 5. Gate electrode

[0040] 6. First moisture barrier layer

[0041] 8 Source electrode

[0042] 9, 10 Drain electrode

[0043] 101 Organic EL Display Device

[0044] 105 Anode

[0045] 109 Luminescent Layer

[0046] 111 Electron Injection Layer

[0047] 112 cathode

[0048] 200 organic EL display layer

[0049] R1 Area 1

[0050] R2 Area 2

[0051] CH1, CH2, CH3 contact holes DETAILED DESCRIPTION

[0052] <Foundation underlying this application>

[0053] First, let's explain the background behind the inventions of the various technical solutions involved in this application. Because the TFT substrate 901 described in Patent Document 2 above includes an aluminum oxide layer 906, it exhibits a certain degree of moisture barrier properties. However, the aluminum layer before the aluminum oxide layer 906 is oxidized is formed using a sputtering method. Therefore, the aluminum oxide layer 906 is not dense and has a high water vapor permeability. When forming a liquid crystal display layer, an organic EL display layer, etc. on the TFT substrate 901 to manufacture various displays, moisture intrusion from inside and outside the glass substrate 902 and moisture intrusion along the aluminum oxide layer 906 becomes a problem. When this intrusive moisture reaches the liquid crystal display layer and the organic EL display layer, it can cause problems. For example, the organic EL display layer includes a cathode and an electron injection layer that can degrade due to moisture. When moisture reaches the cathode and the electron injection layer, non-luminous areas (black spots) appear in the organic EL display layer, or the brightness is reduced. In other words, the moisture barrier properties of the aluminum oxide layer 906 are not sufficient, and further improvement of the moisture barrier properties is desired. Based on the above findings, the present inventors have devised the inventions of the various technical solutions of the present application described below.

[0054] A technical solution of the present application involves a thin film transistor element substrate, comprising: a substrate; an oxide semiconductor layer, which is arranged on a portion of the substrate and has a channel region and a pair of contact regions sandwiching the channel region along the surface of the substrate; a gate electrode, which is arranged on the channel region via a gate insulating layer; a source electrode, which is bonded to one of the pair of contact regions; a drain electrode, which is bonded to the other of the pair of contact regions; and a first moisture barrier layer, which is arranged to cover the gate insulating layer and the gate electrode, and is arranged to cover the following areas, which are areas on the pair of contact regions of the oxide semiconductor layer except for the bonding portion between the contact region and the source electrode and the bonding portion between the contact region and the drain electrode, and areas on the substrate where the oxide semiconductor layer is not provided, the first moisture barrier layer containing a metal oxide and formed by atomic layer deposition, the first moisture barrier layer formed by the atomic layer deposition method being in contact with the pair of contact regions.

[0055] According to the present technical solution, the first moisture barrier layer is provided to cover the gate insulating layer and the gate electrode, and is provided on a pair of contact regions of the oxide semiconductor layer and on an area on the substrate where the oxide semiconductor layer is not present. Since the first moisture barrier layer contains a metal oxide, it is possible to reduce the resistance of the contact region with the oxide semiconductor layer. In other words, simply by forming the first moisture barrier layer, the resistance of the contact region of the oxide semiconductor layer in contact with the first moisture barrier layer can be reduced. Moreover, since the first moisture barrier layer is formed using atomic layer deposition, the film quality is dense and the water vapor permeability is low compared to the case of forming it using sputtering.

[0056] Therefore, according to the thin film transistor element substrate according to the present invention, it is possible to provide a thin film transistor element substrate having improved moisture barrier properties while achieving low resistance in the contact region.

[0057] In another embodiment of the present invention, the first moisture barrier layer may have a layer structure at the atomic level. This allows the first moisture barrier layer to have a dense film structure and enhance moisture barrier properties.

[0058] In another embodiment of the present invention, the substrate may include a resin substrate primarily composed of a resin material and a second moisture barrier layer formed on the resin substrate, wherein the second moisture barrier layer is in contact with the oxide semiconductor layer and the first moisture barrier layer. Providing a region where the first moisture barrier layer and the second moisture barrier layer are in direct contact can further enhance moisture barrier properties.

[0059] In another embodiment of the present invention, the second moisture barrier layer can be formed using chemical vapor deposition or atomic layer deposition. This allows the second moisture barrier layer to be formed into a denser film than when formed using sputtering. Furthermore, when formed using atomic layer deposition, a denser film can be formed, thereby improving moisture barrier properties.

[0060] In another embodiment of the present invention, the first and second moisture barrier layers may comprise different oxides. This allows, for example, for example, if foreign matter is introduced between the resin substrate and the second moisture barrier layer, the first moisture barrier layer to be deposited without reflecting the protrusions caused by the foreign matter, eliminating the protrusions in the second moisture barrier layer. As a result, after the first moisture barrier layer is formed, the film is formed with a flat surface.

[0061] In another embodiment of the present application, the first moisture barrier layer may include an oxide of aluminum (Al), and the second moisture barrier layer may include an oxide of zirconium (Zr).

[0062] In addition, a technical solution of the present application relates to a method for manufacturing a thin film transistor element substrate, comprising the following steps: preparing a resin substrate mainly composed of a resin material; forming a second moisture barrier layer on the resin substrate; forming an oxide semiconductor layer on a portion of the second moisture barrier layer; forming a gate insulating layer on a channel region of the oxide semiconductor layer formed on the second moisture barrier layer; forming a gate electrode on the gate insulating layer; forming a first moisture barrier layer comprising a metal oxide by atomic layer deposition so that the first moisture barrier layer covers a region of the second moisture barrier layer where the oxide semiconductor layer is not formed, and a region disposed on the oxide semiconductor layer; A pair of contact regions on the body layer and sandwiching the channel region, each of the gate insulating layer and the gate electrode; a pair of contact holes penetrating the pair of contact regions are formed in the first moisture barrier layer on the pair of contact regions; a source electrode is formed on the first moisture barrier layer and connected to one side of the pair of contact regions via one side of the pair of contact holes; a drain electrode is formed on the first moisture barrier layer and connected to the other side of the pair of contact regions via the other side of the pair of contact holes; compared with the channel region not in contact with the first moisture barrier layer, the resistance of the pair of contact regions in contact with the first moisture barrier layer is lower.

[0063] According to the present technical solution, the first moisture barrier layer is formed by atomic layer deposition so as to cover the area in the second moisture barrier layer where the oxide semiconductor layer is not formed, a pair of second areas sandwiching the first area of ​​the oxide semiconductor layer, the gate insulating layer, and each of the gate electrodes. Thus, in the oxide semiconductor layer, the first area becomes a channel area, and the pair of second areas becomes a pair of contact areas. The first moisture barrier layer contains a metal oxide. By forming the first moisture barrier layer by atomic layer deposition, the metal in the metal oxide is doped into the oxide semiconductor layer, or the oxygen in the oxide semiconductor layer is captured into the first moisture barrier layer, thereby making it possible to reduce the resistance of the contact area. In other words, by simply forming the first moisture barrier layer, the contact area of ​​the oxide semiconductor layer in contact with the first moisture barrier layer can be reduced in resistance. Moreover, since the first moisture barrier layer is formed by atomic layer deposition, the film quality is dense, and the water vapor permeability is lower than that formed by sputtering.

[0064] Therefore, according to the method for manufacturing a thin film transistor element substrate according to the present invention, it is possible to provide a thin film transistor element substrate having improved moisture barrier properties while achieving low resistance in the contact region.

[0065] In another embodiment of the present invention, the second moisture barrier layer can be formed using chemical vapor deposition or atomic layer deposition. This allows the second moisture barrier layer to be formed into a denser film than when formed using sputtering. Furthermore, when formed using atomic layer deposition, a denser film can be formed, thereby improving moisture barrier properties.

[0066] In another embodiment of the present invention, the first and second moisture barrier layers may comprise different oxides. Thus, if, for example, foreign matter is introduced between the resin substrate and the second moisture barrier layer, the first moisture barrier layer is deposited so as not to reflect the protrusion caused by the foreign matter, thereby eliminating the protrusion of the second moisture barrier layer. As a result, after the first moisture barrier layer is formed, the film is formed with a flat surface.

[0067] In another embodiment of the present application, the first moisture barrier layer may include an oxide of aluminum (Al), and the second moisture barrier layer may include an oxide of zirconium (Zr).

[0068] Furthermore, one technical solution of the present application provides an organic EL display device comprising: the thin-film transistor substrate according to one technical solution of the present application; and an organic EL display layer formed on the thin-film transistor substrate and comprising at least an anode, a light-emitting layer, and a cathode. This provides an organic EL display device having a thin-film transistor substrate that reduces the resistance of the contact region and improves moisture barrier properties.

[0069] In another embodiment of the present invention, the cathode may be located inside the outer periphery of the region where the first moisture barrier layer and the second moisture barrier layer are in contact, as viewed from above. This allows the cathode, which is susceptible to moisture degradation, to be located inside the outer periphery of the region where the first moisture barrier layer and the second moisture barrier layer are in contact, thereby improving the moisture barrier properties of the organic EL display device.

[0070] In another embodiment of the present invention, the organic EL display layer may further include an electron injection layer, wherein the electron injection layer is located inside the periphery of the region where the first moisture barrier layer and the second moisture barrier layer contact each other when viewed from above. This allows the electron injection layer, which is susceptible to moisture degradation, to be located inside the periphery of the region where the first moisture barrier layer and the second moisture barrier layer contact each other, thereby improving the moisture barrier properties of the organic EL display device.

[0071] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0072] <Implementation Method 1>

[0073] (Configuration of TFT Substrate 1)

[0074] use Figure 1 The TFT substrate 1 according to the first embodiment will be described. The TFT substrate 1 includes a substrate 2, an oxide semiconductor layer 3 provided on a portion of the substrate 2, a gate insulating layer 4 provided on a channel region 3b, which is the central portion of the oxide semiconductor layer 3, and a gate electrode 5. The TFT substrate 1 further includes a first moisture blocking layer 6, which covers a region on the substrate 2 where the oxide semiconductor layer 3 is not provided, and a contact region 3b on the oxide semiconductor layer 3 where the gate insulating layer 4 is not provided. a1 and 3 a2 , a gate insulating layer 4 and a gate electrode 5. The TFT substrate 1 further includes a source electrode 8 and a drain electrode 9 on the first moisture blocking layer 6. Contact holes CH1 and CH2 are respectively formed through the first moisture blocking layer 6 so as to reach the contact region 3 of the oxide semiconductor layer 3. a1 and 3 a2 In the contact hole CH1, the source electrode 8 and the contact region 3 a1 In the contact hole CH2, the drain electrode 9 and the contact region 3 a2 TFT 1 is a so-called top-gate type (staggered structure) TFT.

[0075] The substrate 2 is composed of a resin substrate 21 (hereinafter referred to as the resin substrate 21) whose main component is resin and a second moisture barrier layer 22 formed thereon. As the material of the resin substrate 21, for example, polyimide, polyamide, aromatic polyamide, polyethylene, polypropylene, polyvinylene, and polyvinylidene chloride can be used. In addition, it can also be polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyethylene sulfonic acid (polyethylene sulfonicacid), polysiloxane, acrylic acid, epoxy resin, phenol, etc. It is possible to mix two or more of these materials, or to chemically modify these materials. It is also possible to combine one or more of these materials to form a resin substrate 21 with a multilayer structure. As the material of the second moisture barrier layer 22, zirconium oxide (ZrO x ), aluminum oxide (AlO x ) etc. The second moisture barrier layer 22 has the function of preventing moisture, etc., from penetrating the resin substrate 21 and invading upward from the resin substrate 21. The substrate 2 is provided with a two-layer structure comprising the resin substrate 21 and the second moisture barrier layer 22 formed thereon. However, this is not limiting. The substrate 2 may also be provided with a single-layer structure made of glass, synthetic quartz, silicon with a thermal oxide film, or the like. Alternatively, other multilayer structures may be provided.

[0076] The oxide semiconductor layer 3 is formed on the second moisture blocking layer 22. The oxide semiconductor layer 3 is composed of a channel region 3b below the gate electrode 5 and the gate insulating layer 4, and a contact region 3b sandwiching the channel region 3b. a1 and 3 a2 Composition, contact area 3 a1 and 3 a2 The resistance of the contact region 3b is lower than that of the channel region 3b. a1 and 3 a2 The carrier concentration of the channel region 3b is higher than that of the channel region 3b. As the material of the oxide semiconductor layer 3, In-Ga-Zn-O, In-Ti-Zn-O, Zn-O, In-Ga-O, In-Zn-O, etc. can be used. Taking the case of In-Ga-Zn-O as an example, as the composition ratio of each element, for example, In x Ga y Zn z O 1.5x+1.5y+z (x, y, z are integers).

[0077] The gate insulating layer 4 is provided on the channel region 3b of the oxide semiconductor layer 3. As a material of the gate insulating layer 4, SiO x 、SiO x N y 、TaO x The gate insulating layer 4 is formed using these oxide materials in a single-layer structure or a multi-layer structure.

[0078] The gate electrode 5 is provided on the gate insulating layer 4. Materials for the gate electrode 5 include aluminum (Al), molybdenum (Mo), tungsten (W), MoW, copper (Cu), titanium (Ti), and chromium (Cr). The gate electrode 5 is formed using these metal materials in a single-layer or multi-layer structure. The gate insulating layer 4 is aligned with the side surfaces of the gate electrode 5 and is spaced apart from the source electrode 8 and the drain electrode 9. Therefore, parasitic capacitance between the gate electrode 5 and the source electrode 8, and between the gate electrode 5 and the drain electrode 9, can be reduced.

[0079] The first moisture barrier layer 6 is formed on the second moisture barrier layer 22 where the oxide semiconductor layer 3 is not formed, and covers the contact region 3 of the oxide semiconductor layer 3. a1 and 3 a2 , gate insulating layer 4 and gate electrode 5. As the material of the first moisture blocking layer 6, metal oxide can be used. In the first embodiment, aluminum oxide (AlO x ).

[0080] The source electrode 8 is provided on the first moisture barrier layer 6. The source electrode 8 is provided in the contact region 3 of the oxide semiconductor layer 3 in the contact hole CH1. a1As a material of the source electrode 8, Al, Mo, W, MoW, Cu, Ti, Cr, etc. can be used. The source electrode 8 is formed using these metal materials so as to have a single-layer structure or a multi-layer structure.

[0081] The drain electrode 9 is provided on the first moisture barrier layer 6. The drain electrode 9 is in contact with the oxide semiconductor layer 3 in the contact hole CH2. a2 The drain electrode 9 can be made of materials such as Al, Mo, W, MoW, Cu, Ti, and Cr. The drain electrode 9 can be formed using these materials in a single-layer structure or a multi-layer structure.

[0082] Here, the first moisture blocking layer 6 is formed in the contact region 3 of the oxide semiconductor layer 3 before the contact holes CH1 and CH2 are formed so as to reach the oxide semiconductor layer 3. a1 and 3 a2 The first moisture barrier layer 6 is, for example, AlO x It is considered that when the first moisture barrier layer 6 is formed, Al is doped from the first moisture barrier layer 6 to the contact region 3 of the oxide semiconductor layer 3 in contact with the first moisture barrier layer 6. a1 and 3 a2 The contact region 3 doped with Al or deprived of oxygen a1 and 3 a2 , the resistance is lower than that of the channel region 3b. This fact has been confirmed by experiments. In addition, it can be considered that the phenomenon of metal doping into the contact region or taking oxygen from the oxide semiconductor layer is not limited to AlO x , other metal oxides will also cause. As a result, the contact area 3 a1 and 3 a2 , compared with the channel region 3b, the carrier concentration is increased, and appropriate ON / OFF characteristics of the TFT can be obtained.

[0083] In addition, the first moisture barrier layer 6 has a function of preventing moisture and the like from penetrating the substrate 2 and penetrating upwards. x The AlO formed by the sputtering method is usually used. x It also has a certain degree of moisture barrier property, but it is not sufficient for practical use. Therefore, the AlO used as the first moisture barrier layer 6 is formed by atomic layer deposition (Atomic Layer Deposition method. It is referred to as ALD method below). x .like Figure 1As shown in the enlarged view of the area T surrounded by a single dotted line, the film formed using the atomic layer deposition method has a layer structure at the atomic level. Therefore, the film state is dense and has high moisture barrier properties. As examples of metal oxides that can be formed using the ALD method, in addition to AlO x In addition, TiO x 、CaO x , HfO x 、TaO x 、LaO x 、YO x wait.

[0084] Figure 2 The results of water vapor transmission rate measurements of samples of an embodiment in which a single aluminum oxide film was formed using the ALD method and samples of a comparative example formed using the sputtering method are shown. The measurement method is performed using a generally known Ca (calcium) test method. The Ca test method calculates the water vapor transmission rate based on the tendency of Ca to change from conductive to non-conductive due to water penetrating the film being measured. Figure 2 The measurement results show that, despite having roughly the same film thickness, the sample of the embodiment has a water vapor permeability that is approximately three orders of magnitude lower than that of the sample of the comparative example. Therefore, the TFT substrate 1 of Embodiment 1 has very excellent moisture barrier properties. Furthermore, it is believed that the moisture barrier properties are even higher in the area where the second moisture barrier layer 22 and the first moisture barrier layer 6 are in direct contact. The second moisture barrier layer 22 can also be formed using a chemical vapor deposition method (hereinafter referred to as a CVD method), but when formed using an ALD method, a denser film can be formed, which can improve the moisture barrier properties.

[0085] Furthermore, the oxides in the second moisture barrier layer 22 and the first moisture barrier layer 6 may be the same or different. For example, ZrO may be used. x As the second moisture barrier layer 22, AlO x As the first moisture barrier layer 6. Imagine a situation where foreign matter has become trapped between the resin substrate 21 of the substrate 2 and the second moisture barrier layer 22. The second moisture barrier layer 22 then reflects the foreign matter and deposits only in that portion, partially raised. On top of this second moisture barrier layer 22, a first moisture barrier layer 6 comprising an oxide different from the oxide constituting the second moisture barrier layer 22 is formed. The first moisture barrier layer 6 is then deposited so as not to reflect the portion raised by the foreign matter, eliminating the raised portion of the second moisture barrier layer 22. As a result, after the first moisture barrier layer 6 is formed, the surface of the first moisture barrier layer 6 becomes flat. This is presumably because different constituent oxides result in different degrees of lattice growth and / or lattice constants.

[0086] (Manufacturing Process of TFT Substrate 1)

[0087] use Figures 3A to 3H A manufacturing process of the TFT substrate 1 according to the first embodiment will be described.

[0088] First, if Figure 3A As shown, a glass substrate 100 is prepared. The material of the glass substrate 100 is, for example, quartz glass, alkali-free glass, high-heat-resistant glass, etc. Furthermore, it is not preferable that impurities such as sodium and phosphorus contained in the glass substrate be mixed into the second moisture barrier layer 22. Therefore, a SiN film may be formed on the outermost surface of the glass substrate 100 (the surface in contact with the second moisture barrier layer 22). x 、SiO y 、SiO y N x The primer layer is composed of, for example, a base layer. The thickness of the primer layer can also be set to, for example, about 100 nm to 2000 nm. Then, polyimide is applied to the glass substrate 100 using a spin coating method. Then, it is heated at a heating temperature of 400°C for 8 hours to obtain a resin substrate 21 with a film thickness of 18 μm. The film thickness of the resin substrate can also be set to a range of about 1 μm to 1000 μm. When it is thinner than 1 μm, mechanical strength cannot be obtained. When it is thicker than 1000 μm, it becomes difficult to bend, and a flexible substrate cannot be obtained. The method for forming the resin substrate 21 can be to apply a stock solution as in the spin coating method, or to press-bond a substrate that already exists as a resin substrate. In the case of pressing, pressing can be performed after forming an adhesive layer between the glass substrate 100 and the resin substrate 21. If the adhesive layer is a layer of silicone, acrylic, etc. that can obtain the desired adhesive force, it is not particularly limited.

[0089] Then, if Figure 3B As shown, ZrO was formed by ALD. x The film was used as the second moisture barrier layer 22. As a precursor, tetrakis(ethylmethylamino)zirconium was used. x The film thickness becomes about 60nm.

[0090] Then, if Figure 3C As shown, a sputtering method is used to form an approximately 60nm thick In-Ga-Zn-O layer as the oxide semiconductor layer 3. Subsequently, patterning (patterning) is performed using photolithography. In addition to sputtering, laser ablation and CVD methods can also be used to form the oxide semiconductor layer 3. The film thickness of the oxide semiconductor layer 3 can be set in the range of approximately 10nm to 300nm.

[0091] Then, if Figure 3DAs shown in FIG. 1 , a gate insulating film is formed on the oxide semiconductor layer 3 using a CVD method. As a material of the gate insulating film, SiO x .SiO x For example, a film can be formed by introducing silane gas (SiH4) and nitrous oxide gas (N2O) at a predetermined concentration ratio. x The film thickness is set to about 100nm. As the gate insulating film, in addition to using SiO x In addition, SiN can also be used x or SiO x N y , or, layers of these substances may be stacked. The film thickness of the gate insulating film may be set to about 50nm to 400nm. Next, a gate electrode film is formed on the gate insulating film. 60nm MoW is formed as the gate electrode film. The film thickness of the gate electrode film may be set to about 20nm to 100nm. Then, the gate electrode film is patterned by photolithography. As a patterning method for the gate electrode film, a wet etching process using a phosphoric acid-nitric acid-acetic acid solution or a dry etching process using gases such as sulfur hexafluoride (SF6) and chlorine (Cl2) may be used. The patterning of the gate insulating film may, for example, be a dry etching process using gases such as sulfur hexafluoride (SF6) or a wet etching process using hydrofluoric acid (HF). After the gate electrode film is patterned by the wet etching process, the gate insulating film is patterned by the dry etching process. As a result, as shown in FIG. Figure 3D As shown, a gate insulating layer 4 and a gate electrode 5 are formed on the first region R1 of the oxide semiconductor layer 3 .

[0092] Then, if Figure 3E As shown, AlO was formed using the ALD method. x The film was used as the first moisture barrier layer 6. As a precursor, trimethylaluminum was used. AlO x The film thickness is about 30nm. x Film formation, Al from AlO x The film is doped into the pair of second regions R2 in the oxide semiconductor layer 3 that are not covered by the gate insulating layer 4, and the resistance is reduced. As a result, in the oxide semiconductor layer 3, a channel region 3b is generated in the first region R1, and a contact region 3 is generated in the pair of second regions R2. a1 and 3 a2 Furthermore, an inorganic insulating film or an organic insulating film may be formed on the first moisture barrier layer 6. By forming these layers, the parasitic capacitance between the gate electrode 5 and the source electrode 8, and between the gate electrode 5 and the drain electrode 9 is further reduced. In addition, short circuits between electrodes with foreign matter can also be prevented. For example, the CVD method can be used to form AlO xA SiO layer of about 200 nm is formed on the first moisture barrier layer 6. x .

[0093] Then, if Figure 3F As shown, photolithography is used to form the contact area 3 a1 and 3 a2 The first moisture barrier layer 6 is formed to penetrate the contact area 3 a1 and 3 a2 contact holes CH1 and CH2.

[0094] Then, if Figure 3G As shown, three layers, namely, a MoW layer, an Al layer, and a MoW layer, were stacked to form a source electrode film and a drain electrode film. The source electrode film and the drain electrode film had a thickness of approximately 500 nm. Subsequently, a wet etching process using a phosphoric acid, nitric acid, and acetic acid solution was used to pattern the source electrode 8 and the drain electrode 9.

[0095] Finally, if Figure 3H As shown, the TFT substrate 1 is peeled off from the glass substrate 100 to complete the TFT substrate 1. As a peeling method, a method of irradiating an excimer laser or a solid laser from the glass substrate side or a method of mechanically peeling the TFT substrate 1 from the end using a hand or a device can be used.

[0096] <Implementation Method 2>

[0097] (Configuration of Organic EL Display Device 101)

[0098] Figure 4 A top view of an organic EL display device 101 fabricated using the TFT substrate 1 of Embodiment 1 is shown. Organic EL display device 101 includes a display area in which subpixels 102 are arranged in a matrix, and a peripheral area surrounding the display area. A sealing member 103 is disposed on the periphery of the peripheral area to prevent the intrusion of moisture, gas, and other substances from the outside. Sealing member 103 is formed from a dense resin material (e.g., silicone resin, acrylic resin, etc.) or glass. Figure 5A This is a cross-sectional view of a sub-pixel 102 along the arrow direction, taken along the line 5A-5A in the enlarged view S1. The sub-pixels 102 are separated from each other by the crisscross-shaped partition walls 107. Figure 7A A cross-sectional view of one sub-pixel 102 adjacent to the peripheral region and an enlarged view S2 of the peripheral region adjacent to the sub-pixel 102 is shown. Figure 7A It is a cross-sectional view of the 7A-7A section in the enlarged view of FIG. S2 observed along the direction of the arrow.

[0099] like Figure 5AAs shown, the organic EL display device 101 includes, from the bottom, a TFT substrate 1, a planarization layer 104, an organic EL display layer 200, a sealing layer 113, a sealing resin 114, and a resin substrate 21. The organic EL display layer 200 includes, from the bottom, an anode 105, a hole injection layer 106, a hole transport layer 108, a light-emitting layer 109, an electron transport layer 110, an electron injection layer 111, and a cathode 112. The organic EL display layer 200 also includes partitions 107 for dividing each sub-pixel 102. The organic EL display device 101 is a top emission type. Figure 5A In addition to the TFT substrate 1 described in the first embodiment, the TFT substrate 1 further includes at least another TFT 2 (in Figure 5A (not shown in the figure). Figure 6 The circuit structure in the sub-pixel 102 is shown. TFT1 is a switching transistor, and TFT2 is a driving transistor. TFT1 is connected to TFT2 and capacitor C, and is also connected to a source signal line SL and a gate signal line GL connected to any one of the driving circuits (not shown). TFT2 is connected to capacitor C, TFT1, the organic EL display layer 200, and a power supply signal line PL that supplies a large current from the outside. The drain electrode 10 of TFT2 is connected to the anode 105 of the organic EL display layer 200 in the contact hole CH3 that penetrates the planarization layer 104 (see FIG. 1 ). Figure 5A ).

[0100] Regarding each layer of the organic EL display device 101, Figure 5A The formed layers will be described in more detail in order from the bottom. Since the TFT substrate 1 has been described in the first embodiment, its description will be omitted.

[0101] The planarization layer 104 is formed to insulate the TFTs 1 and 2, various signal lines, and the anode 105, and to planarize the level differences caused by the TFTs, etc. The planarization layer 104 is formed of polyimide resin, acrylic resin, etc. The thickness of the planarization layer 104 is about several μm.

[0102] The anode 105 is provided on the planarization layer 104. Examples of materials for the anode 105 include metals such as Mo, Al, Au, Ag, and Cu, alloys of these metals, organic conductive materials such as PEDOT-PSS, ZnO, and lead-doped indium oxide. Films made of these materials are formed using vacuum deposition, electron beam deposition, RF sputtering, or printing. The anode 105 may also be light-reflective. The anode 105 is formed in a matrix corresponding to each subpixel.

[0103] A so-called functional layer is formed on the anode 105. The functional layer is formed on the Figure 5AIn the structure, a hole injection layer 106, a hole transport layer 108, a light-emitting layer 109, an electron transport layer 110, and an electron injection layer 111 are stacked in order from the bottom. As the hole injection layer 106, for example, copper phthalocyanine can be used, and as the hole transport layer 108, for example, α-NPD (Bis[N-(1-naphthyl)-N-phenyl]benzidine; Bis[N-(1-Naphthyl)-N-Phenyl]benzidine) can be used. The light-emitting layer 109 is composed of an organic material, and as the organic material, for example, an oxinoid compound, a perylene compound, a coumarin compound, etc. can be used. In addition, an azacoumarin compound, Azole compounds, Oxadiazole compounds, perinone compounds, pyrrolopyrrole compounds, naphthalene compounds, anthracene compounds, etc. In addition, fluorene compounds, fluoranthene compounds, tetracene compounds, pyrene compounds, coronene compounds, quinolone compounds and azaquinolone compounds, pyrazoline derivatives and pyrazolone derivatives, rhodamine compounds, (chrysene) compounds. In addition, phenanthrene compounds, cyclopentadiene compounds, stilbene compounds, diphenylbenzoquinone compounds, styryl compounds, butadiene compounds, dicyanomethylenepyran compounds, dicyanomethylenethiopyran compounds. In addition, fluorescein compounds, pyran Compounds, Thiophanates Compounds, selenopyran Compounds, telluropyran Compounds, aromatic canrenone (aldadiene) compounds, oligophenylene compounds, thioxanthene compounds, anthocyanin compounds. In addition, acridine compounds, metal complexes of 8-hydroxyquinoline compounds, metal complexes of 2-bipyridine compounds, complexes of Schiff bases and group III metals, 8-hydroxyquinoline (oxine) metal complexes, rare earth complexes and other fluorescent substances can also be used as the electron transport layer 110. For example, Azole derivatives. As the electron injection layer 111, for example, Alq3 or the like can be used. Here, in order to improve the electron injection efficiency, the electron injection layer 111 is sometimes doped with an alkali metal and / or alkaline earth metal with a low work function. For example, Li, Ba, Ca, Mg, etc. A cathode 112 is formed on the electron injection layer 111. For example, a translucent metal oxide such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) can be used for the cathode 112. In addition, alloys such as Mg-Ag can also be used. Mg has a low work function and is suitable as a cathode.

[0104] A sealing layer 113 is formed on the cathode 112. The sealing layer 113 is a layer for covering the organic EL display layer 200 to seal and prevent the organic EL display layer from contacting moisture and air. x 、SiO x N y Translucent materials such as.

[0105] The sealing resin 114 is a resin that bonds the TFT substrate 1 on which the organic EL display layer 200 and the like are formed and the resin substrate 21 facing the TFT substrate 1 .

[0106] Since the resin substrate 21 has been described in the first embodiment, its description will be omitted.

[0107] The partition wall 107 is formed of an insulating organic material (e.g., an acrylic resin, a polyimide resin, or a novolac-type phenol resin) and is formed adjacent to the region where the light-emitting layer 109 is provided. While the partition wall 107 in Embodiment 2 is a pixel bank with a crisscross structure, a stripe-shaped bank may also be used.

[0108] Next, use Figure 7A The portion of the organic EL display device 101 extending from the display area to the peripheral area will be described. Arrow C indicates the boundary between the display area and the peripheral area. Arrow D indicates the end of the region where the electron transport layer 110, electron injection layer 111, and cathode 112 are stacked. Arrow B2 indicates the end of the region where the second moisture barrier layer 22 and first moisture barrier layer 6 are stacked. The sealing member 103 is formed from arrow E to arrow B2.

[0109] Here, at least one of the electron injection layer 111 and the cathode 112 in the organic EL display layer 200 is easily degraded by moisture. As previously explained, alkali metals and / or alkaline earth metals with low work functions are sometimes used in the electron injection layer 111 and the cathode 112. These metals are active with respect to moisture. For example, when a material containing Ba is used for the electron injection layer 111 and ITO is used for the cathode 112, the electron injection layer 111 is easily degraded by moisture. In addition, when an organic material is used for the electron injection layer 111 and a Mg-Ag alloy is used for the cathode 112, the cathode 112 is easily degraded by moisture. Therefore, the area where the electron injection layer 111 and the cathode 112 are provided is preferably provided on an area with high moisture barrier properties relative to the resin substrate 21. The moisture barrier properties of the area where the second moisture barrier layer 22 contacts the first moisture barrier layer 6 are particularly high.

[0110] Therefore, when both the electron injection layer 111 and the cathode 112 are susceptible to moisture degradation, it is preferable that the electron injection layer 111 and the cathode 112 are provided inside the end B2 of the region where the second moisture barrier layer 22 and the first moisture barrier layer 6 are in contact. In other words, when the organic EL display device 101 is viewed from above, it is preferable that the electron injection layer 111 and the cathode 112 are provided inside the outer periphery B2 of the region where the second moisture barrier layer 22 and the first moisture barrier layer 6 are in contact (within the region where the first moisture barrier layer 6 and the second moisture barrier layer 22 are in contact).

[0111] In addition, in the case where only the electron injection layer 111 is easily degraded by moisture, it is preferred that: when looking down at the organic EL display device 101, the electron injection layer 111 is arranged on the inner side of the periphery B2 of the area where the second moisture barrier layer 22 and the first moisture barrier layer 6 are in contact (within the area where the first moisture barrier layer 6 and the second moisture barrier layer 22 are in contact).

[0112] In addition, in the case where only the cathode 112 is easily degraded by moisture, it is preferred that: when looking down at the organic EL display device 101, the cathode 112 is arranged on the inner side of the periphery B2 of the area where the second moisture barrier layer 22 and the first moisture barrier layer 6 contact (within the area where the first moisture barrier layer 6 and the second moisture barrier layer 22 contact).

[0113] The above configuration can realize an organic EL display device having high barrier properties against moisture intruding from the outside. In addition, in the second embodiment, since the resin substrate 21 is used, a flexible display having advantages such as lightness, thinness, crack resistance, and bendability can be realized.

[0114] <Other matters>

[0115] (1) In Embodiment 2, a top emission type organic EL display device is described, but the present invention is not limited thereto and is also applicable to a bottom emission type organic EL display device.

[0116] (2) An example of a method for manufacturing an organic EL display device in Embodiment 2 is described below. As described in Embodiment 1, first, a TFT substrate 1 is formed on a glass substrate 100. Thereafter, without peeling the TFT substrate 1 from the glass substrate 100, a planarization layer 104, an organic EL display layer 200, a sealing layer 113, and a sealing member 103 are formed on the TFT substrate 1 using a conventional manufacturing process. Next, a resin substrate 21 is attached to the TFT substrate 1 having the above layers and the sealing member formed thereon, from the side opposite to the glass substrate 100, via a sealing resin 114. Finally, the glass substrate 100 is peeled off, completing the flexible organic EL display device.

[0117] (3) The thin film transistor element substrate and its manufacturing method, and the organic EL display device using the thin film transistor element substrate involved in this application can also be a structure formed by appropriately combining part of the embodiment. In addition, the materials, numerical values, etc. described in the embodiment are only examples of preferred examples and are not limited thereto. Moreover, the structure can be appropriately changed within the scope of the technical idea of ​​this application. This application can be widely used in all thin film transistor element substrates and its manufacturing method, and organic EL display devices using thin film transistor element substrates.

[0118] Industrial Application Possibilities

[0119] The thin film transistor element substrate according to the present application can be widely used in display devices such as televisions, personal computers, and mobile phones, solid-state imaging devices such as digital cameras, and other various electronic devices.

Claims

1. A thin film transistor device substrate comprising: substrate; an oxide semiconductor layer provided on a portion of the substrate and having a channel region and a pair of contact regions sandwiching the channel region along a surface of the substrate; a gate electrode disposed on the channel region via a gate insulating layer; a source electrode joined to one of the pair of contact regions; a drain electrode joined to the other of the pair of contact regions; and a first moisture blocking layer, the first moisture blocking layer being arranged to cover the gate insulating layer and the gate electrode, and being arranged to cover the following regions, the regions being regions on the pair of contact regions of the oxide semiconductor layer excluding junctions between the contact regions and the source electrode and junctions between the contact regions and the drain electrode, and regions on the substrate where the oxide semiconductor layer is not provided, The first moisture barrier layer includes a metal oxide and is formed by atomic layer deposition. The first moisture barrier layer formed by atomic layer deposition is in contact with the pair of contact regions and reduces the resistance of the pair of contact regions. The metal oxide comprises AlO x 、TiO x 、CaO x , HfO x 、TaO x 、LaOx、YO x At least one of the group consisting of.

2. The thin film transistor element substrate according to claim 1, The first moisture barrier layer has a layer structure at an atomic level.

3. The thin film transistor element substrate according to claim 1, The substrate includes a resin substrate mainly composed of a resin material and a second moisture barrier layer formed on the resin substrate. The second moisture blocking layer is in contact with the oxide semiconductor layer and the first moisture blocking layer.

4. The thin film transistor element substrate according to claim 3, The second moisture barrier layer is formed by chemical vapor deposition or atomic layer deposition.

5. The thin film transistor element substrate according to claim 3, The first moisture barrier layer and the second moisture barrier layer have different oxide compositions.

6. The thin film transistor element substrate according to claim 3, The first moisture barrier layer includes an oxide of aluminum (Al), and the second moisture barrier layer includes an oxide of zirconium (Zr).

7. An organic EL display device comprising: The thin film transistor element substrate according to claim 3; and The organic EL display layer is formed on the thin film transistor element substrate and comprises at least an anode, a light emitting layer, and a cathode.

8. The organic EL display device according to claim 7, The cathode is located inside the outer periphery of a region where the first moisture barrier layer and the second moisture barrier layer are in contact with each other.

9. The organic EL display device according to claim 7, The organic EL display layer further comprises an electron injection layer. The electron injection layer is located inside the outer periphery of a region where the first moisture blocking layer and the second moisture blocking layer are in contact with each other.

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