Switching circuit

Abstract

This application relates to a switching circuit. A method and switching circuit for providing a switch array with on-resistance are proposed. The switch array has multiple switches, each arranged in a different configuration state. The states include an enabled configuration and a disabled configuration. The switch states include an on state and an off state. Each switch remains in the off state when in the disabled configuration. A control circuit sets the switches to the enabled or disabled configuration, and a memory element is coupled to the control circuit and arranged to store configuration data for setting the configuration state of each of the switches. The control circuit sets the configuration state of the switches based on signals received from the memory element. The on-resistance of the switch array depends on the switching state of the switches and their respective on-resistances.

Description

Technical Field

[0001] This disclosure relates to a switching circuit. More specifically, this disclosure relates to a switching circuit comprising a switch array having a controlled onresistance. background

[0002] Transistors (such as MOSFETs) are commonly used as switches in switching power converters (such as buck converters and boost converters). When used in power conversion applications, these switches are often referred to as power switches.

[0003] Figure 1 This is a schematic diagram of a transistor 100 that can be used as a power switch and a controller 102 coupled to the gate of the transistor 100. The transistor 100 is operable in an on-state and an off-state; in the on-state, current is allowed to flow between its drain and source terminals, and in the off-state, current is not allowed to flow between its drain and source terminals. In the on-state, the transistor 100 has an associated on-resistance Rdson, therefore, as... Figure 1 As shown, the transistor 100 in the on state can be represented by the resistor 104.

[0004] For the low on-resistance Rdson of transistor 100, there is a low voltage drop across the drain and source terminals of transistor 100 for a given current, and the heat generated for a given current is also low. The smaller voltage drop and less heat generation contribute to improving the efficiency of the system implementing transistor 100.

[0005] The on-resistance Rdson of transistor 100 is not suitable for sensing current because the on-resistance Rdson is prone to change due to variations in voltage, temperature, and process / manufacturing.

[0006] Figure 2A This is a schematic diagram of a transistor 100 coupled in series with a sensing resistor 200. Common features between the figures share common reference figures. The sensing resistor 200, with a resistance R, is used to measure current. When an unknown current flows through the sensing resistor 200, a measurable voltage drop ΔV exists across the sensing resistor 200. Using Ohm's law and the known resistance R and voltage drop ΔV, the instantaneous current flowing through the sensing resistor 200 and the transistor 100 can be calculated.

[0007] When transistor 100 is coupled in series to sensing resistor 200, the current flowing through sensing resistor 200 is equal to the current flowing through transistor 100. Therefore, measuring the current flowing through sensing resistor 200 is a suitable method for measuring the current flowing through transistor 100.

[0008] The sensing resistor 200 can be called a precision resistor because the value of the resistance R is known to have a sufficiently high accuracy to determine the current, and the resistance R does not change significantly during normal operating conditions.

[0009] Figure 2B This is a schematic diagram of a transistor 100 coupled in series with a sensing resistor 200, and includes an operational amplifier 202 and an analog-to-digital converter (ADC) 204. Common features between the figures share common reference figures. The operational amplifier 202 and the ADC 204 are used to measure the voltage drop ΔV across the sensing resistor 200 and convert the measured voltage drop ΔV from an analog value to a digital value.

[0010] A sensing resistor 200 can be implemented in a circuit to measure the current at a specific point in time, which is often referred to as the instantaneous current. The measurement of the instantaneous current is a necessary feature in many systems; however, the addition of the sensing resistor 200 reduces the efficiency of the system and generates additional heat.

[0011] According to Ohm's law, the voltage drop ΔV across the sensing resistor 200 is proportional to the current in the circuit and also proportional to the resistance R of the sensing resistor 200. For example, reducing the resistance R of the sensing resistor 200 by using a smaller sensing resistor 200 will improve the efficiency of the circuit because power loss and excess heat are reduced, but will also result in a proportionally smaller voltage drop ΔV. When measuring the voltage drop ΔV to determine the current, a smaller voltage drop ΔV means that a more complex voltage sensing circuit is needed to measure the voltage drop ΔV with sufficiently high accuracy to accurately determine the current. This may increase the cost of implementing current sensing using the sensing resistor 200.

[0012] Overview

[0013] Compared to existing technologies, it is desirable to provide a switch with an on-resistance that is less sensitive to at least one of voltage variations, temperature variations, and process / manufacturing variations.

[0014] According to a first aspect of this disclosure, a switching circuit is provided for providing a switch array with on-resistance, the switching circuit comprising: a switch array including a plurality of switches, wherein each switch is arranged to be in one of a plurality of configuration states, including an enabled configuration and a disabled configuration, wherein each switch is arranged to operate in one of a plurality of switch states, including an on state and an off state, when in the enabled configuration, and each switch is held in the off state when in the disabled configuration; a control circuit configured to set each of the switches to the enabled configuration or the disabled configuration; and a memory element coupled to the control circuit and arranged to store configuration data for setting the configuration state of each of the switches; wherein the control circuit is configured to set the configuration state of each of the switches based on a configuration signal received from the memory element, the configuration signal depending on the configuration data, and the on-resistance of the switch array depends on the switch states and their respective on-resistances.

[0015] Optionally, the control circuit is configured to receive a switch status signal from the switch controller and, in response to the switch status signal, control the switch state of the switch in the enabled configuration.

[0016] Optionally, the switches of the switch array are coupled in parallel.

[0017] Optionally, each switch includes a MOSFET.

[0018] Optionally, the configuration data includes multiple configuration values, and the configuration signal depends on at least one of the configuration values.

[0019] Optionally, the memory element is configured to receive an input, on which the configuration value upon which the configuration signal depends is selected based on the input.

[0020] Alternatively, the input is provided via a user interface configured to allow the user to select configuration values.

[0021] Optionally, the switching circuit includes a reference MOSFET, a current source configured to provide drain / source current to the reference MOSFET, and a voltage detector arranged to measure the drain / source voltage of the reference MOSFET, and provides a signal indicating the measured drain / source voltage as an input to a memory element for selecting a configuration value.

[0022] Optionally, the switching circuit includes a current sensor for measuring the current flowing through the switch array. The current sensor includes a voltage detector arranged to measure a first voltage at a first terminal of the switch array and a second voltage at a second terminal of the switch array, and the measured voltage is used to calculate the current flowing through the switch array.

[0023] Optionally, the current sensor is configured to determine the direction of current flow by evaluating which of the first voltage and the second voltage is the largest.

[0024] Optionally, the switching circuit includes a current sensor for measuring the current flowing through the switch array. The current sensor includes a voltage detector arranged to measure a first voltage at a first terminal of the switch array and a second voltage at a second terminal of the switch array, and the measured voltage is used to calculate the current flowing through the switch array.

[0025] Optionally, the current sensor is configured to determine the direction of current flow by evaluating which of the first voltage and the second voltage is the largest.

[0026] Optionally, a current sensor is arranged to provide a signal indicating the direction of the current flowing through the switch array, as an input to a memory element for selecting a configuration value.

[0027] Optionally, the control circuit includes a plurality of control logic blocks, wherein each control logic block is associated with at least one switch, and each control logic block is configured to set one or more of its associated switches to an enabled or disabled configuration.

[0028] Optionally, the control logic block is configured to receive a switch status signal from the switch controller and, in response to the switch status signal, control the switch status of one or more of its associated switches that are in an enabled configuration.

[0029] Optionally, the switches of the switch array are coupled in parallel, and each switch includes a MOSFET. The switching circuit includes a voltage detector configured to measure the gate voltage of one of the MOSFETs and the source voltage of the parallel combination of the MOSFETs, and to provide a signal indicating the measured gate voltage / source voltage as an input to the memory element for selecting configuration values.

[0030] Optionally, the switching circuit includes a temperature sensor configured to measure temperature and provide a signal indicating the measured temperature as an input to a memory element for selecting a configuration value.

[0031] Optionally, the switching circuit includes a voltage detector configured to measure the drain voltage or source voltage of a parallel combination of MOSFETs, and to adjust the gate voltage of at least one of the MOSFETs in response to the measured drain voltage or source voltage.

[0032] Optionally, the memory element is configured to store gate voltage data, which includes a plurality of gate voltage values ​​for setting the gate voltage of at least one of the MOSFETs, a voltage detector is arranged to provide a signal indicating the measured drain voltage or source voltage as an input to the memory element for selecting the gate voltage value, and a control circuit is configured to set the gate voltage of at least one of the MOSFETs based on a gate voltage signal received from the memory element, the gate voltage signal depending on the selected gate voltage value.

[0033] Optionally, each switch may include one or more sub-switches.

[0034] Optionally, the sub-switches are implemented using a binary weighting scheme.

[0035] Optionally, the memory element includes non-volatile memory for storing configuration data.

[0036] According to a second aspect of this disclosure, a method is provided for generating configuration data for a switching circuit, the switching circuit comprising: a switch array having an on-resistance and including a plurality of switches, wherein each switch is arranged to be in one of a plurality of configuration states, the configuration states including an enabled configuration and a disabled configuration; and a memory element coupled to a control circuit and arranged to store configuration data for setting the configuration state of each of the switches, the method comprising passing a reference current through the switch array, measuring the on-resistance of the switch array, adjusting the number of switches in the on state until a target on-resistance is measured, and storing calibration data associated with the switches in the on state as at least a portion of the configuration data when the target on-resistance is measured.

[0037] Optionally, the method includes repeating the following steps for a range of gate / source voltages of the switch array: allowing a reference current to flow through the switch array, measuring the on-resistance of the switch array, and adjusting the number of switches in the on state until a target on-resistance is measured, and storing calibration data associated with the on-state switch as a different configuration value for each of the gate / source voltages.

[0038] Optionally, the method includes repeating the process over a range of temperatures for the switch array: flowing a reference current through the switch array, measuring the on-resistance of the switch array, and adjusting the number of switches in the on state until a target on-resistance is measured, and storing calibration data associated with the on-state switches as different configuration values ​​for each temperature.

[0039] According to a third aspect of this disclosure, a method is provided for providing a switch array having on-resistance, the switch array comprising a plurality of switches, wherein each switch is arranged to be in one of a plurality of configuration states, the configuration states including an enabled configuration and a disabled configuration, wherein each switch is arranged to operate in one of a plurality of switch states, including an on state and an off state, when in the enabled configuration, and each switch is held in the off state when in the disabled configuration, wherein the on-resistance of the switch array depends on the switch states of the switches and their respective on-resistances, the method comprising: storing configuration data for setting the configuration state of each of the switches using a memory element coupled to a control circuit; receiving a configuration signal at the control circuit from the memory element, the configuration signal depending on the configuration data; and setting the configuration state of each of the switches based on the configuration signal using the control circuit.

[0040] It will be recognized that the approach of the third aspect may include providing and / or using the features set forth in the first aspect, and may be combined with other features described herein.

[0041] Optionally, the method includes receiving a switch status signal from a switch controller at a control circuit, and using the control circuit in response to the switch status signal to control the switch state of a switch in an enabled configuration.

[0042] Optionally, the switches of the switch array are coupled in parallel.

[0043] Optionally, each switch includes a MOSFET.

[0044] Optionally, the configuration data includes multiple configuration values, and the configuration signal depends on at least one of the configuration values.

[0045] Optionally, the method includes receiving an input using a memory element and selecting a configuration value upon which the configuration signal depends.

[0046] Alternatively, input can be provided via a user interface configured to allow the user to select configuration values.

[0047] Optionally, the switching circuit includes a reference MOSFET, and the method includes using a current source to provide drain / source current to the reference MOSFET, using a voltage detector to measure the drain / source voltage of the reference MOSFET, and using the voltage detector to provide a signal indicating the measured drain / source voltage as an input to a memory element for selecting a configuration value.

[0048] Optionally, the switching circuit includes a current sensor for measuring the current flowing through the switch array, the current sensor including a voltage detector, the method including using the voltage detector to measure a first voltage at a first terminal of the switch array and a second voltage at a second terminal of the switch array, and using the measured voltages to calculate the current flowing through the switch array.

[0049] Optionally, the method includes determining the direction of current flow by using a current sensor to assess which of the first and second voltages is maximum.

[0050] Optionally, the switching circuit includes a current sensor for measuring the current flowing through the switch array, the current sensor including a voltage detector, the method including using the voltage detector to measure a first voltage at a first terminal of the switch array and a second voltage at a second terminal of the switch array, and using the measured voltages to calculate the current flowing through the switch array.

[0051] Optionally, the method includes determining the direction of current flow by using a current sensor to assess which of the first and second voltages is maximum.

[0052] Optionally, the method includes using a current sensor to provide a signal indicating the direction of the current flowing through the switch array, as input to a memory element for selecting a configuration value.

[0053] Optionally, the control circuit includes a plurality of control logic blocks, wherein each control logic block is associated with at least one switch, and the method includes setting one or more of its associated switches to an enabled or disabled configuration for each control logic block.

[0054] Optionally, the method includes using a control logic block to receive a switch status signal from a switch controller, and in response to the switch status signal to control the switch status of one or more of its associated switches that are in an enabled configuration.

[0055] Optionally, the switches of the switch array are coupled in parallel, and each switch includes a MOSFET. The switching circuit includes a voltage detector. The method includes using the voltage detector to measure the gate voltage of one of the MOSFETs and using the voltage detector to measure the source voltage of the parallel combination of the MOSFETs. The voltage detector is used to provide a signal indicating the measured gate voltage / source voltage as an input to a memory element for selecting a configuration value.

[0056] Optionally, the switching circuit includes a temperature sensor, and the method includes using the temperature sensor to measure temperature and using the temperature sensor to provide a signal indicating the measured temperature as input to a memory element for selecting a configuration value.

[0057] Optionally, the switching circuit includes a voltage detector, and the method includes using the voltage detector to measure the drain voltage or source voltage of a parallel combination of MOSFETs, and using the voltage detector to adjust the gate voltage of at least one of the MOSFETs in response to the measured drain voltage or source voltage.

[0058] Optionally, the method includes using a memory element to store gate voltage data, the gate voltage data including a plurality of gate voltage values ​​for setting the gate voltage of at least one of the MOSFETs, using a voltage detector to provide a signal indicating a measured drain voltage or source voltage as an input to the memory element for selecting the gate voltage value, and using control circuitry to set the gate voltage of at least one of the MOSFETs based on a gate voltage signal received from the memory element, the gate voltage signal depending on the selected gate voltage value.

[0059] Optionally, each switch may include one or more sub-switches.

[0060] Optionally, the sub-switches are implemented using a binary weighting scheme.

[0061] Optionally, the memory element includes non-volatile memory for storing configuration data.

[0062] According to a fourth aspect of this disclosure, a switching circuit is provided for providing a switch array with on-resistance, comprising: a switch array including a plurality of switches, wherein each switch is arranged to operate in one of a plurality of switch states, the switch states including an on state and an off state; a control circuit configured to set a control voltage for at least one of the switches; and a memory element coupled to the control circuit and configured to store control voltage data, the control voltage data including a plurality of control voltage values ​​for setting the control voltage for at least one of the switches, wherein the control circuit is configured to set the control voltage for at least one of the switches based on a control voltage signal received from the memory element, the control voltage signal depending on the control voltage data, and the on-resistance of the switch array depending on the switch states and their respective on-resistances.

[0063] Optionally, each switch includes a MOSFET, the control voltage is a gate voltage, the control voltage data is gate voltage data, the control voltage value is a gate voltage value, and the control voltage signal is a gate voltage signal; the switching circuit includes a voltage detector configured to measure the drain voltage or source voltage of a parallel combination of MOSFETs, and to provide a signal indicating the measured drain voltage or source voltage as an input to a memory element for selecting a gate voltage value, wherein the control circuit is configured to set the gate voltage of at least one of the MOSFETs based on a gate voltage signal received from the memory element, the gate voltage signal depending on the selected gate voltage value.

[0064] It will be recognized that the switching circuit of the fourth aspect may include the features described in the first aspect, and may be combined with other features described herein.

[0065] Optionally, each switch is arranged to be in one of a plurality of configuration states, including an enabled configuration and a disabled configuration. Each switch is arranged to operate in one of the plurality of switch states when in the enabled configuration, and each switch is held in the off state when in the disabled configuration. The control circuit is configured to set each of the switches to the enabled or disabled configuration. The memory element is arranged to store configuration data for setting the configuration state of each of the switches, and the control circuit is configured to set the configuration state of each of the switches based on a configuration signal received from the memory element, the configuration signal depending on the configuration data.

[0066] Optionally, the control circuit is configured to receive a switch status signal from the switch controller and, in response to the switch status signal, control the switch state of the switch in the enabled configuration.

[0067] Optionally, the switches of the switch array are coupled in parallel.

[0068] Optionally, each switch includes a MOSFET.

[0069] Optionally, the configuration data includes multiple configuration values, and the configuration signal depends on at least one of the configuration values.

[0070] Optionally, the memory element is configured to receive an input and select the configuration value upon which the configuration signal depends based on the input.

[0071] Alternatively, input can be provided via a user interface configured to allow the user to select configuration values.

[0072] Optionally, the switching circuit includes a reference MOSFET, a current source configured to provide drain / source current to the reference MOSFET, and a voltage detector arranged to measure the drain / source voltage of the reference MOSFET, and provides a signal indicating the measured drain / source voltage as an input to a memory element for selecting a configuration value.

[0073] Optionally, the switching circuit includes a current sensor for measuring the current flowing through the switch array. The current sensor includes a voltage detector arranged to measure a first voltage at a first terminal of the switch array and a second voltage at a second terminal of the switch array, and the measured voltage is used to calculate the current flowing through the switch array.

[0074] Optionally, the current sensor is configured to determine the direction of current flow by evaluating which of the first voltage and the second voltage is the largest.

[0075] Optionally, the switching circuit includes a current sensor for measuring the current flowing through the switch array. The current sensor includes a voltage detector arranged to measure a first voltage at a first terminal of the switch array and a second voltage at a second terminal of the switch array, and the measured voltage is used to calculate the current flowing through the switch array.

[0076] Optionally, the current sensor is configured to determine the direction of current flow by evaluating which of the first voltage and the second voltage is the largest.

[0077] Optionally, a current sensor is arranged to provide a signal indicating the direction of the current flowing through the switch array, as an input to a memory element for selecting a configuration value.

[0078] Optionally, the control circuit includes a plurality of control logic blocks, wherein each control logic block is associated with at least one switch, and each control logic block is configured to set one or more of its associated switches to an enabled or disabled configuration.

[0079] Optionally, the control logic block is configured to receive a switch status signal from the switch controller and, in response to the switch status signal, control the switch status of one or more of its associated switches that are in an enabled configuration.

[0080] Optionally, the switches of the switch array are coupled in parallel, and each switch includes a MOSFET. The switching circuit includes a voltage detector configured to measure the gate voltage of one of the MOSFETs and the source voltage of the parallel combination of the MOSFETs, and to provide a signal indicating the measured gate voltage / source voltage as an input to the memory element for selecting configuration values.

[0081] Optionally, the switching circuit includes a temperature sensor configured to measure temperature and provide a signal indicating the measured temperature as an input to a memory element for selecting a configuration value.

[0082] Optionally, the switching circuit includes a voltage detector configured to measure the drain voltage or source voltage of a parallel combination of MOSFETs, and to adjust the gate voltage of at least one of the MOSFETs in response to the measured drain voltage or source voltage.

[0083] Optionally, the memory element is configured to store gate voltage data, which includes a plurality of gate voltage values ​​for setting the gate voltage of at least one of the MOSFETs, a voltage detector is arranged to provide a signal indicating the measured drain voltage or source voltage as an input to the memory element for selecting the gate voltage value, and a control circuit is configured to set the gate voltage of at least one of the MOSFETs based on a gate voltage signal received from the memory element, the gate voltage signal depending on the selected gate voltage value.

[0084] Optionally, each switch may include one or more sub-switches.

[0085] Optionally, the sub-switches are implemented using a binary weighting scheme.

[0086] Optionally, the memory element includes non-volatile memory for storing configuration data.

[0087] According to a fifth aspect of this disclosure, a method is provided for providing a switching circuit for providing a switch array having on-resistance, the switch array comprising a plurality of switches, wherein each switch is arranged to operate in one of a plurality of switch states, the switch states including an on state and an off state, the method comprising using a memory element to store control voltage data including a plurality of control voltage values ​​for setting a control voltage of at least one of the switches, and using a control circuit to set a control voltage of at least one of the switches based on a control voltage signal received from the memory element at a control circuit, the control voltage signal depending on the control voltage data, wherein the on-resistance of the switch array depends on the switch states of the switches and their respective on-resistances.

[0088] It will be recognized that the approach of the fifth aspect may include providing and / or using the features set forth in the fourth aspect, and may be combined with other features described herein.

[0089] Optionally, each switch includes a MOSFET, the control voltage is a gate voltage, the control voltage data is gate voltage data, the control voltage value is a gate voltage value, and the control voltage signal is a gate voltage signal; the method includes using a voltage detector to measure the drain voltage or source voltage of a parallel combination of MOSFETs, and using the voltage detector to provide a signal indicating the measured drain voltage or source voltage as an input to a memory element for selecting a gate voltage value, and using control circuitry to set the gate voltage of at least one of the MOSFETs based on the gate voltage signal received from the memory element, the gate voltage signal depending on the selected gate voltage value.

[0090] Optionally, each switch is arranged to be in one of a plurality of configuration states, including an enabled configuration and a disabled configuration. Each switch is arranged to operate in one of the plurality of switch states when in the enabled configuration, and each switch is held in the off state when in the disabled configuration. The method includes using control circuitry to set each of the switches to an enabled or disabled configuration, using a memory element to store configuration data for setting the configuration state of each of the switches, and using control circuitry to set the configuration state of each of the switches based on a configuration signal received from the memory element, the configuration signal depending on the configuration data.

[0091] Optionally, the method includes receiving a switch status signal from a switch controller at a control circuit, and using the control circuit in response to the switch status signal to control the switch state of a switch in an enabled configuration.

[0092] Optionally, the switches of the switch array are coupled in parallel.

[0093] Optionally, each switch includes a MOSFET.

[0094] Optionally, the configuration data includes multiple configuration values, and the configuration signal depends on at least one of the configuration values.

[0095] Optionally, the method includes receiving an input using a memory element and selecting a configuration value upon which the configuration signal depends.

[0096] Alternatively, input can be provided via a user interface configured to allow the user to select configuration values.

[0097] Optionally, the switching circuit includes a reference MOSFET, and the method includes using a current source to provide drain / source current to the reference MOSFET, using a voltage detector to measure the drain / source voltage of the reference MOSFET, and using the voltage detector to provide a signal indicating the measured drain / source voltage as an input to a memory element for selecting a configuration value.

[0098] Optionally, the switching circuit includes a current sensor for measuring the current flowing through the switch array, the current sensor including a voltage detector, the method including using the voltage detector to measure a first voltage at a first terminal of the switch array and a second voltage at a second terminal of the switch array, and using the measured voltages to calculate the current flowing through the switch array.

[0099] Optionally, the method includes determining the direction of current flow by using a current sensor to assess which of the first and second voltages is maximum.

[0100] Optionally, the switching circuit includes a current sensor for measuring the current flowing through the switch array, the current sensor including a voltage detector, the method including using the voltage detector to measure a first voltage at a first terminal of the switch array and a second voltage at a second terminal of the switch array, and using the measured voltages to calculate the current flowing through the switch array.

[0101] Optionally, the method includes determining the direction of current flow by using a current sensor to assess which of the first and second voltages is maximum.

[0102] Optionally, the method includes using a current sensor to provide a signal indicating the direction of the current flowing through the switch array, as input to a memory element for selecting a configuration value.

[0103] Optionally, the control circuit includes a plurality of control logic blocks, wherein each control logic block is associated with at least one switch, and the method includes setting one or more of its associated switches to an enabled or disabled configuration for each control logic block.

[0104] Optionally, the method includes receiving a switch status signal from a switch controller using a control logic block, and controlling the switch status of one or more of its associated switches that are in an enabled configuration in response to the switch status signal.

[0105] Optionally, the switches of the switch array are coupled in parallel, and each switch includes a MOSFET. The switching circuit includes a voltage detector. The method includes using the voltage detector to measure the gate voltage of one of the MOSFETs and using the voltage detector to measure the source voltage of the parallel combination of the MOSFETs. The voltage detector is used to provide a signal indicating the measured gate voltage / source voltage as an input to a memory element for selecting a configuration value.

[0106] Optionally, the switching circuit includes a temperature sensor, and the method includes using the temperature sensor to measure temperature and using the temperature sensor to provide a signal indicating the measured temperature as input to a memory element for selecting a configuration value.

[0107] Optionally, the switching circuit includes a voltage detector, and the method includes using the voltage detector to measure the drain voltage or source voltage of a parallel combination of MOSFETs, and using the voltage detector to adjust the gate voltage of at least one of the MOSFETs in response to the measured drain voltage or source voltage.

[0108] Optionally, the method includes using a memory element to store gate voltage data, the gate voltage data including a plurality of gate voltage values ​​for setting the gate voltage of at least one of the MOSFETs, using a voltage detector to provide a signal indicating a measured drain voltage or source voltage as an input to the memory element for selecting the gate voltage value, and using control circuitry to set the gate voltage of at least one of the MOSFETs based on a gate voltage signal received from the memory element, the gate voltage signal depending on the selected gate voltage value.

[0109] Optionally, each switch may include one or more sub-switches.

[0110] Optionally, the sub-switches are implemented using a binary weighting scheme.

[0111] Optionally, the memory element includes non-volatile memory for storing configuration data. Attached Figure Description

[0112] The present disclosure is described in more detail below by way of example and with reference to the accompanying drawings, in which:

[0113] Figure 1 This is a schematic diagram of a transistor and a controller (pre-existing technology).

[0114] Figure 2A yes Figure 1 A schematic diagram of the coupling between the transistor and the sensing resistor (prior art), and Figure 2B yes Figure 1 A schematic diagram of a transistor, sensing resistor, operational amplifier, and analog-to-digital converter (prior art).

[0115] Figure 3A This is a schematic diagram of a switching circuit according to a first embodiment of the present disclosure, and Figure 3B This is a schematic diagram of a switching circuit according to a second embodiment of the present disclosure;

[0116] Figure 4 yes Figure 3B A schematic diagram of the alternative switching circuit;

[0117] Figure 5 This is a schematic diagram of a power switch that includes a MOSFET and a controller;

[0118] Figure 6It is a schematic diagram of a power switch including MOSFETs, controller, selection logic, and control logic blocks;

[0119] Figure 7 This is a schematic diagram of a switching circuit according to a third embodiment of the present disclosure;

[0120] Figure 8 This is a schematic diagram of a switching circuit according to the fourth embodiment of the present disclosure;

[0121] Figure 9 This is a schematic diagram of a switching circuit according to the fifth embodiment of the present disclosure;

[0122] Figure 10A This is a schematic diagram of a switching circuit according to the sixth embodiment of the present disclosure. Figure 10B It further includes DAC. Figure 10A A schematic diagram of the switching circuit. Figure 10C It further includes DAC and charge pump. Figure 10A A schematic diagram of the switching circuit, and Figure 10D yes Figure 10B A schematic diagram of the alternative implementation of the switching circuit;

[0123] Figure 11 This is a schematic diagram of a switching circuit according to the seventh embodiment of the present disclosure;

[0124] Figure 12 This is a schematic diagram of a switching circuit according to the eighth embodiment of the present disclosure;

[0125] Figure 13 This is a schematic diagram of a switching circuit according to the ninth embodiment of the present disclosure;

[0126] Figure 14 This is a schematic diagram of a switching circuit according to the tenth embodiment of the present disclosure; and

[0127] Figure 15 This is a schematic diagram of a switching circuit according to the eleventh embodiment of the present disclosure.

[0128] describe

[0129] Figure 3A This is a schematic diagram of a switching circuit 300 for providing a switch array 302 with on-resistance according to a first embodiment of the present disclosure.

[0130] The switching circuit 300 includes a switch array 302, a control circuit 304, and a memory element 306. The switch array 302 includes a plurality of switches 308. Each switch 308 is arranged to be in one of a plurality of configuration states. The configuration states include enabled configuration and disabled configuration.

[0131] If switch 308 is in an enabled configuration, it can operate in one of several switch states. These states include an ON (on) state and an OFF (off) state. If switch 308 is in a disabled configuration, it remains in the OFF state.

[0132] When switch 308 is in the ON state, current is allowed to flow between its terminals. When switch 308 is in the OFF state, current is not allowed to flow between its terminals.

[0133] The control circuit 304 is configured to set each of the switches 308 to an enabled or disabled configuration.

[0134] Memory element 306 is coupled to control circuit 304 and is arranged to store configuration data. The configuration data is adapted to set the configuration state of each of switches 308.

[0135] In operation, control circuitry 304 is configured to set the configuration state of each of the switches 308 based on configuration signals received from memory element 306. The configuration signals depend on configuration data stored in memory element 306. Memory element 306 may include non-volatile memory (NVM) for storing the configuration data.

[0136] Figure 3B This is a schematic diagram of a switching circuit 310 for providing a switch array 302 with on-resistance according to a second embodiment of the present disclosure. Switch circuit 310 corresponds to switch circuit 300; however, in this particular embodiment, control circuit 304 is configured to receive a switch status signal from switch controller 312. Control circuit 304 controls the switching state of switches 308 in an enabled configuration in response to the switch status signal. In this particular embodiment, the switches 308 of switch array 302 are coupled in parallel, and the plurality of switches 308 includes four switches. Common features between the different figures are indicated by common reference numerals and common variables.

[0137] The configuration data stored in memory element 306 includes multiple configuration values. These configuration values ​​can be stored in a lookup table (LUT) or any other suitable data storage structure, such as a database or spreadsheet. As understood by those skilled in the art, the configuration values ​​can be numerical or any other suitable data type. The configuration signal provided to control circuitry 304 depends on at least one of the configuration values. One or more configuration values ​​upon which the configuration signal depends can be selected based on input 314 received by memory element 306.

[0138] Input 314 can be provided via a user interface 316, which allows the user to manually select a configuration value. For example, the user interface can be implemented in computer software that allows the user to select a configuration value from a list. The selected configuration value can then be used to provide appropriate configuration signals to set the configuration state of switch 308 based on the user's input.

[0139] The user interface allows the user to manually select the number of switches 308 in an enabled or disabled configuration state. Optionally, the user interface allows the user to manually select the configuration state of each individual switch 308. An appropriate configuration value will be selected based on the user's interaction with the interface, and the resulting configuration signal will appropriately set the configuration state of the switch 308 based on the user's input.

[0140] Switch 308 is coupled in parallel at the first terminal T1 and the second terminal T2. The on-resistance of switch array 302 can be measured at terminals T1 and T2, and depends on the switching state of switch 308 and their respective on-resistance. As previously stated... Figure 1 The on-resistance of the switch 308, as discussed in transistor 100, is the resistance when it is in the on state.

[0141] therefore, Figure 3A and Figure 3B The illustrated embodiment provides a means of adjusting the on-resistance of the switch array 302 by changing the configuration state of each switch 308.

[0142] Figure 4 An alternative representation of the switching circuit 310 is shown. The switching array 302 is represented by a single MOSFET with an on-resistance Rdson1. Figure 1 Compared to transistor 100, switching circuit 310 has a variable and controllable on-resistance Rdson1. As previously discussed, the on-resistance Rdson1 of switch array 302 depends on the switching state of switches 308 of switch array 302 and their respective on-resistances. The on-resistance Rdson1 of switch array 302 is represented by resistor 400. Figure 4 The control circuit 304, memory element 306, switch controller 312, and user interface 316 are omitted in the accompanying drawings to aid in the clarity of the simplified representation of the switch circuit 310.

[0143] The switching circuit 310 can be implemented as a MOSFET-based power switch (e.g., in a switching converter). The switch controller 312 drives the switching operation of the switch array 302 by providing a switch status signal, wherein the switch status signal is used to control the switching state of the switch 308 in the enabled configuration.

[0144] Figure 5This is a schematic diagram of a power switch 500, which includes an array of MOSFETs 502 coupled in parallel, and each MOSFET 502 is configured to receive a control signal from a controller 504. Figure 6 This is a schematic diagram of a power switch 600, which includes an array of parallel-coupled MOSFETs 602, each MOSFET 602 being configured to receive a control signal from a controller 604. The power switch 600 includes selection logic 606 and control logic block 608. The selection logic 606 and control logic block 608 allow some or all of the individual MOSFETs 602 in the array to be disabled, so that when the control signal provided by the controller 604 activates the entire array, the disabled MOSFETs will not be switched on.

[0145] Figure 7 This is a schematic diagram of a switching circuit 700 according to a third embodiment of the present disclosure. The switching circuit 700 corresponds to a specific implementation of a switching circuit 310 having the illustrated switch array 302, control circuit 304, and memory element 306. Common features between the different figures are indicated by common reference numerals and common variables.

[0146] The switch array 302 includes a plurality of switches 308, and each switch 308 includes a MOSFET. The control circuitry 304 includes selection logic 702 and a plurality of control logic blocks 704. Each control logic block 704 is associated with at least one switch 308. Each control logic block 704 is configured to set one or more of its associated switches 308 to an enabled or disabled configuration. The control logic block 704 is configured to receive switch status signals from the switch controller 312 and, in response to the switch status signals, control the switching state of one or more of its associated switches 308 that are in an enabled configuration.

[0147] In the specific embodiment shown, each control logic block 704 is coupled to the gate of its associated switch 308. In operation, selection logic 702 receives a configuration signal from memory element 306. Selection logic 702 then provides the signal to each of the control logic blocks 704, and in response, each control logic block 704 sets the configuration state of its associated switch 308.

[0148] Memory element 306 includes non-volatile memory (NVM) 706. NVM 706 may include a calibration register for storing one or more configuration values ​​that can define which switches 308 in switch array 302 are in an enabled or disabled configuration.

[0149] The drain of each switch is coupled at terminal T1, so terminal T1 can be referred to as the drain terminal of switch array 302. The source of each switch 308 is coupled at terminal T2, so terminal T2 can be referred to as the source terminal of switch array 302.

[0150] Control circuitry 304 allows for calibration of switch array 302 during production testing to eliminate natural fabrication / manufacturing variations in the on-resistance Rdson1 of switch array 302 caused by variations in the on-resistance of individual switches 308. The following methods can be used to establish a baseline precision on-resistance Rdson1 for switch array 302.

[0151] A method for generating configuration data for the switching circuit 700 includes passing a reference current through the switch array 302 and measuring the on-resistance Rdson1 of the switch array 302. The reference current will flow between terminals T1 and T2. The number of switches 308 in the on state can then be adjusted until the target on-resistance Rdson1 is measured. Calibration data related to the number of switches in the on state for the target on-resistance Rdson1 can then be stored as at least a portion of the configuration data stored in memory element 306. The number of switches 308 in the enabled configuration can then be set to achieve the target on-resistance Rdson1.

[0152] about Figure 7 In the specific embodiment shown, NVM 706 is used to store calibration values, and the testing process includes passing a known reference current between terminals T1 and T2 and adjusting the calibration value, which in turn alters the signal provided by selection logic 702 to control logic block 704. Switch controller 312 is used to keep enabled switch 308 in the ON state and adjust the calibration value until the desired on-resistance Rdson1 is measured.

[0153] Figure 8 This is a schematic diagram of a switching circuit 800 according to a fourth embodiment of the present disclosure. The switching circuit 800 corresponds to the switching circuit 310, but also includes a reference MOSFET 802, a current source 804, and an analog-to-digital converter (ADC) 806, which is a voltage detector. Common features between the different figures are indicated by common reference numerals and common variables.

[0154] In operation, current source 804 provides drain / source current to reference MOSFET 802. The drain / source current is the current flowing between the drain and source terminals of reference MOSFET 802. This drain / source current causes the generation of a drain / source voltage in reference MOSFET 802, which is measured using ADC 806. The drain / source voltage is the voltage across the drain and source terminals of reference MOSFET 802. ADC 806 then provides a signal indicating the measured drain / source voltage as input 314 to memory element 306 for selecting a configuration value stored in NVM that determines which switches 308 in switch array 302 are in an enabled configuration for a given operating condition.

[0155] Current source 804 can be TC-stabilized because it provides a constant current independent of temperature and process variations. The drain / source voltage of the reference MOSFET 802 will vary with process and temperature, and therefore will exhibit similar process and temperature variations to the switch 308 of the switch array 302. Therefore, the measured drain / source voltage of the reference MOSFET 802 can be used as a selection index to find configuration values ​​that counteract these effects in the switch array 302. Preferably, the reference MOSFET 802 should be physically located near the middle of the switch array 302 for good temperature tracking and process matching.

[0156] Figure 9 This is a schematic diagram of a switch circuit 900 according to a fifth embodiment of the present disclosure. Switch circuit 900 corresponds to switch circuit 700; however, in this particular embodiment, switch array 302 uses a weighted scheme. As previously described, each individual switch 308 comprises an array of sub-switches coupled in parallel. The term "sub-switch" is used to distinguish between the switches 308 of switch array 302 and the individual switches (sub-switches) that may constitute each of the switches 308. Common features between the different figures are indicated by common reference numerals and common variables.

[0157] The weighting scheme could be, for example, the following binary weighting scheme. The first switch 308e includes two parallel-coupled... 1 The first switch, the second switch 308f, includes two parallel-coupled switches. 2 There are 2 sub-switches, and the (n-1)th switch 308g includes 2 （n-1） Each sub-switch, and the nth switch 308h includes 2 parallel-coupled switches. n There are n sub-switches, where n is an integer corresponding to the number of switches in the switch array 302.

[0158] The weighted scheme can be used to reduce the amount of circuitry required to implement the selection logic 702 and the control logic block 704, while providing the same level of control granularity as the switching circuit 700.

[0159] Figure 10A This is a schematic diagram of a switching circuit 1000 according to a sixth embodiment of the present disclosure. Switching circuit 1000 corresponds to switching circuit 700, but also includes voltage detector 1002. Common features between the different figures are indicated by common reference numerals and common variables.

[0160] The switches 308 of the switch array 302 are coupled in parallel, and each switch includes a MOSFET. In operation, the voltage detector 1002 measures the gate voltage of one MOSFET and the source voltage (at terminal T2) of the parallel combination of multiple MOSFETs. The voltage detector 1002 then provides a signal indicating the measured gate / source voltage of the switch array 302 as input 314 to the memory element 306 for selecting configuration values.

[0161] The gate / source voltage of the switch array 302 is the voltage across the gate of a single MOSFET (as measured) and the source (as measured) of a parallel combination of multiple MOSFETs. In this embodiment, only the gate voltage of a single MOSFET needs to be measured, as all MOSFETs will receive approximately the same gate voltage. In another embodiment, different MOSFETs may receive different gate voltages, and therefore the gate / source voltage will depend on the MOSFET selected for measuring its gate voltage. The MOSFET selected for gate voltage measurement for different MOSFETs receiving different gate voltages will depend on the understanding of those skilled in the art.

[0162] The voltage detector 1002 provides an internal mechanism to counteract the changes in Rdson1 of the switch array 302 caused by changes in the gate / source voltage of the switch array 302.

[0163] The switch array 302 can be calibrated to eliminate variations in its on-resistance Rdson1 caused by changes in its gate / source voltage. The following calibration method can be used to establish a baseline precision on-resistance Rdson1 for the switch array 302 for different gate / source voltages. The calibration method can be performed during testing at each production unit of the switch circuit 1000. The calibration method can be used to establish the relationship between variations in the gate / source voltage of the switch array 302 and its on-resistance Rdson1.

[0164] A method for generating configuration data for a switching circuit 1000 includes passing a reference current through a switch array 302 for a range of gate / source voltages, and measuring the on-resistance Rdson1 of the switch array 302 for different gate / source voltages. The number of switches 308 in the on state can then be adjusted until a target on-resistance Rdson1 is measured for each gate / source voltage. Calibration data related to the number of switches 308 in the on state for the target on-resistance Rdson1 can then be stored as at least a portion of the configuration data stored in a memory element 306. Then, for a given gate / source voltage of the switch array 302, the number of switches 308 in the enabled configuration can be set to achieve the target on-resistance Rdson1.

[0165] Using the above calibration method, the switch array 302 will have an on-resistance Rdson1 that has a defined accuracy level for any input voltage at the source of the switch array 302 within the operating range of the switch circuit 1000. The input voltage is the voltage at the source of the switch array 302 (at terminal T2). Furthermore, this specification can be incorporated into a single guaranteed accuracy level for the on-resistance Rdson1 of the switch array 302 within the input voltage range.

[0166] In this embodiment, the voltage detector 1002 includes an ADC 1004 for measuring the gate / source voltage of the switch array 302 within a certain input voltage range. The ADC 1004 provides a signal indicating the measured gate / source voltage as input 314 to the memory element 306 for selecting a configuration value stored in the NVM 706. This configuration value determines which switches 308 in the switch array 302 are in an enabled configuration for a given gate / source voltage to provide the required on-resistance Rdson1 of the switch array 302. The number of switches 308 in the enabled configuration can be dynamically selected by the ADC 1004 during operation.

[0167] An alternative method to counteract the effects of source voltage variations at terminal T2 is to provide a gate voltage to each of the switches 308, which is controlled within trimmed limits that are either above the source voltage (when an NFET is used in switch array 302) or below the source voltage (when a PFET is used in switch array 302). An NFET is an n-type MOSFET, while a PFET is a p-type MOSFET.

[0168] In a general embodiment, control circuit 304 is configured to set a control voltage for at least one of the switches 308. Memory element 306 is configured to store control voltage data, which includes a plurality of control voltage values ​​for setting the control voltage of at least one of the switches 308. Control circuit 304 is configured to set the control voltage of at least one of the switches 308 based on a control voltage signal received from memory element 306, the control voltage signal depending on the control voltage data.

[0169] exist Figure 10A In the specific embodiment shown, each switch 308 includes a MOSFET, and the control voltage supplied to the MOSFET corresponds to its gate voltage. Additionally, control voltage data, control voltage value, and control voltage signal correspond to gate voltage data, gate voltage value, and gate voltage signal, respectively.

[0170] The voltage detector 1002 of the switching circuit 1000 is configured to measure the drain voltage (at terminal T1) of the parallel combination of switches 308 (each including a MOSFET), and to adjust the gate voltage of at least one of the MOSFETs in response to the measured drain voltage.

[0171] It will be appreciated that, in another embodiment and as understood by those skilled in the art, the source voltage (at terminal T2) of a parallel combination of a plurality of MOSFETs can be measured by voltage detector 1002, and the gate voltage of at least one of the MOSFETs can be adjusted in response to the measured source voltage.

[0172] The memory element 306 is configured to store gate voltage data, which includes a plurality of gate voltage values ​​for setting the gate voltage of at least one of the MOSFETs.

[0173] In operation, voltage detector 1002 provides a signal indicating the measured drain voltage as input 314 to memory element 306 for selecting a gate voltage value. Control circuit 304 sets the gate voltage of at least one of the MOSFETs based on the gate voltage signal received from memory element 306. The gate voltage signal provided by memory element 306 depends on the gate voltage value selected based on the measured drain voltage.

[0174] Power supply voltage V 电源 The voltage is provided to control logic block 704, which is then used to supply a gate voltage to each of the switches 308. Each control logic block 704 can adjust the gate voltage applied to its associated switch 308 to allow any change in drain voltage (at terminal T1) to be compensated for by a change in gate voltage.

[0175] Figure 10BA switching circuit 1000 is shown that further includes a digital-to-analog converter (DAC) 1005. Figure 10C A switching circuit 1000 is shown that further includes a DAC 1005 and a charge pump 1007.

[0176] The digital value passed to DAC 1005 can come from the value stored in lookup table (LUT) 1006, and can be directly supplied with the power supply voltage V. 电源 (like Figure 10B (as shown), or to generate power supply voltage V 电源 The charge pump 1007 provides a reference voltage Vref (e.g., Figure 10C (As shown). If the charge pump 1007 is used to generate the power supply voltage V 电源 Then no additional adjustment circuit is needed if the output of the DAC 1005 directly provides the power supply voltage V. 电源 That's the situation. Additionally, for directly supplying the power supply voltage V from the output of the DAC 1005... 电源 The charge pump 1007 provides a higher level of control.

[0177] like Figure 10B , Figure 10C As shown, the power supply voltage V 电源 It can also be provided to voltage detector 1002 for measurement.

[0178] Figure 10D It shows Figure 10B The switching circuit 1000, wherein the LUT 1006 is implemented in the memory element 306.

[0179] Figure 11 This is a schematic diagram of a switching circuit 1100 according to a seventh embodiment of the present disclosure. Switching circuit 1100 corresponds to switching circuit 1000, but also includes a temperature sensor 1102. Common features between the different figures are indicated by common reference numerals and common variables.

[0180] Temperature sensor 1102 is configured to measure temperature and provide a signal indicating the measured temperature as input 314 to memory element 306 for selecting configuration values.

[0181] Voltage detector 1002 may include a reference transistor and ADC 1004 to digitize the instantaneous value of the temperature measured by temperature sensor 1102 and to provide the digitized value as input 314 to memory element 306. It will be appreciated that temperature sensor 1102 can be implemented independently of gate / source voltage detection and drain voltage detection as described for switching circuit 1000.

[0182] The temperature sensor 1102 provides a way to compensate for changes in Rdson1 of the switch array 302 caused by changes in the temperature of the switch array 302.

[0183] The switch array 302 can be calibrated to eliminate variations in its on-resistance Rdson1 caused by temperature changes. The following calibration method can be used to establish a baseline precision on-resistance Rdson1 for the switch array 302 at different temperatures. The calibration method can be performed during testing at each production unit of the switch circuit 1100. The calibration method can be used to establish the relationship between temperature variations in the switch array 302 and its on-resistance Rdson1.

[0184] A method for generating configuration data for a switching circuit 1100 includes passing a reference current through a switch array 302 within a certain temperature range and measuring the on-resistance Rdson1 of the switch array 302 for different temperatures. The number of switches 308 in the on state can then be adjusted until a target on-resistance Rdson1 is measured for each temperature. Calibration data related to the number of switches 308 in the on state for the target on-resistance Rdson1 can then be stored as at least a portion of the configuration data stored in a memory element 306. Then, for a given temperature of the switch array 302, the number of switches 308 in the enabled configuration can be set to achieve the target on-resistance Rdson1.

[0185] Using the above calibration method, the switch array 302 will have an on-resistance Rdson1 with a defined accuracy level at any temperature within the operating range of the switch array 302. Furthermore, this specification can be incorporated into a single guaranteed accuracy level of the on-resistance Rdson1 of the switch array 302 within a certain temperature range.

[0186] The switching circuit 1100 can be used in cascaded structures, such as for high-voltage transistors used for shielding.

[0187] Figure 12 This is a schematic diagram of a switching circuit 1200 according to an eighth embodiment of the present disclosure. Switching circuit 1200 corresponds to switching circuit 1100; however, in switching circuit 1200, the NVM includes a calibration register in the form of a lookup table (LUT) 1202. Common features between the different figures are indicated by common reference numerals and common variables.

[0188] LUT 1202 is used to store one or more configuration values ​​that can define which switches 308 in switch array 302 are in enabled or disabled configuration.

[0189] LUT 1202 may include configuration values ​​related to one or both of temperature and gate / source voltage conditions (as determined using the aforementioned calibration method). LUT 1202 can provide appropriate configuration signals to control circuitry 304 based on configuration values ​​selected according to operating conditions, where operating conditions involve at least one of the temperature and gate / source voltage of switch array 302. Therefore, LUT 1202 is used to define which switches 308 should be in an enabled configuration based on current operating conditions.

[0190] Figure 13 This is a schematic diagram of a switching circuit 1300 according to a ninth embodiment of the present disclosure. The switching circuit 1300 includes a switching circuit 310 and a current sensor 1302. It will be appreciated that, as understood by those skilled in the art, the switching circuit 1300 may include any other switching circuit as described herein. Common features between the different figures are indicated by common reference numerals and common variables.

[0191] In operation, current sensor 1302 measures the current flowing through switch array 302. Current sensor 1302 includes a voltage detector for measuring a first voltage v1 at a first terminal T1 of switch array 302 and a second voltage v2 at a second terminal T2 of switch array 302. Voltages v1 and v2 can then be used to determine the voltage drop ΔV. The instantaneous current flowing through switch array 302 can be calculated using Ohm's law, the on-resistance Rdson1 of switch array 302, and the voltage drop ΔV.

[0192] Using the calibration methods and switching circuits disclosed herein, the switch array 302 can have an on-resistance Rdson1 of known accuracy when in the on-state. An on-resistance Rdson1 with a defined level of accuracy can be provided regardless of one or more of voltage variations, temperature variations, and process / manufacturing variations. For a practical implementation of the switch array, the on-resistance Rdson1 may vary by 1% for different voltage, temperature, and process / manufacturing variations.

[0193] This allows system engineers to have power switching functionality provided by the switch array 302, which can also be used as a sensing resistor, thereby eliminating the need for... Figure 2A and Figure 2B The current measurement system shown suffers from cost, efficiency deficiencies, and excessive heat overhead when using a separate sensing resistor.

[0194] Figure 14This is a schematic diagram of a switching circuit 1400 according to a tenth embodiment of the present disclosure. Switching circuit 1400 corresponds to switching circuit 1200; however, switching circuit 1400 includes the additional function that the on-state resistance can be adjusted based on the current flowing through the switching array. Common features between the different figures are indicated by common reference numerals and common variables.

[0195] LUT 1202 also includes configuration values ​​related to the current range input to enable selection of the on-resistance Rdson1 based on the current flowing through the switch array 302.

[0196] If the current flowing through the switch array 302 is very small, requiring complex or expensive circuitry for measurement, increasing the on-resistance Rdson1 leads to an increase in the voltage drop ΔV, making current measurement easier. For example, if the on-resistance Rdson1 is increased tenfold, the voltage drop ΔV from the drain (at terminal T1) to the source (at terminal T2) increases tenfold, making it easier to measure the voltage drop ΔV and thus the current flowing through the switch array 302.

[0197] Figure 15 This is a schematic diagram of a switching circuit 1500 according to the eleventh embodiment of the present disclosure. Switching circuit 1500 corresponds to switching circuit 1400; however, switching circuit 1500 includes the additional function of measuring the direction of current flowing through switch array 302. Common features between the different figures are indicated by common reference numerals and common variables.

[0198] The switching circuit 1500 includes a current sensor 1302, which includes a voltage detector 1002. In the switching circuit 1500, the voltage detector 1002 is coupled to the drain (terminal T1) and the source (terminal T2 of the switching array), and can therefore be used to sense the current flowing through the switching array 302.

[0199] As described with respect to the switching circuit 1300, the current sensor 1302 includes a voltage detector (in this particular embodiment, the voltage detector 1002 includes an ADC 1004) for measuring a first voltage v1 at a first terminal T1 of the switching array 302 and a second voltage v2 at a second terminal T2 of the switching array 302.

[0200] The ADC 1004 can output the measured voltages v1 and v2, allowing an external processor to calculate the instantaneous current using Ohm's law, as described earlier. This eliminates the need for an external ADC to measure the voltages v1 and v2 required to determine the instantaneous current.

[0201] In operation, the current sensor 1302 can determine the direction of the current flowing through the switch array 302 by evaluating which of the first voltage v1 and the second voltage v2 is maximum. The current sensor 1302 can provide a signal indicating the direction of the current flowing through the switch array 302, which serves as an input 314 to the memory element 306 for selecting configuration values.

[0202] In this particular embodiment, the ADC 1004 can detect when the source voltage (at terminal T2 and corresponding to the second voltage v2) is greater than the drain voltage (at terminal T1 and corresponding to the first voltage v1). When the second voltage v2 is greater than the first voltage v1, the current through the switch array 302 is in the opposite direction. A set of configuration values ​​related to the current direction can be included in the LUT 1202 to provide a means of adjusting the on-resistance Rdson1 when the current through the switch array 302 is in the opposite direction.

[0203] Depending on the direction of the current flowing through the switch array 302, the on-resistance Rdson1 of the switch array 302 will have different values. Therefore, by measuring the current direction, the accuracy of the on-resistance Rdson1 provided by the switch array can be further improved.

[0204] Various improvements and modifications can be made to the above content without departing from the scope of this disclosure.

Claims

1. A switching circuit for providing a switching array having an on-resistance, the switching circuit comprising: the switching array comprising a plurality of switches, wherein each switch is arranged to be in one of a plurality of configuration states, the configuration states comprising an enabled configuration and a disabled configuration, wherein: a) each switch is arranged to operate in one of a plurality of switch states when in the enabled configuration, the switch states comprising an on state and an off state, such that the plurality of switch states can be switched between when a switch is in the enabled configuration; and b) each switch is held in the off state when in the disabled configuration, such that the on state cannot be arranged to operate when a switch is in the disabled configuration; a control circuit configured to set each of the switches to the enabled configuration or the disabled configuration; and a memory element coupled to the control circuit and arranged to store configuration data for setting the configuration state of each of the switches; wherein: the control circuit is configured to set the configuration state of each of the switches based on a configuration signal received from the memory element, the configuration signal being dependent on the configuration data; and the on-resistance of the switching array is dependent on the switch states of the switches and their respective on-resistances.

2. The switching circuit of claim 1, wherein, the control circuit is configured to receive a switch state signal from a switch controller and to control the switch states of the switches in the enabled configuration in response to the switch state signal.

3. The switching circuit of claim 1, wherein, the switches of the switching array are coupled in parallel.

4. The switching circuit of claim 2, wherein, the switches of the switching array are coupled in parallel.

5. The switching circuit according to any one of claims 1-4, wherein, each switch comprises a MOSFET.

6. The switching circuit of any one of claims 1-4, wherein, the configuration data comprises a plurality of configuration values, and the configuration signal is dependent on at least one of the configuration values.

7. The switching circuit of claim 6, wherein, the memory element is configured to receive an input, the configuration value on which the configuration signal is dependent being selected based on the input.

8. The switching circuit of claim 7, wherein, the input is provided via a user interface configured to enable a user to select the configuration value.

9. The switching circuit of claim 7, comprising: a reference MOSFET; a current source configured to provide a drain / source current to the reference MOSFET; and a voltage detector arranged to measure a drain / source voltage of the reference MOSFET and to provide a signal indicative of the measured drain / source voltage as the input to the memory element for selecting the configuration value.

10. The switching circuit of any of claims 1-4 and 7-9, comprising a current sensor for measuring a current flowing through the switching array, the current sensor comprising a voltage detector arranged to measure a first voltage at a first terminal of the switching array and a second voltage at a second terminal of the switching array, the current flowing through the switching array being calculated using the measured voltages. the current sensor is configured to determine a direction of the current flow by assessing which of the first voltage and the second voltage is the largest.

11. The switching circuit of claim 10, wherein, ​ 12. The switching circuit of claim 7, comprising a current sensor for measuring a current flowing through the array of switches, the current sensor comprising a voltage detector arranged to measure a first voltage at a first terminal of the array of switches and a second voltage at a second terminal of the array of switches, the current flowing through the array of switches being calculated using the measured voltages.

13. The switching circuit of claim 12, wherein, The current sensor is configured to determine a direction of the current flow by assessing which of the first voltage and the second voltage is the largest.

14. The switching circuit of claim 13, wherein, The current sensor is arranged to provide a signal indicative of the direction of the current flowing through the array of switches as the input to the memory element for selecting the configuration value.

15. The switching circuit of any of claims 1-4, 7-9, and 11-14, wherein: The control circuit comprises a plurality of control logic blocks, wherein each control logic block is associated with at least one switch; and Each control logic block is configured to set its associated one or more switches to the enabled configuration or the disabled configuration.

16. The switching circuit of claim 15, wherein, The control logic blocks are configured to receive a switch state signal from a switch controller and control the switch state of its associated one or more switches in the enabled configuration in response to the switch state signal.

17. The switching circuit of claim 7, wherein, The switches of the array of switches are coupled in parallel, and each switch comprises a MOSFET, the switching circuit comprising: a voltage detector configured to measure a gate voltage of one of the MOSFETs and a source voltage of the parallel combination of the MOSFETs; and a signal indicative of the measured gate voltage / source voltage is provided as the input to the memory element for selecting the configuration value.

18. The switching circuit of claim 7, comprising: a temperature sensor configured to measure a temperature and provide a signal indicative of the measured temperature as the input to the memory element for selecting the configuration value.

19. The switching circuit of claim 5, comprising: a voltage detector configured to measure a drain voltage or a source voltage of the parallel combination of the MOSFETs and adjust a gate voltage of at least one of the MOSFETs in response to the measured drain voltage or source voltage.

20. The switching circuit of claim 19, wherein: The memory element is configured to store gate voltage data comprising a plurality of gate voltage values for setting the gate voltage of at least one of the MOSFETs; The voltage detector is arranged to provide a signal indicative of the measured drain voltage or source voltage as the input to the memory element for selecting a gate voltage value; and The control circuit is configured to set the gate voltage of at least one of the MOSFETs based on a gate voltage signal received from the memory element, the gate voltage signal being dependent on the selected gate voltage value.

21. The switching circuit of any one of claims 1-4, 7-9, 11-14, and 16-20, wherein, Each switch comprises one or more sub-switches.

22. The switching circuit of claim 21, wherein, The implementation of the sub-switches uses a binary weighting scheme.

23. The switching circuit of any one of claims 1-4, 7-9, 11-14, 16-20, and 22, wherein, The memory element comprises a non-volatile memory for storing the configuration data.

24. A method of generating configuration data for a switching circuit, the switching circuit comprising: a switching array having an on-resistance and comprising a plurality of switches, wherein each switch is arranged to be in one of a plurality of configuration states, the configuration states comprising an enabled configuration and a disabled configuration, wherein: a) each switch is arranged to operate in one of a plurality of switch states when in the enabled configuration, the switch states comprising an on state and an off state, such that the plurality of switch states can be switched between when a switch is in the enabled configuration; and b) each switch is held in the off state when in the disabled configuration, such that the switch cannot be arranged to operate in the on state when in the disabled configuration; and a memory element coupled to the control circuit and arranged to store configuration data for setting the configuration state of each of the switches, the method comprising: passing a reference current through the switching array; measuring the on-resistance of the switching array; adjusting the number of switches in the on state until a target on-resistance is measured; and storing calibration data relating to the switches in the on state as at least part of the configuration data when the target on-resistance is measured.

25. The method of claim 24, comprising: for a range of gate / source voltages of the switching array, repeating: a) passing a reference current through the switching array; b) measuring the on-resistance of the switching array; and c) adjusting the number of switches in the on state until a target on-resistance is measured; and for each of the gate / source voltages, storing calibration data relating to the switches in the on state as different configuration values.

26. The method of claim 24, comprising: for a range of temperatures of the switching array, repeating: a) passing a reference current through the switching array; b) measuring the on-resistance of the switching array; and c) adjusting the number of switches in the on state until a target on-resistance is measured; and for each of the temperatures, storing calibration data relating to the switches in the on state as different configuration values.

27. A method of providing a switching array having an on-resistance, the switching array comprising a plurality of switches, wherein, each switch is arranged to be in one of a plurality of configuration states, the configuration states comprising an enabled configuration and a disabled configuration, wherein: a) each switch is arranged to operate in one of a plurality of switch states when in the enabled configuration, the switch states comprising an on state and an off state, such that the plurality of switch states can be switched between when a switch is in the enabled configuration; and b) each switch is held in the off state when in the disabled configuration, such that the switch cannot be arranged to operate in the on state when in the disabled configuration; wherein: the on-resistance of the switching array depends on the switch states of the switches and their respective on-resistances, the method comprising: using a memory element coupled to the control circuit, storing configuration data for setting the configuration state of each of the switches; receiving, at the control circuit, a configuration signal from the memory element, the configuration signal depending on the configuration data; and setting, using the control circuit, the configuration state of each of the switches, the configuration state being based on the configuration signal.

28. A switching circuit for providing a switching array with an on-resistance, the switching circuit comprising: the switching array comprising a plurality of switches, wherein each switch is arranged to be in one of a plurality of configuration states, the configuration states comprising an enabled configuration and a disabled configuration, wherein: a) each switch is arranged to operate in one of a plurality of switch states when in the enabled configuration, the switch states comprising an on state and an off state, such that the switch can be switched between the plurality of switch states when in the enabled configuration; and b) each switch is held in the off state when in the disabled configuration, such that the switch cannot be arranged to operate in the on state when in the disabled configuration; a control circuit configured to set a control voltage of at least one of the switches; and a memory element coupled to the control circuit and configured to store control voltage data, the control voltage data comprising a plurality of control voltage values for setting the control voltage of at least one of the switches; wherein: the control circuit is configured to set the control voltage of at least one of the switches based on a control voltage signal received from the memory element, the control voltage signal depending on the control voltage data; and the on-resistance of the switching array depends on the switch states of the switches and their respective on-resistances.

29. The switching circuit of claim 28, wherein: each switch comprises a MOSFET; the control voltage is a gate voltage; the control voltage data is gate voltage data; the control voltage values are gate voltage values; and the control voltage signal is a gate voltage signal; the switching circuit comprising: a voltage detector configured to measure a drain voltage or a source voltage of a parallel combination of the MOSFETs and to provide a signal indicative of the measured drain voltage or source voltage as an input to the memory element for selecting a gate voltage value; wherein: the control circuit is configured to set the gate voltage of at least one of the MOSFETs based on a gate voltage signal received from the memory element, the gate voltage signal depending on the selected gate voltage value. each switch is arranged to be in one of a plurality of configuration states, the configuration states comprising an enabled configuration and a disabled configuration, wherein:

30. A method of providing a switching circuit for providing a switching array having an on-resistance, the switching array comprising a plurality of switches, wherein, a) each switch is arranged to operate in one of a plurality of switch states when in the enabled configuration, the switch states comprising an on state and an off state, such that the switch can be switched between the plurality of switch states when in the enabled configuration; and b) each switch is held in the off state when in the disabled configuration, such that the switch cannot be arranged to operate in the on state when in the disabled configuration; b) each switch is held in the off state when in the disabled configuration, such that it cannot be arranged to operate in the on state when the switch is in the disabled configuration; The method comprises: storing control voltage data using a memory element, the control voltage data comprising a plurality of control voltage values for setting a control voltage of at least one of the switches; setting the control voltage of at least one of the switches using a control circuit based on a control voltage signal received at the control circuit from the memory element, the control voltage signal being dependent on the control voltage data; wherein: the on resistance of the array of switches is dependent on the switching state of the switches and their respective on resistances.

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