A wide-frequency detection circuit and its frequency tracking method

Abstract

The present invention provides a wide-frequency detection circuit and a frequency tracking method thereof. The circuit includes a wide-frequency signal source, a high-frequency filtering circuit, a voltage conversion circuit, a comparison circuit, and a programmable processor. The wide-frequency signal source is used to input an AC voltage signal and apply it to the input side of the high-frequency filtering circuit. The high-frequency filtering circuit is used to filter the high-frequency interference of the AC voltage signal and output it to the voltage conversion circuit through its output side. The voltage conversion circuit outputs a low-voltage signal to the comparison circuit and the programmable processor. The comparison circuit compares the input low-voltage signal and generates a comparison pulse signal. The comparison circuit outputs the comparison pulse signal to the programmable processor to control the operation of the internal timer of the programmable processor. The method of the present invention uses the above circuit to track the signal frequency. The present invention can monitor the power grid frequency online in real time and perform target tracking feedback control with the power grid frequency as the reference benchmark.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and particularly to a wide-frequency detection circuit and a frequency tracking method applied to the circuit. Background Art

[0002] Due to the uncertainty of the load connected to the power grid and the access of a large number of distributed energy sources, the power grid frequency will fluctuate, which poses a great challenge to power electronic devices that rely on the power grid frequency for control. Therefore, a technology that adapts to a wide voltage frequency is particularly important for the use of power electronic devices.

[0003] In the prior art, such as a zero-crossing detection circuit with a patent application number of CN201821470201, it mainly includes a sampling circuit and an amplification circuit. A sampling circuit that samples the power supply voltage to obtain a zero-crossing signal with the same frequency as the power supply; an amplification circuit with its input end connected to the sampling circuit and its output end connected to the zero-crossing detection port of the control system, which amplifies the sampled zero-crossing signal with the same frequency as the power supply to make it closer to the zero-crossing point.

[0004] The above solution seriously depends on the accuracy of the sampling circuit first, and secondly, the switching voltage drop of the amplification circuit causes the detection of the zero-crossing point signal to shift.

[0005] In the prior art, such as a PI variable frequency control method for a large-capacity isolated DC converter with a patent application number of CN201310367377, the entire controller has 3 gears, corresponding to 3 groups of PI control parameters. Through continuous voltage judgment, cumulative timing, up / down gear judgment, and parameter output, the whole process loops continuously. However, this variable frequency is that the controller actively changes the control frequency, not because of the change of the power grid frequency. If the power grid frequency changes, it cannot achieve the purpose of fast tracking control.

[0006] The standard of GB / T15945 "Power Quality - Permissible Deviation of Power System Frequency" stipulates that: "The normal power grid frequency in China is 50Hz. For power grids with a capacity of 3 million kilowatts or more, the deviation does not exceed ±0.2Hz; for power grids with a capacity of less than 3 million kilowatts, the deviation does not exceed ±0.5Hz." From the currently developed and formed 6 cross-provincial regional power grids in Northeast China, North China, East China, Central China, Northwest China and the four provinces in the south and 6 independent provincial power grids in Shandong, Sichuan-Chongqing, Fujian, Hainan, Urumqi and Lhasa, except that the frequencies of the 3 independent provincial power grids in Hainan, Urumqi and Lhasa are qualified within the range of 49.5 - 50.5Hz, the frequencies of all other power grids must be within the range of 49.8 - 50.2Hz to be qualified.

[0007] Due to the complex and variable power consumption scenarios of power electronic devices, the grid frequency to which the power electronic devices are connected is not fixed at 50 Hz. It is usually affected by factors such as transformer capacity, electrical equipment, and power supply. In some severe cases, the operating frequency range of power electronic devices is increased to 45 - 65 Hz. For the same device to adapt to a wide frequency range, it poses a severe challenge to the controller and modulator. Usually, the parameters at a certain frequency need to be corrected when switching to another frequency for use. Especially when the frequency switches from 45 Hz to 65 Hz, the frequency change rate reaches 44.4%. It is very difficult to have a set of coefficients that can satisfy the control stability at various frequencies. Summary of the Invention

[0008] The main object of the present invention is to provide a wide - frequency detection circuit that can detect the signal frequency online in real - time and perform control.

[0009] Another object of the present invention is to provide a frequency tracking method for a wide - frequency detection circuit that can monitor the grid frequency online and perform target tracking feedback control with the grid frequency as a reference benchmark.

[0010] To achieve the above - mentioned main object, a wide - frequency detection circuit provided by the present invention includes a wide - frequency signal source, a high - frequency filtering circuit, a voltage conversion circuit, a comparison circuit, and a programmable processor. The wide - frequency signal source is used to input an AC voltage signal containing a zero - crossing signal of the same frequency as the power supply voltage and apply it to the input side of the high - frequency filtering circuit. The high - frequency filtering circuit is used to filter out the high - frequency interference of the AC voltage signal and output it to the voltage conversion circuit through its output side. The voltage conversion circuit outputs a low - voltage signal to the comparison circuit and the programmable processor. The comparison circuit compares the input low - voltage signal and generates a comparison pulse signal, and the comparison circuit outputs the comparison pulse signal to the programmable processor to control the operation of the internal timer of the programmable processor.

[0011] In a further embodiment, the wide - frequency signal source includes a power grid and the equivalent impedance of a power transformer connected to the power grid.

[0012] In a still further embodiment, a transformer is connected between the high - frequency filtering circuit and the voltage conversion circuit.

[0013] In a further solution, the high-frequency filtering circuit includes a first inductor, a second inductor, a first capacitor, and a converter. The first end of the second inductor is connected in series with the second terminal of the primary side of the transformer and then connected to the signal output terminal of the wide-frequency signal source. The first end of the first capacitor is connected in series with the first terminal of the primary side of the transformer and then grounded. The second end of the first capacitor is connected between the second end of the second inductor and the first end of the first inductor. The second end of the first inductor is connected to one side of the converter, and the other side of the converter is connected to the programmable processor.

[0014] In a further solution, the voltage conversion circuit includes a first comparator and a second comparator. The first terminal of the secondary side of the transformer is connected to the inverting input terminal of the first comparator. The second terminal of the secondary side of the transformer is connected to the non-inverting input terminal of the first comparator. The output terminal of the first comparator is connected to the non-inverting input terminal of the second comparator. The output terminal of the second comparator is connected to the input terminal of the comparison circuit.

[0015] In a further solution, the comparison circuit includes a third comparator. The non-inverting input terminal of the third comparator is connected to the output terminal of the second comparator. The output terminal of the third comparator is connected to the programmable processor.

[0016] Thus, it can be seen that the present invention mainly includes circuit modules such as a wide-frequency signal source, a high-frequency filtering circuit, a voltage conversion circuit, a comparison circuit, and a programmable processor (chip), which can achieve a full-automatic closed loop, reduce the influence of component errors on the results, and the implementation method is relatively simple. With only a set of control parameters, it can adapt to the wide-frequency voltage fluctuation of 45Hz - 65Hz and theoretically can reach 1 - ∞Hz.

[0017] Therefore, the present invention can enable power electronic devices to avoid the problems of inconsistent control parameters at different frequencies and limited application ranges. When the precision of analog comparators and timers is high enough, the present invention theoretically supports the frequency range applicable to the device to be 1 - ∞Hz.

[0018] To achieve the above-mentioned another object, the present invention provides a frequency tracking method for a wide-frequency detection circuit. The wide-frequency detection circuit adopts the above-mentioned wide-frequency detection circuit. The frequency tracking method includes the following steps: The wide-frequency detection circuit monitors the grid voltage signal input from the grid in real time, and inputs it to the programmable processor through the comparison circuit to trigger a specified pin, so as to trigger the built-in timer Timer of the programmable processor to perform capture timing. When the zero-crossing point of the grid voltage signal is detected, an output trigger signal triggers the reset of the timer Timer and starts timing again, and saves the current value in the register T cnt, calculate the frequency F of the input grid signal in , by continuously updating the frequency F in , the frequency F of the input grid signal can be in tracked for frequency changes.

[0019] A further solution is that when a frequency F is output in each cycle in , in the next cycle, the theoretical value of the current cycle frequency F in and the iterative value of the frequency F of the previous cycle in are used to continuously correct the frequency F in for precise tracking of the frequency change of the input grid signal frequency F in .

[0020] An even further solution is that, where F in = F adc_clk / N samp ; F adc_clk = N adc * F sys_clk ; F sys_clk = pll sys * F cry_clk .

[0021] It can be seen that the present invention only needs to add a wide - frequency detection circuit to achieve full - automatic closed - loop, and the implementation method is relatively simple. When only one set of control parameters is required for power electronic equipment, it can adapt to the wide - frequency voltage fluctuation of 45Hz - 65Hz, and theoretically can reach 1 - ∞Hz.

[0022] Therefore, the present invention can enable power electronic equipment to avoid the problems of inconsistent control parameters at different frequencies and limited application range. When the accuracy of the analog comparator and timer is high enough, the present invention theoretically supports the frequency range applicable to the equipment to be 1 - ∞Hz, can fundamentally solve the influence brought by frequency fluctuation, and the whole system only needs to use one set of control parameters, and periodic update makes the equipment meet the use under wide frequencies. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 is the circuit schematic diagram of an embodiment of a wide - frequency detection circuit of the present invention.

[0024] Figure 2 is the circuit schematic diagram of the comparison circuit in an embodiment of a wide - frequency detection circuit of the present invention.

[0025] Figure 3 is the schematic diagram of the ZCD comparator in an embodiment of a wide - frequency detection circuit of the present invention.

[0026] Figure 4It is a schematic diagram of multiple zero-crossing detections in an embodiment of a wide-frequency detection circuit of the present invention.

[0027] Figure 5 It is a schematic diagram of the principle in an embodiment of the frequency tracking method of a wide-frequency detection circuit of the present invention.

[0028] Figure 6 It is a schematic diagram of the principle that the input signal, ZCD comparator, timer, and PLL frequency divider are connected in sequence in an embodiment of the frequency tracking method of a wide-frequency detection circuit of the present invention.

[0029] Figure 7 It is a schematic diagram of the simplified process from the grid voltage signal to frequency extraction in an embodiment of the frequency tracking method of a wide-frequency detection circuit of the present invention.

[0030] Figure 8 It is a schematic diagram of the input signal Vin in an embodiment of the frequency tracking method of a wide-frequency detection circuit of the present invention.

[0031] The present invention will be further described below in conjunction with the accompanying drawings and embodiments. Specific embodiments

[0032] An embodiment of a wide-frequency detection circuit:

[0033] The present invention is applicable to power electronic devices that need to adapt to a wide frequency range, online monitor the grid frequency, and can perform target tracking feedback control with the grid frequency as the reference benchmark.

[0034] See Figure 1 , the wide-frequency detection circuit of the present invention includes a wide-frequency signal source 10, a high-frequency filtering circuit 20, a voltage conversion circuit 30, a comparison circuit 40, and a programmable processor 50. The wide-frequency signal source 10 is used to input an AC voltage signal containing a zero-crossing signal of the same frequency as the power supply voltage and apply it to the input side of the high-frequency filtering circuit 20. The high-frequency filtering circuit 20 is used to filter the high-frequency interference of the AC voltage signal and output it to the voltage conversion circuit 30 through its output side. The voltage conversion circuit 30 outputs a low-voltage signal to the comparison circuit 40 and the programmable processor 50. The comparison circuit 40 compares the input low-voltage signal and generates a comparison pulse signal. The comparison circuit 40 outputs the comparison pulse signal to the programmable processor 50 to control the operation of the internal timer of the programmable processor 50.

[0035] In this embodiment, the wide-frequency signal source 10 includes the equivalent impedances of a load 1, a load 2, a load 3, a power grid, and a power transformer T1 connected to the power grid. The grid voltage signal is input from the power grid to the power transformer T1 and output to the input side of the high-frequency filtering circuit 20 through the equivalent impedance of the power transformer T1.

[0036] Among them, a transformer T2 is connected between the high-frequency filter circuit 20 and the voltage conversion circuit 30.

[0037] In this embodiment, the high-frequency filter circuit 20 includes a first inductor L1, a second inductor L2, a first capacitor C1, and a converter 21. The first end of the second inductor L2 is connected in series with the second terminal of the primary side of the transformer T2 and then connected to the signal output terminal of the wide-frequency signal source 10. The first end of the first capacitor C1 is connected in series with the first terminal of the primary side of the transformer T2 and then grounded. The second end of the first capacitor C1 is connected between the second end of the second inductor L2 and the first end of the first inductor L1. The second end of the first inductor L1 is connected to one side of the converter 21, and the other side of the converter 21 is connected to the programmable processor 50.

[0038] In this embodiment, the voltage conversion circuit 30 includes a first comparator U1 and a second comparator U2. The first terminal of the secondary side of the transformer T2 is connected to the inverting input terminal of the first comparator U1. The second terminal of the secondary side of the transformer T2 is connected to the non-inverting input terminal of the first comparator U1. The output terminal of the first comparator U1 is connected to the non-inverting input terminal of the second comparator U2. The output terminal of the second comparator U2 is connected to the input terminal of the comparison circuit 40.

[0039] In this embodiment, the comparison circuit 40 includes a third comparator U3. The non-inverting input terminal of the third comparator U3 is connected to the output terminal of the second comparator U2. The output terminal of the third comparator U3 is connected to the programmable processor 50.

[0040] Preferably, the programmable processor 50 can be a TXF6200 chip. Among them, the TXF6200 chip has a PLL fractional division coefficient, and the input AC signal frequency can be accurately tracked by modifying the division coefficient.

[0041] In practical applications, the wide-frequency signal source 10 is responsible for providing electrical energy (V, I); the voltage conversion circuit 30 is responsible for converting the high-voltage signal into a low-voltage signal for signal acquisition by the comparison circuit 40 and the programmable processor 50; the comparison circuit 40 is responsible for comparing the input signal, generating a comparison pulse, and inputting it to the programmable processor 50 Timer to trigger a specified pin (such as GPIOD4\GPIOD5) to trigger the internal timer of the chip for capture timing.

[0042] As Figure 2 and Figure 3 shown, the comparison circuit 40 of this embodiment is equivalent to a ZCD comparator, which has a hysteresis effect.

[0043] Specifically, the hysteresis of the ZCD comparator causes a deviation in the judgment of the comparison value (the zero value in this embodiment) (taking U H 、U LWhen it is regarded as 0), this is an inevitable phenomenon. Currently, there are methods to make the zero-crossing detection more accurate by reducing hysteresis, but it is easy to introduce interference and increase the system cost. Therefore, in this embodiment, the built-in timer Timer and data processing ability of the programmable processor 50 are introduced here to capture, time, and filter the signal multiple times, reduce interference, and extract a more accurate zero-crossing signal. Because in most cases, the frequency fluctuation speed of the system is very slow, and the fastest is at the millisecond level. The fast processing ability of the programmable processor 50 reaches more than 80 MHz, and it takes at most only microseconds to process a deviation calibration data. The speed difference of 1000 times between the two shows that it is a very advisable method to correct the zero-point data through the programmable processor 50 and can be widely applied in the actual product design. As Figure 4 shown, there will be a deviation in single zero-crossing detection, but after multiple accumulations, the deviation can be greatly corrected and approach the accurate value.

[0044] It can be seen that the present invention mainly includes circuit modules such as a wide-frequency signal source 10, a high-frequency filter circuit 20, a voltage conversion circuit 30, a comparison circuit 40, and a programmable processor 50 (chip), which can achieve a full-automatic closed loop, reduce the influence of component errors on the results, and the implementation method is relatively simple. With only one set of control parameters, it can adapt to the wide-frequency voltage fluctuation of 45 Hz - 65 Hz and theoretically can reach 1 - ∞ Hz.

[0045] Therefore, the present invention can enable power electronic devices to avoid the problems of inconsistent control parameters at different frequencies and limited application ranges. In the case where the accuracy of the analog comparator and timer is high enough, the present invention theoretically supports the frequency range applicable to the device to be 1 - ∞ Hz.

[0046] An embodiment of the frequency tracking method of a wide-frequency detection circuit:

[0047] A frequency tracking method of a wide-frequency detection circuit is applied to the above wide-frequency detection circuit. Refer to Figure 5 , the method of the present invention includes real-time monitoring of the grid voltage signal input by the grid through the wide-frequency detection circuit and inputting it to the programmable processor 50 through the comparison circuit 40 to trigger a specified pin (such as GPIOD4\GPIOD5), so as to trigger the built-in timer Timer of the programmable processor 50 to perform capture timing. When the zero-crossing point of the grid voltage signal is detected, the trigger signal is output to trigger the reset of the timer Timer and start timing again, and the current value is saved in the register T cnt , calculate the frequency F of the input grid signal in , by continuously updating the frequency F in , the frequency F of the input grid signal can be inTrack the frequency change. Among them, the frequency F of the input grid signal in It can be seen from Equation (1):

[0048] F in = 1 / (2*T cnt ) (1)

[0049] Furthermore, when outputting a frequency F in each cycle in , in the next cycle, use the theoretical value of the current cycle frequency F in and the iterative value of the previous cycle frequency F in to continuously correct the frequency F in in order to accurately track the frequency change of the input grid signal frequency F in and make the result more accurate.

[0050] Among them, tracking the frequency change of the input grid signal frequency Fin is obtained by the following formula:

[0051] F in = F adc_clk / N samp (2)

[0052] F adc_clk = N adc *F sys_clk (3)

[0053] F sys_clk = pll sys *F cry_clk (4)

[0054] Among them, F in is the frequency of the input signal grid, F adc_clk is the adc sampling frequency built in the programmable processor, N samp is the number of points for cycle discretization of the input signal in the programmable processor (such as the TXF6200 chip), N adc is the frequency division coefficient of the adc clock (relative to the system sys clock), pll sys is the frequency division coefficient of the system clock (relative to the crystal oscillator clock), F cry_clk is the crystal oscillator frequency of the programmable processor.

[0055] It can be seen that in order to ensure the consistency and stability of the entire control system, it is necessary to first ensure that N samp remains unchanged (N samp remains unchanged, the number of discretization points in a single cycle remains unchanged, the system parameters of the controller remain unchanged, and the stability remains unchanged).

[0056] After arranging the formula, Equation (5) is obtained:

[0057]

[0058] In formula (5), if is a decimal number, that is is a decimal number. To ensure the consistency of the control system, then After simplification, we get: It can be achieved by updating or to directly modify for two reasons: 1) In the parameters of many chips, N adc is an integer; 2) If the entire system also needs to consider other modules involving clk,

[0059] Of course, in practice, most achieve the purpose of frequency tracking by modifying the pll sys (but it does not exclude achieving the same purpose through N adc ).

[0060] Among them, the TXF6200 chip has a fractional division coefficient of the PLL. By modifying the division coefficient, the frequency of the input AC signal can be accurately tracked, and practical verification shows that it is also feasible.

[0061] Specifically, refer to Figures 6 to 8 . This method mainly involves an input signal, a ZCD comparator, a timer, and a PLL frequency divider. Among them, the ZCD comparator can be the comparison circuit 40 of the wide-frequency detection circuit, and the timer and the PLL frequency divider can be the programmable processor 50 (TXF6200 chip) of the wide-frequency detection circuit. The present invention can fundamentally solve the influence brought by frequency fluctuations. The entire system only needs to use a set of control parameters and update the pll sys periodically to make the device meet the requirements for use at wide frequencies. As Figure 7 shown, Figure 7 is a schematic diagram of the simplified process from the grid voltage signal to frequency extraction.

[0062] In practical applications, if the input signal Vin (voltage signal) is as Figure 8 shown:

[0063] By performing zero-crossing detection on the input signal Vin, when a zero-crossing point is detected, a Trig trigger signal is generated to trigger the timer Timer to save the current value T cnt , and at the same time, it is set and the timing is restarted.

[0064] According to theoretical analysis, modifying

[0065] It can be seen that the present invention only needs to add a wide-frequency detection circuit to achieve full-automatic closed-loop, and the implementation method is relatively simple. When only one set of control parameters is required for power electronic devices, it can adapt to the wide-frequency voltage fluctuation of 45Hz - 65Hz, and theoretically can reach 1 - ∞Hz.

[0066] Therefore, the present invention can enable power electronic devices to avoid the problems of inconsistent control parameters at different frequencies and limited application ranges. When the precision of analog comparators and timers is high enough, the present invention theoretically supports a frequency range of 1 - ∞Hz for the applicable devices, which can fundamentally solve the influence brought by frequency fluctuations. The entire system only needs to use one set of control parameters, and periodic updates can make the device meet the requirements for use at wide frequencies.

[0067] It should be noted that the above are only the preferred embodiments of the present invention, but the design concept of the invention is not limited thereto. Any non-substantive modifications made to the present invention using this concept also fall within the protection scope of the present invention.

Claims

1. A frequency tracking method for a wide-frequency detection circuit, characterized in that, The wide-frequency detection circuit includes: a wide-frequency signal source, a high-frequency filtering circuit, a voltage conversion circuit, a comparison circuit, and a programmable processor. The wide-frequency signal source is used to input an AC voltage signal containing a zero-crossing signal of the same frequency as the power supply voltage and apply it to the input side of the high-frequency filtering circuit. The high-frequency filtering circuit is used to filter out the high-frequency interference of the AC voltage signal and output it to the voltage conversion circuit through its output side. The voltage conversion circuit outputs a low-voltage signal to the comparison circuit and the programmable processor. The comparison circuit compares the input low-voltage signal and generates a comparison pulse signal. The comparison circuit outputs the comparison pulse signal to the programmable processor to control the operation of the internal timer of the programmable processor; The frequency tracking method includes the following steps: The grid voltage signal input from the power grid is monitored in real time by a wide-frequency detection circuit, and is input to a specified pin of a programmable processor through a comparison circuit to trigger the built-in timer Timer of the programmable processor to perform capture timing. When the zero-crossing point of the grid voltage signal is detected, a trigger signal is output to trigger the reset of the timer Timer and start timing again, and the current value is saved in register T cnt , and the frequency F of the input grid signal is calculated in , by continuously updating the frequency F in , the frequency F of the input grid signal can be in tracked for frequency changes; Output a frequency F in each cycle in In the next cycle, use the theoretical value of the current cycle frequency F in And the iterative value of the previous cycle frequency F in To continuously correct the frequency F in So as to accurately track the frequency change of the input power grid signal in For the frequency F; Tracking the frequency change of the input power grid signal Fin is obtained by the following formula: F in = F adc_clk / N samp ; F adc_clk = N adc * F sys_clk ; F sys_clk = pll sys * F cry_clk ; Among them, F in is the frequency of the input signal power grid, F adc_clk is the adc sampling frequency built into the programmable processor, N samp is the number of points for periodic discretization of the input signal in the programmable processor, N adc is the division factor of the adc clock, pll sys is the division factor of the system clock, F cry_clk is the crystal oscillator frequency of the programmable processor, F sys_clk is the frequency of the system clock.

2. According to the method described in claim 1, wherein: The wide-frequency signal source includes an electric power grid and an equivalent impedance of a power transformer connected to the electric power grid.

3. According to the method described in claim 1, wherein: A transformer is connected between the high-frequency filtering circuit and the voltage conversion circuit.

4. According to the method described in claim 3, wherein: The high-frequency filtering circuit includes a first inductor, a second inductor, a first capacitor, and a converter. The first end of the second inductor is connected in series with the second wiring terminal of the primary side of the transformer and then connected to the signal output terminal of the wide-frequency signal source. The first end of the first capacitor is connected in series with the first wiring terminal of the primary side of the transformer and then grounded. The second end of the first capacitor is connected between the second end of the second inductor and the first end of the first inductor. The second end of the first inductor is connected to one side of the converter, and the other side of the converter is connected to the programmable processor.

5. According to the method described in claim 4, wherein: The voltage conversion circuit includes a first comparator and a second comparator. The first wiring terminal of the secondary side of the transformer is connected to the inverting input terminal of the first comparator. The second wiring terminal of the secondary side of the transformer is connected to the non-inverting input terminal of the first comparator. The output terminal of the first comparator is connected to the non-inverting input terminal of the second comparator. The output terminal of the second comparator is connected to the input terminal of the comparison circuit.

6. According to the method described in claim 5, wherein: The comparison circuit includes a third comparator. The non-inverting input terminal of the third comparator is connected to the output terminal of the second comparator. The output terminal of the third comparator is connected to the programmable processor.

Images