A battery pack output control circuit and a method of operating the same

By using a series low-on-resistance, low-voltage MOSFET and a high-voltage MOSFET, along with a parallel capacitor for voltage equalization, the problem of fast switching and low loss in battery pack output control under high voltage and high current is solved, achieving low-cost, long-life, and small-size battery pack output control.

CN111799864BActive Publication Date: 2025-12-30FUJIAN SCUD POWER TECH CO LTD
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Patent Information

Application Number
CN202010692258.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-07-17
Publication Date
2025-12-30
Estimated Expiration
2040-07-17

AI Technical Summary

Technical Problem

Existing low-voltage MOSFETs cannot be effectively controlled in high-voltage, high-current applications, leading to problems such as high heat generation or short lifespan.

Method used

By combining low on-resistance, low-voltage MOSFETs with high-voltage on-resistance MOSFETs, and through series and parallel connections, combined with capacitor voltage equalization design, fast switching and low loss are achieved.

Benefits of technology

It achieves fast switching and low-loss battery pack output control under high voltage, reduces drive current and cost, extends service life, and reduces heat generation.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a battery pack output control circuit and a working method thereof. The output control circuit comprises a low-impedance field effect tube driving circuit and a high-impedance field effect tube driving circuit, the low-impedance field effect tube driving circuits are sequentially connected, and the low-impedance field effect tube driving circuit is connected with a battery pack, a step-down power supply circuit and the high-impedance field effect tube driving circuit. The application has the characteristics of low driving current, high driving speed, lower cost, longer service life and smaller size.
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Description

Technical Field

[0001] This invention relates to the field of power supply applications, specifically a battery pack output control circuit and its operating method. Background Technology

[0002] Currently available low-voltage MOSFETs have extremely low on-resistance, even as low as 1mΩ, resulting in very low heat generation under high current conditions. However, these low-voltage MOSFETs also have low voltage ratings. When used for output switching control in battery packs, they are generally only suitable for low-voltage applications below 60V. When the voltage reaches 300V or higher and the current exceeds 50A, the existing low-voltage, low-on-resistance MOSFETs cannot be used due to insufficient voltage rating. In such cases, IGBTs, transistors, or relays must be selected for control. However, IGBTs and transistors generate high temperatures due to the high voltage drop during conduction, such as generating 150W of heat at 50A current. Relays are expensive, have slow operating speeds, are mechanical contacts, are susceptible to high-voltage arcing and wear, have short lifespans, require large drive currents, have high static power consumption, and are bulky, thus limiting their practical applications. Summary of the Invention

[0003] The purpose of this invention is to provide a battery pack output control circuit and its operating method to solve the problems in the prior art. The control circuit can withstand high voltage in the off state and has an impedance of less than 10 milliohms in the on state. It has microsecond-level fast turn-on and turn-off speeds, and the power loss and temperature rise during conduction are only a few W to tens of W. Moreover, it has the characteristics of low drive current, high drive speed, low cost, long life and small size.

[0004] To achieve the above objectives, the present invention provides the following technical solution:

[0005] A battery pack output control circuit includes a low-impedance field-effect transistor (FET) driving circuit and a field-effect transistor (FET) driving circuit with high on-resistance. The low-impedance FET driving circuits are connected in sequence and are connected to the battery pack, a step-down power supply circuit, and the FET driving circuit with high on-resistance.

[0006] The driving circuit for a low-impedance field-effect transistor (FET) includes resistors R1, R2, and R3, capacitor C1, diodes D1, D2, and D3, transistor V1, and FET V2. Resistor R1 is a current-limiting resistor for driving; diode D1 is a diode to prevent reverse current flow; diode D3 ensures that transistor V1 is in the off-state when driving FET V2; resistor R3 discharges the gate charge of FET V2 and keeps the base of transistor V1 in the off-state when the input driving circuit is low. The transistor V1 generates current at the gate; when the input drive circuit is low, transistor V1 can quickly discharge the charge at the gate of MOSFET V2, thus turning off MOSFET V2; MOSFET V2 is a low on-resistance MOSFET that can withstand a large current when it is turned on; resistor R2 is the gate current limiting resistor of MOSFET V2; capacitor C1 buffers the voltage change of the MOSFET V2's drain and source terminals; Zener diode D2 is used to ensure that the drive voltage of MOSFET V2 is less than 20V to prevent breakdown of the MOSFET V2's gate and source terminals.

[0007] Furthermore, the driving circuit for the low-impedance field-effect transistor includes resistors R1, R2, and R3, capacitor C1, diodes D1, D2, and D3, transistor V1, and field-effect transistor V2. One end of resistor R1 is connected to the input driving voltage, and the other end of R1 is connected to the anode of diode D1. The cathode of diode D1 is connected to the anode of diode D3, one end of resistor R3, and the base of transistor V1. The cathode of diode D3 is connected to the emitter of transistor V1, the cathode of diode D2, and one end of resistor R2. The other end of resistor R2 is connected to the gate (G) of field-effect transistor V2. The drain (D) of field-effect transistor V2 is connected to one end of capacitor C1 and the corresponding negative output terminal of the driving circuit. The source (S) of field-effect transistor V2 is connected to the anode of diode D2, the collector of transistor V1, one end of resistor R3, and the corresponding negative power supply terminal of the driving circuit.

[0008] Furthermore, the input drives of the driving circuit of the low impedance field-effect transistor are all connected together, and the negative power supply terminal and the negative output terminal of the driving circuit of the low impedance field-effect transistor are connected in series.

[0009] The negative terminal of the power supply of the first low-impedance MOSFET driver circuit is connected to the negative terminal of the battery, and the negative terminal of the output of the last low-impedance MOSFET driver circuit is connected to the negative terminal of the total output.

[0010] Furthermore, the high on-resistance MOSFET driving circuit includes resistors R4 and R5, diodes D4 and D5, and a high-voltage but high-on-resistance MOSFET V3. The input driving voltage is connected to the positive terminal of diode D4, the negative terminal of diode D4 is connected to one end of resistor R4, and the other end of resistor R4 is connected to the gate (G) terminal of MOSFET V3, the negative terminal of diode D5, and one end of resistor R5. The source (S) terminal of MOSFET V3 is connected to the positive terminal of diode D3, the other end of resistor R5, and the negative terminal of the battery. The drain (D) terminal of MOSFET V3 is connected to the negative terminal of the total output.

[0011] Furthermore, the field-effect transistor V3 is an IGBT transistor.

[0012] Furthermore, a Zener diode is used in each MOSFET driver circuit.

[0013] Furthermore, the control circuit is moved from the negative terminal to the positive terminal.

[0014] A control method for a battery pack output control circuit, the control method comprising the following steps:

[0015] Step 1: When the external drive level signal is a high level signal, the high level signal will be applied to the gate of the field-effect transistor V3 through diode D4 and resistor R4, making the field-effect transistor V3 conduct.

[0016] Step 2: The high-level signal from Step 1 will be applied to the gate of the field-effect transistor V2A through resistor R1A, diodes D1A and D3A, and resistor R2A, turning on the field-effect transistor V2A.

[0017] Step 3: As can be seen from Step 1 and Step 2, a high-level signal will turn on MOSFETs V2B, V2C, and V2D respectively;

[0018] Step 4: Since the resistance value of resistor R4 is less than the resistance value from resistor R1A to resistor R1D, the high-level drive signal will turn on MOSFET V3 faster than it will turn on MOSFETs V2B, V2C, and V2D. This will cause MOSFET V3 to turn on first, followed by MOSFETs V2B, V2C, and V2D.

[0019] Step 5: According to step 4, when the field-effect transistor V3 is turned on first, the load current will flow through the field-effect transistor V3. Since the field-effect transistor V3 is a high-voltage field-effect transistor with a large on-resistance, and the on-resistance is relatively large, the power carried by V3 will be large at this time.

[0020] Step 6: When the high-level signal of the external drive is lost, the charge on the gate of the field-effect transistor V3 will be discharged through the resistor R5, making the voltage between the gate and the source of the field-effect transistor V3 become 0V, thus turning V3 into the off state.

[0021] Step 7: The charges at the gates of MOSFETs V2B, V2C, and V2D will be discharged through resistor R2, transistor V1, and resistor R3 in each driving circuit, respectively. When the currents at the gates of MOSFETs V2B, V2C, and V2D pass through the base of transistor V1, they will cause the emitter and collector of transistor V1 to conduct, accelerating the discharge of charges on the gate of MOSFET V2. This will quickly reduce the voltage between the gate and source of MOSFET V2 and approach 0V.

[0022] Step 8: Since MOSFETs V2A, V2B, V2C, and V2D can accelerate the turn-off of the circuit, their turn-off speed will be faster than that of MOSFET V3. Therefore, when the output circuit is turned off, MOSFETs V2A, V2B, V2C, and V2D will turn off first. Since MOSFET V3 is still in the conducting state when it is turned off, the voltage across MOSFETs V2A, V2B, V2C, and V2D connected in series is low.

[0023] Step 9: As MOSFET V3 is turned off, the voltage across MOSFETs V2A, V2B, V2C, and V2D connected in series will increase to reach the total power supply voltage.

[0024] Step 10: Since capacitors C1A, C1B, C1C, and C1D are all capacitors with the same capacitance value, and MOSFETs V2A, V2B, V2C, and V2D are turned off simultaneously, when the final output circuit is completely turned off, the voltage across MOSFETs V2A, V2B, V2C, and V2D will be shared equally, all between 70V and 90V, below 100V, which is less than the voltage that MOSFETs with low on-resistance and low withstand voltage can withstand.

[0025] Beneficial effects:

[0026] 1. The control circuit of this invention uses low on-resistance and low voltage withstand field-effect transistors connected in series, and then connected in parallel with high voltage withstand field-effect transistors to achieve circuit control.

[0027] 2. The low on-resistance, low-voltage field-effect transistor of this invention has a slower turn-on drive speed than the high-voltage on-resistance field-effect transistor; the low on-resistance, low-voltage field-effect transistor has a faster turn-off drive speed than the high-voltage on-resistance field-effect transistor; this allows the low-voltage field-effect transistors, when connected in series, to withstand high voltage when the circuit is off, and to have very low on-resistance when the circuit is on.

[0028] 3. In this invention, the low on-resistance and low withstand voltage field-effect transistors are connected in series with capacitors of the same capacitance value to equalize the voltage, so that the withstand voltage of each field-effect transistor will not differ significantly. Attached Figure Description

[0029] Figure 1 This is a diagram of the driving circuit for the low-impedance field-effect transistor of the present invention.

[0030] Figure 2 This is a circuit diagram showing the output control circuit of multiple low-impedance field-effect transistors connected in series, according to the present invention.

[0031] Figure 3 This is a circuit diagram of the output control circuit of the drive circuit of multiple low-impedance field-effect transistors with component model numbers connected in series according to the present invention. Detailed Implementation

[0032] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0033] Please see Figures 1-3 In this embodiment of the invention,

[0034] A battery pack output control circuit includes a low-impedance field-effect transistor (FET) driving circuit and a field-effect transistor (FET) driving circuit with high on-resistance. The low-impedance FET driving circuits are connected in sequence and are connected to the battery pack, a step-down power supply circuit, and the FET driving circuit with high on-resistance.

[0035] The driving circuit for a low-impedance field-effect transistor (FET) includes resistors R1, R2, and R3, capacitor C1, diodes D1, D2, and D3, transistor V1, and FET V2. Resistor R1 is a current-limiting resistor for driving; diode D1 is a diode to prevent reverse current flow; diode D3 ensures that transistor V1 is in the off-state when driving FET V2; resistor R3 discharges the gate charge of FET V2 and keeps the base of transistor V1 in the off-state when the input driving circuit is low. The transistor V1 generates current at the gate; when the input drive circuit is low, transistor V1 can quickly discharge the charge at the gate (G) of MOSFET V2, thus turning off MOSFET V2; MOSFET V2 is a low on-resistance MOSFET that can withstand a large current when it is turned on; resistor R2 is the gate current limiting resistor of MOSFET V2; capacitor C1 buffers the voltage change of the MOSFET V2's gate-source (DS) terminals; Zener diode D2 is used to ensure that the drive voltage of MOSFET V2 is less than 20V to prevent breakdown of the MOSFET V2's gate-source (GS) terminals;

[0036] The high on-resistance MOSFET drive circuit includes resistors R4 and R5, diodes D4 and D5, and a high-voltage but high-on-resistance MOSFET V3. MOSFET V3 is a switching transistor that withstands high voltage when the circuit is turned off. Diode D4 is a diode to prevent reverse current flow. Resistor R4 is a current-limiting resistor for the gate (G) of MOSFET V3. Diode D5 is used to ensure that the drive voltage of MOSFET V3 is less than 20V to prevent breakdown of the gate (G) and gate (G) terminals of MOSFET V3. Resistor R5 can discharge the charge at the gate (G) of MOSFET V3 and turn off MOSFET V3 when the input drive circuit is at a low level.

[0037] Furthermore, the driving circuit for the low-impedance field-effect transistor includes resistors R1, R2, and R3, capacitor C1, diodes D1, D2, and D3, transistor V1, and a low-on-impedance, low-voltage field-effect transistor V2. One end of resistor R1 is connected to the input driving voltage, and the other end of R1 is connected to the anode of diode D1. The cathode of diode D1 is connected to the anode of diode D3, one end of resistor R3, and the base of transistor V1. The cathode of diode D3 is connected to the emitter of transistor V1, the cathode of diode D2, and one end of resistor R2. The other end of resistor R2 is connected to the gate (G) of field-effect transistor V2. The drain (D) of field-effect transistor V2 is connected to one end of capacitor C1 and the corresponding negative output terminal of the driving circuit. The source (S) of field-effect transistor V2 is connected to the anode of diode D2, the collector of transistor V1, one end of resistor R3, and the corresponding negative power supply terminal of the driving circuit.

[0038] Furthermore, the input drives of the driving circuit for the low-impedance field-effect transistor are all connected together, and the negative power supply terminal and the negative output terminal of the driving circuit for the low-impedance field-effect transistor are connected in series; the specific circuit is as follows: Figure 2 As shown;

[0039] The negative terminal of the power supply of the first low-impedance MOSFET driver circuit is connected to the negative terminal of the battery, and the negative terminal of the output of the last low-impedance MOSFET driver circuit is connected to the negative terminal of the total output.

[0040] Furthermore, the high on-resistance MOSFET driving circuit includes resistors R4 and R5, diodes D4 and D5, and a high-voltage but high-on-resistance MOSFET V3. The input driving voltage is connected to the anode of diode D4, the cathode of diode D4 is connected to one end of resistor R4, and the other end of resistor R4 is connected to the gate (G) of MOSFET V3, the cathode of diode D5, and one end of resistor R5. The source (S) of MOSFET V3 is connected to the anode of diode D3, the other end of resistor R5, and the negative terminal of the battery. The drain (D) of MOSFET V3 is connected to the negative terminal of the total output.

[0041] The circuit in each red dashed box is a field-effect transistor driver circuit with low on-resistance and low voltage withstand value. Figure 2 The example uses four low on-resistance, low-voltage MOSFET driver circuits connected in series. The negative terminal of the power supply of the first low on-resistance, low-voltage MOSFET driver circuit is connected to the negative terminal of the battery, and the negative terminal of the output of the last (fourth) low on-resistance, low-voltage MOSFET driver circuit is connected to the negative terminal of the total output.

[0042] Furthermore, the field-effect transistor V3 is an IGBT transistor.

[0043] Furthermore, Zener diodes are used in each MOSFET drive circuit to prevent excessively high gate-gate voltage.

[0044] Furthermore, the control circuit is moved from the negative terminal to the positive terminal. When control is applied at the positive terminal, a boost charge pump is added to generate the driving voltage. The connection direction of the power MOSFET in the circuit is opposite to that of the negative terminal. The drain (D) terminal of the power MOSFET is connected to the positive terminal of the battery pack, and the source (S) terminal is connected to the positive output terminal.

[0045] A control method for a battery pack output control circuit, the control method comprising the following steps:

[0046] Step 1: When the external drive level signal is a high level signal, the high level signal will be applied to the gate of the field-effect transistor V3 through diode D4 and resistor R4, making the field-effect transistor V3 conduct.

[0047] Step 2: The high-level signal from Step 1 will be applied to the gate of the field-effect transistor V2A through resistor R1A, diodes D1A and D3A, and resistor R2A, turning on the field-effect transistor V2A.

[0048] Step 3: As can be seen from Step 1 and Step 2, a high-level signal will turn on MOSFETs V2B, V2C, and V2D respectively;

[0049] Step 4: Since the resistance value of resistor R4 is less than the resistance value from resistor R1A to resistor R1D, the high-level drive signal will turn on MOSFET V3 faster than it will turn on MOSFETs V2B, V2C, and V2D. This will cause MOSFET V3 to turn on first, followed by MOSFETs V2B, V2C, and V2D.

[0050] Step 5: According to step 4, when the field-effect transistor V3 is turned on first, the load current will flow through the field-effect transistor V3. Since the field-effect transistor V3 is a high-voltage field-effect transistor with a large on-resistance, and the on-resistance is relatively large, the power carried by V3 will be large at this time.

[0051] Step 6: When the high-level signal of the external drive is lost, the charge on the gate of the field-effect transistor V3 will be discharged through the resistor R5, making the voltage between the gate and the source of the field-effect transistor V3 become 0V, thus turning V3 into the off state.

[0052] Step 7: The charges at the gates of MOSFETs V2B, V2C, and V2D will be discharged through resistor R2, transistor V1, and resistor R3 in each driving circuit, respectively. When the currents at the gates of MOSFETs V2B, V2C, and V2D pass through the base of transistor V1, they will cause the emitter and collector of transistor V1 to conduct, accelerating the discharge of charges on the gate of MOSFET V2. This will quickly reduce the voltage between the gate and source of MOSFET V2 and approach 0V.

[0053] Step 8: Since MOSFETs V2A, V2B, V2C, and V2D can accelerate the turn-off of the circuit, their turn-off speed will be faster than that of MOSFET V3. Therefore, when the output circuit is turned off, MOSFETs V2A, V2B, V2C, and V2D will turn off first. Since MOSFET V3 is still in the conducting state when it is turned off, the voltage across MOSFETs V2A, V2B, V2C, and V2D connected in series is low.

[0054] Step 9: As MOSFET V3 is turned off, the voltage across MOSFETs V2A, V2B, V2C, and V2D connected in series will increase to reach the total power supply voltage.

[0055] Step 10: Since capacitors C1A, C1B, C1C, and C1D are all capacitors with the same capacitance value, and MOSFETs V2A, V2B, V2C, and V2D are turned off simultaneously, when the final output circuit is completely turned off, the voltage across MOSFETs V2A, V2B, V2C, and V2D will be shared equally, all between 70V and 90V, below 100V, which is less than the voltage that MOSFETs with low on-resistance and low withstand voltage can withstand.

[0056] Example 2

[0057] In step 5 of Example 1, taking a GAN063 MOSFET as an example, V3 has a withstand voltage of 650V, an on-resistance of 60 milliohms, and can instantaneously withstand a current of 150A. Assuming a load current of 100A, the voltage drop across the drain and source terminals of V3 is 6V, resulting in an instantaneous power loss of 600W. Because V3 conducts first, the voltage between the negative terminal of the battery and the negative terminal of the output drops to a very low level (6V). V2A to V2D only withstand a very low voltage before conduction, while V2A... With V2A and V2D fully conducting, the on-resistance is lower after V2A and V2D are connected in series. In practical applications, NCEP01T18D field-effect transistors (with a withstand voltage of 100V and an on-resistance of 1.4 milliohms after two are connected in parallel) are used. The on-resistance after series connection is only 5.6 milliohms. At this time, most of the load current will go through the V2A-V2D loop. The voltage drop generated by a 100A load current is only 0.56V, and the power loss generated by the loop is only 56W, requiring only simple heat dissipation measures.

[0058] Example 3

[0059] In step 9 of Example 1, the total power supply voltage is 300V in this example.

[0060] Table 1 compares different high-voltage control power devices used in applications with voltages greater than 300V:

[0061] Table 1

[0062]

[0063]

[0064] It is mainly used in the output control circuit of high-voltage, high-power battery packs, such as the output control circuit of high-voltage energy storage battery packs. The core switching power transistor of the control circuit is composed of two types of field-effect transistors.

[0065] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A battery pack output control circuit characterized by comprising: The output control circuit comprises driving circuits of low impedance field effect tubes and driving circuits of field effect tubes with large on impedance, the driving circuits of low impedance field effect tubes are connected in sequence, and the driving circuits of low impedance field effect tubes are connected with a battery pack, a step-down power supply circuit and the driving circuits of field effect tubes with large on impedance. The driving circuit of low impedance field effect tube comprises resistor R1, resistor R2, resistor R3, capacitor C1, diode D1, diode D2, diode D3, triode V11 and field effect tube V22, the resistor R1 is a driving current limiting resistor, the diode D1 is a diode for preventing current backflow, the diode D3 makes the triode V11 in an off state when the driving field effect tube V22 is on, the resistor R3 can discharge the G electrode charge of the field effect tube V22 and make the triode V11 base electrode generate current when the input driving circuit is low, the triode V11 can quickly discharge the G electrode charge of the field effect tube V22 and turn off the field effect tube V22 when the input driving circuit is low, the field effect tube V22 is a field effect tube with low on impedance and can bear large current when on, the resistor R2 is a G electrode current limiting resistor of the field effect tube V22, the capacitor C1 buffers the DS electrode voltage mutation of the field effect tube V22, and the voltage stabilizing diode D2 is used for ensuring that the driving voltage of the field effect tube V22 is less than 20V to prevent the GS electrode of the field effect tube V22 from being broken down.

2. The battery pack output control circuit according to claim 1, wherein The driving circuit of low impedance field effect tube comprises resistor R1, resistor R2, resistor R3, capacitor C1, diode D1, diode D2, diode D3, triode V11 and field effect tube V22, one end of the resistor R1 is connected with an input driving voltage, the other end of the resistor R1 is connected with the anode of the diode D1, the cathode of the diode D1 is connected with the anode of the diode D3, one end of the resistor R3 and the base electrode of the triode V11 respectively, the cathode of the diode D3 is connected with the emitter of the triode V11, the cathode of the diode D2 and one end of the resistor R2 respectively, the other end of the resistor R2 is connected with the G electrode of the field effect tube V22, the D electrode of the field effect tube V22 is connected with one end of the capacitor C1 and the output negative electrode corresponding to the driving circuit respectively, and the S electrode of the field effect tube V22 is connected with the anode of the diode D2, the collector of the triode V11, one end of the resistor R3 and the power supply negative electrode corresponding to the driving circuit respectively.

3. The battery pack output control circuit according to claim 1, wherein The input driving of the driving circuits of low impedance field effect tubes is connected together, and the power supply negative electrode and the output negative electrode of the driving circuits of low impedance field effect tubes are connected together in series. The power supply negative electrode of the first driving circuit of low impedance field effect tube is connected with the negative electrode of a battery, and the output negative electrode of the last driving circuit of low impedance field effect tube is connected with the total output negative electrode.

4. The battery pack output control circuit according to claim 1, wherein The field effect tube drive circuit with high on-resistance comprises resistance R4 and R5, diode D4 and D5, high voltage but high on-resistance field effect tube V3, the input drive voltage is connected with the positive pole of diode D4, the negative pole of diode D4 is connected with one end of resistance R4, the other end of resistance R4 is connected with the G pole of field effect tube V3, the negative pole of diode D5 and one end of resistance R5 respectively; the S pole of field effect tube V3 is connected with the positive pole of diode D3, the other end of R5 resistance and the negative pole of battery respectively, the D pole of field effect tube V3 is connected with the total output negative pole.

5. The battery pack output control circuit according to claim 4, wherein The field effect tube V3 is IGBT tube.

6. The battery pack output control circuit according to claim 2 or 4, wherein Stabilized diode is used in each field effect tube drive circuit.

7. The battery pack output control circuit according to claim 1, wherein The control circuit is from circuit negative pole to circuit positive pole.

8. The control method of a battery pack output control circuit according to claim 5, characterized by, The control method comprises the following steps: Step 1: when the external drive level signal is high level signal, the high level signal will be added to the G pole of field effect tube V3 through diode D4 and resistance R4, so that field effect tube V3 is turned on; Step 2: the high level signal of step 1 will be added to the G pole of field effect tube V2A through resistance R1A, diode D1A and D3A, resistance R2A, so that field effect tube V2A is turned on; Step 3: according to step 1 and step 2, the high level signal will make field effect tube V2B, field effect tube V2C and field effect tube V2D turned on respectively; Step 4: because the resistance value of resistance R4 is less than the resistance value of resistance R1A to R1D, the drive speed of field effect tube V3 turned on by high level drive level signal will be faster than the drive speed of field effect tube V2B, field effect tube V2C and field effect tube V2D, so that field effect tube V3 is turned on first, and field effect tube V2B, field effect tube V2C and field effect tube V2D are turned on later; Step 5: according to step 4, when field effect tube V3 is turned on first, the load current will flow through field effect tube V3, because field effect tube V3 is high voltage and high on-resistance field effect tube, and the on-resistance is large, the power on V3 will be large at this time; Step 6: when the external drive high level signal is lost, the charge on the G pole of field effect tube V3 will be discharged through resistance R5, so that the voltage between the G pole of field effect tube V3 and the S pole of field effect tube V3 becomes 0V, so that V3 becomes off state; Step 7: the charges on the G pole of field effect tube V2B, the G pole of field effect tube V2C and the G pole of field effect tube V2D will be discharged through resistance R2, triode V11 and resistance R3 in each drive circuit respectively, and when the current of the G pole of field effect tube V2B, the G pole of field effect tube V2C and the G pole of field effect tube V2D flows through the base of triode V11 respectively, the triode V11 will be turned on between the E pole of triode V11 and the C pole of triode V11, so that the charge on the G pole of field effect tube V22 will be discharged quickly, and the voltage between the G pole of field effect tube V22 and the S pole of field effect tube V22 will decrease to 0V quickly. Step 8: Since the field effect tube V2A, field effect tube V2B, field effect tube V2C and field effect tube V2D can accelerate the turn-off circuit, the turn-off speed of the field effect tube V2A, field effect tube V2B, field effect tube V2C and field effect tube V2D will be faster than the turn-off speed of the field effect tube V3, so when the output loop is turned off, the field effect tube V2A, field effect tube V2B, field effect tube V2C and field effect tube V2D will be turned off first, and when turned off, since the field effect tube V3 is still in the on state, the voltage borne by the field effect tube V2A, field effect tube V2B, field effect tube V2C and field effect tube V2D in series will be low; Step 9: With the turn-off of the field effect tube V3, the voltage borne by the field effect tube V2A, field effect tube V2B, field effect tube V2C and field effect tube V2D in series will rise to the total voltage of the power supply; Step 10: Since the capacitor C1A, capacitor C1B, capacitor C1C and capacitor C1D are capacitors with the same capacitance, and the field effect tube V2A, field effect tube V2B, field effect tube V2C and field effect tube V2D are turned off at the same time, when the final output circuit is completely turned off, the voltage borne by the field effect tube V2A, field effect tube V2B, field effect tube V2C and field effect tube V2D will be evenly shared, all between 70V-90V, lower than 100V, less than the voltage that can be borne by the field effect tube with low on-resistance and low voltage.

Citation Information

Patent Citations

  • Battery pack output control circuit

    CN212518478U