Display device and manufacturing method, electronic equipment

Abstract

A display device, an electronic device and a method for manufacturing the display device. The display device includes an array substrate and a first thin film encapsulation layer arranged on the array substrate. The array substrate is a silicon-based organic light-emitting diode array substrate, and the array substrate includes: a silicon substrate and a light-emitting device arranged on the silicon substrate; a second thin film encapsulation layer arranged between the light-emitting device and the first thin film encapsulation layer; a color film layer arranged between the first thin film encapsulation layer and the second thin film encapsulation layer; at each edge of the first thin film encapsulation layer, the orthographic projection of the array substrate on a plane parallel to the array substrate extends beyond the orthographic projection of the first thin film encapsulation layer on the plane. The display device can avoid cracks in the first thin film encapsulation layer when cutting the panel, thereby preventing water and oxygen in the outside air from invading the light-emitting device in the display device through the cracks in the first thin film encapsulation layer, improving the encapsulation technology for blocking water and oxygen, and extending the service life of the display device.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to a display device, an electronic device, and a method for manufacturing the display device. Background Art

[0002] Micro-OLED (Micro Organic Light-Emitting Diode) display is a new type of OLED display with silicon substrate as substrate, also known as silicon-based organic light-emitting diode (silicon-based OLED) display. Silicon-based OLED display has the advantages of small size and high resolution. It is manufactured using mature CMOS integrated circuit technology, can realize active addressing of pixels, and can prepare various functional circuits including TCON (timing control) circuit, over current protection (OCP) circuit, etc. on silicon-based substrate, which can achieve lightweight. Summary of the invention

[0003] At least one embodiment of the present disclosure provides a display device, comprising: an array substrate and a first thin-film encapsulation layer arranged on the array substrate; the array substrate is a silicon-based organic light-emitting diode array substrate, and the array substrate comprises: a silicon substrate and a light-emitting device arranged on the silicon substrate; a second thin-film encapsulation layer, arranged between the light-emitting device and the first thin-film encapsulation layer; a color film layer, arranged between the first thin-film encapsulation layer and the second thin-film encapsulation layer; at each edge of the first thin-film encapsulation layer, the orthographic projection of the array substrate on a plane parallel to the array substrate extends beyond the orthographic projection of the first thin-film encapsulation layer on the plane.

[0004] For example, the display device provided by at least one embodiment of the present disclosure further includes: a cover plate covering the first thin film encapsulation layer; at each edge of the first thin film encapsulation layer, the orthographic projection of the cover plate on the plane extends beyond the orthographic projection of the first thin film encapsulation layer on the plane.

[0005] For example, the display device provided by at least one embodiment of the present disclosure further includes: a sealant disposed on the sides of the four sides of the cover plate and connecting the cover plate and the array substrate.

[0006] For example, in the display device provided by at least one embodiment of the present disclosure, the fitting height of the sealant on the sides of the cover plate is greater than 1 / 2 of the thickness of the cover plate and less than the thickness of the cover plate.

[0007] For example, in the display device provided by at least one embodiment of the present disclosure, each edge of the first thin-film encapsulation layer is spaced a predetermined distance from the sealant.

[0008] For example, in the display device provided by at least one embodiment of the present disclosure, at each edge of the second thin film encapsulation layer, the orthographic projection of the first thin film encapsulation layer on the plane extends beyond the orthographic projection of the second thin film encapsulation layer on the plane.

[0009] For example, in the display device provided by at least one embodiment of the present disclosure, the first thin-film encapsulation layer and the second thin-film encapsulation layer are respectively in contact with the upper surface of the silicon substrate.

[0010] For example, in the display device provided by at least one embodiment of the present disclosure, an edge of the first thin-film encapsulation layer close to the light-emitting device is attached to a portion of an edge of the second thin-film encapsulation layer away from the light-emitting device.

[0011] For example, in the display device provided by at least one embodiment of the present disclosure, the light emitting device emits white light.

[0012] For example, in the display device provided in at least one embodiment of the present disclosure, the color filter layer includes a red, green, and blue color filter layer.

[0013] For example, in the display device provided by at least one embodiment of the present disclosure, the second thin-film encapsulation layer includes: a first inorganic encapsulation layer, on the side of the light-emitting device away from the silicon substrate; a second inorganic encapsulation layer, on the side of the first inorganic encapsulation layer away from the silicon substrate; a first organic encapsulation layer, on the side of the second inorganic encapsulation layer away from the silicon substrate; the first thin-film encapsulation layer includes: a second organic encapsulation layer, on the side of the color film layer away from the silicon substrate; a third inorganic encapsulation layer, on the side of the second organic encapsulation layer away from the silicon substrate, the refractive index of the first inorganic encapsulation layer is greater than the refractive index of the second inorganic encapsulation layer, the refractive index of the second inorganic encapsulation layer, the refractive index of the first organic encapsulation layer and the refractive index of the second organic encapsulation layer are substantially the same, and the refractive index of the second organic encapsulation layer is greater than the refractive index of the third inorganic encapsulation layer.

[0014] For example, in the display device provided by at least one embodiment of the present disclosure, the absolute value of the refractive index difference between the first inorganic encapsulation layer and the second inorganic encapsulation layer is greater than the absolute value of the refractive index difference between the second organic encapsulation layer and the third inorganic encapsulation layer.

[0015] For example, in the display device provided in at least one embodiment of the present disclosure, the first inorganic encapsulation layer includes silicon nitride, the second inorganic encapsulation layer includes aluminum oxide, the first organic encapsulation layer and the second organic encapsulation layer each include at least one layer of polyparaxylene molecules, and the third inorganic encapsulation layer includes silicon oxide.

[0016] For example, in the display device provided by at least one embodiment of the present disclosure, the thickness of the first inorganic encapsulation layer in the plane direction perpendicular to the silicon substrate is greater than the thickness of the second inorganic encapsulation layer in the plane direction perpendicular to the silicon substrate, the thickness of the first organic encapsulation layer in the plane direction perpendicular to the silicon substrate is greater than the thickness of the first inorganic encapsulation layer in the plane direction perpendicular to the silicon substrate, the first organic encapsulation layer and the second organic encapsulation layer have substantially the same thickness in the plane direction perpendicular to the silicon substrate, the thickness of the second organic encapsulation layer in the plane direction perpendicular to the silicon substrate is greater than the thickness of the third inorganic encapsulation layer in the plane direction perpendicular to the silicon substrate, and the thickness of the third inorganic encapsulation layer in the plane direction perpendicular to the silicon substrate is greater than the thickness of the second inorganic encapsulation layer in the plane direction perpendicular to the silicon substrate and is less than the thickness of the first inorganic encapsulation layer in the plane direction perpendicular to the silicon substrate.

[0017] At least one embodiment of the present disclosure also provides a display device, comprising: an array substrate and a first thin-film encapsulation layer arranged on the array substrate; the array substrate is a silicon-based organic light-emitting diode array substrate, and at each edge of the first thin-film encapsulation layer, the orthographic projection of the array substrate on a plane parallel to the array substrate extends beyond the orthographic projection of the first thin-film encapsulation layer on the plane.

[0018] At least one embodiment of the present disclosure provides an electronic device, including the display device provided by any embodiment of the present disclosure, wherein the electronic device is a virtual reality device or an augmented reality device.

[0019] At least one embodiment of the present disclosure provides a method for preparing a display device, comprising: providing an array substrate motherboard, wherein the array substrate motherboard is a silicon-based organic light-emitting diode array substrate motherboard, and the array substrate motherboard includes at least one array substrate region; forming a first thin-film encapsulation layer in the array substrate region, and at each edge of the first thin-film encapsulation layer, the orthographic projection of the array substrate region on a plane parallel to the array substrate motherboard extends beyond the orthographic projection of the first thin-film encapsulation layer on the plane; and cutting the array substrate motherboard after forming the first thin-film encapsulation layer to obtain a separate array substrate.

[0020] For example, in the preparation method provided in at least one embodiment of the present disclosure, among the edges where the first thin film encapsulation layer and the array substrate region correspond to each other and have unequal lengths, the distances between each edge of the first thin film encapsulation layer and the corresponding edge of the array substrate region are set to be greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer and the cutting alignment accuracy of the array substrate region.

[0021] For example, in the preparation method provided in at least one embodiment of the present disclosure, before cutting the array substrate motherboard after forming the first thin film encapsulation layer to obtain the individual array substrates, it also includes: forming a cover plate on the first thin film encapsulation layer in the array substrate area, wherein at each edge of the first thin film encapsulation layer, the orthographic projection of the cover plate on the plane extends beyond the orthographic projection of the first thin film encapsulation layer on the plane.

[0022] For example, in the preparation method provided by at least one embodiment of the present disclosure, among the edges of the first thin film encapsulation layer and the cover plate that correspond to each other and have unequal lengths, the distances between each edge of the first thin film encapsulation layer and the corresponding edge of the cover plate are set to be greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer and the bonding alignment accuracy of the cover plate.

[0023] For example, the preparation method provided by at least one embodiment of the present disclosure further includes: forming a sealant connecting the cover plate and the array substrate on the sides around the cover plate.

[0024] For example, the preparation method provided by at least one embodiment of the present disclosure also includes: forming a light-emitting device on the array substrate area; forming a second thin film encapsulation layer between the light-emitting device and the first thin film encapsulation layer; and forming a color film layer between the first thin film encapsulation layer and the second thin film encapsulation layer.

[0025] For example, in the preparation method provided by at least one embodiment of the present disclosure, at each edge of the second thin film encapsulation layer, the orthographic projection of the first thin film encapsulation layer on the plane extends beyond the orthographic projection of the second thin film encapsulation layer in the plane.

[0026] For example, in the preparation method provided in at least one embodiment of the present disclosure, among the edges of the first thin film encapsulation layer and the second thin film encapsulation layer that correspond to each other and have unequal lengths, the distances between each edge of the first thin film encapsulation layer and the corresponding edge of the second thin film encapsulation layer are set to be greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer and the coating alignment accuracy of the second thin film encapsulation layer.

[0027] For example, in the preparation method provided by at least one embodiment of the present disclosure, the first thin film encapsulation layer is formed near the edge of the light-emitting device on a portion of the second thin film encapsulation layer away from the edge of the light-emitting device. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.

[0029] Figure 1A A cross-sectional schematic diagram of a display device provided by at least one embodiment of the present disclosure;

[0030] Figure 1B A cross-sectional schematic diagram of another display device provided by at least one embodiment of the present disclosure;

[0031] Figure 1C A cross-sectional schematic diagram of another display device provided by at least one embodiment of the present disclosure;

[0032] Figure 2 for Figure 1A A schematic projection diagram of an example of a display device shown;

[0033] Figure 3 for Figure 1A A schematic projection diagram of another example of the display device shown;

[0034] Figure 4 for Figure 1A A projection diagram of another example of the display device shown;

[0035] Figure 5 A partial cross-sectional schematic diagram of a display device provided by at least one embodiment of the present disclosure;

[0036] Figure 6 A schematic diagram of a circuit principle of an array substrate provided in at least one embodiment of the present disclosure;

[0037] Figure 7 A circuit diagram of a specific implementation example of a voltage control circuit and a pixel circuit of an array substrate provided by at least one embodiment of the present disclosure;

[0038] Figure 8 A schematic diagram of an electronic device provided for at least one embodiment of the present disclosure; and

[0039] Fig. 9 A flowchart of a method for preparing a display device provided in at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0041] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0042] At present, silicon-based OLED display devices have the advantages of small size and high resolution, and are widely used in near-eye display fields such as virtual reality (VR) or augmented reality (AR). The silicon-based OLED display device includes a silicon-based substrate and an OLED light-emitting element array formed on the silicon-based substrate, and the OLED light-emitting element array is isolated from the outside world by, for example, thin-film encapsulation, and the silicon-based OLED display device usually also includes a cover glass to provide a protective function. However, although encapsulation is adopted, the intrusion of water and oxygen in the outside air may still cause the organic light-emitting materials of the OLED in the silicon-based OLED display device and the electrodes made of active metals to be corroded by water and oxygen, and an oxidation reaction occurs, causing the pixels to shrink or not emit light, and the device performance deteriorates, which ultimately affects the service life of the silicon-based OLED display device. Therefore, in the related technologies of silicon-based OLED display devices, the encapsulation technology of blocking water and oxygen is extremely important.

[0043] The inventors noticed in their research that the main reasons for the packaging failure problem of silicon-based OLED display devices include two aspects: on the one hand, when the panel is cut, the thin film packaging layer is cut along with the silicon-based substrate, and many cracks will be generated at the edge of the thin film packaging layer. Water and oxygen in the outside air invade the OLED device from the cracks in the thin film packaging layer; on the other hand, there is no protective structure between the glass cover plate and the silicon substrate to block the invasion of water and oxygen, so water and oxygen in the outside air can easily reach the thin film packaging layer. In the large-size OLED process, the method to improve this problem is to add a DAM structure (dam structure) around the display area to extend the path of water and oxygen invasion, but this method can only delay the invasion of water and oxygen but cannot isolate it, and because the size of silicon-based OLEDs is small, the effect of the DAM structure in delaying the invasion of water and oxygen is extremely weak. Therefore, it is impossible to truly solve the problem of packaging failure caused by cracks on the edge of the thin film packaging layer.

[0044] In response to the above problems, at least one embodiment of the present disclosure provides a display device, which includes an array substrate and a first thin-film encapsulation layer arranged on the array substrate; the array substrate is a silicon-based organic light-emitting diode array substrate, and the array substrate includes: a silicon substrate and a light-emitting device arranged on the silicon substrate; a second thin-film encapsulation layer, arranged between the light-emitting device and the first thin-film encapsulation layer; a color film layer, arranged between the first thin-film encapsulation layer and the second thin-film encapsulation layer; at each edge of the first thin-film encapsulation layer, the orthographic projection of the array substrate on a plane parallel to the array substrate extends beyond the orthographic projection of the first thin-film encapsulation layer on the plane.

[0045] Some embodiments of the present disclosure also provide an electronic device corresponding to the above-mentioned display device and a method for preparing the display device.

[0046] In the display device provided by the above-mentioned embodiments of the present disclosure, since at each edge of the first thin-film encapsulation layer, the orthographic projection of the array substrate on a plane parallel to the array substrate extends beyond the orthographic projection of the first thin-film encapsulation layer on the plane, it is possible to avoid cutting the first thin-film encapsulation layer when cutting the panel and causing cracks in the first thin-film encapsulation layer. Without such cracks, it is possible to avoid or significantly reduce the intrusion of water and oxygen in the external air into the OLED device in the display device through the cracks in the first thin-film encapsulation layer, thereby improving the encapsulation technology for blocking water and oxygen and extending the service life of the display device.

[0047] The embodiments and examples of the present disclosure are described in detail below with reference to the accompanying drawings.

[0048] At least one embodiment of the present disclosure provides a display device. For example, the display device is a silicon-based OLED display device, which can be used in a virtual reality device or an augmented display device. Of course, it can also be other types of display devices, and the embodiments of the present disclosure are not limited to this.

[0049] Figure 1A is a cross-sectional schematic diagram of a display device provided by at least one embodiment of the present disclosure, Figure 2 for Figure 1A The projection diagram of the display device shown is shown below. Figure 1A and Figure 2 A display device provided by at least one embodiment of the present disclosure is introduced in detail.

[0050] like Figure 1A As shown, the display device 1 includes an array substrate 10 and a first thin film encapsulation layer 18 disposed on the array substrate 10 .

[0051] For example, the array substrate 10 is a silicon-based array substrate, such as a silicon-based array substrate (OLED silicon-based array substrate) for an organic light emitting diode (OELD) display device. The array substrate 10 includes, for example, a silicon substrate 11, which may be a single crystal silicon substrate or a silicon on insulator (SOI) substrate. For example, the array substrate 10 may also include any applicable components such as an organic light emitting diode (OLED) device, a thin film encapsulation layer, a color film layer, and a light extraction layer disposed on the silicon substrate 11 to achieve a display function. The specific structure of the array substrate 10 will be described in detail below and will not be repeated here. For example, any applicable circuit components such as a gate drive circuit, a data drive circuit, and a pixel circuit (not shown in the figure) are integrated on the silicon substrate 11. These circuit components are prepared, for example, by a silicon semiconductor process (such as a CMOS process), and the embodiments of the present disclosure are not limited to this.

[0052] For example, Figure 2 As shown, at each edge of the first thin film encapsulation layer 18 (only the figure shows the case where the first thin film encapsulation layer 18 includes four edges 21-24), the orthographic projection 111 of the array substrate on the plane parallel to the array substrate 11 extends beyond the orthographic projection 121 of the first thin film encapsulation layer 18 on the plane. That is, the area covered by the orthographic projection 111 of the array substrate 10 on the plane is larger than the area covered by the orthographic projection 121 of the first thin film encapsulation layer 18 on the plane, and the orthographic projection 121 of the first thin film encapsulation layer 18 on the plane completely falls within the orthographic projection 111 of the array substrate 10 on the plane, that is, the projection area of ​​the first thin film encapsulation layer 18 on the plane is smaller than the projection area of ​​the array substrate 10 on the plane, and each edge of the orthographic projection 121 of the first thin film encapsulation layer 18 on the plane has a certain distance d1 from the orthographic projection 111 of the array substrate 10 on the plane. For example, the distance d1 between each edge may be equal or unequal, and the embodiments of the present disclosure are not limited to this.

[0053] For example, since the surface of the array substrate where the light emitting devices are arranged is not necessarily a plane, the surface where the back of the array substrate is located can be used as the plane parallel to the array substrate. The following embodiments are the same and will not be described in detail.

[0054] For example, in some examples, among the edges of the first thin film encapsulation layer 18 and the array substrate 10 that correspond to each other and are of unequal length, the distance d between each edge of the first thin film encapsulation layer 18 and the corresponding edge of the array substrate 10 is greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer 18 (for example, approximately 50 micrometers (μm)) and the cutting alignment accuracy of the array substrate 10 (or cutting path) (for example, approximately 100 μm), so as to avoid the coating alignment error and / or the cutting alignment error causing the orthographic projection of the array substrate area on a plane parallel to the array substrate master to extend beyond the orthographic projection of the first thin film encapsulation layer on the plane, thereby causing cracks in the first thin film encapsulation layer during the cutting process. That is, the above-mentioned setting can better ensure that the projection area of ​​the first thin film encapsulation layer 18 on the plane is smaller than the projection area of ​​the array substrate 10 on the plane.

[0055] Here, “orthographic projection” refers to the projection of the array substrate 10 in a plane parallel to the array substrate 10 along a direction perpendicular to the array substrate 10 , or refers to the projection of the first thin film encapsulation layer 18 in a plane parallel to the array substrate 10 along a direction perpendicular to the array substrate 10 .

[0056] Through the above arrangement, when the original array substrate mother is cut to form each array substrate, since there is a certain distance between the first thin film encapsulation layer 18 and the cutting path, the cutting tool only contacts the array substrate 10 (for example, contacts the area at the edge of the array substrate 10 not covered by the first thin film encapsulation layer 18), and does not contact the first thin film encapsulation layer 18. Therefore, it is possible to avoid cracks at the edge of the first thin film encapsulation layer 18 due to the edge of the first thin film encapsulation layer 18 being flush with the edge of the array substrate 10 during the cutting process, thereby preventing water and oxygen in the outside air from invading the OLED device through the crack, thereby extending the service life of the display device.

[0057] It should be noted that the shape of the projection of the array substrate 10 on the plane is the same as or substantially the same as the shape of the projection of the first thin film encapsulation layer 18 on the plane, for example, both are rectangular, square or hexagonal. Of course, the embodiments of the present disclosure are not limited to this. For example, the shape of the projection of the array substrate 10 on the plane may be different from the shape of the projection of the first thin film encapsulation layer 18 on the plane, which can be determined according to actual needs. Here, "the same or substantially the same shape" means that both are of the same type of shape, but does not mean that the ratios of the corresponding sides of the two are the same. For example, when both are rectangular, their respective aspect ratios may be the same or different, and the embodiments of the present disclosure are not limited to this.

[0058] For example, in some examples, such as Figure 1A As shown, the array substrate 110 includes: a silicon substrate 11 and a light emitting device 410 , a second thin film encapsulation layer 16 and a color filter layer 17 arranged on the silicon substrate 11 .

[0059] For example, the silicon substrate 11 plays a supporting and protective role. The silicon substrate 11 includes a pixel circuit, a gate driving circuit, and a data driving circuit for driving each pixel unit. Figure 1A The detailed structure of the silicon substrate 11 is not shown in the figure). The pixel circuit can be a conventional 2T1C or 4T1C pixel circuit, or a pixel circuit with functions such as internal compensation or external compensation, and the embodiments of the present disclosure are not limited to this. For example, there is a gate drive circuit (not shown in the figure) for generating a gate drive signal, and a data drive circuit (not shown in the figure) for generating a data signal. The gate drive circuit and the data drive circuit can adopt conventional circuit structures in the field, and the embodiments of the present disclosure are not limited to this. The pixel circuit, the gate drive circuit and the data drive circuit are prepared in the silicon substrate 11, for example, using a CMOS process.

[0060] For example, in some examples, such as Figure 1A As shown, the display device 1 further includes a cover plate 19, which covers the first thin film encapsulation layer 18. For example, the cover plate 19 is arranged opposite to the array substrate 10, and the cover plate 19 is, for example, attached to the first thin film encapsulation layer 18 to protect and increase strength. For example, the cover plate 19 and the array substrate 10 are parallel to each other. For example, the material of the cover plate 19 is a transparent material, and for example, the transparent material can be an inorganic material such as glass or an organic material such as polyimide. For example, in some examples, the cover plate 19 can be made of plain glass with high transmittance, which is not limited in the embodiments of the present disclosure.

[0061] At each edge of the first thin film encapsulation layer 18 (the figure only shows the case where the first thin film encapsulation layer 18 includes four edges 21-24), the orthographic projection of the cover plate 19 on the plane extends beyond the orthographic projection of the first thin film encapsulation layer 18 on the plane. That is, the area covered by the orthographic projection 112 of the cover plate 19 on the plane is larger than the area covered by the orthographic projection 121 of the first thin film encapsulation layer 18 on the plane, and the orthographic projection 121 of the first thin film encapsulation layer 18 on the plane completely falls within the orthographic projection 112 of the cover plate 19 on the plane, that is, the projection area of ​​the first thin film encapsulation layer 18 on the plane is smaller than the projection area of ​​the cover plate 19 on the plane, and each edge of the orthographic projection 121 of the first thin film encapsulation layer 18 on the plane is also at a certain distance d2 from the corresponding edge of the orthographic projection 112 of the cover plate 19 on the plane. For example, the distance d2 between the edges may be equal or unequal, and the embodiments of the present disclosure are not limited to this.

[0062] For example, in some examples, the orthographic projections of the array substrate on the plane extend beyond the orthographic projections of the cover plate on the plane, thereby achieving better alignment and sealing, or avoiding cracking of the cover plate during the cutting process.

[0063] For example, in some examples, the display device 1 further includes a sealant 12, which is disposed on the sides of the cover plate 19 and connects the cover plate 19 and the array substrate 10. The sides of the cover plate 19 and the array substrate 10 (for example, the silicon-based substrate in the array substrate 10) are sealed by the sealant 12. For example, the fitting height of the sealant 12 on the sides of the cover plate 19 is greater than 1 / 2 of the thickness of the cover plate 19 (for example, about 0.5 mm) and less than the thickness of the cover plate 19, that is, the distance between the upper edge of the sealant 12 and the upper surface of the cover plate 19 is less than 1 / 2 of the thickness of the cover plate 19, thereby ensuring the sealing effect and preventing the sealant from being higher than the upper surface of the cover plate 19 and causing the thickness of the display device to increase. By sealing the sides of the cover plate 19 and the silicon-based substrate with the sealant 12, further protection is provided for blocking water and oxygen intrusion, thereby greatly improving the life of the silicon-based OLED display device.

[0064] For example, in some examples, such as Figure 1A As shown, each edge of the first thin film encapsulation layer 18 may be spaced apart from the sealant 12 by a predetermined distance, thereby further delaying the path of water and oxygen intrusion.

[0065] For example, the predetermined distance is greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer 18 (for example, about 50 μm) and the lamination alignment accuracy of the cover plate 19 (for example, about 100 μm).

[0066] For example, in some examples, among the edges of the first thin film encapsulation layer 18 and the cover plate 19 that correspond to each other and are of unequal length, the distance between each edge of the first thin film encapsulation layer 18 and the corresponding edge of the cover plate 19 is greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer 18 (for example, about 50 μm) and the fitting alignment accuracy of the cover plate 19 (for example, about 100 μm), so as to avoid the coating alignment accuracy and / or the fitting alignment accuracy causing the orthographic projection of the cover plate on the plane to not extend beyond the orthographic projection of the first thin film encapsulation layer on the plane, thereby causing the sealant to fail to perform a sealing effect. This setting can better ensure that the orthographic projection of the array substrate on the plane extends beyond the orthographic projection of the cover plate on the plane, so as to provide further protection against water and oxygen intrusion.

[0067] For example, the light emitting device 410 includes a first electrode 13, an organic light emitting layer 14 and a second electrode 15. For example, the first electrode 13 of the light emitting device 410 is formed on the silicon substrate 11, the organic light emitting layer 14 is formed on the first electrode 13 of the light emitting device, and the second electrode 15 is formed on the organic light emitting layer 14.

[0068] For example, the first pole 13 of the light emitting device is an anode, and the second pole 15 of the light emitting device is a cathode, for example, grounded. For example, the first pole 13 of the light emitting device can be made of a material including a transparent metal oxide such as indium tin oxide (ITO) or indium zinc oxide (IZO), which has a high light transmittance. For example, the material of the second pole 15 of the light emitting device is a metal, for example, the metal can be made of materials such as magnesium, magnesium alloy, aluminum or aluminum alloy.

[0069] For example, the organic light-emitting layer 14 may be a single layer or a multilayer structure. For example, in some examples, the organic light-emitting layer 14 may include a light-emitting layer and a multilayer structure including one or more film layers of a hole injection layer, an electron injection layer, a hole transport layer, an electron transport layer, an electron blocking layer, and a hole blocking layer. For example, the organic light-emitting layer 14 may be made of an organic material, and under the voltage drive of the first electrode 13 and the second electrode 15, the light-emitting characteristics of the organic material are used to emit light according to the required grayscale.

[0070] For example, the light-emitting device is an OLED light-emitting device. For example, the light-emitting device emits white light. For example, the white light emitted by the light-emitting device can be emitted by a light-emitting device that emits white light, for example, it can be emitted by a light-emitting layer combination including a plurality of light-emitting layers. For example, the light-emitting layer combination includes three light-emitting layers that emit red, green and blue light, respectively, and the three light-emitting layers are stacked in sequence relative to the silicon substrate 11, so as to emit white light as a whole, or the light-emitting layer combination includes a light-emitting layer that emits light of one color and a light-emitting layer that emits light of a complementary color to the color, and the two light-emitting layers are stacked in sequence relative to the silicon substrate 11, so as to emit white light as a whole, and the two light-emitting layers include, for example, a light-emitting layer that emits red light and a light-emitting layer that emits light of a complementary color to red. The embodiments of the present disclosure are not limited to this, as long as white light can be emitted.

[0071] For example, the second thin film encapsulation layer 16 is disposed between the light emitting device 410 and the first thin film encapsulation layer 18 ; and the color filter layer 17 is disposed between the first thin film encapsulation layer 18 and the second thin film encapsulation layer 16 .

[0072] For example, at each edge of the second thin film encapsulation layer 16 , the orthographic projection of the first thin film encapsulation layer 18 on the plane extends beyond the orthographic projection of the second thin film encapsulation layer 16 on the plane.

[0073] At each edge of the second thin film encapsulation layer 16 (the figure only shows the case where the second thin film encapsulation layer 16 includes four edges 25-28), the orthographic projection of the first thin film encapsulation layer 18 on the plane extends beyond the orthographic projection of the second thin film encapsulation layer 16 on the plane. That is, the area covered by the orthographic projection 121 of the first thin film encapsulation layer 18 on the plane is larger than the area covered by the orthographic projection 122 of the second thin film encapsulation layer 16 on the plane, and the orthographic projection 122 of the second thin film encapsulation layer 16 on the plane completely falls within the orthographic projection 121 of the first thin film encapsulation layer 18 on the plane, that is, the projection area of ​​the second thin film encapsulation layer 16 on the plane is smaller than the projection area of ​​the first thin film encapsulation layer 18 on the plane, and each edge of the orthographic projection 121 of the second thin film encapsulation layer 16 on the plane is also at a certain distance d3 from the corresponding edge of the orthographic projection 121 of the first thin film encapsulation layer 18 on the plane. For example, the distance d3 between the edges may be equal or unequal, and the embodiments of the present disclosure are not limited to this.

[0074] For example, in some examples, among the edges of the first thin film encapsulation layer 18 and the second thin film encapsulation layer 16 that correspond to each other and have unequal lengths, the distance between each edge of the first thin film encapsulation layer 18 and the corresponding edge of the second thin film encapsulation layer 16 is greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer 18 (e.g., approximately 50 μm) and the coating alignment accuracy of the second thin film encapsulation layer 16 (e.g., approximately 50 μm).

[0075] For example, in some examples, such as Figure 1A As shown, the edge of the first thin film encapsulation layer 18 close to the light emitting device 410 is attached to a portion of the edge of the second thin film encapsulation layer 16 away from the light emitting device 410. For example, the edge of the first thin film encapsulation layer 18 close to the light emitting device 410 is attached to the side edge of the second thin film encapsulation layer 16 away from the light emitting device 410 to enhance the sealing effect.

[0076] For example, the first thin film encapsulation layer 18 and the second thin film encapsulation layer 16 are respectively in contact with the upper surface of the silicon substrate 11 to form a sealing structure, thereby achieving double effective encapsulation of the light-emitting device 410, that is, two-layer encapsulation of the first thin film encapsulation layer and the second thin film encapsulation layer, to achieve more effective blocking of water vapor, oxygen, etc., thereby achieving the purpose of protecting the light-emitting device 410 and extending the service life of the light-emitting device 410.

[0077] For example, the color filter layer 17 includes RGB color filter units, and each matches the organic light-emitting layer 14. The color filter layer 17 is disposed on the second thin-film encapsulation layer 16 and corresponds to the organic light-emitting layer 14, so that the color display of the emitted light can be realized. Of course, the embodiments of the present disclosure are not limited thereto, and the color filter layer 17 may also include pixel areas of other colors, such as white, yellow, etc.

[0078] For example, Figure 1B As shown, the color film layer 17 includes a first color film layer 3041 (for example, a green color film unit G), a second color film layer 3042 (for example, a red color film unit R) partially covering a surface on one side of the first color film layer 3041, and a third color film layer 3043 (for example, a blue color film unit B) partially covering a surface on the other side of the first color film layer 3041. In two adjacent pixel units, the second color film layer 3042 (for example, a red color film unit R) in one pixel unit partially covers the third color film layer 3043 (for example, a blue color film unit B) in a pixel unit adjacent to the one pixel unit. The adhesion of the third color film layer 3043 (for example, a blue color film unit B) is greater than the adhesion of the second color film layer 3042 (for example, a red color film unit R) and less than the adhesion of the first color film layer 3041 (for example, a green color film unit G).

[0079] For example, the second color film layer 3042 with low adhesion partially covers the first color film layer 3041 with high adhesion, so that the contact area between the second color film layer 3042 with low adhesion and the cathode 3023 of the light-emitting element can be reduced. The base material of the first color film layer 3041 and the base material of the second color film layer 3042 are substantially the same, and the adhesion between the first color film layer 3041 and the second color film layer 3042 is greater than the adhesion between the second color film layer 3042 and the cathode 3023 of the light-emitting element 302. In this way, compared with the case where the second color film layer 3042 does not cover the first color film layer 3041 at all, the second color film layer 3042 partially covers the first color film layer 3041, which can reduce the possibility that the first color film layer 3041 and the second color film layer 3042 are peeled off from the cathode 3023 of the light-emitting element 302 as a whole. In addition, since the second color film layer 3042 has low adhesion and good fluidity, in the process of forming the second color film layer 3042, the content of surface bubbles away from the light-emitting element 302 of the first color film layer 3041 and the second color film layer 3042 as a whole can be reduced, thereby improving the uniformity of the film thickness of the first color film layer 3041 and the second color film layer 3042 at the overlapping position.

[0080] For example, Figure 1A As shown, the first thin film encapsulation layer 18 and the cover plate 19 are sequentially arranged on the color filter layer 17, and the function of protecting the color filter layer 17 can be realized. For example, the first thin film encapsulation layer 18 and the second thin film encapsulation layer 16 are made of one or more organic materials or inorganic materials with good sealing properties, so as to achieve a good sealing effect and protect the light-emitting device 410. For example, either the first thin film encapsulation layer 18 or the second thin film encapsulation layer 16 can be a composite film layer, including one or more organic sub-film layers or inorganic sub-film layers.

[0081] For example, Figure 1C As shown, in some examples, the second thin film encapsulation layer 16 includes: a first inorganic encapsulation layer 161, on the side of the light emitting device 410 away from the silicon substrate 11; a second inorganic encapsulation layer 162, on the side of the first inorganic encapsulation layer 161 away from the silicon substrate 11; and a first organic encapsulation layer 163, on the side of the second inorganic encapsulation layer 162 away from the silicon substrate 11. For example, the first thin film encapsulation layer 18 includes: a second organic encapsulation layer 181, on the side of the color filter layer 17 away from the silicon substrate 11; and a third inorganic encapsulation layer 182, on the side of the second organic encapsulation layer 181 away from the silicon substrate 11, the refractive index of the first inorganic encapsulation layer 161 is greater than the refractive index of the second inorganic encapsulation layer 162, the refractive index of the second inorganic encapsulation layer 162, the refractive index of the first organic encapsulation layer 163, and the refractive index of the second organic encapsulation layer 181 are substantially the same, and the refractive index of the second organic encapsulation layer 181 is greater than the refractive index of the third inorganic encapsulation layer 182.

[0082] The refractive index of the first inorganic encapsulation layer 161 is greater than the refractive index of the second inorganic encapsulation layer 162, the refractive index of the second inorganic encapsulation layer 162, the refractive index of the first organic encapsulation layer 163 and the refractive index of the second organic encapsulation layer 181 are substantially the same, and the refractive index of the second organic encapsulation layer 181 is greater than the refractive index of the third inorganic encapsulation layer 182.

[0083] For example, the absolute value of the refractive index difference between the first inorganic encapsulation layer 161 and the second inorganic encapsulation layer 162 or the first organic encapsulation layer 163 may be greater than the absolute value of the refractive index difference between the second organic encapsulation layer 181 and the third inorganic encapsulation layer 182. For example, the first inorganic encapsulation layer 161 may be formed of silicon nitride (SiNx) having a refractive index of about 1.85, the second inorganic encapsulation layer 162 may be formed of aluminum oxide having a refractive index of about 1.6, the first organic encapsulation layer 163 and the second organic encapsulation layer 181 may both be formed of polyparaxylene having a refractive index of about 1.6, and the third inorganic encapsulation layer 182 may be formed of silicon oxide having a refractive index of about 1.5, and therefore, the absolute value of the refractive index difference between the first inorganic encapsulation layer 161 and the second inorganic encapsulation layer 162 or the first organic encapsulation layer 163 is 0.25, which is greater than the absolute value of the refractive index difference between the second organic encapsulation layer 181 and the third inorganic encapsulation layer 182, which is 0.1.

[0084] For example, the first inorganic encapsulation layer 161 may include silicon nitride, the second inorganic encapsulation layer 162 may include aluminum oxide, the first organic encapsulation layer 163 and the second organic encapsulation layer 181 each include at least one layer of polyparaxylene molecules, and the third inorganic encapsulation layer 182 includes silicon oxide, however it should be understood that the embodiments of the present disclosure are not limited to this.

[0085] For example, the thickness of the first inorganic encapsulation layer 161 in the plane direction perpendicular to the silicon substrate 11 may be greater than the thickness of the second inorganic encapsulation layer 162 in the plane direction perpendicular to the silicon substrate 11. The thickness of the first organic encapsulation layer 163 in the plane direction perpendicular to the silicon substrate 11 is greater than the thickness of the first inorganic encapsulation layer 161 in the plane direction perpendicular to the silicon substrate 11. The first organic encapsulation layer 163 and the second organic encapsulation layer 181 have substantially the same thickness in the plane direction perpendicular to the silicon substrate 11. The thickness of the second organic encapsulation layer 181 in the plane direction perpendicular to the silicon substrate 11 is greater than the thickness of the third inorganic encapsulation layer 182 in the plane direction perpendicular to the silicon substrate 11. The thickness of the third inorganic encapsulation layer 182 in the plane direction perpendicular to the silicon substrate 11 is greater than the thickness of the second inorganic encapsulation layer 162 in the plane direction perpendicular to the silicon substrate 11 and less than the thickness of the first inorganic encapsulation layer 161 in the plane direction perpendicular to the silicon substrate 11.

[0086] In some examples, the first inorganic encapsulation layer 161 may be formed of silicon nitride (SiNx) having a refractive index of about 1.85 to have a thickness of about 1.5 mm in a direction perpendicular to the plane of the silicon substrate 11. The second inorganic encapsulation layer 162 may be formed of aluminum oxide having a refractive index of about 1.6 and having a thickness of about 1.5 in a direction perpendicular to the plane of the silicon substrate 11. The first organic encapsulation layer 163 and the second organic encapsulation layer 181 can be formed of polyparaxylene with a refractive index of 1.6 to have a thickness of about 1.5 in a direction perpendicular to the plane of the silicon substrate 11. The third inorganic encapsulation layer 182 may be formed of silicon oxide having a refractive index of 1.5 to have a thickness of about For example, the first inorganic encapsulation layer 161 may be formed of silicon nitride (SiNx) having a refractive index of about 1.85 to have a thickness of about 1.5 in a direction perpendicular to the plane of the silicon substrate 11. The second inorganic encapsulation layer 162 may be formed of aluminum oxide having a refractive index of about 1.6 and having a thickness of about 1.5 in a direction perpendicular to the plane of the silicon substrate 11. The first organic encapsulation layer 163 and the second organic encapsulation layer 181 can be formed of polyparaxylene with a refractive index of 1.6 to have a thickness of about 1.5 in a direction perpendicular to the plane of the silicon substrate 11. The third inorganic encapsulation layer 182 may be formed of silicon oxide having a refractive index of 1.5 to have a thickness of about Thickness.

[0087] The second organic encapsulation layer 181 may be formed by a high molecular polymer material, and the high molecular polymer material may be, for example, one of the following: polyparaxylene, acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, and dinaphthylene resin. By adopting the MLD method to form the second organic encapsulation layer 181, the thickness can be precisely controlled. The second organic encapsulation layer 181 may include at least one layer of high molecular polymer molecules, wherein the high molecular polymer is any of the above-mentioned high molecular polymers. For example, when the first organic encapsulation layer 163 is formed by polyparaxylene, the second organic encapsulation layer 181 may include a single layer of polyparaxylene molecules, two layers of polyparaxylene molecules, three layers of polyparaxylene molecules, five layers of polyparaxylene molecules, ten layers of polyparaxylene molecules, and the like. It should be understood that the high molecular polymer molecules forming the second organic encapsulation layer 181 may be the same as or different from the high molecular polymer molecules forming the first organic encapsulation layer 163, and the embodiments of the present disclosure are not limited thereto. For example, the first organic encapsulation layer 163 formed of polyparaxylene molecules may have Equal thickness.

[0088] Through the MLD method, the thickness of the second organic encapsulation layer 181 can be precisely controlled to achieve The thickness is controlled by the level, thereby reducing the thickness of the encapsulation layer and thus reducing the total device thickness of the display device 1, thereby increasing the viewing angle of the display device 1, compared to other methods such as inkjet printing that usually forms a film layer several microns thick.

[0089] The third inorganic encapsulation layer 182 may be formed of an inorganic material, which may be, for example, at least one of the following: aluminum nitride, silicon nitride (SiNx), silicon oxynitride, silicon oxide, aluminum oxide, diamond-like carbon, etc. The third inorganic encapsulation layer 182 may be formed on the side of the second organic encapsulation layer 181 away from the color filter layer 107 by methods such as chemical vapor deposition (CVD) (such as plasma enhanced chemical vapor deposition (PECVD)), ion plating, atomic layer deposition (ALD), etc. The third inorganic encapsulation layer 182 may have a better effect of preventing oxygen and moisture penetration than the second organic encapsulation layer 181. It should be understood that the high molecular polymer molecules forming the third inorganic encapsulation layer 182 may be the same as or different from the high molecular polymer molecules forming the first sub-encapsulation layer 103, and the embodiments of the present disclosure are not limited to this. For example, the third inorganic encapsulation layer 182 may be formed of silicon oxide and may have Thickness.

[0090] In some embodiments, the refractive index of the second organic encapsulating layer 181 may be greater than that of the third inorganic encapsulating layer 182. For example, the second organic encapsulating layer 181 may be formed of polyparaxylene having a refractive index of 1.6, and the third inorganic encapsulating layer 182 may be formed of silicon oxide having a refractive index of 1.5.

[0091] The color filter layer 17 may include a red sub-color filter unit R, a green sub-color filter unit G, and a blue sub-color filter unit B arranged in an array, however, it should be understood that the embodiments of the present disclosure are not limited thereto. For example, the color filter layer 17 is sandwiched between the first thin film encapsulation layer 18 and the second thin film encapsulation layer 16 to release the stress of the first thin film encapsulation layer 18 and the second thin film encapsulation layer 16.

[0092] In some embodiments, the refractive index of the second thin film encapsulation layer 16 can be made greater than the refractive index of the first thin film encapsulation layer 18, so that the refractive index difference between the first thin film encapsulation layer 18 close to the air and the refractive index of the air is small, thereby improving the light emission rate. In an exemplary embodiment, the absolute value of the refractive index difference between the first inorganic encapsulation layer 161 and the first organic encapsulation layer 163 is greater than the absolute value of the refractive index difference between the second organic encapsulation layer 181 and the third inorganic encapsulation layer 182. For example, the first inorganic encapsulation layer 161 may be formed of silicon nitride (SiNx) having a refractive index of 1.85, the first organic encapsulation layer 163 may be formed of polyparaxylene having a refractive index of 1.6, the second organic encapsulation layer 181 may be formed of polyparaxylene having a refractive index of 1.6, and the third inorganic encapsulation layer 182 may be formed of silicon oxide having a refractive index of 1.5, and therefore, the absolute value of the refractive index difference between the first inorganic encapsulation layer 161 and the first organic encapsulation layer 163 is 0.25, which is greater than the absolute value of the refractive index difference between the second organic encapsulation layer 181 and the third inorganic encapsulation layer 182, which is 0.1.

[0093] Figure 5 FIG. 1 is a partial cross-sectional schematic diagram of a display device provided in some embodiments of the present disclosure. In addition to showing the structure of the array substrate 10 in more detail and showing a plurality of sub-pixels, the array substrate of this embodiment is Figure 1A The array substrate 10 in the display device 1 shown is substantially the same. It should be understood that the array substrate 10 in this embodiment can be Figure 1A The array substrates 10 shown are identical or substantially identical and are not shown in FIG. Figure 1A The detailed structure of the array substrate 10 is shown in FIG. Of course, the array substrate 10 in this embodiment can also be Figure 1A The array substrate 10 shown is different, as long as it can achieve the corresponding function. It should be understood that Figure 1A The array substrate 10 shown also includes a plurality of sub-pixels, which are not shown in the figure for the sake of simplicity. Figure 1A Sub-pixels are shown in FIG.

[0094] In this embodiment, if Figure 5As shown, the array substrate 10 includes a silicon substrate 11 and a light emitting device 410 (i.e., a light emitting element). For example, the silicon substrate 11 includes a silicon-based substrate 420, a pixel circuit 110, a light reflecting layer 440, and an insulating layer 450, which are stacked in sequence. The light emitting device 410 includes an anode layer 13 (i.e., a first pole of the light emitting device), an organic light emitting layer 14, and a cathode layer 15 (i.e., a second pole of the light emitting device) which are stacked in sequence on the insulating layer 450. The anode layer 13 is a transparent electrode layer. For example, the insulating layer 450 is light-transmissive so that the light emitted by the organic light emitting layer 14 penetrates therethrough and reaches the light reflecting layer 440 to be reflected by the light reflecting layer 440.

[0095] For example, the insulating layer 450 includes a via 452 filled with a metal member 451, and the light reflecting layer 440 is electrically connected to the anode layer 13 through the metal member 451. In this way, by forming a conductive path between the light reflecting layer 440 and the anode layer 13 in the insulating layer 450, it is beneficial to transmit the electrical signal provided by the pixel circuit 110 in the silicon substrate 11 to the anode layer 13 through the light reflecting layer 440. In this way, it is not only beneficial to realize the control of the light emitting device 410 by the pixel circuit 110, but also to make the structure of the silicon-based organic light emitting display panel more compact, which is beneficial to the miniaturization of the device. Further, for example, the metal member 451 is made of a metal material, such as tungsten metal, and the via filled with tungsten metal is also called a tungsten via (W-via). For example, in the case where the thickness of the insulating layer 450 is large, forming a tungsten via in the insulating layer 450 can ensure the stability of the conductive path, and since the process of making the tungsten via is mature, the surface flatness of the obtained insulating layer 450 is good, which is beneficial to reduce the contact resistance between the insulating layer 450 and the anode layer 13. It can be understood that the tungsten via is not only suitable for realizing the electrical connection between the insulating layer 450 and the anode layer 13, but also suitable for the electrical connection between the light reflection layer 440 and the pixel circuit 110, and the electrical connection between other wiring layers.

[0096] For example, the silicon substrate 11 includes a pixel circuit 110, the pixel circuit 110 is electrically connected to the light reflection layer 440, and the pixel circuit 110 is used to drive the light emitting device 410 to emit light. The pixel circuit 110 includes at least a driving transistor M0 and a switching transistor (not shown in the figure), and the driving transistor M0 is electrically connected to the light reflection layer 440. Thus, the electrical signal driving the light emitting device 410 can be transmitted to the anode layer 13 through the light reflection layer 440, thereby controlling the light emitting device 410 to emit light. For example, the driving transistor M0 includes a gate electrode G, a source electrode S, and a drain electrode D. The source electrode S of the driving transistor M0 is electrically connected to the light reflection layer 440. When the driving transistor M0 is in an on state and in a saturated state, under the control of the data voltage applied by the gate, the driving current provided by the power line can be transmitted to the anode layer 13 through the source electrode S of the driving transistor M0 and the light reflection layer 440. Due to the voltage difference between the anode layer 13 and the cathode layer 15, an electric field is formed between the two, and holes and electrons are respectively injected into the organic light-emitting layer 14 and recombine, so that the organic light-emitting layer 14 emits light under the action of the electric field. It can be understood that in the driving transistor M0, the positions of the source electrode S and the drain electrode D can be interchanged, so one of the source electrode S and the drain electrode D and the light reflection layer 440 can be electrically connected to each other.

[0097] For example, the array substrate 10 includes a plurality of sub-pixels (or pixel units). Figure 5 exemplarily shows three sub-pixels, namely, a red sub-pixel SP1, a green sub-pixel SP2 and a blue sub-pixel SP3. Each sub-pixel corresponds to a sub-pixel region of the array substrate 10. That is, each sub-pixel is provided with an independent light emitting device 410 and a driving transistor M0.

[0098] For example, the insulating layers 450 in the three sub-pixels are formed as one piece to facilitate manufacturing. Figure 5 As shown, the insulating layer 450 also includes an opening 454 for exposing the pad 453. The opening 454 is provided to facilitate electrical connection and signal communication between the pad 453 and an external circuit. For example, the opening 454 for exposing the pad 453 is located in the peripheral area 140. The colors of the sub-pixels in the array substrate 10 are only illustrative, and may also include other colors such as yellow, white, etc.

[0099] For example, Figure 5The array substrate 10 shown further includes a second thin film encapsulation layer 16, a color filter layer 17 and a first thin film encapsulation layer 18 which are sequentially arranged on the cathode layer 15. The display device 1 further includes a cover plate 19 which is arranged on the first thin film encapsulation layer 18. For example, the second thin film encapsulation layer 16 is located on the side of the cathode layer 15 away from the silicon-based substrate 420. The color filter layer 17 is located on the side of the second thin film encapsulation layer 16 away from the silicon-based substrate 420, and includes a red filter unit R, a green filter unit G and a blue filter unit B. The first thin film encapsulation layer 18 and the cover plate 19 are located on the side of the color filter layer 17 away from the silicon-based substrate 420. The specific materials of the first thin film encapsulation layer 18, the color filter layer 17, the second thin film encapsulation layer 16 and the cover plate 19 can be conventional materials in the art, which will not be described in detail here.

[0100] For example, in the array substrate 10 provided in the embodiment of the present disclosure, the light-emitting device 410 including the anode layer 13, the organic light-emitting layer 14 and the cathode layer 15, as well as the first thin-film encapsulation layer 18, the color film layer 17, the second thin-film encapsulation layer 16 and the cover plate 19 can all be manufactured on a silicon substrate 11 that is separately prepared. In addition, in the same process, the insulating layer 450 above the pad 453 can also be etched to expose the pad 453 and enable it to be bound to a flexible printed circuit board (FPC) or wired. Therefore, in the embodiment of the present disclosure, for example, a silicon substrate 11 including a light-reflecting layer 440 and an insulating layer 450 and suitable for forming a light-emitting device 430 can be manufactured by a wafer factory, and then a structure on the silicon substrate can be prepared in a display panel factory, which not only reduces the difficulty of manufacturing the light-reflecting layer 440, but also facilitates the subsequent process of the panel factory.

[0101] Figure 6 A schematic diagram of a circuit principle of an array substrate provided in some embodiments of the present disclosure. The array substrate includes a Figure 5The plurality of light-emitting devices L in the display area 130 (AA area) shown and the pixel circuits 110 coupled to each light-emitting device L in a one-to-one correspondence, the pixel circuits 110 including a driving transistor. In addition, the array substrate may further include a plurality of voltage control circuits 120 located in a non-display area outside the display area 130 of the array substrate. For example, at least two pixel circuits 110 in a row share a voltage control circuit 120, and the first electrode of the driving transistor in a row of pixel circuits 110 is coupled to the shared voltage control circuit 120, and the second electrode of each driving transistor is coupled to the corresponding light-emitting device L. The voltage control circuit 120 is configured to output an initialization signal Vinit to the first electrode of the driving transistor in response to a reset control signal RE to control the corresponding light-emitting device L to reset; and to output a first power supply signal VDD to the first electrode of the driving transistor in response to a light-emitting control signal EM to drive the light-emitting device L to emit light. By sharing the voltage control circuit 120, the structure of each pixel circuit in the display area 130 can be simplified, and the occupied area of ​​the pixel circuit in the display area 130 can be reduced, so that more pixel circuits and light-emitting devices can be set in the display area 130, and a high PPI organic light-emitting display panel can be realized. In addition, under the control of the reset control signal RE, the voltage control circuit 120 outputs the initialization signal Vinit to the first electrode of the driving transistor to control the corresponding light-emitting device to reset, so as to avoid the influence of the voltage loaded on the light-emitting device when the previous frame emits light on the next frame of light emission, thereby improving the afterimage phenomenon.

[0102] For example, the array substrate may further include a plurality of pixel units PX located in the display area 130, each pixel unit PX including a plurality of sub-pixels; each sub-pixel includes a light emitting device L and a pixel circuit 110. Further, the pixel unit PX may include three sub-pixels of different colors. The three sub-pixels may be a red sub-pixel, a green sub-pixel, and a blue sub-pixel. Of course, the pixel unit PX may also include four, five or more sub-pixels, which needs to be designed and determined according to the actual application environment and is not limited here.

[0103] For example, the pixel circuits 110 in at least two adjacent sub-pixels in the same row may share a voltage control circuit 120. Figure 6 As shown, all pixel circuits 110 in the same row can share a voltage control circuit 120. Alternatively, in other examples, pixel circuits 110 in two, three or more adjacent sub-pixels in the same row can also share a voltage control circuit 120, which is not limited here. In this way, the occupied area of ​​the pixel circuits in the display area 130 can be reduced by sharing the voltage control circuit 120.

[0104] Figure 7A circuit diagram of a specific implementation example of a voltage control circuit and a pixel circuit of an array substrate provided for some embodiments of the present disclosure. For example, the driving transistor M0 in the pixel circuit 110 may be an N-type transistor. In addition, the light-emitting device L may include an OLED. In this way, the positive electrode of the OLED is electrically connected to the second terminal D of the driving transistor M0, and the negative electrode of the OLED is electrically connected to the second power supply terminal VSS. The voltage of the second power supply terminal VSS is generally a negative voltage or a ground voltage VGND (generally 0V), and the voltage of the initialization signal Vinit may also be set to the ground voltage VGND, which is not limited here. For example, the OLED may be set to a Micro-OLED or a Mini-OLED, which is further conducive to realizing an organic light-emitting display panel with a high PPI.

[0105] For example, taking two pixel circuits 110 included in a row as an example, the voltage control circuit 120 may include a first switch transistor M1 and a second switch transistor M2. The gate of the first switch transistor M1 is used to receive the reset control signal RE, the first electrode of the first switch transistor M1 is used to receive the initialization signal Vinit, and the second electrode of the first switch transistor M1 is coupled to the first electrode S of the corresponding drive transistor M0. The gate of the second switch transistor M2 is used to receive the light emitting control signal EM, the first electrode of the second switch transistor M2 is used to receive the first power supply signal VDD, and the second electrode of the second switch transistor M2 is coupled to the first electrode S of the corresponding drive transistor M0.

[0106] For example, the first switch transistor M1 and the second switch transistor M2 may be of different types. For example, the first switch transistor M1 is an N-type transistor, and the second switch transistor M2 is a P-type transistor. Alternatively, the first switch transistor M1 is a P-type transistor, and the second switch transistor M2 is an N-type transistor. Of course, the first switch transistor M1 and the second switch transistor M2 may be of the same type. In practical applications, the types of the first switch transistor M1 and the second switch transistor M2 need to be designed according to the actual application environment, which is not limited here.

[0107] For example, the pixel circuit 110 may further include a third switch transistor M3 and a storage capacitor Cst. For example, the gate of the third switch transistor M3 is used to receive the first gate scan signal S1, the first electrode of the third switch transistor M3 is used to receive the data signal DA, and the second electrode of the third switch transistor M3 is coupled to the gate G of the driving transistor M0. The first end of the storage capacitor Cst is coupled to the gate G of the driving transistor M0, and the second end of the storage capacitor Cst is coupled to the ground terminal GND.

[0108] For example, the pixel circuit 110 may further include a fourth switch transistor M4. For example, the gate of the fourth switch transistor M4 is used to receive the second gate scan signal S2, the first electrode of the fourth switch transistor M4 is used to receive the data signal DA, and the second electrode of the fourth switch transistor M4 is coupled to the gate G of the driving transistor M0. In addition, the fourth switch transistor M4 is of a different type from the third switch transistor M3. For example, the third switch transistor M3 is an N-type transistor, and the fourth switch transistor M4 is a P-type transistor; or, the third switch transistor M3 is a P-type transistor, and the fourth switch transistor M4 is an N-type transistor.

[0109] It should be noted that when the voltage of the data signal DA is a voltage corresponding to a high gray scale, the voltage of the data signal DA can be prevented from being affected by the threshold voltage of the third N-type switch transistor M3, for example, by turning on the fourth P-type switch transistor M4 to transmit the data signal DA to the gate G of the drive transistor M0. When the voltage of the data signal DA is a voltage corresponding to a low gray scale, the voltage of the data signal DA can be prevented from being affected by the threshold voltage of the fourth P-type switch transistor M4, for example, by turning on the third N-type switch transistor M3 to transmit the data signal DA to the gate G of the drive transistor M0. In this way, the voltage range input to the gate G of the drive transistor M0 can be increased.

[0110] The driving transistor M0 , the first switch transistor M1 , the second switch transistor M2 , the third switch transistor M3 , and the fourth switch transistor M4 are MOS transistors fabricated in a silicon substrate.

[0111] It should be noted that, for the sake of clarity and simplicity, the embodiments of the present disclosure do not provide all the components of the display device. To achieve the basic functions of the display device, those skilled in the art may provide and set other structures not shown according to specific needs, and the embodiments of the present disclosure do not limit this.

[0112] In at least one of the above embodiments of the present disclosure, the display device can avoid cracks in the first thin film encapsulation layer when cutting the panel, thereby preventing water and oxygen in the outside air from invading the OLED device in the display device through the cracks in the first thin film encapsulation layer, improving the encapsulation technology for blocking water and oxygen, and extending the service life of the display device. In other embodiments, on the basis of the above structure, the display device can also achieve double effective encapsulation of the light-emitting device 410 by setting the area of ​​the second thin film encapsulation layer 16 to be smaller than the area of ​​the first thin film encapsulation layer 18, thereby achieving effective blocking of water vapor, oxygen, etc., and protecting the light-emitting device 410 and extending the service life of the light-emitting device 410. In some further embodiments, on the basis of the above structure, the display device is sealed between the sides of the cover plate and the silicon substrate of the array substrate by a sealant, providing a third layer of protection for blocking the intrusion of water and oxygen, thereby greatly improving the service life of the silicon-based OLED display device.

[0113] At least one embodiment of the present disclosure further provides an electronic device. Figure 8 A schematic diagram of an electronic device provided by at least one embodiment of the present disclosure. Figure 8 As shown, the electronic device 100 includes a display device 1 provided by any embodiment of the present disclosure, for example, Figure 1A or Figure 5 The display device 1 shown in FIG. 1 . For example, the electronic device 100 may be a virtual reality device or an augmented reality device.

[0114] For example, the display device 1 may be a silicon-based OLED display device, which is not limited in the embodiments of the present disclosure.

[0115] It should be noted that, for the sake of clarity and simplicity, the embodiments of the present disclosure do not provide all the components of the electronic device 100. To implement the basic functions of the electronic device 100, those skilled in the art may provide and set other structures not shown according to specific needs, and the embodiments of the present disclosure are not limited thereto.

[0116] The technical effects of the electronic device 100 provided in the above embodiment may refer to the technical effects of the display device provided in the embodiment of the present disclosure, which will not be described in detail here.

[0117] At least one embodiment of the present disclosure further provides a method for preparing a display device. Fig. 9 The flowchart of a method for preparing a display device provided by at least one embodiment of the present disclosure is shown. For example, the method can be used to prepare a display device provided by any embodiment of the present disclosure. For example, the method can be used to prepare Figure 1A The display substrate shown in FIG. Fig. 9 As shown, the method for preparing the display device includes steps S110 to S130.

[0118] Step S110: providing an array substrate motherboard.

[0119] Step S120: forming a first thin film encapsulation layer in the array substrate region of the array substrate master.

[0120] Step S130: cutting the array substrate motherboard after forming the first thin film encapsulation layer to obtain separate array substrates.

[0121] For step S110, for example, the array substrate motherboard is a silicon-based organic light-emitting diode array substrate motherboard, and includes at least one array substrate area, for example, includes multiple array substrate areas, each array substrate area includes multiple light-emitting elements arranged in an array. For example, after the motherboard including the multiple array substrate areas is cut along the cutting path, the multiple array substrate areas are separated from each other to form a separate plurality of the aforementioned array substrates 10.

[0122] For step S120, for example, in the array substrate region corresponding to the first thin film encapsulation layer, at each edge of the first thin film encapsulation layer, the orthographic projection of the array substrate region on a plane parallel to the array substrate master extends beyond the orthographic projection of the first thin film encapsulation layer on the plane. That is, the relative position relationship between the first thin film encapsulation layer and the array substrate region is Figure 1A or Figure 2 The relative position relationship between the first thin film encapsulation layer 18 and the array substrate 10 is the same as shown. For details, please refer to the previous Figure 1A or Figure 2 The relevant description will not be repeated here.

[0123] For example, in some examples, among the edges of the first thin film encapsulation layer 18 and the array substrate 10 that correspond to each other and are of unequal length, the distance d between each edge of the first thin film encapsulation layer 18 and the corresponding edge of the array substrate 10 is set to be greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer 18 (for example, approximately 50 micrometers (μm)) and the cutting alignment accuracy of the array substrate 10 (or cutting path) (for example, approximately 100 μm), so as to avoid errors causing the orthographic projection of the array substrate area on a plane parallel to the array substrate master to extend beyond the orthographic projection of the first thin film encapsulation layer on the plane, thereby causing cracks in the first thin film encapsulation layer during the cutting process.

[0124] For example, in some examples, the preparation method further includes: forming a light-emitting device on the array substrate area; forming a second thin-film encapsulation layer between the light-emitting device and the first thin-film encapsulation layer; and forming a color filter layer between the first thin-film encapsulation layer and the second thin-film encapsulation layer. For example, at each edge of the second thin-film encapsulation layer, the orthographic projection of the first thin-film encapsulation layer on the plane extends beyond the orthographic projection of the second thin-film encapsulation layer in the plane. That is, the relative position relationship between the first thin-film encapsulation layer and the second thin-film encapsulation layer is Figure 1A or Figure 4 The relative position relationship between the first thin film encapsulation layer 18 and the second thin film encapsulation layer 16 is the same. For details, please refer to the previous Figure 1A or Figure 4 The relevant description will not be repeated here.

[0125] For example, in some examples, among the edges of the first thin film encapsulation layer 18 and the second thin film encapsulation layer 16 that correspond to each other and have unequal lengths, the distance between each edge of the first thin film encapsulation layer 18 and the corresponding edge of the second thin film encapsulation layer 16 is set to be greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer 18 (for example, approximately 50 μm) and the coating alignment accuracy of the second thin film encapsulation layer 16 (for example, approximately 50 μm).

[0126] For example, in some examples, such as Figure 1A As shown, the edge of the first thin film encapsulation layer 18 close to the light emitting device 410 is attached to a portion of the edge of the second thin film encapsulation layer 16 away from the light emitting device 410. For example, the edge of the first thin film encapsulation layer 18 close to the light emitting device 410 is attached to the side edge of the second thin film encapsulation layer 16 away from the light emitting device 410 to enhance the sealing effect.

[0127] For step S130, for example, before cutting the array substrate motherboard after forming the first thin film encapsulation layer to separate the plurality of array substrate regions from each other, the preparation method further includes: forming a cover plate on the first thin film encapsulation layer of the array substrate region, that is, after forming the cover plate, performing the above-mentioned cutting operation, thereby obtaining a separate encapsulated array substrate. For example, at each edge of the first thin film encapsulation layer, the orthographic projection of the cover plate on the plane extends beyond the orthographic projection of the first thin film encapsulation layer on the plane. That is, the relative position relationship between the first thin film encapsulation layer and the cover plate is the same as that of the first thin film encapsulation layer. Figure 1A or Figure 3 The relative position relationship between the first thin film encapsulation layer 18 and the cover plate 19 shown in the figure is the same. For details, please refer to the previous Figure 1A or Figure 3 For example, in some examples, the orthographic projection of the array substrate on the plane extends beyond the orthographic projection of the cover plate on the plane, thereby preventing the cover plate from being broken during the cutting process.

[0128] For example, in some examples, a sealant connecting the cover plate and the array substrate is formed on the sides of the cover plate. The sides of the cover plate 19 and the array substrate 10 (for example, the silicon-based substrate in the array substrate 10) are sealed by the sealant 12. For example, the fitting height of the sealant 12 on the sides of the cover plate 19 is greater than 1 / 2 of the thickness of the cover plate 19 (for example, about 0.5 mm) and less than the thickness of the cover plate 19. By sealing the sides of the cover plate 19 and the silicon-based substrate with the sealant 12, further protection is provided to block the intrusion of water and oxygen, thereby greatly improving the life of the silicon-based OLED display device.

[0129] For example, in some examples, among the edges of the first thin film encapsulation layer 18 and the cover plate 19 that correspond to each other and are of unequal length, the distance between each edge of the first thin film encapsulation layer 18 and the corresponding edge of the cover plate 19 is greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer 18 (for example, about 50 μm) and the fitting alignment accuracy of the cover plate 19 (for example, about 100 μm), so as to avoid the orthographic projection of the cover plate on the plane not extending beyond the orthographic projection of the first thin film encapsulation layer on the plane, thereby causing the sealant to fail to perform a sealing function, thereby providing further protection against water and oxygen intrusion.

[0130] For example, in the embodiments of the present disclosure, the first thin film encapsulation layer and the second thin film encapsulation layer may be deposited by using a mask plate or other processes in the art, and the sealing of the sides of the cover plate and the silicon substrate by a sealant may be achieved by using processes in the art, which will not be described in detail herein. The embodiments of the present disclosure are not limited to this.

[0131] When the original array substrate master is cut to form each array substrate, since there is a certain distance between the first thin film encapsulation layer 18 and the cutting path, the tool used for cutting only contacts the array substrate 10 (for example, contacts the area at the edge of the array substrate 10 that is not covered by the first thin film encapsulation layer 18), and does not contact the first thin film encapsulation layer 18. Therefore, it can be avoided that the edge of the first thin film encapsulation layer 18 is flush with the edge of the array substrate 10 during the cutting process, resulting in cracks at the edge of the first thin film encapsulation layer 18, thereby preventing water and oxygen in the outside air from invading the OLED device through the cracks, thereby extending the service life of the display device. On the other hand, by setting the area of ​​the second thin film encapsulation layer 16 to be smaller than the area of ​​the first thin film encapsulation layer 18, double effective encapsulation of the light-emitting device 410 can be achieved, and effective blocking of water vapor, oxygen, etc. can be achieved, thereby protecting the light-emitting device 410 and extending the service life of the light-emitting device 410. At the same time, the sides of the cover plate and the silicon substrate of the array substrate are sealed by sealant, which provides a third guarantee for blocking water and oxygen intrusion, thereby greatly improving the service life of the silicon-based OLED display device.

[0132] It should be noted that in multiple embodiments of the present disclosure, the process of the method for preparing the display device may include more or fewer operations, and these operations may be performed sequentially or in parallel. Although the process of the preparation method described above includes multiple operations that appear in a specific order, it should be clearly understood that the order of the multiple operations is not limited. The preparation method described above can be performed once or multiple times according to predetermined conditions.

[0133] The technical effects of the method for preparing the display device provided in the above embodiment can be referred to the technical effects of the display device provided in the embodiment of the present disclosure, which will not be repeated here.

[0134] There are a few points to note:

[0135] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design.

[0136] (2) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to obtain new embodiments.

[0137] The above description is merely an exemplary embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure. The protection scope of the present disclosure is determined by the appended claims.

Claims

1. A display device, comprising: An array substrate and a first thin film encapsulation layer disposed on the array substrate; a cover plate, covering the first thin film encapsulation layer; Sealant, disposed on the sides of the cover plate and connecting the cover plate and the array substrate; Wherein, the array substrate is a silicon-based organic light emitting diode array substrate, The array substrate comprises: A silicon substrate and a light emitting device arranged on the silicon substrate; a second thin film encapsulation layer, disposed between the light emitting device and the first thin film encapsulation layer; A color film layer, disposed between the first thin film encapsulation layer and the second thin film encapsulation layer; At each edge of the first thin film encapsulation layer, an orthographic projection of the array substrate on a plane parallel to the array substrate extends beyond an orthographic projection of the first thin film encapsulation layer on the plane; Wherein, at each edge of the first thin film encapsulation layer, the orthographic projection of the cover plate on the plane extends beyond the orthographic projection of the first thin film encapsulation layer on the plane; Wherein, the fitting height of the sealant on the sides of the cover plate is greater than 1 / 2 of the thickness of the cover plate and less than the thickness of the cover plate.

2. The display device according to claim 1, wherein: Each edge of the first thin film encapsulation layer is spaced a predetermined distance from the sealant.

3. The display device according to claim 1 or 2, wherein: At each edge of the second thin film encapsulation layer, the orthographic projection of the first thin film encapsulation layer on the plane extends beyond the orthographic projection of the second thin film encapsulation layer on the plane.

4. The display device according to claim 3, wherein: The first thin film encapsulation layer and the second thin film encapsulation layer are in contact with an upper surface of the silicon substrate, respectively.

5. The display device according to claim 4, wherein: An edge of the first thin-film encapsulation layer close to the light-emitting device is attached to a portion of an edge of the second thin-film encapsulation layer away from the light-emitting device.

6. The display device according to claim 1 or 2, wherein: The light emitting device emits white light.

7. The display device according to claim 1 or 2, wherein: The color filter layer includes a red, green and blue color filter layer.

8. The display device according to claim 1 or 2, wherein: The second thin film encapsulation layer comprises: A first inorganic encapsulation layer, on a side of the light emitting device away from the silicon substrate; a second inorganic encapsulation layer, on a side of the first inorganic encapsulation layer away from the silicon substrate; a first organic encapsulation layer, on a side of the second inorganic encapsulation layer away from the silicon substrate; The first thin film encapsulation layer comprises: A second organic encapsulation layer is located on a side of the color filter layer away from the silicon substrate; a third inorganic encapsulation layer, on a side of the second organic encapsulation layer away from the silicon substrate, Among them, the refractive index of the first inorganic encapsulation layer is greater than the refractive index of the second inorganic encapsulation layer, the refractive index of the second inorganic encapsulation layer, the refractive index of the first organic encapsulation layer and the refractive index of the second organic encapsulation layer are substantially the same, and the refractive index of the second organic encapsulation layer is greater than the refractive index of the third inorganic encapsulation layer.

9. The display device according to claim 8, wherein: An absolute value of a refractive index difference between the first inorganic encapsulating layer and the second inorganic encapsulating layer is greater than an absolute value of a refractive index difference between the second organic encapsulating layer and the third inorganic encapsulating layer.

10. The display device according to claim 8, wherein: The first inorganic encapsulation layer comprises silicon nitride, The second inorganic encapsulation layer comprises aluminum oxide, The first organic encapsulation layer and the second organic encapsulation layer each include at least one layer of polyparaxylene molecules, The third inorganic encapsulation layer includes silicon oxide.

11. The display device according to claim 8, wherein: The thickness of the first inorganic encapsulation layer in a direction perpendicular to the plane of the silicon substrate is greater than the thickness of the second inorganic encapsulation layer in a direction perpendicular to the plane of the silicon substrate. The thickness of the first organic encapsulation layer in a direction perpendicular to the plane of the silicon substrate is greater than the thickness of the first inorganic encapsulation layer in a direction perpendicular to the plane of the silicon substrate. The first organic encapsulation layer and the second organic encapsulation layer have substantially the same thickness in a direction perpendicular to a plane of the silicon substrate, The thickness of the second organic encapsulation layer in a direction perpendicular to the plane of the silicon substrate is greater than the thickness of the third inorganic encapsulation layer in a direction perpendicular to the plane of the silicon substrate, and The thickness of the third inorganic encapsulation layer in a direction perpendicular to the plane of the silicon substrate is greater than the thickness of the second inorganic encapsulation layer in a direction perpendicular to the plane of the silicon substrate and less than the thickness of the first inorganic encapsulation layer in a direction perpendicular to the plane of the silicon substrate.

12. An electronic device, comprising the display device according to any one of claims 1 to 11, wherein: The electronic device is a virtual reality device or an augmented reality device.

13. A method for preparing a display device, comprising: Providing an array substrate motherboard, wherein the array substrate motherboard is a silicon-based organic light-emitting diode array substrate motherboard, and the array substrate motherboard includes at least one array substrate area; forming a first thin film encapsulation layer in the array substrate region, wherein at each edge of the first thin film encapsulation layer, an orthographic projection of the array substrate region on a plane parallel to the array substrate master plate extends beyond an orthographic projection of the first thin film encapsulation layer on the plane; Cutting the array substrate motherboard after forming the first thin film encapsulation layer to obtain separate array substrates; Among them, among the edges of the first thin film encapsulation layer and the array substrate area that correspond to each other and have unequal lengths, the distances between each edge of the first thin film encapsulation layer and the corresponding edge of the array substrate area are set to be greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer and the cutting alignment accuracy of the array substrate area.

14. The preparation method according to claim 13, wherein: Before cutting the array substrate motherboard after forming the first thin film encapsulation layer to obtain the individual array substrates, the method further includes: A cover plate is formed on the first thin film encapsulation layer in the array substrate region, wherein at each edge of the first thin film encapsulation layer, an orthographic projection of the cover plate on the plane extends beyond an orthographic projection of the first thin film encapsulation layer on the plane.

15. The preparation method according to claim 14, wherein: Among the edges of the first thin film encapsulation layer and the cover plate that correspond to each other and have unequal lengths, the distances between each edge of the first thin film encapsulation layer and the corresponding edge of the cover plate are set to be greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer and the bonding alignment accuracy of the cover plate.

16. The preparation method according to claim 14, further comprising: A sealant connecting the cover plate and the array substrate is formed on the sides of the cover plate.

17. The preparation method according to claim 13, further comprising: forming a light emitting device on the array substrate area; forming a second thin film encapsulation layer between the light emitting device and the first thin film encapsulation layer; A color filter layer is formed between the first thin film encapsulation layer and the second thin film encapsulation layer.

18. The preparation method according to claim 17, wherein: At each edge of the second thin film encapsulation layer, the orthographic projection of the first thin film encapsulation layer on the plane extends beyond the orthographic projection of the second thin film encapsulation layer in the plane.

19. The preparation method according to claim 17, wherein: Among the edges of the first thin film encapsulation layer and the second thin film encapsulation layer that correspond to each other and have unequal lengths, the distances between each edge of the first thin film encapsulation layer and the corresponding edge of the second thin film encapsulation layer are set to be greater than the sum of the coating alignment accuracy of the first thin film encapsulation layer and the coating alignment accuracy of the second thin film encapsulation layer.

20. The preparation method according to claim 17, wherein: The first thin film encapsulation layer is formed close to an edge of the light emitting device on a portion of the second thin film encapsulation layer that is away from an edge of the light emitting device.

Images