Display device

Abstract

A display device is disclosed. The display device includes a substrate and pixels. The substrate includes a display area and a non-display area. The pixels are arranged in the display area. Each pixel includes a first electrode, a second electrode spaced apart from the first electrode, and a light-emitting element arranged between the first and second electrodes. Each first electrode includes a closed loop.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0138734, filed in the Korean Intellectual Property Office on November 1, 2019, the entire contents of which are incorporated herein by reference. Technical Field

[0003] One or more embodiments of the present invention relate to a display device. Background Art

[0004] In recent years, technologies have been developed that include using materials with highly reliable inorganic crystal structures to manufacture micro-light-emitting elements, and using these elements to manufacture light-emitting devices. For example, light sources in light-emitting devices using micro-light-emitting elements can be configured with dimensions as small as approximately nanometers to micrometers. Such light-emitting devices can be used in various electronic devices such as display devices and lighting devices.

[0005] The light-emitting element can be prepared in a dispersed solution and provided to the light-emitting region of the pixel by inkjet printing, slit coating, etc. When a voltage can be applied to the first electrode and the second electrode of the pixel, an electric field can be formed between the first electrode and the second electrode, and the light-emitting element can be self-aligned between the first electrode and the second electrode.

[0006] It will be understood that this background technology section is intended, in part, to provide a useful background for understanding the technology. However, this background technology section may also include ideas, concepts, or cognitions that were not known or understood by those skilled in the relevant art before the corresponding effective filing date of the subject matter disclosed herein. Summary of the Invention

[0007] One or more embodiments of the present invention may be directed to a display device capable of improving behavior of a light emitting element between a first electrode and a second electrode while the light emitting element can be self-aligned.

[0008] A display device according to an embodiment of the present invention for solving the above-mentioned aspects may include a substrate and pixels, wherein the substrate includes a display area and a non-display area, and the pixels are provided in the display area.

[0009] The pixels may each include a first electrode, a second electrode spaced apart from the first electrode, and a light emitting element disposed between the first electrode and the second electrode, and the first electrodes may each include a closed loop.

[0010] The closed loop may include a polygonal shape or a circular shape.

[0011] The polygonal closed loop may be any one of a rhombus, a hexagon, and an octagon.

[0012] The first electrodes may each include: a first segment; a second segment connected to one end of the first segment and having a closed loop; a third segment extending intermittently from the first segment; and a fourth segment having one end connected to an area of ​​the first segment and the other end connected to one end of the third segment, the fourth segment being spaced apart from the second segment along the outer shape of the second segment.

[0013] The second electrodes may each include: a fifth segment; a sixth segment connected to one end of the fifth segment and extending along the outer shape of the second segment; a seventh segment continuously extending from the fifth segment via the sixth segment; and an eighth segment spaced apart from each of the second segment and the fourth segment along the outer shape of the second segment between the second segment and the fourth segment.

[0014] The light emitting element may be disposed between the second segment and the sixth segment, between the second segment and the eighth segment, and between the fourth segment and the eighth segment.

[0015] The light emitting element may be arranged radially relative to the second section.

[0016] The second electrodes may each include a ninth segment spaced apart from the second segment, the ninth segment having an island shape disposed inside the closed loop of the second segment.

[0017] The light emitting element may be disposed radially relative to the second segment between the second segment and the ninth segment.

[0018] Each of the light emitting elements may include a first semiconductor layer, a second semiconductor layer, and an active layer disposed between the first and second semiconductor layers. The first semiconductor layer may include an n-type semiconductor layer, and the second semiconductor layer may include a p-type semiconductor layer.

[0019] The pixels may be arranged in a pentile structure.

[0020] A display device according to another embodiment of the present invention for solving the above-mentioned aspect may include a substrate, a pixel circuit portion provided on the substrate, and a display element portion provided on the pixel circuit portion.

[0021] The display element portion may include pixels including a first electrode, a second electrode spaced apart from the first electrode, and a light emitting element disposed between the first electrode and the second electrode. The first electrodes may each include a closed loop.

[0022] The pixel circuit portion may include a driving transistor, a switching transistor, a capacitor, and a driving voltage line.

[0023] The first electrodes may each include: a first segment; a second segment connected to one end of the first segment and having a closed loop; a third segment extending intermittently from the first segment; and a fourth segment having one end connected to an area of ​​the first segment and the other end connected to one end of the third segment, the fourth segment being spaced apart from the second segment along the outer shape of the second segment.

[0024] The second electrodes may each include: a fifth segment; a sixth segment connected to one end of the fifth segment and extending along the outer shape of the second segment; a seventh segment continuously extending from the fifth segment via the sixth segment; and an eighth segment spaced apart from each of the second segment and the fourth segment along the outer shape of the second segment between the second segment and the fourth segment.

[0025] The light emitting element may be disposed between the second segment and the sixth segment, between the second segment and the eighth segment, and between the fourth segment and the eighth segment.

[0026] The light emitting element may be arranged radially relative to the second section.

[0027] The pixel circuit portion may include a first bridge pattern, one end of the first segment may be connected to the electrode of the driving transistor through a first contact hole, the seventh segment may be connected to the first bridge pattern through a second contact hole, and the first bridge pattern may be connected to the driving voltage line through a third contact hole.

[0028] The second electrode may further include a ninth segment spaced apart from the second segment, the ninth segment having an island shape disposed inside the closed loop of the second segment.

[0029] The light emitting element may be disposed radially relative to the second segment between the second segment and the ninth segment.

[0030] The pixel circuit portion may include a second bridge pattern, the seventh segment may be connected to the second bridge pattern through a second contact hole, the second bridge pattern may be connected to the driving voltage line through a third contact hole, and the ninth segment may be connected to the second bridge pattern through a fourth contact hole.

[0031] A display device according to an embodiment of the present invention may include a first electrode and a second electrode having a structure that allows the behavior of a light emitting element between the first electrode and the second electrode to be improved while the light emitting element can be self-aligned. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The above and other aspects and features of the present disclosure will become more apparent by describing the embodiments in more detail with reference to the accompanying drawings, in which:

[0033] Figure 1A is a perspective view schematically showing a light emitting element according to an embodiment of the present invention;

[0034] Figure 1B yes Figure 1A A schematic cross-sectional view of a light-emitting element;

[0035] Figure 2A is a perspective view schematically showing a light emitting element according to another embodiment of the present invention;

[0036] Figure 2B yes Figure 2A A schematic cross-sectional view of a light-emitting element;

[0037] Figure 3A is a perspective view schematically showing a light emitting element according to another embodiment of the present invention;

[0038] Figure 3B yes Figure 3A A schematic cross-sectional view of a light-emitting element;

[0039] Figure 4A is a perspective view schematically showing a light emitting element according to another embodiment of the present invention;

[0040] Figure 4B yes Figure 4A A schematic cross-sectional view of a light-emitting element;

[0041] Figure 5 is a schematic plan view showing a display device according to an embodiment of the present invention, specifically, Figure 1A 、 Figure 1B 、 Figure 2A 、 Figure 2B 、 Figure 3A 、 Figure 3B 、 Figure 4A and Figure 4B A schematic plan view of a display device in which any of the light-emitting elements shown in FIG is used as a light source;

[0042] Figures 6A to 6E It shows that according to various embodiments Figure 5 A schematic circuit diagram showing the electrical connection relationship between components included in the pixel shown in FIG.

[0043] Figure 7 yes Figure 5 An enlarged view of region A;

[0044] Figure 8 It is schematically shown Figure 7 A sub-pixel image of

[0045] Figure 9 It is along Figure 8 A schematic cross-sectional view taken along line II';

[0046] Figure 10 It is along Figure 8 A schematic cross-sectional view taken along line II-II';

[0047] Figure 11 and Figure 12 is schematically shown included in Figure 5 FIG. 1 is a diagram showing another example of a sub-pixel in a display device of FIG. 1 ;

[0048] Figure 13 is schematically shown included in Figure 5 A diagram showing yet another example of a sub-pixel in a display device of ; and

[0049] Figure 14 It is along Figure 13 Schematic cross-sectional view taken along line III-III'. DETAILED DESCRIPTION

[0050] The same reference numerals denote the same components. In the drawings, the thickness, proportion, and size of components may be exaggerated in order to effectively describe the technical contents.

[0051] As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. "And / or" includes all of one or more combinations that can be defined by the associated configuration. For example, "A and / or B" can be understood to mean "A, B, or A and B." The terms "and" and "or" can be used in conjunction or disjunction and can be understood to be equivalent to "and / or."

[0052] Terms such as "first" and "second" may be used to describe various components, but these components should not be limited by these terms. These terms are used only to distinguish one component from another. For example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component without departing from the scope of the present invention.

[0053] For purposes of its meaning and interpretation, the phrase "at least one of" is intended to include the meaning of "at least one selected from the group of." For example, "at least one of A and B" may be understood to mean "A, B, or A and B."

[0054] Terms such as "under," "below," "on," and "over" are used to describe the relationship of the configurations shown in the drawings. These terms are described as relative concepts based on the aspects indicated in the drawings. Similarly, as will be appreciated and understood by those skilled in the art, terms such as "overlap" and "cover" may include layers, stacks, surfaces, extending over, extending under, or any other suitable terms, and may indicate partial or complete overlap or coverage, as will be appreciated and understood by those skilled in the art.

[0055] It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. In contrast, when an element is referred to as being “directly on” another element, there may be no intervening elements present.

[0056] It should be understood that terms such as "including", "having", etc. are used to specify the existence of features, quantities, steps, operations, components, parts or their combinations described in this specification, but do not exclude the possibility of the existence or addition of one or more other features, quantities, steps, operations, components, parts or their combinations.

[0057] As used herein, "about" or "approximately" includes the stated value and the mean within an acceptable deviation range of the particular value as determined by one of ordinary skill in the art taking into account measurement problems and errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±5% of the stated value.

[0058] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that, unless clearly defined in this specification, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense.

[0059] Figure 1A is a perspective view schematically showing a light emitting element according to an embodiment of the present invention. Figure 1B yes Figure 1A Schematic cross-sectional view of a light-emitting element. Figure 2A is a perspective view schematically showing a light emitting element according to another embodiment of the present invention. Figure 2B yes Figure 2A Schematic cross-sectional view of a light-emitting element. Figure 3A is a perspective view schematically showing a light emitting element according to another embodiment of the present invention. Figure 3B yes Figure 3A Schematic cross-sectional view of a light-emitting element. Figure 4A is a perspective view schematically showing a light emitting element according to another embodiment of the present invention, and Figure 4B yes Figure 4A Schematic cross-sectional view of a light-emitting element.

[0060] For the sake of convenience, the following description shows the light emitting element manufactured by the etching method. Figure 1A 、 Figure 1B 、 Figure 2A 、 Figure 2B 、 Figure 3A and Figure 3B Next, a description is given of a light emitting element produced by a growth method. Figure 4A and Figure 4B In the embodiment of the present invention, the type and / or shape of the light emitting element is not limited to Figure 1A 、 Figure 1B 、 Figure 2A 、 Figure 2B 、 Figure 3A 、 Figure 3B 、 Figure 4A and Figure 4B The embodiment shown in .

[0061] First, refer to Figure 1A 、 Figure 1B 、 Figure 2A 、 Figure 2B 、 Figure 3A and Figure 3B The light emitting element LD includes a first semiconductor layer 11, a second semiconductor layer 13, and an active layer 12 interposed between the first semiconductor layer 11 and the second semiconductor layer 13. For example, the light emitting element LD may be implemented as a light emitting stack in which the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 may be stacked on each other (e.g., sequentially stacked).

[0062] According to an embodiment of the present invention, the light emitting element LD may be provided in a shape extending in one direction. In the case where the extending direction of the light emitting element LD is referred to as a longitudinal direction, the light emitting element LD may have one end portion and another end portion along the extending direction. Either the first semiconductor layer 11 or the second semiconductor layer 13 may be provided at the one end portion of the light emitting element LD, and the other of the first semiconductor layer 11 and the second semiconductor layer 13 may be provided at the other end portion of the light emitting element LD.

[0063] The light emitting element LD can be provided in various shapes. For example, the light emitting element LD may have a rod-like shape or a bar-like shape that may be long in the longitudinal direction (for example, the aspect ratio may be greater than 1). In an embodiment of the present invention, the length L of the light emitting element LD in the longitudinal direction may be greater than the diameter D (or the width of the cross section) of the light emitting element LD. The light emitting element LD may include, for example, a light emitting diode that is manufactured to be very small so as to have a diameter D and / or length L of about micrometer scale or about nanometer scale. In an embodiment of the present invention, the size of the light emitting element LD may be changed according to the required conditions (or design conditions) of the lighting device or the self-luminous display device.

[0064] For example, the first semiconductor layer 11 may include at least one n-type semiconductor layer. For example, the first semiconductor layer 11 may include any semiconductor material selected from the group consisting of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, or a combination thereof, and may include an n-type semiconductor layer doped with a first conductive dopant such as Si, Ge, or Sn, or a combination thereof. However, the material of the first semiconductor layer 11 is not limited thereto, and various materials may configure the first semiconductor layer 11.

[0065] The active layer 12 may be provided on the first semiconductor layer 11 and may be formed in a single quantum well structure or a multi-quantum well structure. The position of the active layer 12 may be variously changed depending on the type of the light-emitting element LD. The active layer 12 may emit light having a wavelength of about 400 nm to about 900 nm, and a double heterostructure may be used. In an embodiment of the present invention, a cladding layer (not shown) doped with a conductive dopant may be formed on and / or below the active layer 12. For example, the cladding layer may be formed of an AlGaN layer or an InAlGaN layer or a combination thereof. Depending on the embodiment, materials such as AlGaN or AlInGaN or a combination thereof may be used to form the active layer 12. Various materials may form the active layer 12.

[0066] When an electric field of a predetermined voltage or greater than the predetermined voltage is applied to both end portions of the light emitting element LD, the light emitting element LD emits light, and electron-hole pairs are combined in the active layer 12. By controlling the light emission of the light emitting element LD using this principle, the light emitting element LD can be used as a light source for various light emitting devices including pixels of a display device.

[0067] The second semiconductor layer 13 may be provided on the active layer 12 and may include a semiconductor layer of a different type than the first semiconductor layer 11. For example, the second semiconductor layer 13 may include at least one p-type semiconductor layer. For example, the second semiconductor layer 13 may include at least one semiconductor material selected from the group consisting of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, or a combination thereof, and may include a p-type semiconductor layer doped with a second conductive dopant such as Mg. However, the material of the second semiconductor layer 13 is not limited thereto, and various materials may be used to configure the second semiconductor layer 13.

[0068] In an embodiment of the present invention, the first semiconductor layer 11 and the second semiconductor layer 13 may have different widths (or thicknesses) from each other in the direction of the length L of the light emitting element LD. For example, the first semiconductor layer 11 may have a relatively wider width (or a greater thickness) than the second semiconductor layer 13 along the direction of the length L of the light emitting element LD. Figures 1A to 3B As shown in , the active layer 12 of the light emitting element LD may be positioned closer to the upper surface of the second semiconductor layer 13 than to the lower surface of the first semiconductor layer 11 .

[0069] According to an embodiment of the present invention, in addition to the above-mentioned first semiconductor layer 11, active layer 12 and second semiconductor layer 13, the light emitting element LD may further include an additional electrode 15 provided on the second semiconductor layer 13. Figure 3A and Figure 3B As shown in , the light emitting element LD may further include another additional electrode 16 provided at one end of the first semiconductor layer 11 .

[0070] According to an embodiment, the additional electrodes 15 and 16 may be ohmic contact electrodes, but are not limited thereto, and may be Schottky contact electrodes. The additional electrodes 15 and 16 may include a metal or a metal oxide, or a combination thereof. For example, chromium (Cr), titanium (Ti), aluminum (Al), gold (Au), nickel (Ni), ITO, oxides thereof, or alloys thereof, etc., may be used alone or in combination, but the present invention is not limited thereto.

[0071] The materials included in each of the additional electrodes 15 and 16 may be the same as or different from each other. The additional electrodes 15 and 16 may be substantially transparent or translucent. Therefore, light generated by the light emitting element LD may pass through the additional electrodes 15 and 16 and may be emitted to the outside of the light emitting element LD. According to an embodiment, in the case where the light generated by the light emitting element LD does not pass through the additional electrodes 15 and 16 and may be emitted to the outside of the light emitting element LD through regions other than the two end portions of the light emitting element LD, the additional electrodes 15 and 16 may include an opaque metal.

[0072] In an embodiment of the present invention, the light emitting element LD may further include an insulating film 14. However, depending on the embodiment, the insulating film 14 may be omitted or provided to cover only a portion of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13.

[0073] The insulating film 14 prevents electrical short circuits that may occur when the active layer 12 contacts conductive materials other than the first semiconductor layer 11 and the second semiconductor layer 13. Forming the insulating film 14 can improve the lifespan and efficiency of the light-emitting element LD by minimizing surface defects in the light-emitting element LD. When the light-emitting elements LD are closely spaced, the insulating film 14 prevents undesirable short circuits that may occur between the light-emitting elements LD. The presence or absence of the insulating film 14 is not limited as long as it can prevent short circuits between the active layer 12 and external conductive materials.

[0074] like Figure 1A and Figure 1BAs shown in FIG, the insulating film 14 may be provided in a form surrounding (eg, completely surrounding) the outer circumferential surface of the light emitting stack including the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13 and the additional electrode 15. For ease of description, in FIG. Figure 1A A portion of the insulating film 14 is removed, and the first semiconductor layer 11 , the active layer 12 , the second semiconductor layer 13 , and the additional electrode 15 included in the actual light emitting element LD may be surrounded by the insulating film 14 .

[0075] In the above embodiment, the insulating film 14 may surround (eg, completely surround) the outer circumferential surface of each of the first semiconductor layer 11 , the active layer 12 , the second semiconductor layer 13 , and the additional electrode 15 , but the present invention is not limited thereto.

[0076] According to the implementation method, Figure 2A and Figure 2B As shown in , the insulating film 14 may surround the outer circumferential surface of each of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13, and may not surround (e.g., completely surround) the outer circumferential surface of the additional electrode 15 provided on the second semiconductor layer 13, or may surround only a portion of the outer circumferential surface of the additional electrode 15 and may not surround the remaining outer circumferential surface of the additional electrode 15. However, the insulating film 14 may expose at least two end portions of the light emitting element LD. For example, the insulating film 14 may expose one end portion of the first semiconductor layer 11 and the additional electrode 15 provided at one end of the second semiconductor layer 13. According to an embodiment, as Figure 3A and Figure 3B As shown in , in the case where the additional electrodes 15 and 16 are provided at the end portion of the light emitting element LD, the insulating film 14 may expose at least a region of each of the additional electrodes 15 and 16. As another example, the insulating film 14 may not be provided.

[0077] According to an embodiment of the present invention, the insulating film 14 may include a transparent insulating material. For example, the insulating film 14 may include one or more insulating materials selected from the group consisting of SiO2, Si3N4, Al2O3, and TiO2, but is not limited thereto, and various materials having insulating properties may be used.

[0078] Insulating film 14 may be provided on light-emitting element LD to prevent short circuits between active layer 12 and the first and / or second electrodes (not shown). Forming insulating film 14 can improve the lifespan and efficiency of light-emitting element LD by minimizing surface defects in light-emitting element LD. Insulating film 14 can prevent undesirable short circuits that may occur between light-emitting elements LD when light-emitting elements LD are closely arranged.

[0079] The above-mentioned light-emitting element LD can be used as a light source for various display devices. The light-emitting element LD can be manufactured by a surface treatment process. For example, when the light-emitting element LD is mixed in a fluid solution (or solvent) and provided to each light-emitting area (for example, the light-emitting area of ​​each pixel or the light-emitting area of ​​each sub-pixel), each of the light-emitting elements LD can be subjected to surface treatment so that the light-emitting element LD can be uniformly sprayed rather than uniformly gathered in the solution.

[0080] The light-emitting device including the above-described light-emitting element LD can be used in various types of devices (including display devices) that require a light source. For example, when the light-emitting element LD is provided in the light-emitting region of each pixel of a display panel, the light-emitting element LD can serve as the light source of each pixel. However, the application of the light-emitting element LD is not limited to the above-described example. For example, the light-emitting element LD can be used in other types of devices that require a light source, such as lighting devices.

[0081] refer to Figure 4A and Figure 4B The light-emitting element LD manufactured by the growth method is described.

[0082] When describing the light-emitting element LD manufactured by the growth method, points different from the above-mentioned embodiment will be described, and parts not specifically described in the light-emitting element LD manufactured by the growth method may follow the above-mentioned embodiment, and the same marks are given to components similar and / or identical to those of the above-mentioned embodiment.

[0083] Reference Figure 4A and Figure 4B According to an embodiment of the present invention, the light emitting element LD may include a first semiconductor layer 11, a second semiconductor layer 13, and an active layer 12 interposed between the first semiconductor layer 11 and the second semiconductor layer 13. According to an embodiment, the light emitting element LD may include a light emitting pattern 10 of a core-shell structure including the first semiconductor layer 11 located in the center, the active layer 12 surrounding at least one side of the first semiconductor layer 11, the second semiconductor layer 13 surrounding at least one side of the active layer 12, and the additional electrode 15 surrounding at least one side of the second semiconductor layer 13.

[0084] The light-emitting element LD may be configured in a polygonal pyramid shape extending in one direction. For example, the light-emitting element LD may be configured in a hexagonal pyramid shape. In the case where the extending direction of the light-emitting element LD is referred to as the direction of the length L, the light-emitting element LD may have one end portion (or lower end portion) and another end portion (or upper end portion) along the direction of the length L. A portion of one of the first semiconductor layer 11 and the second semiconductor layer 13 may be exposed at one end portion (or lower end portion) of the light-emitting element LD, and a portion of the other of the first semiconductor layer 11 and the second semiconductor layer 13 may be exposed at the other end portion (or upper end portion) of the light-emitting element LD. For example, a portion of the first semiconductor layer 11 may be exposed at one end portion (or lower end portion) of the light-emitting element LD, and a portion of the second semiconductor layer 13 may be exposed at the other end portion (or upper end portion) of the light-emitting element LD. According to an embodiment, when the light-emitting element LD includes the additional electrode 15, a portion of the additional electrode 15 surrounding at least one side of the second semiconductor layer 13 may be exposed at the other end portion (or upper end portion) of the light-emitting element LD.

[0085] In an embodiment of the present invention, the first semiconductor layer 11 may be located at the core, for example, at the center of the light-emitting element LD. The light-emitting element LD may be provided in a shape corresponding to the shape of the first semiconductor layer 11. For example, when the first semiconductor layer 11 has a hexagonal pyramid shape, the light-emitting element LD and the light-emitting pattern 10 may also have a hexagonal pyramid shape.

[0086] The active layer 12 may be provided and / or formed in a shape surrounding the outer circumferential surface of the first semiconductor layer 11 in the direction of the length L of the light emitting element LD. In particular, the active layer 12 may be provided and / or formed in a shape surrounding the remaining region except for the above-mentioned one end portion (or lower end portion) provided at the lower side of the two end portions of the first semiconductor layer 11 in the direction of the length L of the light emitting element LD.

[0087] The second semiconductor layer 13 may be disposed and / or formed in a shape surrounding the active layer 12 in the direction of the length L of the light emitting element LD, and may include a semiconductor layer of a different type from that of the first semiconductor layer 11. For example, the second semiconductor layer 13 may include at least one p-type semiconductor layer.

[0088] In an embodiment of the present invention, the light emitting element LD may include an additional electrode 15 surrounding at least one side of the second semiconductor layer 13. The additional electrode 15 may be an ohmic contact electrode or a Schottky contact electrode electrically connected to the second semiconductor layer 13, but is not limited thereto.

[0089] As described above, the light emitting element LD may be configured in a hexagonal pyramid shape (having a shape in which an end portion may protrude), and may be implemented as a core-shell structured light emitting pattern 10 including a first semiconductor layer 11 disposed in the center thereof, an active layer 12 surrounding the first semiconductor layer 11, a second semiconductor layer 13 surrounding the active layer 12, and an additional electrode 15 surrounding the second semiconductor layer 13. The first semiconductor layer 11 may be disposed at one end portion (or lower end portion) of the light emitting element LD having the hexagonal pyramid shape, and the additional electrode 15 may be disposed at the other end portion (or upper end portion) of the light emitting element LD.

[0090] According to an embodiment, the light emitting element LD may further include an insulating film 14 disposed on an outer circumferential surface of the core-shell structured light emitting pattern 10. The insulating film 14 may include a transparent insulating material.

[0091] Figure 5 is a schematic plan view showing a display device according to an embodiment of the present invention, specifically, Figure 1A 、 Figure 1B 、 Figure 2A 、 Figure 2B 、 Figure 3A 、 Figure 3B 、 Figure 4A and Figure 4B Schematic plan view of a display device in which any of the light-emitting elements shown in FIG is used as a light source.

[0092] exist Figure 5 , for convenience, the structure of the display device is briefly shown based on the display area that can display an image. However, depending on the embodiment, the display device may further be provided with at least one driver (e.g., a scan driver, a data driver, etc.) and / or signal lines that are not shown.

[0093] Reference Figure 1A 、 Figure 1B 、 Figure 2A 、 Figure 2B 、 Figure 3A 、 Figure 3B 、 Figure 4A 、 Figure 4B and Figure 5 , a display device according to an embodiment of the present invention may include: a substrate SUB; a pixel PXL provided on the substrate SUB and including at least one light emitting element LD; a driver (not shown) provided on the substrate SUB and driving the pixel PXL; and one or more lines (not shown) connecting the pixel PXL and the driver to each other.

[0094] Display devices can be classified into passive matrix display devices and active matrix display devices according to a method of driving the light emitting element LD. For example, when the display device is implemented as an active matrix type, each of the pixels PXL may include a driving transistor for controlling the amount of current supplied to the light emitting element LD, a switching transistor for transmitting a data signal to the driving transistor, and the like.

[0095] Recently, active matrix display devices, which can select and illuminate each pixel PXL in terms of resolution, contrast, and operating speed, have become mainstream. However, the present invention is not limited to this. For example, a passive matrix display device, in which each group of pixels PXL can be illuminated, can also use components for driving the light-emitting element LD (e.g., the first electrode and the second electrode).

[0096] The substrate SUB may include a display area DA and a non-display area NDA.

[0097] According to an embodiment, the display area DA may be provided in the central area of ​​the display device, and the non-display area NDA may be provided at the edge area of ​​the display device to surround the display area DA. However, the positions of the display area DA and the non-display area NDA are not limited thereto, and the positions of the display area DA and the non-display area NDA may be changed.

[0098] The display area DA may be an area where pixels PXL that can display an image may be provided, and the non-display area NDA may be an area where a driver that can drive the pixels PXL and a portion of one or more lines connecting the pixels PXL and the driver to each other may be provided.

[0099] The display area DA can have various shapes. For example, the display area DA can be configured as a polygon with a closed shape formed by straight lines. The display area DA can be configured as a circular shape and / or an elliptical shape with curved lines. The display area DA can be configured as various shapes with straight lines and curved lines, such as a semicircle, a semiellipse, etc.

[0100] The non-display area NDA may be provided on at least one side of the display area DA. In an embodiment of the present invention, the non-display area NDA may surround a periphery (or edge) of the display area DA.

[0101] The substrate SUB may include a transparent insulating material and may transmit light.

[0102] The substrate SUB may be a rigid substrate. For example, the rigid substrate may be one of a glass substrate, a quartz substrate, a glass ceramic substrate, and a crystal glass substrate, or a combination thereof.

[0103] The substrate SUB may be a flexible substrate. Here, the flexible substrate may be one of a film substrate and a plastic substrate including a polymer organic material, or a combination thereof. For example, the flexible substrate may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate.

[0104] However, the material of the substrate SUB may be variously changed and may include fiber reinforced plastic (FRP) or the like.

[0105] An area on the substrate SUB may be set as a display area DA for arranging pixels PXL, and the remaining area on the substrate SUB may be set as a non-display area NDA. For example, the substrate SUB may include a display area DA including pixels PXL and a non-display area NDA disposed around the display area DA.

[0106] Each of the pixels PXL may be disposed in the display area DA on the substrate SUB. In an embodiment of the present invention, the pixels PXL may be arranged in the display area DA in a pentile array structure.

[0107] like Figure 5 As shown in , the pixel PXL may include a first subpixel SPX1, a second subpixel SPX2, a third subpixel SPX3, and a fourth subpixel SPX4. According to an embodiment, the first subpixel SPX1 may be a red subpixel R that emits red light, the second subpixel SPX2 may be a blue subpixel B that emits blue light, and the third subpixel SPX3 and the fourth subpixel SPX4 may be green subpixels G that emit green light.

[0108] For example, the pixel PXL may be a diamond pentile array having an RGBG structure. In the diamond pentile pixel PXL, the first subpixel SPX1 and the fourth subpixel SPX4 may be arranged in a diagonal direction (a direction between the first direction DR1 and the second direction DR2), and the second subpixel SPX2 and the third subpixel SPX3 may be arranged in a diagonal direction.

[0109] However, the color of light emitted by the first to fourth sub-pixels SPX1 to SPX4 is not limited thereto. The first to fourth sub-pixels SPX1 to SPX4 may emit light of different colors. For example, the first sub-pixel SPX1 may emit red light, the second sub-pixel SPX2 may emit blue light, the third sub-pixel SPX3 may emit green light, and the fourth sub-pixel SPX4 may emit white light. Reference will be made later to the diagram in which region A is enlarged. Figure 7The first to fourth sub-pixels SPX1 to SPX4 are described in detail.

[0110] Each pixel PXL may include at least one light-emitting element LD driven by corresponding scan signals and data signals. The light-emitting element LD may have a size as small as approximately micrometers or nanometers and may be connected in parallel with adjacent light-emitting elements LD, but the present invention is not limited thereto. The light-emitting element LD may constitute the light source of each pixel PXL.

[0111] Each of the pixels PXL may include at least one light source driven by a signal (e.g., a scan signal and a data signal) and / or a power source (e.g., a first driving power source and a second driving power source). For example, each of the pixels PXL may include a light source having a small size of about nanometer scale to about micrometer scale. Figures 1A to 4B At least one micro light emitting element LD is shown in each of the embodiments. However, the type of light emitting element LD that can be used as the light source of each of the pixels PXL is not limited thereto.

[0112] In the embodiment of the present invention, the color, type, and / or number of the pixels PXL are not particularly limited, and for example, the color of light emitted from each pixel PXL may be variously changed.

[0113] The driver can provide signals and power to each pixel PXL through one or more lines, thereby controlling the driving of the pixel PXL. Figure 5 In the figure, one or more lines are omitted for ease of description.

[0114] The driver may include a timing controller, a scan driver that provides scan signals to the pixels PXL via scan lines, a light-emitting driver that provides light-emitting control signals to the pixels PXL via light-emitting control lines, and a data driver that provides data signals to the pixels PXL via data lines. The timing controller may control the scan driver, the light-emitting driver, and the data driver.

[0115] Figures 6A to 6E It shows that according to various embodiments Figure 5 A schematic circuit diagram of the electrical connection relationship between components that may be included in a pixel shown in FIG.

[0116] For example, Figures 6A to 6E 1 and 2. The electrical connection relationship between components included in the pixel PXL applicable to the active display device according to various embodiments is shown. However, the types of components included in the pixel PXL to which the embodiments of the present invention are applicable are not limited thereto.

[0117] exist Figures 6A to 6E In, not only Figure 5The components included in each of the pixels PXL shown in FIG. 1 and the region where these components may be disposed may be referred to as a pixel PXL. Figures 6A to 6E Each pixel PXL shown in FIG can be Figure 5 The pixel PXL may have substantially the same or similar structure as any one of the pixels PXL included in the display device.

[0118] Reference Figures 1A to 4B 、 Figure 5 and Figures 6A to 6E One pixel PXL (hereinafter referred to as a pixel) may include a light emitting portion EMU that generates light of brightness corresponding to a data signal. The pixel PXL may further optionally include a pixel circuit 144 for driving the light emitting portion EMU.

[0119] According to an embodiment, the light-emitting portion EMU may include light-emitting elements LD connected in parallel between a first power line PL1 to which a first driving power source VDD may be applied and a second power line PL2 to which a second driving power source VSS may be applied. For example, the light-emitting portion EMU may include a first electrode EL1 (or "first alignment electrode") connected to the first driving power source VDD via the pixel circuit 144 and the first power line PL1, a second electrode EL2 (or "second alignment electrode") connected to the second driving power source VSS via the second power line PL2, and the light-emitting elements LD that may be connected in parallel in the same direction. In an embodiment of the present invention, the first electrode EL1 may be an anode electrode, and the second electrode EL2 may be a cathode electrode.

[0120] In an embodiment, each of the light-emitting elements LD included in the light-emitting portion EMU may include a first end portion connected to a first driving power source VDD via a first electrode EL1 and a second end portion connected to a second driving power source VSS via a second electrode EL2. The first driving power source VDD and the second driving power source VSS may have different potentials. For example, the first driving power source VDD may be set to a high potential power source, and the second driving power source VSS may be set to a low potential power source. During the light-emitting period of the pixel PXL, the potential difference between the first driving power source VDD and the second driving power source VSS may be set to a threshold voltage or greater of the light-emitting element LD.

[0121] As described above, the light emitting elements LD connected in parallel in the same direction (eg, forward direction) between the first electrode EL1 and the second electrode EL2 provided with different potentials can configure corresponding effective light sources. These effective light sources can be gathered to form the light emitting portion EMU of the pixel PXL.

[0122] The light-emitting elements LD of the light-emitting portion EMU can emit light at a brightness corresponding to the drive current supplied by the corresponding pixel circuit 144. For example, the pixel circuit 144 can supply the light-emitting portion EMU with a drive current corresponding to the grayscale value of the corresponding frame data during each frame period. The drive current supplied to the light-emitting portion EMU can be divided and flowed to the light-emitting elements LD connected in the same direction. Therefore, each of the light-emitting elements LD can emit light at a brightness corresponding to the current flowing through the light-emitting element LD, and the light-emitting portion EMU can emit light at a brightness corresponding to the drive current.

[0123] Figures 6A to 6C An embodiment in which the light emitting element LD can be connected in the same direction between the first driving power source VDD and the second driving power source VSS is shown, but the present invention is not limited thereto. According to an embodiment, in addition to the light emitting element LD of each effective light source, the light emitting portion EMU may further include at least one ineffective light source. For example, Figure 6D and Figure 6E As shown in FIG, at least one reverse light-emitting element LDr may be further connected between the first electrode EL1 and the second electrode EL2 of the light-emitting portion EMU. The reverse light-emitting element LDr may be connected in parallel between the first electrode EL1 and the second electrode EL2 together with the light-emitting element LD of the effective light source, and may be connected to the first electrode EL1 and the second electrode EL2 in a direction opposite to that of the light-emitting element LD. Even if a driving voltage (e.g., a forward driving voltage) may be applied between the first electrode EL1 and the second electrode EL2, the reverse light-emitting element LDr may remain in an inactive state, and thus substantially no current may flow through the reverse light-emitting element LDr.

[0124] The pixel circuit 144 may be connected to the scan line and the data line of the corresponding pixel PXL. For example, when the pixel PXL is arranged in the i-th (i may be a natural number) row and the j-th (j may be a natural number) column of the display area DA, the pixel circuit 144 of the pixel PXL may be connected to the i-th scan line Si and the j-th data line Dj of the display area DA. Figure 6A and Figure 6B As shown in FIG, according to an embodiment, the pixel circuit 144 may include a first transistor T1, a second transistor T2 and a storage capacitor Cst. However, the structure of the pixel circuit 144 is not limited to Figure 6A and Figure 6B The embodiment shown in .

[0125] First, refer to Figure 6A , the pixel circuit 144 includes a first transistor T1 and a second transistor T2 and a storage capacitor Cst.

[0126] A first terminal of the second transistor T2 (switching transistor) may be connected to the j-th data line Dj, and a second terminal thereof may be connected to the first node N1. Here, the first terminal and the second terminal of the second transistor T2 may be different terminals. For example, when the first terminal is a source electrode, the second terminal may be a drain electrode. The gate electrode of the second transistor T2 may be connected to the i-th scan line Si.

[0127] When a scan signal having a voltage (e.g., a low voltage) that can turn on the second transistor T2 is supplied from the i-th scan line Si, the second transistor T2 is turned on to electrically connect the j-th data line Dj and the first node N1 to each other. At this time, a data signal of a corresponding frame is supplied to the j-th data line Dj, and thus, the data signal is transmitted to the first node N1. The data signal transmitted to the first node N1 is charged into the storage capacitor Cst.

[0128] A first terminal of the first transistor T1 (driving transistor) may be connected to a first driving power supply VDD, and a second terminal thereof may be electrically connected to a first electrode EL1 of each of the light-emitting elements LD. A gate electrode of the first transistor T1 may be connected to a first node N1. The first transistor T1 may control the amount of driving current supplied to the light-emitting element LD according to the voltage of the first node N1.

[0129] One electrode of the storage capacitor Cst may be connected to the first driving power source VDD, and the other electrode thereof may be connected to the first node N1. The storage capacitor Cst may be charged with a voltage corresponding to the data signal supplied to the first node N1 and may maintain the charged voltage until a data signal of a subsequent (e.g., next) frame can be supplied.

[0130] Figure 6A and Figure 6B Each of the 10 pixels 144 shows a pixel circuit 144 including a second transistor T2 for transmitting a data signal to the pixel PXL, a storage capacitor Cst for storing the data signal, and a first transistor T1 for supplying a driving current corresponding to the data signal to the light emitting element LD.

[0131] However, the present invention is not limited thereto, and the structure of the pixel circuit 144 may be variously modified and implemented. For example, the pixel circuit 144 may further include other circuit elements, such as a transistor element for compensating for the threshold voltage of the first transistor T1, a transistor element for initializing the first node N1, and / or a transistor element for controlling the light emitting time of the light emitting element LD, or a boosting capacitor for boosting the voltage of the first node N1.

[0132] exist Figure 6AIn the embodiment, the transistors (e.g., the first transistor T1 and the second transistor T2) included in the pixel circuit 144 may be P-type transistors, but the present invention is not limited thereto. For example, at least one of the first transistor T1 and the second transistor T2 included in the pixel circuit 144 may be changed to an N-type transistor.

[0133] Reference Figures 1A to 4B 、 Figure 5 and Figure 6B According to an embodiment of the present invention, the first transistor T1 and the second transistor T2 can be implemented as N-type transistors. In addition to the connection position changes of some components due to the change of transistor type, Figure 6B The configuration or operation of the pixel circuit 144 shown in FIG. Figure 6A The configuration or operation of the pixel circuit 144 is similar. Therefore, a description thereof will be briefly given.

[0134] In an embodiment of the present invention, Figure 6B The pixel circuit 144 shown in FIG may include a storage capacitor Cst and a first transistor T1 and a second transistor T2 formed of N-type transistors. In the case where the first transistor T1 and the second transistor T2 are formed of N-type transistors, the light emitting portion EMU may be connected between the first driving power supply VDD and the pixel circuit 144 to stabilize the storage capacitor Cst, and the storage capacitor Cst may be charged with a voltage corresponding to the data signal supplied to the first node N1. However, the present invention is not limited thereto. According to an embodiment, Figure 6B The light emitting portion EMU shown in FIG can be connected between the pixel circuit 144 and the second driving power source VSS. In the embodiment of the present invention, the configuration of the pixel circuit 144 is not limited to Figure 6A and Figure 6B For example, the pixel circuit 144 may be as shown in FIG. Figure 6C and Figure 6D The embodiment shown in FIG.

[0135] The pixel circuit 144 can be connected to the scan line and the data line of the pixel PXL. Figure 6C and Figure 6D As shown in FIG, in the case where the pixel PXL is disposed in the i-th row and the j-th column of the display area DA, the pixel circuit 144 of the pixel PXL may be connected to the i-th scan line Si and the j-th data line Dj of the corresponding pixel PXL.

[0136] Depending on the embodiment, the pixel circuit 144 may also be connected to at least one other scan line. For example, the pixel PXL arranged in the i-th row of the display area DA may also be connected to the (i-1)th scan line Si-1 and / or the (i+1)th scan line Si+1. Depending on the embodiment, in addition to being connected to the first driving power supply VDD and the second driving power supply VSS, the pixel circuit 144 may also be connected to a third power supply. For example, the pixel circuit 144 may also be connected to the initialization power supply Vint.

[0137] The pixel circuit 144 may include first to seventh transistors T1 to T7 and a storage capacitor Cst.

[0138] One electrode (e.g., source electrode) of the first transistor T1 (driving transistor) may be connected to the first driving power supply VDD via the fifth transistor T5, and the other electrode (e.g., drain electrode) thereof may be connected to the end portion of the light-emitting element LD via the sixth transistor T6. The gate electrode of the first transistor T1 may be connected to the first node N1. The first transistor T1 may control the driving current flowing through the light-emitting element LD between the first driving power supply VDD and the second driving power supply VSS according to the voltage of the first node N1.

[0139] The second transistor T2 (switching transistor) may be connected between the j-th data line Dj connected to the pixel PXL and the source electrode of the first transistor T1. The gate electrode of the second transistor T2 may be connected to the i-th scan line Si connected to the pixel PXL. When a scan signal having a gate-on voltage (e.g., a low voltage) is provided from the i-th scan line Si, the second transistor T2 may be turned on to electrically connect the j-th data line Dj to the source electrode of the first transistor T1. Therefore, when the second transistor T2 is turned on, the data signal provided from the j-th data line Dj may be transmitted to the first transistor T1.

[0140] The third transistor T3 may be connected between the drain electrode of the first transistor T1 and the first node N1. A gate electrode of the third transistor T3 may be connected to the i-th scan line Si. When a scan signal having a gate-on voltage is provided from the i-th scan line Si, the third transistor T3 may be turned on to electrically connect the drain electrode of the first transistor T1 and the first node N1 to each other.

[0141] The fourth transistor T4 may be connected between the first node N1 and an initialization power line IPL to which an initialization power source Vint may be applied. A gate electrode of the fourth transistor T4 may be connected to a previous scan line, for example, the (i-1)th scan line Si-1. When a scan signal having a gate-on voltage is supplied to the (i-1)th scan line Si-1, the fourth transistor T4 may be turned on to transmit the voltage of the initialization power source Vint to the first node N1. Here, the initialization power source Vint may have a voltage equal to or less than the lowest voltage of the data signal.

[0142] The fifth transistor T5 may be connected between the first driving power source VDD and the first transistor T1. A gate electrode of the fifth transistor T5 may be connected to a corresponding light emission control line, for example, the i-th light emission control line Ei. When a light emission control signal having a gate-off voltage is supplied to the i-th light emission control line Ei, the fifth transistor T5 may be turned off, and otherwise, the fifth transistor T5 may be turned on.

[0143] The sixth transistor T6 may be connected between the first transistor T1 and the end portion of the light-emitting element LD. A gate electrode of the sixth transistor T6 may be connected to the i-th light-emitting control line Ei. When a light-emitting control signal having a gate-off voltage is supplied to the i-th light-emitting control line Ei, the sixth transistor T6 may be turned off, and otherwise, the sixth transistor T6 may be turned on.

[0144] The seventh transistor T7 may be connected between the end portion of the light-emitting element LD and the initialization power supply line IPL, for example, between the second node N2 and the initialization power supply line IPL. The gate electrode of the seventh transistor T7 may be connected to any one of the subsequent scan lines (for example, the next one), for example, the (i+1)th scan line Si+1. When a scan signal of a gate-on voltage is supplied to the (i+1)th scan line Si+1, the seventh transistor T7 may be turned on to supply the voltage of the initialization power supply Vint to the end portion of the light-emitting element LD.

[0145] The storage capacitor Cst may be connected between the first driving power source VDD and the first node N1. The storage capacitor Cst may store the data signal supplied to the first node N1 and a voltage corresponding to the threshold voltage of the first transistor T1 during each frame period.

[0146] exist Figure 6C and Figure 6D In the embodiment, the transistors (eg, the first to seventh transistors T1 to T7) included in the pixel circuit 144 may be P-type transistors, but the present invention is not limited thereto. For example, at least one of the first to seventh transistors T1 to T7 may be changed to an N-type transistor.

[0147] In the embodiment of the present invention, the configuration of the pixel circuit 144 is not limited to 6A to 6D For example, the pixel circuit 144 may be as shown in FIG. Figure 6E The embodiment shown in FIG.

[0148] The pixel circuit 144 can also be connected to the control line and the sense line. Figure 6EAs shown in FIG, the pixel circuit 144 of the pixel PXL disposed in the i-th row and the j-th column of the display area DA may be connected to the i-th control line CLi and the j-th sensing line SENj of the display area DA. Figure 6A and Figure 6B In addition to the first transistor T1 and the second transistor T2 shown in FIG, Figure 6E The pixel circuit 144 shown in FIG may further include a third transistor T3 .

[0149] The third transistor T3 may be connected between the first transistor T1 and the j-th sensing line SENj. For example, an electrode of the third transistor T3 may be connected to a terminal (e.g., a source electrode) of the first transistor T1 connected to the first electrode EL1, and the other electrode of the third transistor T3 may be connected to the j-th sensing line SENj. If the j-th sensing line SENj is omitted, the other electrode of the third transistor T3 may be connected to the j-th data line Dj.

[0150] According to an embodiment, the gate electrode of the third transistor T3 may be connected to the i-th control line CLi. In the case where the i-th control line CLi is omitted, the gate electrode of the third transistor T3 may be connected to the i-th scan line Si. The third transistor T3 may be turned on by a control signal of a gate-on voltage (e.g., a high level) supplied to the i-th control line CLi during a sensing period to electrically connect the j-th sensing line SENj and the second transistor T2 to each other.

[0151] Depending on the embodiment, the sensing period may be a period for extracting characteristic information (e.g., the threshold voltage of the first transistor T1, etc.) for each of the pixels PXL disposed in the display area DA. During this sensing period, the first transistor T1 may be turned on by supplying a reference voltage, which may turn on the first transistor T1, to the first node N1 via the j-th data line Dj and the second transistor T2, or by connecting each pixel PXL to a current source, etc. The first transistor T1 may be connected to the j-th sensing line SENj by supplying a gate-on voltage control signal to the third transistor T3 to turn on the third transistor T3. Therefore, characteristic information of each pixel PXL, including the threshold voltage of the first transistor T1, etc., may be extracted via the j-th sensing line SENj. The extracted characteristic information may be used to convert image data, thereby compensating for characteristic variations between the pixels PXL.

[0152] Figure 6E Although an embodiment is disclosed in which all of the first to third transistors T1 to T3 may be N-type transistors, the present invention is not limited thereto. For example, at least one of the first to third transistors T1 to T3 may be changed to a P-type transistor. Figure 6EAn embodiment is disclosed in which the light emitting part EMU may be connected between the pixel circuit 144 and the second driving power source VSS, but the light emitting part EMU may be connected between the first driving power source VDD and the pixel circuit 144 .

[0153] Figures 6A to 6E While an embodiment is shown in which all of the light-emitting elements LD of each light-emitting section EMU are connected in parallel, the present invention is not limited thereto. Depending on the embodiment, the light-emitting section EMU may include at least one series stage including light-emitting elements LD connected in parallel. For example, the light-emitting section EMU may be configured in a hybrid series / parallel configuration.

[0154] The structure of the pixel PXL applicable according to the present disclosure is not limited to Figures 6A to 6E , and the corresponding pixel PXL may have various structures. In another embodiment of the present invention, each pixel PXL may be configured inside a passive light-emitting display device or the like. The pixel circuit 144 may be omitted, and each of the end portions of the light-emitting element LD included in the light-emitting portion EMU may be connected (e.g., directly connected) to the scan lines Si-1, Si, Si+1, the j-th data line Dj, the first power line PL1 to which the first driving power VDD is applied, the second power line PL2 to which the second driving power VSS is applied, and / or the control line.

[0155] Figure 7 yes Figure 5 Magnified view of area A.

[0156] Reference Figure 5 and Figure 7 The display device may include a first electrode EL1 and a second electrode EL2, a light emitting element LD and a second bank BNK2 (and a first bank BNK1 described below (see Figure 9 )).

[0157] According to an embodiment of the present invention, the first and second electrodes EL1 and EL2 may be disposed adjacent to each other along the first direction DR1 and may extend substantially along the second direction DR2. The first and second electrodes EL1 and EL2 may extend to the non-display area NDA that may be outside the display area DA.

[0158] The first electrode EL1 may be spaced apart from the second electrode EL2. For example, the first electrode EL1 may not be electrically and / or physically connected to the second electrode EL2.

[0159] The first electrode EL1 may include a ring (e.g., a closed ring) having, for example, a circular shape or a polygonal shape. However, embodiments of the shape of the first electrode EL1 are not limited thereto. For example, the closed ring may have a diamond shape having, for example, a side extending in the third direction DR3 and a side extending in the fourth direction DR4. In some sections, the second electrode EL2 may include a closed ring structure extending to surround the first electrode EL1.

[0160] The light emitting element LD may be disposed between the first electrode EL1 and the second electrode EL2 .

[0161] The second bank BNK2 may be disposed in a peripheral region of the closed loop of the first electrode EL1 . The second bank BNK2 may be disposed to overlap some sections of the first electrode EL1 and the second electrode EL2 in a thickness direction.

[0162] In the following, reference will be made to Figures 8 to 10 The sub-pixel SPX will be described in detail by taking the first sub-pixel SPX1 as an example.

[0163] Figure 8 It schematically shows an embodiment according to the present invention. Figure 7 A sub-pixel image of . Figure 9 It is along Figure 8 Schematic cross-sectional view taken along line II'. Figure 10 It is along Figure 8 Schematic cross-sectional view taken along line II-II'.

[0164] Figure 8 The sub-pixel SPX shown in FIG can be Figures 6A to 6E Any one of the pixels PXL shown in each of .

[0165] exist Figure 8 In the figure, for convenience of description, the transistor connected to the light emitting element LD and the signal line connected to the transistor are omitted.

[0166] Figures 8 to 10 The structure of the sub-pixel SPX is simplified, such as illustrating each electrode as a single electrode layer and illustrating each insulating layer as a single insulating layer, but the present invention is not limited thereto.

[0167] In the embodiments of the present invention, “formed and / or disposed in the same layer” may mean formed in the same process, and “formed and / or disposed in different layers” may mean formed in different processes.

[0168] Reference Figures 1A to 10 , a display device according to an embodiment may include a substrate SUB, one or more lines, and sub-pixels SPX.

[0169] The substrate SUB may include a transparent insulating material and may transmit light. The substrate SUB may be a rigid substrate or a flexible substrate. During the manufacturing process of the display device, the material applied to the substrate SUB may have resistance to high process temperatures (e.g., heat resistance). The substrate SUB may include a display area DA and a non-display area NDA. The display area DA may include at least one sub-pixel area PXA in which a pixel PXL may be disposed, and the non-display area NDA may be disposed around the display area DA.

[0170] The subpixel region PXA where the subpixel SPX may be disposed may include a light emitting region EMA where light may be emitted and a peripheral region surrounding the light emitting region EMA. In an embodiment of the present invention, the peripheral region may include a non-light emitting region where light may not be emitted.

[0171] Each sub-pixel SPX may include a substrate SUB, a pixel circuit portion PCL in which the pixel circuit 144 may be provided (or formed), and a display element portion DPL in which at least one light emitting element LD may be provided.

[0172] The display element portion DPL may be located in the emission area EMA of the sub-pixel area PXA.

[0173] The pixel circuit portion PCL may include a buffer film BFL, a pixel circuit 144 including one or more transistors T, a driving voltage line DVL, and a protection film PSV.

[0174] The buffer film BFL may prevent impurities from diffusing into the transistor T. The buffer film BFL may include an inorganic insulating film including an inorganic material. For example, the buffer film BFL may include a silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiON) and AlO x The buffer film BFL may be provided as a single film, or may be provided as a plurality of films of two or more layers. When the buffer film BFL is provided as a plurality of films, each layer may be formed of the same material or different materials. The buffer film BFL may be omitted depending on the material of the substrate SUB, process conditions, and the like.

[0175] The transistor T may include a first transistor T1 and a second transistor T2. The first transistor T1 may be a driving transistor that can control the amount of driving current provided to the light emitting element LD, and the second transistor T2 may be a switching transistor. In the embodiment of the present invention, the first transistor T1 may be a reference transistor. Figures 6A to 6E The first transistor T1 and the second transistor T2 of the pixel circuit 144 described above may be referenced Figures 6A to 6E The second transistor T2 of the pixel circuit 144 is described.

[0176] Each of the first transistor T1 and the second transistor T2 (i.e., each of the transistors T) may include a transistor semiconductor pattern SCL, a gate electrode GE, a first terminal SE, and a second terminal DE. The first terminal SE may be either a source electrode or a drain electrode, and the second terminal DE may be the other of the source electrode and the drain electrode. For example, when the first terminal SE is a source electrode, the second terminal DE may be a drain electrode.

[0177] The transistor semiconductor pattern SCL may be disposed and / or formed on the buffer film BFL. The transistor semiconductor pattern SCL may include a first contact region that may contact the first terminal SE and a second contact region that may contact the second terminal DE. The region between the first contact region and the second contact region may be a channel region. The transistor semiconductor pattern SCL may be a semiconductor pattern formed of polycrystalline silicon, amorphous silicon, an oxide semiconductor, or the like, or a combination thereof. The channel region may be a semiconductor pattern that may not be doped with impurities and may be an intrinsic semiconductor. The first contact region and the second contact region may be semiconductor patterns doped with impurities.

[0178] The gate electrode GE may be provided and / or formed on the transistor semiconductor pattern SCL with a gate insulating film GI interposed therebetween. The gate insulating film GI may be an inorganic insulating film including an inorganic material. For example, the gate insulating film GI may include a silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiON) and AlO x At least one of the metal oxides of the gate insulating film GI. However, the material of the gate insulating film GI is not limited to the above-mentioned embodiment. According to the embodiment, the gate insulating film GI may be formed of an organic insulating film including an organic material. The gate insulating film GI may be provided as a single film, or may be provided as a plurality of films of two or more layers. The first terminal SE and the second terminal DE may be in contact with the first contact region and the second contact region of the transistor semiconductor pattern SCL through contact holes passing through the first interlayer insulating film ILD1 and the gate insulating film GI, respectively. The first interlayer insulating film ILD1 may be an inorganic insulating film including an inorganic material. For example, the first interlayer insulating film ILD1 may include a silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiON) and AlO x The first interlayer insulating film ILD1 and the gate insulating film GI may include the same material, but the present invention is not limited thereto. The first interlayer insulating film ILD1 may be provided as a single film, or may be provided as a plurality of films of two or more layers.

[0179] In the above embodiment, the first terminal SE and the second terminal DE of each of the first transistor T1 and the second transistor T2 (i.e., each of the transistors T) may be separate electrodes connected to the transistor semiconductor pattern SCL. However, the present invention is not limited thereto. According to an embodiment, the first terminal SE of each of the first transistor T1 and the second transistor T2 (i.e., each of the transistors T) may be one of the first contact region and the second contact region adjacent to the channel region of the corresponding transistor semiconductor pattern SCL, and the second terminal DE of each of the first transistor T1 and the second transistor T2 (i.e., each of the transistors T) may be the other of the first contact region and the second contact region adjacent to the channel region of the corresponding transistor semiconductor pattern SCL.

[0180] In an embodiment of the present invention, the transistor T included in the pixel circuit portion PCL may be configured as an LTPS thin film transistor, but the present invention is not limited thereto, and the transistor T may be configured as an oxide semiconductor thin film transistor. A case where the transistor T may be a top-gate thin film transistor has been described as an example, but the present invention is not limited thereto. Depending on the embodiment, the transistor T may be a bottom-gate thin film transistor.

[0181] The driving voltage line DVL may be provided on the first interlayer insulating film ILD1, but the present invention is not limited thereto. According to an embodiment, the driving voltage line DVL may be provided on any insulating film included in the pixel circuit portion PCL. The second driving power source VSS may be applied to the driving voltage line DVL. In an embodiment of the present invention, the driving voltage line DVL may be such as Figures 6A to 6E As shown in FIG. 1 , in the sub-pixel SPX, the second driving power VSS may be applied to the second power line PL2 .

[0182] A second interlayer insulating film ILD2 may be provided on the transistor T. The second interlayer insulating film ILD2 may cover the transistor T. The second interlayer insulating film ILD2 may be an inorganic insulating film including an inorganic material or an organic insulating film including an organic material. Depending on the embodiment, the second interlayer insulating film ILD2 and the first interlayer insulating film ILD1 may include the same material, but the present invention is not limited thereto. The second interlayer insulating film ILD2 may be provided as a single film or as a plurality of films of two or more layers.

[0183] The protective film PSV may be provided on the second interlayer insulating film ILD2. The protective film PSV may be provided in the form of an organic insulating film, an inorganic insulating film, or an organic insulating film provided on an inorganic insulating film. Here, the inorganic insulating film may include silicon oxide (SiO x ), silicon nitride (SiN x), silicon oxynitride (SiON) and AlO x The organic insulating film may include at least one of a metal oxide of amorphous metals. The organic insulating film may include an organic insulating material capable of transmitting light. The organic insulating film may include at least one of an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylene ether resin, a polyphenylene sulfide resin, and a benzocyclobutene resin.

[0184] Each of the second interlayer insulating film ILD2 and the protection film PSV may include a first contact hole CH1 exposing a portion of the second terminal DE of the transistor T (specifically, the first transistor T1 ).

[0185] The pixel circuit portion PCL may include a first bridge pattern BRP1 on the second interlayer insulating film ILD2 .

[0186] The first bridge pattern BRP1 may be disposed in the sub-pixel area PXA and may be disposed to overlap the second sub-electrode SEL2 in the thickness direction. The first bridge pattern BRP1 may extend from the seventh segment SEL2-3 (see FIG. 2 ) of the second sub-electrode SEL2. Figure 11 ) point extends along the second direction DR2, which will be described later. However, the shape of the first bridge pattern BRP1 is not limited to the above embodiment. The first bridge pattern BRP1 may extend from the light emitting area EMA to a peripheral area positioned around the light emitting area EMA.

[0187] The first bridge pattern BRP1 can be connected to the second sub-electrode SEL2 included in the display element portion DPL via a second contact hole CH2 passing through the protective film PSV. The first bridge pattern BRP1 can be connected to the driving voltage line DVL (i.e., the second power line PL2) via a third contact hole CH3 passing through the second interlayer insulating film ILD2. Since the first bridge pattern BRP1 can be connected to the driving voltage line DVL (i.e., the second power line PL2), the second driving power VSS applied to the driving voltage line DVL (i.e., the second power line PL2) can be transmitted to the first bridge pattern BRP1.

[0188] The display element portion DPL will be described.

[0189] The display element portion DPL of each subpixel SPX may include a first bank BNK1, first and second sub-electrodes SEL1 and SEL2, contact electrodes CNE (including contact electrodes CNE1, CNE2, CNE3, and CNE4), and a light-emitting element LD disposed in the emission area EMA. The display element portion DPL of each subpixel SPX may include a second bank BNK2 disposed in the peripheral area.

[0190] The first bank BNK1 may be a supporting member that supports each of the first sub-electrode SEL1 and the second sub-electrode SEL2 located in the light-emitting area EMA, thereby allowing light emitted from the light-emitting element LD to further travel in the image display direction of the display device. The first bank BNK1 may be disposed and / or formed between the protective film PSV and the first and second sub-electrodes SEL1 and SEL2. For example, in the light-emitting area EMA, the first bank BNK1 may be disposed and / or formed between the first sub-electrode SEL1 and the protective film PSV, and between the second sub-electrode SEL2 and the protective film PSV.

[0191] The first bank BNK1 may include an inorganic insulating film formed of an inorganic material, an organic insulating film formed of an organic material, or a combination thereof. Depending on the embodiment, the first bank BNK1 may include a single organic insulating film and / or a single inorganic insulating film, but the present invention is not limited thereto. Depending on the embodiment, the first bank BNK1 may be provided in the form of a plurality of films in which at least one organic insulating film and at least one inorganic insulating film are stacked one on top of the other.

[0192] The first bank BNK1 may have a trapezoidal cross-section whose width gradually narrows from the surface of the protective film PSV toward the upper portion, but the present invention is not limited thereto. Depending on the embodiment, the first bank BNK1 may have a curved surface with a semi-elliptical or semi-circular cross-section whose width gradually narrows from the surface of the protective film PSV toward the upper portion. The cross-sectional shape of the first bank BNK1 is not limited to the above embodiment and may be variously modified within a range that improves the efficiency of light emitted from each of the light-emitting elements LD. Adjacent first banks BNK1 may be arranged on the same plane on the protective film PSV and may have the same height.

[0193] The second bank BNK2 may surround at least one side of the emission area EMA of each sub-pixel SPX. The second bank BNK2 may be a structure that defines (or divides) the emission area EMA of two adjacent sub-pixels SPX. For example, the second bank BNK2 may be a pixel-defining film. The second bank BNK2 may include at least one light-shielding material and / or a reflective material to prevent light leakage defects between two adjacent sub-pixels SPX. According to embodiments, a reflective material layer may be formed on the second bank BNK2 to further improve the efficiency of light emitted from each sub-pixel SPX. The second bank BNK2 may be disposed and / or formed on the protective film PSV, but the present invention is not limited thereto. According to embodiments, the second bank BNK2 may be disposed and / or formed on any insulating film included in the display element portion DPL. According to embodiments, the region of the second bank BNK2 may be formed on the shielding metal layer SH. The shielding metal layer SH may include an opaque metal. The opaque metal may include, for example, metals such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Ti, and alloys thereof.

[0194] The shield metal layer SH may be disposed to overlap the first contact hole CH1 in a thickness direction, the first contact hole CH1 connecting the second terminal DE of the first transistor T1 and the first sub-electrode SEL1 to each other.

[0195] like Figure 8 As shown in FIG, a first sub-electrode SEL1, which may be a portion of the first electrode EL1, and a second sub-electrode SEL2, which may be a portion of the second electrode EL2, may be disposed in a sub-pixel area PXA in which a sub-pixel SPX (e.g., the first sub-pixel SPX1) may be disposed. The first sub-electrode SEL1 and the second sub-electrode SEL2 may be disposed on the protective film PSV to be spaced apart from each other at a certain interval.

[0196] The first sub-electrode SEL1 may include a first segment SEL1-1, a second segment SEL1-2, a third segment SEL1-3, and a fourth segment SEL1-4.

[0197] The first segment SEL1-1 may extend in the second direction DR2. One end of the first segment SEL1-1 may be electrically and / or physically connected to a portion of the second terminal DE of the transistor T (specifically, the first transistor T1) through the first contact hole CH1. The other end of the first segment SEL1-1 may be connected to the second segment SEL1-2.

[0198] The second segment SEL1-2 may be the above reference Figure 7The closed loop of the polygonal shape described above. According to an embodiment, the closed loop may have a rhombus shape having four inflection points. However, the shape of the closed loop is not limited thereto. For example, the second segment SEL1-2 of the first sub-electrode SEL1 may have a structure in which the inner cavity of the closed loop can be filled instead of a closed loop structure.

[0199] The third segment SEL1-3 may be a portion of the first electrode EL1 extending (e.g., intermittently extending) from the first segment SEL1-1. For example, the third segment SEL1-3 may be disposed spaced apart from the first segment SEL1-1 and extend in the second direction DR2. One end of the third segment SEL1-3 may be connected to the fourth segment SEL1-4.

[0200] The fourth segment SEL1-4 may be arranged to be spaced apart from the second segment SEL1-2 at a certain distance along the closed loop shape of the second segment SEL1-2. The fourth segment SEL1-4 may have a V-shape along the closed loop of the above-mentioned diamond shape. One end of the fourth segment SEL1-4 may be connected to the region of the first segment SEL1-1, and the other end of the fourth segment SEL1-4 may be connected to one end of the third segment SEL1-3.

[0201] The second sub-electrode SEL2 may include a fifth segment SEL2 - 1 , a sixth segment SEL2 - 2 , a seventh segment SEL2 - 3 , and an eighth segment SEL2 - 4 .

[0202] The fifth segment SEL2-1 may be disposed to be spaced apart from the first segment SEL1-1 of the first sub-electrode SEL1 by a distance in a plan view (eg, in the first direction DR1), and may extend parallel to the first segment SEL1-1 along the second direction DR2.

[0203] The sixth segment SEL2-2 may be spaced apart from the second segment SEL1-2 of the first sub-electrode SEL1 in a plan view by a certain distance and may extend parallel to the closed loop shape of the second segment SEL1-2. The sixth segment SEL2-2 may extend side by side along the outline of the second segment SEL1-2. The sixth segment SEL2-2 may have a V-shape arranged along the closed loop of the aforementioned diamond shape. One end of the sixth segment SEL2-2 may be connected to one end of the fifth segment SEL2-1, and the other end of the sixth segment SEL2-2 may be connected to one end of the seventh segment SEL2-3.

[0204] The seventh segment SEL2-3 may extend continuously from the fifth segment SEL2-1 via the sixth segment SEL2-2. The seventh segment SEL2-3 may be disposed to be spaced apart from the third segment SEL1-3 of the first sub-electrode SEL1 by a certain distance in a plan view, and may extend in the same direction as the extension direction of the fifth segment SEL2-1 (e.g., the second direction DR2).

[0205] The eighth segment SEL2-4 may be provided spaced apart from each of the second segment SEL1-2 and the fourth segment SEL1-4 of the first sub-electrode SEL1 at a certain distance. The eighth segment SEL2-4 may have a V-shape along the closed loop of the aforementioned diamond shape. One end of the eighth segment SEL2-4 may be connected to one end of the sixth segment SEL2-2, and the other end of the eighth segment SEL2-4 may not be connected to any of the first to fourth segments SEL1-1 to SEL1-4 and the fifth to seventh segments SEL2-1 to SEL2-3.

[0206] In an embodiment of the present invention, the spacing between the first sub-electrode SEL1 and the second sub-electrode SEL2 may be the same. Therefore, the light-emitting elements LD can be more uniformly aligned in the light-emitting area EMA. However, the present invention is not limited thereto. Depending on the embodiment, the spacing between the first sub-electrode SEL1 and the second sub-electrode SEL2 may be different from each other.

[0207] Each of the first and second sub-electrodes SEL1 and SEL2 may be formed of a material having a constant reflectivity so that light emitted from each of the light emitting elements LD disposed in a corresponding region may travel in an image display direction of the display device.

[0208] Each of the first sub-electrode SEL1 and the second sub-electrode SEL2 may be formed of a conductive material having a constant reflectivity. The conductive material may include an opaque metal, which is advantageous for reflecting light emitted from the light-emitting element LD in the image display direction of the display device. The opaque metal may include, for example, metals such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Ti, and alloys thereof. Depending on the embodiment, each of the first sub-electrode SEL1 and the second sub-electrode SEL2 may include a transparent conductive material. The transparent conductive material may include a conductive oxide (such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO)), a conductive polymer (such as PEDOT), or the like, or a combination thereof. In the case where each of the first sub-electrode SEL1 and the second sub-electrode SEL2 includes a transparent conductive material, a separate conductive layer may also be included, and the separate conductive layer may be formed of an opaque metal for reflecting light emitted from the light-emitting element LD in the image display direction of the display device. However, the material of each of the first and second sub-electrodes SEL1 and SEL2 is not limited to the above-mentioned materials.

[0209] Each of the first sub-electrode SEL1 and the second sub-electrode SEL2 may be configured and / or formed as a single film, but the present invention is not limited thereto. According to an embodiment, each of the first sub-electrode SEL1 and the second sub-electrode SEL2 may be configured and / or formed as a plurality of films in which two or more materials selected from metals, alloys, conductive oxides, and conductive polymers may be stacked one on top of another. Each of the first sub-electrode SEL1 and the second sub-electrode SEL2 may be formed as a plurality of films of at least two films to minimize distortion caused by signal delay when a signal (or voltage) is transmitted to both end portions of each of the light-emitting elements LD. For example, each of the first sub-electrode SEL1 and the second sub-electrode SEL2 may be formed from a plurality of films in which ITO, Ag, and ITO may be stacked one on top of another (e.g., stacked sequentially).

[0210] As described above, since each of the first sub-electrode SEL1 and the second sub-electrode SEL2 can be formed of a conductive material having a constant reflectivity, light emitted from each of the light-emitting elements LD can be reflected by each of the first sub-electrode SEL1 and the second sub-electrode SEL2 and can travel in the image display direction of the display device.

[0211] A light-emitting element LD may be connected in parallel between the first sub-electrode SEL1 and the second sub-electrode SEL2 of each sub-pixel SPX. The light-emitting elements LD connected in parallel may configure the light-emitting portion EMU of each sub-pixel SPX. The first sub-electrode SEL1 of each sub-pixel SPX may be an anode electrode of the light-emitting portion EMU of each sub-pixel SPX, and the second sub-electrode SEL2 may be a cathode electrode of the light-emitting portion EMU.

[0212] In an embodiment of the present invention, the first sub-electrode SEL1 of each sub-pixel SPX may be electrically connected to the pixel circuit 144 included in the pixel circuit portion PCL of each sub-pixel SPX through the first contact hole CH1. For example, the first sub-electrode SEL1 may be electrically connected to the transistor T (specifically, the first transistor T1) of the pixel circuit 144 through the first contact hole CH1.

[0213] In the above-described embodiment, each of the light-emitting elements LD can be a micro-light-emitting element using an inorganic crystal structure material, for example, a size as small as about nanometer scale to about micrometer scale. For example, each of the light-emitting elements LD can be a micro-light-emitting element manufactured by an etching method or a micro-light-emitting element manufactured by a growth method. However, the type, size, shape, etc. of the light-emitting element LD can be variously changed. At least two to tens of the light-emitting elements LD can be aligned in the light-emitting area EMA of each sub-pixel SPX and / or arranged in the light-emitting area EMA of each sub-pixel SPX, but the number of light-emitting elements LD is not limited thereto. According to the embodiment, the number of light-emitting elements LD aligned in the light-emitting area EMA of each sub-pixel SPX and / or arranged in the light-emitting area EMA of each sub-pixel SPX can be variously changed.

[0214] In the light emitting area EMA, the light emitting element LD may be aligned along the periphery of the second segment SEL1-2 of the first sub-electrode SEL1. According to an embodiment, the light emitting element LD may be radially aligned around the diamond-shaped second segment SEL1-2 between the second segment SEL1-2 of the first sub-electrode SEL1 and the sixth segment SEL2-2 and the eighth segment SEL2-4 of the second sub-electrode SEL2, and between the fourth segment SEL1-4 of the first sub-electrode SEL1 and the eighth segment SEL2-4 of the second sub-electrode SEL2.

[0215] According to an embodiment, in the above-mentioned parallel connection structure, at least one defective light-emitting element (for example, an invalid light source) may be further provided, in which at least one reverse light-emitting element LDr is connected between two adjacent sub-electrodes in a reverse direction.

[0216] The light emitting element LD may be provided in a dispersed form in a solution and may be injected into the light emitting area EMA of the sub-pixel SPX.

[0217] In an embodiment of the present invention, the light-emitting element LD can be injected into the light-emitting area EMA of each sub-pixel SPX by an inkjet printing method, a slit coating method, or various other methods. For example, the light-emitting element LD can be mixed with a volatile solvent and provided to the light-emitting area EMA of each sub-pixel SPX by an inkjet printing method or a slit coating method. At this time, when an alignment signal (or alignment voltage) corresponding to each of the first electrode EL1 and the second electrode EL2 located in the light-emitting area EMA of each sub-pixel SPX is applied, an electric field can be formed between the first electrode EL1 and the second electrode EL2, and thus the light-emitting element LD can be aligned between the first electrode EL1 and the second electrode EL2. After the light-emitting element LD is aligned, the solvent can be volatilized or removed by other methods to provide the light-emitting element LD between the first electrode EL1 and the second electrode EL2.

[0218] In the case where the light emitting element LD can be aligned in the light emitting area EMA of each sub-pixel SPX, the first electrode EL1 and the second electrode EL2 can be used as alignment electrodes (or alignment lines) to align the light emitting element LD. For example, the first electrode EL1 can be a first alignment electrode to which a first alignment signal (or a first alignment voltage) can be applied, and the second electrode EL2 can be a second alignment electrode to which a second alignment signal (or a second alignment voltage) can be applied.

[0219] For example, the first sub-electrode SEL1 may be a first alignment electrode, and the second sub-electrode SEL2 may be a second alignment electrode. The first alignment signal and the second alignment signal may have different voltage levels. When corresponding alignment signals are applied to the first electrode EL1 and the second electrode EL2, an electric field may be formed between the first electrode EL1 and the second electrode EL2. The light-emitting element LD can be aligned in the light-emitting area EMA of the sub-pixel SPX by the electric field formed between the two adjacent sub-electrodes.

[0220] After the light emitting element LD may be aligned in the light emitting area EMA of each sub-pixel SPX, the first sub-electrode SEL1 and the second sub-electrode SEL2 may function as driving electrodes for driving the light emitting element LD.

[0221] In an embodiment of the present invention, in the step of aligning the light-emitting elements LD in the light-emitting area EMA of each sub-pixel SPX, the light-emitting elements LD provided to the light-emitting area EMA can be controlled to be relatively deflected by controlling the alignment signal (or alignment voltage) applied to each of the first electrode EL1 and the second electrode EL2 or by forming a magnetic field. For example, in the step of aligning the light-emitting elements LD, by controlling the waveform of the alignment signal, forming a magnetic field in the light-emitting area EMA, etc., the light-emitting elements LD can be controlled so that the number of light-emitting elements LD arranged in the forward direction is greater than the number of reverse light-emitting elements LDr arranged in the direction opposite to the forward direction, wherein one of the two end portions EP1 and EP2 of each of the light-emitting elements LD arranged in the forward direction faces the first alignment electrode, and the other end portion faces the second alignment electrode.

[0222] Each of the light-emitting elements LD may include a first end portion EP1 electrically connected to one of two sub-electrodes adjacent to each other (e.g., the first sub-electrode SEL1) and a second end portion EP2 electrically connected to the other of the two adjacent sub-electrodes (e.g., the second sub-electrode SEL2). In an embodiment of the present invention, the first end portion EP1 of each light-emitting element LD may be a first semiconductor layer 11 including an n-type semiconductor layer, and the second end portion EP2 may be a second semiconductor layer 13 including a p-type semiconductor layer. For example, in the light-emitting area EMA of the sub-pixel SPX, each light-emitting element LD may be connected between two adjacent sub-electrodes in a forward direction. As described above, the light-emitting element LD connected between two adjacent sub-electrodes in a forward direction may configure each of the effective light sources in the above-mentioned parallel structure.

[0223] The first end portion EP1 of each of the light-emitting elements LD may be connected (e.g., directly connected) to one of the two adjacent sub-electrodes (e.g., the first sub-electrode SEL1), or may be connected to the one sub-electrode via a contact electrode CNE (e.g., contact electrodes CNE1 and CNE4). The second end portion EP2 of each of the light-emitting elements LD may be connected (e.g., directly connected) to the other of the two adjacent sub-electrodes (e.g., the second sub-electrode SEL2), or may be electrically connected to the other sub-electrode via a contact electrode CNE (e.g., contact electrodes CNE2 and CNE3).

[0224] The light emitting element LD may be provided between the adjacent first and second sub-electrodes SEL1 and SEL2 on the protective film PSV. A first insulating film INS1 may be provided between each of the light emitting elements LD and the protective film PSV to stably support the light emitting element LD.

[0225] The first insulating film INS1 may fill a space between each of the light emitting elements LD and the protective film PSV to stably support the light emitting element LD, and may prevent the light emitting element LD from being separated from the protective film PSV.

[0226] In the emission area EMA of each sub-pixel SPX, the first insulating film INS1 may expose a region of each of the first sub-electrode SEL1 and the second sub-electrode SEL2 and may cover the remaining region except the exposed region. Here, the contact electrode CNE may be provided and / or formed on the exposed region of each of the sub-electrodes, and thus, each of the sub-electrodes and the contact electrode CNE may be electrically and / or physically connected to each other.

[0227] The first insulating film INS1 may include an inorganic insulating film formed of an inorganic material or an organic insulating film formed of an organic material. In an embodiment of the present invention, the first insulating film INS1 may be formed of an inorganic insulating film, which may help protect the light-emitting element LD from the pixel circuit portion PCL of each pixel PXL, but the present invention is not limited thereto. Depending on the embodiment, the first insulating film INS1 may be formed of an organic insulating film, which may help flatten the supporting surface of the light-emitting element LD.

[0228] A second insulating film INS2 may be provided and / or formed on each of the light-emitting elements LD. The second insulating film INS2 may be provided and / or formed on each of the light-emitting elements LD to cover a portion of the upper surface of each of the light-emitting elements LD and to expose end portions EP1 and EP2 of each of the light-emitting elements LD to the outside. The second insulating film INS2 may be formed in an independent pattern in the light-emitting area EMA of each pixel PXL, but the present invention is not limited thereto.

[0229] The second insulating film INS2 may be configured as a single film or multiple films and may include an inorganic insulating film or an organic insulating film, or a combination thereof. The inorganic insulating film includes at least one inorganic material, and the organic insulating film includes at least one organic material. The second insulating film INS2 may secure each of the light-emitting elements LD aligned within the light-emitting area EMA of each pixel PXL. In an embodiment of the present invention, the second insulating film INS2 may include an inorganic insulating film, which may help protect the active layer 12 of each light-emitting element LD from external influences such as oxygen and moisture. However, the present invention is not limited thereto. The second insulating film INS2 may include an organic insulating film including an organic material, depending on the design conditions of the display device to which the light-emitting element LD is applied.

[0230] In the embodiment of the present invention, after alignment of the light emitting element LD may be completed in the emission area EMA of each sub-pixel SPX, the light emitting element LD may be prevented from being separated from the aligned position by forming the second insulating film INS2 on the light emitting element LD.

[0231] In an embodiment of the present invention, a second insulating film INS2 may be formed on the light-emitting elements LD so that the active layer 12 of each of the light-emitting elements LD does not come into contact with external conductive materials. The second insulating film INS2 may cover only a portion of the surface of each of the light-emitting elements LD to expose the end portions EP1 and EP2 of each of the light-emitting elements LD to the outside. In addition, the second insulating film INS2 may also fill the empty space between the first insulating film INS1 and the light-emitting element LD.

[0232] The contact electrode CNE may be disposed and / or formed on the second insulating film INS2 .

[0233] The first and second contact electrodes CNE1 and CNE2 may be disposed and / or formed on the second insulating film INS2 disposed on the light emitting element LD in the light emitting area EMA.

[0234] According to an embodiment, the first contact electrode CNE1 may be provided on the light emitting element LD and the second insulating film INS2. A third insulating film INS3 may be provided on the first contact electrode CNE1 and the second insulating film INS2. The second contact electrode CNE2 may be provided on the light emitting element LD, the second insulating film INS2, and the third insulating film INS3. The third insulating film INS3 may be configured from a single film or multiple films (similar to the second insulating film INS2) and may include an inorganic insulating film or an organic insulating film, or a combination thereof, wherein the inorganic insulating film includes at least one inorganic material and the organic insulating film includes at least one organic material. The first contact electrode CNE1 and the second contact electrode CNE2 may be electrically and / or physically separated from each other by the second insulating film INS2 and the third insulating film INS3.

[0235] An encapsulation film ENC may be disposed and / or formed on the second contact electrode CNE2 and the third insulating film INS3. The encapsulation film ENC may cover the pixel circuit portion PCL and the display element portion DPL included in each sub-pixel SPX. The encapsulation film ENC may be an inorganic insulating film including an inorganic material or an organic insulating film including an organic material. For example, the encapsulation film ENC may have a structure in which at least one inorganic film and at least one organic film may be alternately stacked.

[0236] Hereinafter, other embodiments will be described. In the following embodiments, the same configurations as those in the already described embodiments will be omitted or simplified, and differences will be described.

[0237] Figure 11 and Figure 12 It is schematically shown Figure 5 Schematic diagram of another example of sub-pixels included in a display device.

[0238] Reference Figure 11 and Figure 12 , Figure 11 and Figure 12 The embodiment shown in Figures 8 to 10 The difference between the embodiments shown in Figure 11 The shape of the closed loop of the second segment SEL1-2 shown in FIG may be a hexagonal shape having six vertices, and as shown in FIG. Figure 12 The shape of the closed loop of the second segment SEL1 - 2 shown in ⊂ may be an octagonal shape having eight vertices.

[0239] Specifically, Figure 11 and Figure 12 The first sub-electrode SEL1 shown in FIG may include a first segment SEL1 - 1 , a second segment SEL1 - 2 , a third segment SEL1 - 3 , and a fourth segment SEL1 - 4 .

[0240] The first segment SEL1-1 may extend in the second direction DR2. One end of the first segment SEL1-1 may be electrically and / or physically connected to a portion of the second terminal DE of the transistor T (specifically, the first transistor T1) through the first contact hole CH1. The other end of the first segment SEL1-1 may be connected to the second segment SEL1-2.

[0241] The second segment SEL1-2 may be the above reference Figure 7 The closed loop may be a polygonal shape as described above. Depending on the embodiment, the closed loop may have a hexagonal shape or an octagonal shape, wherein the hexagonal shape has six vertices and the octagonal shape has eight vertices. However, the shape of the closed loop is not limited thereto. For example, the second segment SEL1-2 of the first sub-electrode SEL1 may have a structure in which the inner cavity of the closed loop can be filled, rather than a closed loop structure.

[0242] The third segment SEL1-3 may be a portion of the first electrode EL1 that extends intermittently from the first segment SEL1-1. For example, the third segment SEL1-3 may be spaced apart from the first segment SEL1-1 and extend in the second direction DR2. One end of the third segment SEL1-3 may be connected to the fourth segment SEL1-4.

[0243] The fourth segment SEL1-4 may be arranged to be spaced apart from the second segment SEL1-2 at a certain distance along the closed loop shape of the second segment SEL1-2. The fourth segment SEL1-4 may have a closed loop shape surrounding the above-mentioned hexagonal shape or octagonal shape. One end of the fourth segment SEL1-4 may be connected to the region of the first segment SEL1-1, and the other end of the fourth segment SEL1-4 may be connected to one end of the third segment SEL1-3.

[0244] The second sub-electrode SEL2 may include a fifth segment SEL2 - 1 , a sixth segment SEL2 - 2 , a seventh segment SEL2 - 3 , and an eighth segment SEL2 - 4 .

[0245] The fifth segment SEL2 - 1 may be disposed to be spaced apart from the first segment SEL1 - 1 of the first sub-electrode SEL1 at a distance in a plan view, and may extend parallel to the first segment SEL1 - 1 along the second direction DR2 .

[0246] The sixth segment SEL2-2 may be spaced apart from the second segment SEL1-2 of the first sub-electrode SEL1 in a plan view by a certain distance and may extend parallel to the closed loop shape of the second segment SEL1-2. The sixth segment SEL2-2 may have a closed loop shape surrounding the aforementioned hexagonal or octagonal shape. One end of the sixth segment SEL2-2 may be connected to one end of the fifth segment SEL2-1, and the other end of the sixth segment SEL2-2 may be connected to one end of the seventh segment SEL2-3.

[0247] The seventh segment SEL2-3 may be disposed spaced apart from the third segment SEL1-3 of the first sub-electrode SEL1 in a plan view and may extend parallel to the fifth segment SEL2-1 along the second direction DR2.

[0248] The eighth segment SEL2-4 may be disposed between the second segment SEL1-2 and the fourth segment SEL1-4 of the first sub-electrode SEL1, spaced apart from the second segment SEL1-2 and the fourth segment SEL1-4 of the first sub-electrode SEL1 at a distance. The eighth segment SEL2-4 may have a closed loop shape surrounding the aforementioned hexagonal or octagonal shape. One end of the eighth segment SEL2-4 may be connected to one end of the sixth segment SEL2-2, and the other end of the eighth segment SEL2-4 may not be connected to any of the first to fourth segments SEL1-1 to SEL1-4 and the fifth to seventh segments SEL2-1 to SEL2-3.

[0249] In the light emitting area EMA, the light emitting element LD may be aligned along the periphery of the second segment SEL1-2 of the first sub-electrode SEL1. According to an embodiment, the light emitting element LD may be radially aligned around the hexagonal or octagonal second segment SEL1-2, between the second segment SEL1-2 of the first sub-electrode SEL1 and the sixth segment SEL2-2 and the eighth segment SEL2-4 of the second sub-electrode SEL2, and between the fourth segment SEL1-4 of the first sub-electrode SEL1 and the eighth segment SEL2-4 of the second sub-electrode SEL2.

[0250] The cross-sectional structure of the sub-pixel region PXA can be Figure 9 and Figure 10 The structures shown in are the same, and therefore repeated descriptions are omitted.

[0251] Figure 13 It is schematically shown Figure 5 A diagram showing yet another example of sub-pixels included in a display device. Figure 14 It is along Figure 13 Schematic cross-sectional view taken along line III-III'.

[0252] Reference Figure 13 and Figure 14 , Figure 13 and Figure 14 The embodiment shown in Figures 8 to 10 The difference between the embodiments shown in Figure 13 The cavity in the closed loop of the second segment SEL1_1-2 of the first sub-electrode SEL1_1 shown in FIG may include the ninth segment SEL2_1-5 of the second sub-electrode SEL2_1 and the second bridge pattern.

[0253] Specifically, Figure 13 and Figure 14 The first sub-electrode SEL1_1 shown in FIG may include a first segment SEL1_1-1, a second segment SEL1_1-2, a third segment SEL1_1-3, and a fourth segment SEL1_1-4.

[0254] The first segment SEL1_1-1 may extend in the second direction DR2. One end of the first segment SEL1_1-1 may be electrically and / or physically connected to a portion of the second terminal DE of the transistor T (specifically, the first transistor T1) through the first contact hole CH1. The other end of the first segment SEL1_1-1 may be connected to the second segment SEL1_1-2.

[0255] The second segment SEL1_1-2 may be the above reference Figure 7The closed loop of the polygonal shape described above. According to an embodiment, the closed loop may have a rhombus shape having four inflection points. However, the shape of the closed loop is not limited thereto. For example, the second segment SEL1_1-2 of the first sub-electrode SEL1_1 may have a structure in which the inner cavity of the closed loop can be filled, rather than a closed loop structure.

[0256] The third segment SEL1_1-3 may be a portion of the first electrode EL1 intermittently extending from the first segment SEL1_1-1. For example, the third segment SEL1_1-3 may be spaced apart from the first segment SEL1_1-1 and extend in the second direction DR2. One end of the third segment SEL1_1-3 may be connected to the fourth segment SEL1_1-4.

[0257] The fourth segment SEL1_1-4 may be arranged to be spaced apart from the second segment SEL1_1-2 at a distance along the closed loop shape of the second segment SEL1_1-2. The fourth segment SEL1_1-4 may have a V-shape along the closed loop shape of the aforementioned diamond shape. One end of the fourth segment SEL1_1-4 may be connected to the region of the first segment SEL1_1-1, and the other end of the fourth segment SEL1_1-4 may be connected to one end of the third segment SEL1_1-3.

[0258] The second sub-electrode SEL2_1 may include a fifth segment SEL2_1-1, a sixth segment SEL2_1-2, a seventh segment SEL2_1-3, an eighth segment SEL2_1-4, and a ninth segment SEL2_1-5.

[0259] The fifth segment SEL2_1 - 1 may be disposed to be spaced apart from the first segment SEL1_1 - 1 of the first sub-electrode SEL1_1 by a distance in a plan view, and may extend parallel to the first segment SEL1_1 - 1 along the second direction DR2 .

[0260] The sixth segment SEL2_1-2 may be spaced apart from the second segment SEL1_1-2 of the first sub-electrode SEL1_1 by a certain distance in a plan view and may extend parallel to the closed loop shape of the second segment SEL1_1-2. The sixth segment SEL2_1-2 may have a V-shape along the closed loop of the diamond shape. One end of the sixth segment SEL2_1-2 may be connected to one end of the fifth segment SEL2_1-1, and the other end of the sixth segment SEL2_1-2 may be connected to one end of the seventh segment SEL2_1-3.

[0261] The seventh segment SEL2_1-3 may be continuously connected from the fifth segment SEL2_1-1 via the sixth segment SEL2_1-2. The seventh segment SEL2_1-3 may be disposed spaced apart from the third segment SEL1_1-3 of the first sub-electrode SEL1_1 by a distance in a plan view and may extend parallel to the fifth segment SEL2_1-1 along the second direction DR2.

[0262] The eighth segment SEL2_1-4 may be disposed at a distance from each of the second segment SEL1_1-2 and the fourth segment SEL1_1-4 of the first sub-electrode SEL1_1. The eighth segment SEL2_1-4 may have a V-shape along the closed loop of the aforementioned diamond shape. One end of the eighth segment SEL2_1-4 may be connected to one end of the sixth segment SEL2_1-2, and the other end of the eighth segment SEL2_1-4 may not be connected to any of the first to fourth segments SEL1_1-1 to SEL1_1-4 and the fifth to seventh segments SEL2_1-1 to SEL2_1-3.

[0263] The ninth segment SEL2_1-5 may be disposed within the inner cavity of the second segment SEL1_1-2 of the first sub-electrode SEL1_1. The ninth segment SEL2_1-5 may be spaced apart from the second segment SEL1_1-2 by a certain distance. The ninth segment SEL2_1-5 may have the same shape as the closed loop of the second segment SEL1_1-2. The ninth segment SEL2_1-5 may be an island shape that is not connected to any of the fifth to eighth segments SEL2_1-1 to SEL2_1-4.

[0264] Hereinafter, a cross-sectional structure of the sub-pixel area PXA will be described.

[0265] The pixel circuit portion PCL may include a second bridge pattern BRP2 on the second interlayer insulating film ILD2.

[0266] The second bridge pattern BRP2 may be disposed in the sub-pixel area PXA and may extend substantially along the second direction DR2. However, the shape of the second bridge pattern BRP2 is not limited to the above embodiment. The second bridge pattern BRP2 may extend from the emission area EMA to a peripheral area located around the emission area EMA.

[0267] The second bridge pattern BRP2 can be electrically connected to the second sub-electrode SEL2 included in the display element portion DPL via a second contact hole CH2 passing through the protective film PSV. The second bridge pattern BRP2 can be electrically connected to the driving voltage line DVL (i.e., the second power line PL2) via a third contact hole CH3 passing through the second interlayer insulating film ILD2. Since the second bridge pattern BRP2 can be electrically connected to the driving voltage line DVL (i.e., the second power line PL2), the second driving power VSS applied to the driving voltage line DVL (i.e., the second power line PL2) can be transmitted to the second bridge pattern BRP2.

[0268] The second bridge pattern BRP2 can be electrically connected to the ninth segment SEL2_1-5 of the second sub-electrode SEL2_1 included in the display element portion DPL through the fourth contact hole CH4 passing through the protective film PSV. Therefore, the driving current can also flow through the island-shaped ninth segment SEL2_1-5, and the ninth segment SEL2_1-5 may not be connected to all of the fifth to eighth segments SEL2_1-1 to SEL2_1-4.

[0269] Those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing its technical spirit or essential features. Therefore, it should be understood that the above embodiments are illustrative and not restrictive in all aspects. The scope of the present invention is defined by the appended claims rather than the above detailed description, and it is intended that all changes and modifications derived from the meaning and scope of the claims and their equivalents are included within the scope of the present invention.

Claims

1. A display device comprising: A substrate including a display area and a non-display area; as well as Pixels are arranged in the display area, each of the pixels comprising: a first electrode; a second electrode spaced apart from the first electrode; and a light-emitting element disposed between the first electrode and the second electrode, wherein each of the first electrodes comprises a closed loop having a polygonal shape in some sections, and At least a portion of the second electrode is located outside the closed loop and faces the closed loop in at least two directions.

2. The display device according to claim 1, wherein The closed loop of the polygonal shape is any one of a rhombus, a hexagon, and an octagon.

3. The display device according to claim 1, wherein Each of the first electrodes comprises: first section; a second segment connected to one end of the first segment and having the closed loop of the polygonal shape; a third section extending intermittently from the first section; and A fourth segment has one end connected to a region of the first segment and the other end connected to one end of the third segment, the fourth segment being spaced apart from the second segment along an outer shape of the second segment.

4. The display device according to claim 3, wherein Each of the second electrodes comprises: Section 5; a sixth segment connected to one end of the fifth segment and extending along the outer shape of the second segment; a seventh section extending continuously from the fifth section through the sixth section; and An eighth segment is spaced apart from each of the second segment and the fourth segment along the outer shape of the second segment between the second segment and the fourth segment.

5. The display device according to claim 4, wherein The light emitting element is disposed between the second segment and the sixth segment, between the second segment and the eighth segment, and between the fourth segment and the eighth segment. The display device according to claim 5 , wherein: The light emitting element is arranged radially relative to the second section.

7. The display device according to claim 4, wherein The second electrodes each include a ninth segment spaced apart from the second segment, the ninth segment having an island shape disposed inside the closed loop of the second segment.

8. The display device according to claim 7, wherein: The light emitting element is disposed radially relative to the second segment between the second segment and the ninth segment.

9. The display device according to claim 1, wherein Each of the light-emitting elements comprises: a first semiconductor layer; a second semiconductor layer; and An active layer is provided between the first semiconductor layer and the second semiconductor layer, wherein: The first semiconductor layer includes an n-type semiconductor layer, and The second semiconductor layer includes a p-type semiconductor layer.

10. The display device according to claim 1, wherein The pixels are arranged in a pentile structure.

11. A display device comprising: substrate; A pixel circuit portion is provided on the substrate; as well as A display element portion is provided on the pixel circuit portion, The display element portion includes pixels, and the pixels include: a first electrode; a second electrode spaced apart from the first electrode; and a light-emitting element disposed between the first electrode and the second electrode, wherein each of the first electrodes comprises a closed loop of polygonal shape in some sections, At least a portion of the second electrode is located outside the closed loop and faces the closed loop in at least two directions.

12. The display device according to claim 11, wherein The pixel circuit portion includes a driving transistor, a switching transistor, a capacitor, and a driving voltage line.

13. The display device according to claim 12, wherein: Each of the first electrodes comprises: first section; a second segment connected to one end of the first segment and having the closed loop of the polygonal shape; a third section extending intermittently from the first section; and A fourth segment has one end connected to a region of the first segment and the other end connected to one end of the third segment, the fourth segment being spaced apart from the second segment along an outer shape of the second segment.

14. The display device according to claim 13, wherein: Each of the second electrodes comprises: Section 5; a sixth segment connected to one end of the fifth segment and extending along the outer shape of the second segment; a seventh section extending continuously from the fifth section through the sixth section; and An eighth segment is spaced apart from each of the second segment and the fourth segment along the outer shape of the second segment between the second segment and the fourth segment.

15. The display device according to claim 14, wherein The light emitting element is disposed between the second segment and the sixth segment, between the second segment and the eighth segment, and between the fourth segment and the eighth segment.

16. The display device according to claim 15, wherein The light emitting element is disposed radially relative to the second section of the polygonal shape.

17. The display device according to claim 14, wherein: The pixel circuit portion includes a first bridge pattern, The one end of the first segment is connected to the electrode of the driving transistor through a first contact hole, The seventh segment is connected to the first bridge pattern through a second contact hole, and The first bridge pattern is connected to the driving voltage line through a third contact hole.

18. The display device according to claim 14, wherein The second electrode further includes a ninth segment spaced apart from the second segment, the ninth segment having an island shape disposed inside the closed loop forming the polygonal shape of the second segment.

19. The display device according to claim 18, wherein The light emitting element is disposed radially relative to the second segment of the polygonal shape between the second segment and the ninth segment.

20. The display device according to claim 18, wherein The pixel circuit portion includes a second bridge pattern, The seventh segment is connected to the second bridge pattern through a second contact hole, and the second bridge pattern is connected to the driving voltage line through a third contact hole, and The ninth segment is connected to the second bridge pattern through a fourth contact hole.

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