Managing licenses for soft IP on partially reconfigurable hardware systems

Abstract

The present invention relates to a method for managing licenses for soft IPs on a partially reconfigurable hardware system, in particular on an FPGA, wherein: a license manager (2) is provided in a non-configurable part (HPS) of the hardware system or is open only to the non-configurable part of the hardware system (HPS), the license manager having exclusive access to a non-volatile memory (4), in which license data (5) are stored, the license data including a time limit for a usage period of at least one soft IP (3); before activating a specific soft IP (3), the license manager (2) checks whether the usage period has expired; only if the usage period has not expired does the license manager (2) authorize the use of the soft IP (3); the license data (5) is changed using a key, the key being stored in the non-volatile memory (4) for the license data (5); and when the license data (5) is changed, a new key is stored and the previous key is deleted.

Description

Technical Field

[0001] The invention relates to a method for managing licenses of soft IP on a partially reconfigurable hardware system, in particular an FPGA. The invention also comprises a corresponding partially reconfigurable hardware system, in particular an FPGA.

[0002] The so-called field programmable gate array (FPGA for short) is an integrated circuit of digital technology into which logic circuits can be programmed. Unlike the programming of computers or controllers, the programming here only involves the definition of the time processes in the module to a minor extent, but mainly involves the definition of the functional structure of the module. By programming the interconnection of pre-defined elements, the working principle of the individual logic elements (blocks) in the FPGA and their interconnection with each other are defined. This can therefore also be described as the configuration or design of the FPGA. Background Art

[0003] When designing a reconfigurable hardware system, such as an FPGA, the system designer usually uses so-called soft IP (full name: Soft Intellectual Properties). Soft IP usually exists as source code or in the form of a network list and is implemented in a freely programmable area of ​​the FPGA. Therefore, there is often an IP core generator, which the user can use to generate soft IP, such as soft IP in the form of a network list, for different FPGA models of the manufacturer. A typical example of a soft IP is a processor core (such as a soft IP core) that is optimized for the corresponding FPGA architecture, and the processor core is integrated into the FPGA together with their program when needed. Another type is the interface controller of the bus, but it is also a controller for operating external DRAM storage modules.

[0004] Soft IPs are usually purchased separately. The use of these soft IPs is either licensed directly for a specific target device (use per device) or for an unlimited group of target devices (bulk license), which is usually expensive. If a license has been granted and the soft IP is running on a target device, the time period for which the soft IP is running can no longer be controlled by the soft IP owner (licensor).

[0005] It would be advantageous for the licensor if a period of use of a licensed soft IP could be specified and use of the soft IP beyond that period could be made difficult or prevented.

[0006] License management schemes to date have only included solutions that enable running dedicated software IP on reconfigurable hardware systems, however it is not practically possible to place time limits on the use of the soft IP.

[0007] One approach is based on the principle that a device identification (device ID), for example a unique ID (identifier) ​​of an FPGA, is sent to a soft IP licensor. A personalization module, usually a confidential key, provided by the manufacturer of the device, such as the manufacturer of the FPGA, is loaded into the device. Now, using this key, the device can be configured based on the device identification using a soft IP provided by the soft IP licensor with a matching key, usually in the form of an encrypted bit file. Therefore, a soft IP in the form of a bit file can only be used for a specific device. Multiple use is not possible.

[0008] A similar scheme uses public key cryptography to bind a soft IP to a specific device.

[0009] In another solution, a trusted "metering authority" manages one or more keys, each of which is uniquely assigned to the combination of the device identification of the FPGA and a specific soft IP. Now, system designers can activate soft IP specifically for their FPGA devices through a "metering bitstream" that is a permanent part of the FPGA. This is called device enrollment. For this, see "A Pay-per-Use Licensing Scheme for Hardware IP Cores in Recent SRAM-Based FPGAs", Roel Maes, Dries Schellekens, Ingrid Verbauwhede, IEEE Transactions on Information Forensics and Security, Vol. 7, No. 1, pp. 99-108, February 2012.

[0010] From document US 2018 / 0196965 A1, a method for authenticating and licensing IP-protected hardware modules is known, which can be selectively activated and used. To this end, licenses are generated for these IP-protected hardware modules, which can only be used for specific devices with a unique device ID and are stored in a license memory. These IP-protected modules can be activated by a license server with the aid of an activation code, wherein the activation code can be extracted from the license having only the unique device ID.

[0011] In addition, document US 6904527 B1 discloses a method for protecting IP modules in programmable logic circuits. These IP modules can be directly licensed to users of programmable logic circuits with unique identifiers, where the users obtain authorization codes that are used to protect and check the authorized use of the IP-protected modules by the programmable logic circuits. Summary of the invention

[0012] The object of the present invention is to provide a method for managing licenses of soft IPs, which method can impose a time limit on the duration of use of the soft IPs installed on a reconfigurable hardware system and further improve security. The time limit on the duration of use can be a predetermined absolute time period and / or a predetermined actual duration of use of the soft IP.

[0013] The object set forth is achieved by a method having the features of patent claim 1 in that:

[0014] - a license manager is provided in the non-configurable part of the hardware system or is only accessible to the non-configurable part of the hardware system, which license manager has exclusive access to a non-volatile memory in which license data are stored, the license data including a time limit for the duration of use of at least one soft IP;

[0015] - Before activating a specific soft IP, the license manager checks whether the usage period has expired;

[0016] - The license manager allows the use of the soft IP only if the usage period has not expired;

[0017] - the license data are changed using a key stored in a non-volatile memory for the license data; and

[0018] - In case of a change to these license data, a new key is registered and the previous key is deleted.

[0019] The actual usage time can be recorded by the license manager. The license data contains a usage limit, and if the usage limit is reached, the license manager will deactivate the soft IP.

[0020] The advantage of the invention is that no connection to an external license server or other external auxiliary tools is required.

[0021] The license manager and the non-volatile memory for the license data can be arranged directly in the non-configurable part of the hardware system. However, it is also possible that the license manager and the non-volatile memory for the license data are stored in another non-volatile memory and that the other non-volatile memory is connected to the non-configurable part of the hardware system via hardware so that the license manager and the license data are loaded into the hardware system before starting. In this case, the other non-volatile memory is usually arranged in spatial proximity to the rest of the partially reconfigurable hardware system.

[0022] In order to be able to carry out changes to the license data of a specific soft IP, such as the granting of a license, the extension of a license or the termination of a license from a licensor in a correspondingly secure manner, it is provided that the license data are changed using a key which is stored in a non-volatile memory for the license data. It can be provided that, when the license data are changed, a new key is stored and the previous key is deleted.

[0023] One embodiment of the present invention provides that the license manager checks at certain predefined time intervals whether the usage period has expired.

[0024] In this case, it can be provided that the check is performed at a predetermined fixed clock frequency, which is predetermined by the partially reconfigurable hardware system. This clock frequency can be derived, for example, from the CPU of the hardware system.

[0025] One embodiment of the present invention provides that if the license expires, a report is sent to the designer of the partially reconfigurable hardware system, thereby ensuring that the designer can quickly purchase a new license and the hardware system can be used normally again immediately.

[0026] In the soft IP, the own circuit part, which is usually used for license control, reports its activities to the license manager. The license manager then records the time activities of the soft IP and checks the validity of the license. In this respect, it can be provided that in the configurable part of the hardware system, a circuit part for license control is provided for each soft IP, via which the activities of the soft IP are reported to the license manager.

[0027] Here, it can be provided that the circuit part for license control is connected to the license manager via its own license interface. That is, only the circuit part of each soft IP that is provided for license control communicates with the license manager via the license interface.

[0028] The invention also includes a partially reconfigurable hardware system, in particular an FPGA, for carrying out the method according to the invention. It is provided that:

[0029] - a license manager is provided in the non-configurable part of the hardware system or is only accessible to the non-configurable part of the hardware system, which license manager has exclusive access to a non-volatile memory in which license data are stored, the license data including a time limit for the duration of use of at least one soft IP; and

[0030] - The license manager is configured so that before activating a specific soft IP, the license manager checks whether the usage period has expired, and only if the usage period has not expired, the license manager permits the use of the soft IP. The license manager is also configured to check for changes in the license data when using a key and, after a successful check, register the new license data and replace the key with a new key.

[0031] As already described in conjunction with the method according to the invention, it can be provided that the license manager and the non-volatile memory for the license data are arranged in a non-configurable part of the hardware system. Alternatively, it can be provided that the license manager and the non-volatile memory for the license data are stored in a further non-volatile memory and that the further non-volatile memory is connected to the non-configurable part of the hardware system via hardware, so that the license manager and the license data can be loaded into the hardware system before starting operation.

[0032] In the configurable part of the hardware system, a circuit part for license control can be provided for each soft IP, wherein these circuit parts for license control are connected to the license manager via their own license interface.

[0033] By means of the method according to the invention or the partially reconfigurable hardware system according to the invention, using a license manager, the owner of the soft IP (licensor) can impose time limits on the use of the soft IP in a specific partially reconfigurable hardware system already in use.

[0034] On the other hand, this also makes it possible to offer the user a time-limited license from the outset, which can be less costly for the user than an unlimited license.

[0035] This also allows the owner of the soft IP (licensor) to determine the actual duration of use of the soft IP by evaluating, if necessary, subsequent purchases of licenses by users. This allows the creation of a usage distribution curve.

[0036] With the present invention, the license usage can also be calculated by the actual activity of the soft IP, so that, for example, the license settlement may not be performed for those time periods when the soft IP is not used, ie, for example, in power-down mode. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to further explain the invention, reference is made to the drawings in the subsequent part of the description, from which further advantageous embodiments, details and extensions of the invention can be found. These drawings are to be understood as exemplary and, although they are to illustrate the features of the invention, they are by no means limiting the features of the invention or even a closed reproduction of the features of the invention. Among them:

[0038] Figure 1 A simplified diagram of an FPGA according to the present invention is shown;

[0039] Figure 2 shows a flow chart for license management;

[0040] Figure 3 A flow chart for installing new license data is shown. DETAILED DESCRIPTION

[0041] Figure 1 A simplified diagram of a partially reconfigurable FPGA according to the invention is shown, which comprises a non-configurable hard processor system (HPS) HPS and a configurable so-called fabric F. A license interface 1 is implemented between the HPS and the fabric F. Via the license interface 1, one or more soft IPs 3 arranged in the fabric F communicate with a license manager 2 arranged in the HPS. The license manager 2 has exclusive access to a non-volatile memory 4, which contains license data 5 for license management, here license data #1 to license data #n. The data for license management enables tracking of the current runtime of the soft IP 3.

[0042] The structure F includes a reconfiguration interface RI, which includes one or more reconfiguration containers RC1, RC2. Each reconfiguration container RC1, RC2 includes: at least one soft IP 3, represented here as "HW App A" or "HW App B"; and a circuit part 6 for license control. Each reconfiguration container RC1, RC2 is connected to the license interface 1 of the HPS through its own license interface 1.

[0043] The activities of the soft IP 3 are reported to the license manager 2 via a circuit part 6 for license control arranged in the soft IP 3. The license manager 2 allows the execution of the soft IP 3 only when valid license data #1, ..., #n exist, for example, when a license with a time limit, for example 100 operating hours, for the relevant soft IP 3 has not expired.

[0044] exist Figure 2 The flow of each step of FPGA license management is shown in . The flow shows the communication process between soft IP 3 and license manager 2 after the binary file of soft IP 3 is successfully loaded into the corresponding container (reconfiguration container RC1, RC2) in the structure F of FPGA.

[0045] The CPU loads the binary file of the soft IP 3 into the corresponding reconfiguration container RC1, RC2 via the reconfiguration interface RI, see step "Soft IP loaded into the container". Before activating the functionality, the soft IP 3 checks the availability of a valid license, see step "Activation request". For this purpose, the soft IP 3 is connected to the license manager 2 via the license interface 1. The license manager checks the license data 5 stored for the soft IP 3, see step "Check license data", and sends the corresponding activation data back to the soft IP 3, see step "Permit activation". In the event that the license data is missing or expired, no activation data is sent to the soft IP, i.e. there is no "permit activation".

[0046] The license manager 2 contains logic for updating the license data 5, see "update license usage time". If a soft IP 3 whose license has not yet expired is loaded, see step "activate soft IP", the runtime of the soft IP is recorded in the license data 5, see step "trigger time measurement of license usage". The recording of the runtime can be performed periodically, for example, at specific predetermined time intervals, see the repeated step "trigger time measurement of license usage". This recording is usually performed with the aid of a fixed clock frequency predetermined by the FPGA. If the available runtime expires, that is, the soft IP has been active for 100 hours, for example, the function of the soft IP is stopped. For this purpose, the license manager 2 sends a deactivation command ("soft IP lock") to the soft IP via the license interface 1 in order to deactivate the soft IP ("deactivate soft IP"). Now, the license manager 2 can also issue a report that informs the user of the expiration of the license.

[0047] Figure 3The sequence of installing new license data, more precisely the communication process between so-called trusted programming software (eg of the FPGA manufacturer) and license manager 2 in the FPGA when modifying license data 5 in non-volatile memory 4 of the FPGA, is shown.

[0048] The license manager 2 contains logic which stores license data 5, in particular new soft IPs 3, in the non-volatile memory 4 or modifies these license data. The key required for this is stored as a confidential and protected key in the non-volatile memory 4 and is called the license management authorization key, see Figure 3 The "LM Authorization Key" in the FPGA is used to grant, extend or terminate the license. The license is granted, extended or terminated by trusted programming software or licensed soft IP provided by the FPGA manufacturer. This process is known from the prior art, for example, refer to the publication "A Pay-per-Use Licensing Scheme for Hardware IPCores in Recent SRAM-Based FPGAs" cited above.

[0049] In order to protect the license data 5 from unauthorized access, the license management authorization key is updated in the non-volatile memory 4 and the previous license management authorization key is deleted after each license grant, license extension or license termination. The soft IP owner or license issuer transmits the license data 5 for the soft IP 3 to the FPGA manufacturer. The FPGA manufacturer adds the currently valid license management authorization key "LM authorization key n" and the license management authorization key for the next modification, i.e., "LM authorization key n+1", to the license data 5 and sends these license data to the FPGA designer. The FPGA designer updates the license data 5 of the soft IP 3 in the FPGA, as well as the data of the FPGA manufacturer, with the help of trusted programming software or licensed soft IP.

[0050] exist Figure 3 In the example, the trusted programming software sends a request for a change to the license data with the "LM authorization key n" to the license manager 2. The license manager checks the "LM authorization key n" and "permits the change request" "after successful checking". Then, the trusted programming software "transmits new license data and LM authorization key n+1" to the license manager. In the license manager, the "new license data is stored" and the "LM authorization key for the next modification of the license data is replaced". If this is completed, the license manager sends a "confirmation that data reception is successful" to the trusted programming software.

[0051] An external non-volatile memory (located outside the HPS) is conceivable as a possible variant of the storage location of license manager 2 and license data 5 , wherein license manager 2 and license data 5 are then loaded from the external memory into the HPS when the FPGA starts up.

[0052] In this case, the external non-volatile memory can also be located on a security chip, a so-called crypto-chip, for example VaultIC420™, thereby additionally protecting the data against unauthorized physical changes.

[0053] In the method according to the invention, the reconfiguration interface RI and the reconfiguration containers RC1 , RC2 can also be omitted and a conventional bitfile (without previous partial reconfiguration) can be used as soft IP 3 instead.

[0054] List of reference numerals:

[0055] 1 License Interface

[0056] 2 License Manager

[0057] 3 Soft IP

[0058] 4 Non-volatile memory

[0059] 5 License data

[0060] 6 Circuit section for licensing control

[0061] F Construction

[0062] The non-configurable portion of the HPS hardware system (hard processor system)

[0063] RC1 Reconfiguration Container

[0064] RC2 Reconfiguration Container

[0065] RI reconfiguration interface

Claims

1. A method for managing licenses of soft IP on a partially reconfigurable hardware system, characterized in that, - a license manager (2) is provided in the non-configurable part of the hardware system (HPS), or is only open to the non-configurable part of the hardware system (HPS), the license manager having exclusive access to a non-volatile memory (4), in which license data (5) are stored, the license data including a time limit for the duration of use of at least one soft IP (3); - Before activating a specific soft IP (3), the license manager (2) checks whether the usage time has expired; - The license manager (2) permits the use of the soft IP (3) only if the usage period has not expired; - changing the license data (5) using a key stored in a non-volatile memory (4) for the license data (5); and - In case of a change in the license data (5), a new key is registered and the previous key is deleted.

2. The method according to claim 1, characterized in that The partially reconfigurable hardware system is a FPGA.

3. The method according to claim 1, characterized in that The license manager (2) checks at certain predetermined time intervals whether the usage period has expired.

4. The method according to claim 3, characterized in that The check is performed at a predetermined fixed clock frequency which is predetermined by the partially reconfigurable hardware system.

5. The method according to any one of the preceding claims, characterized in that If the license expires, a report is issued to the designer of the partially reconfigurable hardware system.

6. The method according to any one of claims 1 to 4, characterized in that The license manager (2) and the non-volatile memory (4) for the license data (5) are arranged in a non-configurable part (HPS) of the hardware system.

7. The method according to any one of claims 1 to 4, characterized in that The license manager (2) and the non-volatile memory (4) for the license data (5) are stored in another non-volatile memory, and the other non-volatile memory is connected to the non-configurable part (HPS) of the hardware system through hardware, so that the license manager (2) and the license data (5) are loaded into the hardware system before starting operation.

8. The method according to any one of claims 1 to 4, characterized in that In the configurable part (F) of the hardware system, a circuit part (6) for license control is provided for each soft IP (3), and the activity of the soft IP (3) is reported to the license manager (2) through the circuit part.

9. The method according to claim 8, characterized in that The circuit part (6) for license control is connected to the license manager (2) via its own license interface (1).

10. A partially reconfigurable hardware system for executing the method according to any one of claims 1 to 9, characterized in that: - a license manager (2) is provided in the non-configurable part (HPS) of the hardware system, or is only open to the non-configurable part (HPS) of the hardware system, the license manager having exclusive access to a non-volatile memory (4), in which license data (5) are stored, the license data including a time limit for the duration of use of at least one soft IP (3); and - the license manager (2) is configured such that before activating a specific soft IP (3), the license manager checks whether the usage time has expired, and only if the usage time has not expired, the license manager (2) permits the use of the soft IP (3), The license manager (2) is also designed to check the license data for changes using a key and, if the check is successful, to register new license data (5) and to replace the key with a new key.

11. The partially reconfigurable hardware system according to claim 10, characterized in that: The partially reconfigurable hardware system is a FPGA.

12. The partially reconfigurable hardware system according to claim 10, characterized in that: The license manager (2) and the non-volatile memory (4) for the license data (5) are arranged in a non-configurable part (HPS) of the hardware system.

13. The partially reconfigurable hardware system according to claim 10, characterized in that: The license manager (2) and the non-volatile memory (4) for the license data (5) are stored in another non-volatile memory, and the other non-volatile memory is connected to the non-configurable part (HPS) of the hardware system through hardware, so that the license manager (2) and the license data (5) can be loaded into the hardware system before starting operation.

14. The partially reconfigurable hardware system according to any one of claims 10 to 13, characterized in that: In the configurable part (F) of the hardware system, a circuit part (6) for license control is provided for each soft IP (3), wherein the circuit part (6) for license control is connected to the license manager (2) via its own license interface (1).

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