Method and structure for improving image sensor crosstalk

Abstract

This application relates to methods and structures for improving crosstalk in image sensors. The image sensor includes a substrate material having a plurality of small photodiodes (SPDs) and a plurality of large photodiodes (LPDs) disposed therein. A plurality of pixel isolators are formed in the substrate material, each pixel isolator disposed between one of the SPDs and one of the LPDs. A passivation layer is disposed on the substrate material, and a buffer layer is disposed on the passivation layer. A plurality of first metal elements are disposed in the buffer layer, each first metal element being disposed above one of the pixel isolators, and a plurality of second metal elements are disposed above the plurality of first metal elements.

Description

Technical Field

[0001] This disclosure relates generally to image sensors, and more particularly to image sensors having a split pixel structure. Background Technology

[0002] Image sensors are ubiquitous. They are widely used in digital still cameras, cellular phones, surveillance cameras, and in medical, automotive, and other applications. Image sensors with a split-pixel structure use photodiodes of different sizes, which advantageously enables improved imaging, such as high dynamic range (HDR) sensing. Summary of the Invention

[0003] One aspect of this disclosure provides an image sensor, wherein the image sensor includes: a substrate material comprising a plurality of small photodiodes (SPDs) and a plurality of large photodiodes (LPDs) disposed therein, each LPD having a first full-well capacity greater than a second full-well capacity of each SPD; a plurality of pixel isolators formed in the substrate material, each pixel isolator disposed between one of the SPDs and one of the LPDs; a passivation layer disposed on the substrate material; a buffer layer disposed on the passivation layer; a plurality of first metal elements disposed in the buffer layer, each first metal element disposed above one of the pixel isolators; and a plurality of second metal elements disposed above the plurality of first metal elements.

[0004] Another aspect of this disclosure provides a method for manufacturing an image sensor, wherein the method includes: forming a plurality of pixel isolators in a substrate material having a plurality of large photodiodes (LPDs) and a plurality of small photodiodes (SPDs), each LPD having a first full-well capacity greater than a second full-well capacity of each SPD, each pixel isolator being disposed between one of the SPDs and one of the LPDs; forming a passivation layer on the substrate material; forming a buffer layer on the passivation layer; forming a plurality of openings in the buffer layer by removing material from the buffer layer, each of the openings being disposed above one of the pixel isolators; forming a plurality of first metal elements comprising depositing a first metal layer into the plurality of openings in the buffer layer; and forming a plurality of second metal elements comprising depositing a second metal layer over the first metal layer. Attached Figure Description

[0005] Non-limiting and non-exhaustive embodiments of the invention are described with reference to the following figures, wherein, unless otherwise stated, the same reference numerals refer to the same parts in the various views.

[0006] Figure 1 A representative image sensor according to the teachings of this disclosure is shown.

[0007] Figure 2 An exemplary cross-sectional view of a representative image sensor according to the teachings of this disclosure is shown.

[0008] Figure 3 An exemplary cross-sectional view of another representative image sensor according to the teachings of this disclosure is shown.

[0009] Figure 4 An exemplary cross-sectional view of another representative image sensor according to the teachings of this disclosure is shown.

[0010] Figure 5 An exemplary cross-sectional view of another representative image sensor according to the teachings of this disclosure is shown.

[0011] Figure 6 This is a diagram illustrating a representative imaging system with a pixel array according to the teachings of this disclosure.

[0012] Figures 7 to 13 A representative method for manufacturing a representative image sensor according to the teachings of this disclosure is shown.

[0013] Figure 14 A representative flowchart of a method for manufacturing a representative image sensor according to the teachings of this disclosure is shown. Detailed Implementation

[0014] This disclosure provides image sensors, apparatus, and methods for manufacturing image sensors. Numerous specific details are set forth in the following description to provide a thorough understanding of the examples. However, those skilled in the art will recognize that the techniques described herein can be implemented or practiced without one or more of the specific details stated herein, using other methods, components, materials, etc. In other instances, well-known structures, materials, or operations have not been shown or described in detail to avoid obscuring certain aspects.

[0015] References to "embodiments" or "some embodiments" throughout this specification mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of the invention. Therefore, the phrases "in some embodiments" or "in an embodiment" appearing in various places throughout this specification do not necessarily refer to the same instance. Furthermore, specific features, structures, or characteristics of embodiments may be combined in any suitable manner in one or more instances.

[0016] For ease of description, spatial relative terms such as “below,” “under,” “lower,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature and another element or feature as illustrated in the figures. It should be understood that these spatial relative terms are intended to cover different orientations of the device in use or operation other than those depicted in the figures. For example, if the device in the figures is flipped, an element described as “below,” “under,” or “below” other elements or features would be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “below” can cover both the above and below orientations. The device may be oriented in other ways (rotated ninety degrees or other orientations), and the spatial relative descriptors used herein shall be interpreted accordingly. Furthermore, it should be understood that when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or there may be one or more intermediate layers.

[0017] This disclosure relates to a number of terms relating to different embodiments, including apparatus and methods. Unless explicitly stated otherwise, terms with similar names have the same meaning for different embodiments. Similarly, this disclosure utilizes a large number of technical terms. These terms have their general meaning in the art in which they originate, unless specifically defined herein or their context of use clearly indicates otherwise. It should be noted that throughout this document, component names and symbols are used interchangeably (e.g., Si and silicon); however, both have the same meaning.

[0018] In this disclosure, the term "semiconductor substrate" or "substrate" refers to any type of substrate for forming semiconductor devices thereon, including single-crystal substrates, silicon, silicon-germanium, germanium, gallium arsenide semiconductor-on-insulator (SOI) substrates, and combinations thereof. The term semiconductor substrate may also refer to a substrate formed of one or more semiconductors that has undergone prior process steps to form regions and / or junctions in the substrate. Semiconductor substrates may also include various features such as doped and undoped semiconductors, epitaxial layers of silicon, and other semiconductor structures formed on the substrate. Furthermore, although various embodiments will be described primarily with respect to materials and processes compatible with silicon-based semiconductor materials (e.g., silicon and alloys of silicon with germanium and / or carbon), the technology is not limited thereto. Rather, various embodiments can be implemented using any type of semiconductor material.

[0019] In some embodiments, the image sensor includes one or more color filters and microlenses to filter and focus incident light, respectively. A buffer layer may be present between the substrate containing the photodiodes and the color filters. The image sensor may include one or more large photodiodes for sensing lower intensity light and one or more small photodiodes for sensing higher intensity light, for example, to achieve high dynamic range (HDR) sensing. The large photodiodes may be arranged near and / or around the small photodiodes. In embodiments with both large and small photodiodes, the large photodiodes typically have a full-well capacity greater than that of the small photodiodes.

[0020] In some cases, high-angle light from adjacent large photodiodes (e.g., due to internal reflections caused by high-intensity light or other reasons) may crosstalk to small photodiodes and be absorbed or even saturated by them (i.e., optical crosstalk). This can have a detrimental effect on the image sensor's ability to sense high-intensity light (e.g., petal-shaped stray light).

[0021] The image sensor disclosed herein has an architecture that improves the performance of high-intensity light sensing in the image sensor. A metal grid is provided between the small photodiode and the large photodiode to reduce the amount of high-angle light entering the small photodiode from the nearby large photodiode, i.e., to reduce optical crosstalk. This prevents high-angle light crosstalk from the adjacent large photodiode from activating the small photodiode. These advantages are particularly useful in split-pixel structures such as large photodiode / small photodiode (LPD / SPD) image sensors, and are also applicable to other pixel structures. Several embodiments of representative image sensors are described below. Unless otherwise stated, one or more features of different embodiments may be combined to form additional embodiments within the scope of this disclosure.

[0022] Figure 1 An example of a representative image sensor 100 according to the teachings of this disclosure is shown. Image sensor 100 includes a large pixel array (e.g., large pixels 102) and a small pixel array (e.g., small pixels 104). The large pixels are arranged in a grid, while the small pixels are disposed between and around the large pixels. Furthermore, image sensor 100 has an LPD / SPD layout comprising a plurality of large photodiodes (LPDs) and a plurality of small photodiodes (SPDs). Each LPD is located in one of the large pixels (e.g., large pixel 102), and each SPD is located in one of the small pixels. Figure 1 In a representative and non-limiting example, the small pixel is square and forms a 45-degree angle with the grid orientation of the hexagonal large pixel. In some embodiments, the small pixel and / or the large pixel have different... Figure 1 The shape and / or size shown.

[0023] Both small and large pixels are surrounded by a metal grid 106, which is composed of a plurality of first metal elements and a plurality of second metal elements, which will be described in detail below. The metal grid 106 improves the isolation between the SPD and LPD by reflecting or absorbing incident light with high angles and enhancing the photosensitivity of the LPD. Figure 1 In this embodiment, image sensor 100 has a large 4×4 pixel array and a small 5×5 pixel array; however, in other embodiments, image sensor 100 may have an array of any size. The concepts described herein apply to other pixel and photodiode layouts where separation of photodiodes is advantageous, and not only to those with LPDs and SPDs.

[0024] Figure 2 An example of a representative image sensor 200 according to the teachings of this disclosure is shown. The image sensor 200 is embodied in a device 202 (e.g., a camera, smartphone camera, vehicle camera, etc.). The image sensor 200 includes a substrate material 204 having a plurality of small photodiodes (SPDs) (such as SPD 206) and a plurality of large photodiodes (LPDs) (such as LPD 208). The image sensor 200 also includes a plurality of pixel isolators 210 formed in the substrate material 204, each pixel isolator 210 disposed between one of the SPDs 206 and one of the LPDs 208. A passivation layer 212 is disposed on the substrate material 204, and a buffer layer 214 is disposed on the passivation layer 212. A plurality of first metal elements 216 are disposed above the passivation layer 212 above the pixel isolators 210, and a plurality of second metal elements 218 are at least partially disposed above the second metal elements 218, both of which reduce pixel crosstalk, as described below. The representative image sensor 200 also includes an optional color filter layer 220 disposed above the first metal element 216 and the second metal element 218, and an optional microlens array disposed above the SPD 206 and LPD 208, which includes a small microlens 222 and a large microlens 224.

[0025] The substrate material 204 is a semiconductor substrate such as a silicon substrate, a doped silicon substrate such as an n-type doped silicon substrate or a p-type doped silicon substrate, a silicon-on-insulator substrate, etc. The substrate material 204 has a back side 226 and an opposing front side 228. Figure 2 In this configuration, the image sensor 200 is configured to receive incident light via the back side 226. Therefore, the back side 226 can be referred to as the illumination side of the image sensor 200, while the front side 228 can be referred to as the non-illumination side of the image sensor 200.

[0026] SPD 206 and LPD 208 convert incident light into electrical charge. As used herein, each LPD 208 has a larger full-well capacity than each SPD 206. SPD 206 and LPD 208 can be formed in substrate material 204, for example, by ion implantation on the front side 228. In some embodiments, SPD 206 and LPD 208 are n-type photodiodes formed in p-type silicon substrate material 204. In some embodiments, the polarities can be reversed; for example, SPD 206 and LPD 208 are p-type photodiodes formed in n-type silicon substrate material 204. Each LPD 208 has a larger full-well capacity than each SPD 206, i.e., each LPD 208 stores more photogenerated charge than each SPD 206. In some embodiments, the pixel size of each LPD 208 is at least twice the pixel size of each SPD 206. In some embodiments, each LPD 208 has a larger exposure area than each SPD 206. In some embodiments, each SPD 206 is surrounded by two or more LPDs 208. Each SPD 206 does not need to have the same full-well capacity, pixel size, or exposure area as all other SPDs 206. Similarly, each LPD 208 does not need to have the same full-well capacity, pixel size, or exposure area as all other LPDs 208. In some embodiments, the quantum efficiency of each LPD 208 is between 0.4 and 0.9 for incident light at a wavelength of 530 nm. In some embodiments, the quantum efficiency of each SPD 206 is less than 0.5 for incident light at a wavelength of 530 nm.

[0027] In the representative image sensor 200, the LPD 208 has a larger exposure area and higher sensitivity to incident light, and therefore can be configured for sensing lower light intensity. On the other hand, compared to the LPD 208, the SPD 206 has a smaller exposure area and is less sensitive to high-intensity light, and is therefore configured for sensing higher light intensity. The array of SPD 206 and LPD 208 advantageously enables high dynamic range (HDR) imaging sensing in the image sensor 200.

[0028] Pixel isolators 210 are formed on the back side 226 of substrate material 204 and extend downward from the back side 226 (the device can be oriented in any direction relative to the illustration) into substrate material 204. Each pixel isolator 210 is disposed between one of SPD 206 and one of LPD 208, for example, to prevent electrical and / or optical crosstalk between adjacent photodiodes. In one embodiment, each pixel isolator 210 is a deep trench isolation (DTI) structure filled with a passivation material (such as a high-k oxide material), a dielectric material (such as silicon oxide), a reflective metallic material, or a combination thereof. Figure 2 In this configuration, each pixel isolator 210 is filled with a portion of a passivation layer 212 and a buffer layer 214, as described below. In some embodiments, each pixel isolator 210 is a shallow trench isolation (STI) trench structure or another trench structure.

[0029] A passivation layer 212 is deposited on the back side 226 of the substrate material 204 and extends into the pixel isolator 210. The passivation layer 212 comprises a dielectric material, such as an oxide or a high-k material, for example, a material with a dielectric constant greater than about 3.9 (e.g., Al₂O₃ or HfO₂). In some embodiments, the thickness of the passivation layer 212 is about 0.005 μm to about 0.10 μm, for example, about 0.01 μm to about 0.05 μm. In some embodiments, the passivation layer 212 contains a negative fixed charge, thereby forming a hole accumulation layer around the pixel isolator 210, which passivates the sidewalls and bottom of the pixel isolator 210 and prevents the formation of defects / traps at the boundaries (e.g., silicon-silicon oxide interfaces) during the formation of the pixel isolator 210. This prevents the trapping of electrons and / or holes, thereby generating dark currents that may affect the sensitivity of the SPD 206 or LPD 208. The amount of negative fixed charge contained in the passivation layer 212 or the hole density of the formed hole accumulation layer depends on the high-k material and the thickness of the passivation layer 212. In some embodiments, the passivation layer 212 is formed of a material having a refractive index between the buffer layer 214 (e.g., 1.4 for silicon oxide) and the substrate material 204 (e.g., 3.9 for a silicon substrate) and having a thickness configured to serve as an anti-reflective coating to reduce the amount of incident light reflected, and to enhance the light absorption of the SPD 206 and LPD 208.

[0030] In some embodiments, a thin oxide layer may be formed between the passivation layer 212 and the back side 226 surface, for example by deposition or thermal oxidation, and the thin oxide layer serves as a stress relief layer between the passivation layer 212 and the silicon surface.

[0031] A buffer layer 214 is disposed on the passivation layer 212, i.e., on and above the back side 226 of the substrate material 204. In some embodiments, the buffer layer 214 comprises a dielectric material such as silicon dioxide and provides process margins for etching and chemical mechanical polishing processes to prevent damage to the substrate material 204 and the passivation layer 212. For example, the buffer layer 214 helps to secure the first metal element 216, as described below. In some embodiments, the thickness A of the buffer layer 214 is from about 0.025 μm to about 1.000 μm, for example, from about 0.05 μm to about 0.50 μm. In some embodiments, the buffer layer 214 has a lower dielectric constant than the passivation layer 212, i.e., the passivation layer 212 has a higher dielectric constant than the buffer layer 214.

[0032] The first metal element 216 and the second metal element 218 together form a metal grid (e.g., Figure 1 The metal grid 106 is configured to reduce the amount of high-angle incident light entering (and activating) the SPD 206 from the nearby LPD 208. In some embodiments, the buffer layer 214 is transmissive to incident light, such as light with a high angle of incidence relative to the surface normal pointing to the back side 226 surface of the LPD 208. Such high-angle incident light can penetrate the buffer layer 214 and crosstalk to the SPD 206 surrounded by the respective LPD 208, and the metal grid structure formed by the first metal element 216 and the second metal element 218 can effectively prevent such high-angle incident light from crosstalking to the SPD 206, and at the same time also improve the light absorption of the respective LPD 208. Thus, the metal grid reduces optical crosstalk and its detrimental effects, such as petal-shaped stray light. In some embodiments, at least a portion of the incident light that is tilted to the surface normal of the back side 226 can be reflected by a metal grid structure formed by the first metal element 216 and the second metal element 218 into a separate large photodiode 208 to enhance the photosensitivity of the large photodiode 208.

[0033] Each of the first metal elements 216 is at least partially formed of a metal such as aluminum or tungsten, and is at least partially disposed in a buffer layer 214, which is at least partially above (i.e., on top of) one of the pixel isolators 210. To reiterate, each of the first metal elements 216 is at least partially disposed in the buffer layer 214, and is located above and between adjacent SPDs 206 and LPDs 208. Figure 2In this configuration, each first metal element 216 is disposed within the buffer layer 214, for example, entirely within the buffer layer 214. In some embodiments, one or more first metal elements 216 are partially disposed within the buffer layer 214. For example, in some embodiments, one or more first metal elements 216 protrude from the buffer layer 214 (e.g., from the upper surface of the buffer layer 214). Figure 2 In some embodiments (described below), each first metal element 216 is positioned directly above one of the pixel isolators 210; however, in some embodiments, each first metal element 216 is laterally shifted so that it is not positioned directly above the corresponding pixel isolator 210. Figure 2 As shown, in some embodiments, the first metal element 216 does not extend into the plurality of pixel isolators 210. In some embodiments, the first metal element 216 and the second metal element 218 may be laterally shifted to the left or right of the centerline of the respective pixel isolator 210, depending on their position in the pixel array, to accommodate the chief ray angle (CRA) of the incident light to obtain better optical crosstalk performance.

[0034] Each first metal element 216 has a thickness B and a width C. The thickness B can be from about 0.025 μm to about 1.000 μm, for example, from about 0.05 μm to about 0.50 μm. In some embodiments, the thickness B corresponds to the thickness A of the buffer layer 214. In some embodiments, the thickness B of the first metal element 216 is about 0.005 μm to about 0.010 μm smaller than the thickness A of the buffer layer 214, and the upper surface of each first metal element 216 is flush with the upper surface of the buffer layer 214, such that the buffer layer 214 isolates each first metal element 216 from the passivation layer 212 (i.e., the first metal element 216 does not contact the passivation layer 212). In some embodiments, the upper surface of each first metal element 216 is flush with the upper surface of the buffer layer 214 (e.g., as a result of a processing step such as the chemimechanical treatment step described below). The width C is from about 0.05 μm to about 0.25 μm, for example, from about 0.09 μm to about 0.20 μm. In some embodiments, the width C is approximately equal to or less than the width of the corresponding pixel isolator 210 on which the first metal element 216 is disposed. In some embodiments, different first metal elements 216 have different thicknesses B and / or widths C.

[0035] Advantageously, by including first metal elements 216 in the buffer layer 214, each first metal element 216 is better positioned to prevent incident light from activating the SPD 206 compared to locations further away from the SPD 206 (e.g., in the color filter layer 220, or above the SPD 206 by about 0.05 μm to about 0.50 μm). To reiterate, it is difficult for incident light to pass beneath the first metal elements 216 and activate the SPD 206, otherwise it would saturate the SPD 206 during the integration period of the image sensor.

[0036] The second metal element 218 further enhances the light-shielding capability of the metal grid. Similar to the first metal element 216, each of the second metal elements 218 is at least partially formed of a metal such as aluminum or tungsten, and is at least partially disposed above (i.e., on top of) one of the pixel isolators 210 and at least partially disposed above at least one of the first metal elements 216. To reiterate, the lower surface of each second metal element 218 is at least partially abutted against the upper surface of the first metal element 216 at interface 230. Advantageously, this prevents incident light from traveling between the corresponding first metal element 216 and second metal element 218. The first metal element 216 is disposed in the buffer layer 214, while the second metal element 218 is disposed on top of the first metal element 216. Figure 2 In this configuration, a second metal element 218 is also disposed on the buffer layer 214, that is, the lower surface of each second metal element 218 is flush with the upper surface of the buffer layer 214. Figure 2 In this configuration, each second metal element 218 is aligned with a first metal element 216 disposed thereon. In some embodiments, each second metal element 218 is displaced relative to the first metal element 216 disposed thereon and / or relative to the pixel isolator 210 disposed thereon, for example, due to overlay displacement of the photoresist mask or to improve optical crosstalk performance. In some embodiments, one or more second metal elements 218 are formed of a material different from one or more first metal elements 216. In some embodiments, each second metal element 218 is disposed between two or more color filters.

[0037] Each second metal element 218 has a thickness D and a width E. The thickness D can be from about 0.050 μm to about 1.000 μm, for example, from about 0.10 μm to about 0.50 μm. In some embodiments, the thickness D can exceed the thickness B of the first metal element 216. The width E is from about 0.05 μm to about 0.25 μm, for example, from about 0.09 μm to about 0.20 μm. In some embodiments, the width E is about equal to or less than the width C of the corresponding first metal element 216 on which the second metal element 218 is disposed. In some embodiments, the width E is about equal to or less than the width of the corresponding pixel isolator 210 on which the second metal element 218 is disposed. In some embodiments, different second metal elements 218 have different thicknesses D and / or widths E.

[0038] Therefore, the first metal element 216 and the second metal element 218 together form a metal grid, which is configured to reduce optical crosstalk in and above the buffer layer 214.

[0039] An optional color filter layer 220 absorbs one or more wavelength ranges of visible light, causing one or more photodiodes to respond to one or more selected wavelength bands of visible light, such as red, green, blue, cyan, magenta, and yellow. Figure 2 In the middle, the second metal element 218 is disposed in the color filter layer 220. The color filter layer 220 is in Figure 2 The filter layer 220 is shown as a layer disposed above and around the second metal element 218. In some embodiments, the filter layer 220 includes a discrete array of color filters, such as small and large color filters, one or more of which can be configured to filter wavelengths of colors different from those of the other color filter. In such embodiments, each discrete small color filter may be disposed above and aligned with the SPD 206. Similarly, each discrete large color filter may be disposed above and aligned with the LPD 208. In some embodiments, one or more color filters are disposed on a buffer layer 214. In some embodiments, one or more color filters are at least partially disposed in the buffer layer 214. In some embodiments, one or more color filters are disposed in the gaps between the plurality of second metal elements 218. To reiterate, the second metal element 218 surrounds one or more color filters, thereby forming an embedded color filter array. In some embodiments, the thickness F of the color filter array is greater than the thickness of the second metal element 218.

[0040] Optional microlenses 222 and macrolenses 224 focus, guide, and focus incident light onto SPD 206 and LPD 208, respectively. Therefore, each microlens 222 and each macrolens 224 is formed above and aligned with SPD 206 and LPD 208, respectively. For example, a microlens 222 is formed above SPD 206, with each edge aligned with the center of a corresponding first metal element 216 and second metal element 218 on each side of SPD 206, such that it is configured to guide incident light onto the exposure area of ​​SPD 206. The same applies to each macrolens 224. In some embodiments, one or more microlenses 222 and / or macrolenses 224 may have different heights, i.e., the distance between the top of the microlens and the corresponding color filter in the color filter layer 220. For example, the microlens 222 may have a first height that is less than the second height of the macrolens 224, i.e., the macrolens 224 is higher than the microlens 222, for example, to compensate for the curvature difference, so that the microlens 222 and the macrolens 224 have substantially the same focal length.

[0041] Advantageously, the structure of the image sensor 200 described above limits the amount of incident light (especially high-angle incident light) that can activate the SPD 206, thereby limiting optical crosstalk and improving the performance of the image sensor 200, especially HDR sensing.

[0042] Figure 3 An example of an alternative image sensor 300 embodied in device 302 is shown. Similar to image sensor 200, image sensor 300 includes a substrate material 304 having an SPD 306 and an LPD 308. Image sensor 300 also includes a plurality of pixel isolators 310 disposed between the SPD 306 and the LPD 308. A passivation layer 312 is disposed on the substrate material 304, and a buffer layer 314 is disposed on the passivation layer 312. A plurality of first metal elements 316 are disposed in the passivation layer 312 above the pixel isolators 310, and a plurality of second metal elements 318 are at least partially disposed above the first metal elements 316. A color filter layer 320 is disposed above the first metal elements 316 and between the second metal elements 318, and a microlens 222 and a macrolens 224 are disposed above the SPD 306 and the LPD 308, respectively. Image sensor 300 is configured to receive incident light through the back side 326 instead of through the front side 328.

[0043] Image sensor 300 is basically similar to Figure 2The image sensor 300 differs in that the second metal element 318 is laterally displaced relative to the first metal element 316, i.e., displaced in a plane parallel to the upper surface of the buffer layer 314. In some applications, for example, this displacement improves the optical performance of the image sensor 300 due to the angle of refraction of incident light. Each second metal element 318 is at least partially disposed above the corresponding first metal element 316, such that the lower surface of each second metal element 318 is at least partially abutted against the upper surface of the first metal element 316 at interface 330. In some embodiments, one or more edges of the microlens 322 and / or the macrolens 324 may also be displaced, for example, to align their edges with the second metal element 318.

[0044] Figure 4 Another example of an alternative image sensor 400 embodied in device 402 is shown. Similar to image sensor 200, image sensor 400 includes a substrate material 404 having an SPD 406 and an LPD 408. Image sensor 400 also includes a plurality of pixel isolators 410 disposed between the SPD 406 and the LPD 408. A passivation layer 412 is disposed on the substrate material 404, and a buffer layer 414 is disposed on the passivation layer 412. A plurality of first metal elements 416 are disposed in the passivation layer 412 above the pixel isolators 410, and a plurality of second metal elements 418 are at least partially disposed above the first metal elements 416. A color filter layer 420 is disposed above the first metal elements 416 and between the second metal elements 418, and a microlens 222 and a macrolens 224 are disposed above the SPD 406 and the LPD 408, respectively. Image sensor 400 is configured to receive incident light through a back side 426 instead of a front side 428.

[0045] Image sensor 400 is basically similar to Figure 2 The image sensor 200 differs in that both the first metal element 416 and the second metal element 418 are laterally displaced relative to the pixel isolator 410, i.e., displaced in a plane parallel to the upper surface of the buffer layer 414. In some applications, for example, this displacement improves the optical performance of the image sensor 400 due to the angle of refraction of incident light. Each second metal element 418 is disposed directly above the corresponding first metal element 416, such that the lower surface of each second metal element 418 abuts against the upper surface of the first metal element 416 at interface 430. In some embodiments, both the first metal element 416 and the second metal element 418 are displaced relative to the pixel isolator 410, but by different distances. Therefore, in such embodiments, each second metal element 418 partially overlaps with its corresponding first metal element 416 at interface 430. Figure 4In the process, the edges of the microlens 422 and the macrolens 424 are also shifted relative to the pixel isolator 410 so that their edges are aligned with the first metal element 416 and / or the second metal element 418.

[0046] Figure 5 Another example of an alternative image sensor 500 embodied in device 502 is shown. Similar to image sensor 200, image sensor 500 includes a substrate material 504 having an SPD 506 and an LPD 508. Image sensor 500 also includes a plurality of pixel isolators 510 disposed between the SPD 506 and the LPD 508. A passivation layer 512 is disposed on the substrate material 504, and a buffer layer 514 is disposed on the passivation layer 512. A plurality of first metal elements 516 are disposed in the passivation layer 512 above the pixel isolators 510, and a plurality of second metal elements 518 are at least partially disposed above the first metal elements 516. A color filter array 520 is disposed above the first metal elements 516 and between the second metal elements 518, and a microlens 222 and a macrolens 224 are disposed above the SPD 506 and the LPD 508, respectively. Image sensor 500 is configured to receive incident light through a back side 526 instead of a front side 528. Each second metal element 518 is disposed directly above a corresponding first metal element 516, such that the lower surface of each second metal element 518 abuts against the upper surface of the first metal element 516 at interface 530. Furthermore, each first metal element 516 and its corresponding second metal element 518 are disposed directly above a corresponding pixel isolator 510. In some embodiments, one or more of the first metal element 516 and / or the second metal element 518 may be shifted relative to each other and / or relative to the pixel isolator 510, as described above regarding... Figures 2 to 4 As described.

[0047] The image sensor 500 is basically similar to Figure 2 The image sensor 200 further includes an attenuation layer 532 disposed above each SPD 506 as described below. Moreover, Figure 5 The color filter array 520 clarifies Figure 2 The color filter layer 220 can be formed as an array of small color filters 534 and large color filters 536, each of which can be configured to filter incident light of the same or different wavelengths.

[0048] The attenuation layer 532 is configured to attenuate the photosensitivity of each SPD 506 and is arranged to form and align with the SPD 506 to attenuate incident light directed thereon. For example, in some embodiments, the attenuation layer 532 is configured to (e.g., by absorption) reduce the amount of incident light reaching the SPD 506, thereby preventing the SPD 506 from becoming saturated during the integration period. The attenuation layer 532 is formed on the buffer layer 514 and the second metal element 518. Furthermore, each attenuation layer 532 is disposed between the buffer layer 514 and a corresponding microfilter 534, for example, such that the microfilter 534 does not directly contact the buffer layer 514. The attenuation layer 532 may extend in all directions away from the SPD 506 in a plane parallel to the upper surface of the buffer layer 514.

[0049] The attenuation layer 532 can be a single-layer or multi-layer stacked structure, the thickness of which is configured to adjust the transmittance of incident light to the corresponding SPD 506, and can be formed of titanium, titanium nitride, tantalum, aluminum, tungsten, or combinations thereof. In some embodiments, each attenuation layer 532 covers not only the entire SPD 506, but also a portion of one or more adjacent LPDs 508.

[0050] Figure 6 This is a diagram illustrating an example of an imaging system 600 having a pixel array 602 with multiple image sensors formed according to the teachings of this disclosure. As shown, the pixel array 602 is coupled to a control circuit 604 and a readout circuit 606, the readout circuit being coupled to functional logic 608.

[0051] In one example, pixel array 602 is a two-dimensional (“2D”) array of pixels 610 (e.g., pixels P1, P2, ..., Pn). In one embodiment, each pixel 610 is a complementary metal-oxide-semiconductor (“CMOS”) imaging pixel. Pixel 610 can be implemented as a front-illuminated image sensor array or a back-illuminated image sensor array. In one embodiment, pixel 610 includes, for example... Figures 2 to 5 The depicted image sensor or multiple image sensors. As shown, pixels 610 are arranged in rows (e.g., rows R1 to Ry) and columns (e.g., columns C1 to Cx) to acquire image data of people, places, or objects, which can then be used to render 2D images of people, places, or objects.

[0052] In one embodiment, after one pixel 610 (or multiple pixels 610) has acquired its image data or image charge, the readout circuit 606 reads the image data and transfers it to functional logic 608. The readout circuit 606 may include amplification circuitry, such as a differential amplifier circuit, an analog-to-digital (“ADC”) converter circuit, or others. In some embodiments, the readout circuit 606 may read one row of image data at a time along the readout column lines (shown), or may use a variety of other techniques (not shown), such as serial readout or simultaneous fully parallel readout of all pixels, to read the image data.

[0053] Functional logic 608 may include logic and memory for storing image data or even manipulating image data by applying post-image effects (e.g., cropping, rotating, removing red-eye, adjusting brightness, adjusting contrast, or others).

[0054] Control circuitry 604 is coupled to pixel 610 and may include logic and memory for controlling the operational characteristics of pixel 610. For example, control circuitry 604 may generate a shutter signal for controlling image acquisition. In one embodiment, the shutter signal is a global shutter signal that simultaneously enables all pixels 610 to capture their respective image data simultaneously during a single acquisition window. In an alternative embodiment, the shutter signal is a rolling shutter signal, thereby sequentially enabling each row, column, or group of pixels 610 during successive acquisition windows.

[0055] Figures 7 to 13 An example of a representative method for manufacturing an image sensor 700 according to the teachings of this disclosure is shown, the image sensor 700 being substantially similar to Figure 2 Image sensor 200. Utilizing this representative method and having the characteristics described. Figures 2 to 6 The structural terms of a representative image sensor share common names and have the same meanings as those terms. Based on the descriptions of the elements provided above, the representative method may include, or can be modified to include, one or more steps to impart one or more properties (e.g., size) to the structural elements.

[0056] refer to Figure 7 A substrate material 704 is provided. Multiple small photodiodes (SPDs) (such as SPD 706) and multiple large photodiodes (LPDs) (such as LPD 708) are formed in the substrate material 704, for example, by ion implantation. The SPDs 706 and LPDs 708 are formed such that each LPD 708 has a first full-well capacity, which is greater than a second full-well capacity of each SPD 706. Multiple pixel isolators 710 are formed in the substrate material 704, with each pixel isolator 710 disposed between one of the SPDs 706 and one of the LPDs 708. Figure 7 In this design, each pixel isolator 710 is a deep trench isolation (DTI) trench structure. After forming the pixel isolator 710, a passivation layer 712 is formed on the substrate material, for example, by a dielectric material. The passivation layer 712 is disposed in each pixel isolator 710 such that it extends between adjacent SPDs 706 and LPDs 708. After forming the passivation layer 712, a buffer layer 714 of thickness A is formed on the passivation layer 712, for example, by dielectric deposition or thermal oxidation processes. The passivation layer 712 is disposed in each pixel isolator 710 such that it extends between adjacent SPDs 706 and LPDs 708.

[0057] refer to Figure 8 A representative method further includes forming openings 726 in the buffer layer 714 by removing material from the buffer layer 714, such that each opening 726 has a thickness B and a width C, as described above. The thickness B can be less than the thickness of the buffer layer 714. The openings 726 can be formed by one or more photolithography processes, etching processes, etc. For example, a mask can be placed over the buffer layer 714, and then dry etching and wet etching processes can be used to remove material corresponding to the openings 726 from the buffer layer 714. For example, a dry etching process can be used to remove material from the buffer layer 714 to a first depth, the first depth being less than the final desired thickness B of the opening 726. Then, for example, a wet etching process can be used to remove material from the buffer layer 714 to the final thickness B of the opening 726 to prevent damage to the passivation layer 712. Figure 8 In this configuration, each opening 726 is positioned directly above one of the pixel isolators 710. In some embodiments, each opening 726 may be displaced relative to the pixel isolator 710, in accordance with the teachings above. In some embodiments, the thickness of each opening 726 is less than the thickness of the buffer layer 714, as described above, for example, about 0.005 μm to about 0.010 μm less than the thickness of the buffer layer 214. In some embodiments, the width C of each opening 726 is equal to or less than the width G of the pixel isolator 710 above which it is positioned. In some embodiments, each opening 726 has a width C of about 0.05 μm to about 0.25 μm.

[0058] refer to Figure 9 A representative method further includes forming a plurality of first metal elements 716, comprising depositing a first metal layer 728 (e.g., a tungsten or aluminum layer) onto a buffer layer 714, such that the first metal layer 728 fills openings previously formed in the buffer layer (i.e., Figure 8 (as shown in the opening 726). In some embodiments, the first metal elements 716 are formed such that they do not contact the passivation layer 712, i.e., Figure 8The opening 726 shown does not extend all the way down to the passivation layer 712. Thus, the buffer layer 714 isolates the first metal element 716 from the passivation layer 712. Optionally, a barrier layer and a binder layer may be deposited into the opening before the deposition of the first metal layer 728 to prevent metal diffusion into the semiconductor substrate 704 and to increase the bonding strength between the first metal layer 728 and the passivation layer 712. The barrier layer and binder layer may be patterned and etched during the formation of the first metal element 716 such that the remainder of the barrier layer and binder layer is formed between the first metal element 716 and the passivation layer 712. The barrier layer and binder layer may comprise materials such as titanium (Ti), titanium nitride (TiN), or combinations thereof.

[0059] refer to Figure 10 A representative method further includes removing excess material from the first metal layer (i.e., Figure 9 (as indicated by 628 in the diagram), such that the first metal element 716 remains in the opening previously formed in the buffer layer 714. In some embodiments, a polishing process (e.g., a chemical mechanical polishing process) is used to remove excess material from the first metal layer. Material is removed from the first metal layer until the buffer layer 714 is exposed, and the first metal element 716 is substantially all that remains in the first metal layer. After this step, the upper surface of each first metal element 716 may be flush with the upper surface of the buffer layer 714.

[0060] refer to Figure 11 A representative method further includes forming a plurality of second metal elements 718, comprising depositing a second metal layer 730 (e.g., a tungsten or aluminum layer) over a first metal element 716 and a buffer layer 714. Due to the deposition of the second metal layer 730, a plurality of interfaces 734 are formed between the second metal layer 730 and the first metal element 716. A mask 732 can be applied to the second metal layer 730 to cover portions of the second metal layer 730 that will not be removed in subsequent steps. The mask 732 can be formed using a photolithography process.

[0061] refer to Figure 12 A representative method further includes removing excess material from the second metal layer (i.e., Figure 11 (the part pointed to by 630 in the text), so that Figure 11 Discrete second metal elements 718 are formed beneath the mask 732 shown. Material can be removed from the second metal layer using an etching process. Excess material is located between adjacent first metal elements 716 and second metal elements 718. Figure 12In this configuration, each of the second metal elements 718 is positioned directly above one of the first metal elements 716. In some embodiments, each of the second metal elements 718 may be displaced relative to the first metal element 716, such as... Figure 3 As shown.

[0062] refer to Figure 13 A representative method further includes forming an optional color filter layer 720 on the buffer layer 714, and forming an optional microlens array comprising small microlenses 722 and large microlenses 724. Figure 13 In this configuration, the color filter layer 720 is formed as a single layer disposed above and around the second metal element 718. In some embodiments, the color filter layer 720 comprises a discrete array of color filters, such as small and large color filters, one or more of which can be configured to filter wavelengths of colors different from those of another color filter. In such embodiments, each discrete small color filter is disposed above and aligned with the SPD 706. Similarly, each discrete large color filter is disposed above and aligned with the LPD 708. In some embodiments, adjacent color filters are disposed between adjacent second metal elements 718. In one example, individual color filters can be formed by depositing color filter material in the gaps between the second metal elements 718 according to a color filter pattern such as a Bayer pattern. In such examples, each of the second metal elements 718 is arranged between individual color filters, and a grid formed by the second metal elements 718 surrounds the individual color filter.

[0063] therefore, Figures 7 to 13 A representative method for forming the image sensor of this disclosure is shown.

[0064] Figure 14 It is a summary Figures 7 to 13 The flowchart of a representative method 1400 is shown. Although the following description involves multiple discrete steps, the described actions can be performed in more or fewer steps.

[0065] In step 1402, as mentioned above... Figure 7 As described, a semiconductor substrate material is provided, and a plurality of LPDs and SPDs are formed therein.

[0066] In step 1404, as mentioned above... Figure 7 As described, multiple pixel isolators are formed in the substrate material between the LPD and SPD.

[0067] In step 1406, as mentioned above... Figure 7As described, a passivation layer is formed on the substrate material and in the pixel isolator. For example, the passivation layer may line the sidewalls and bottom of the trench structure for each individual pixel isolator and extend continuously on the back side of the substrate material covering the back side surface.

[0068] In step 1408, as mentioned above... Figure 7 As described, a buffer layer is formed on the passivation layer.

[0069] In step 1410, as mentioned above... Figure 8 As described, multiple openings are formed in the buffer layer.

[0070] In step 1412, as mentioned above... Figures 8 to 10 As described, multiple first metal elements are formed in the buffer layer.

[0071] In step 1414, as mentioned above... Figures 11 to 12 As described, multiple second metal elements are formed.

[0072] At optional step 1416, as mentioned above... Figure 13 As described, an attenuation layer covering the SPD, a color filter (e.g., a color filter array), and a microlens array are formed on the buffer layer and on the second metal element.

[0073] The aforementioned representative methods are used and have the same characteristics as those used to describe Figures 2 to 5 Representative image sensors and Figures 7 to 13 The representative method's structural terms share common names and meanings with those terms. Based on the descriptions of the elements provided above, the representative method may include, or can be modified to include, one or more steps to impart one or more properties (e.g., size) to the structural elements.

[0074] Therefore, the image sensor of this disclosure has a metal grid comprising a first metal element disposed in a buffer layer and a second metal element disposed on the first metal element. The first and second metal elements form the metal grid, which is configured to reduce the amount of high-angle incident light entering a small photodiode from a nearby large photodiode, i.e., to reduce optical crosstalk and its associated effects (e.g., petal-shaped stray light).

[0075] The above description of the illustrative examples of the invention (including those described in the summary of the specification) is not intended to be exhaustive or to limit the invention to the precise forms disclosed. As those skilled in the art will recognize, while specific examples of the invention have been described herein for illustrative purposes, various modifications are possible within the scope of the invention.

[0076] Modifications to the invention may be made based on the foregoing detailed description. The terminology used in the appended claims should not be construed as limiting the invention to the specific instances disclosed in the specification. Rather, the scope of the invention will be determined entirely by the appended claims as interpreted in accordance with long-established rules of claim interpretation.

Claims

1. An image sensor, comprising: A substrate material, wherein the substrate material comprises a plurality of small photodiodes (SPDs) and a plurality of large photodiodes (LPDs) disposed therein, each LPD having a first full-well capacity, the first full-well capacity being greater than a second full-well capacity of each SPD; Multiple pixel isolators are formed in the substrate material, and each pixel isolator is disposed between one of the SPD and one of the LPD; A passivation layer is disposed on the substrate material; A buffer layer is disposed on the passivation layer; A plurality of first metal elements are disposed in the buffer layer and separate different portions of the buffer layer, each first metal element being disposed above one of the pixel isolators; A plurality of second metal elements are disposed above the plurality of first metal elements; as well as A plurality of color filters, wherein each of the plurality of color filters is disposed in an opening between a plurality of second metal elements, such that the plurality of second metal elements surround and separate the plurality of color filters. Multiple microlenses are disposed on the multiple color filters, wherein the multiple second metal elements and the multiple first metal elements are disposed between the multiple microlenses and the substrate material; The buffer layer is disposed between openings of adjacent first metal elements, including the plurality of first metal elements; The first width of each first metal element is the same as the second width of each corresponding second metal element; as well as The stacked structure of the first metal element and the second metal element is located between the plurality of microlenses and the photodiode in the substrate material.

2. The image sensor according to claim 1, wherein the thickness of the plurality of first metal elements is 0.005 μm to 0.010 μm less than the thickness of the buffer layer, such that the buffer layer isolates the plurality of first metal elements from the passivation layer.

3. The image sensor according to claim 2, wherein the thickness of the buffer layer is from 0.05 μm to 0.50 μm.

4. The image sensor according to claim 2, wherein the upper surface of the plurality of first metal elements is flush with the upper surface of the buffer layer.

5. The image sensor according to claim 1, wherein the width of each first metal element is from 0.05 μm to 0.25 μm.

6. The image sensor of claim 5, wherein the width of each first metal element is from 0.09 μm to 0.20 μm.

7. The image sensor of claim 5, wherein the width of each first metal element is equal to or less than the width of the pixel isolator disposed above it.

8. The image sensor according to claim 1, wherein the thickness of the plurality of second metal elements is from 0.10 μm to 0.50 μm.

9. The image sensor of claim 1, wherein the thickness of each second metal element is greater than that of each first metal element.

10. The image sensor of claim 1, wherein the plurality of first metal elements are displaced relative to the plurality of second metal elements.

11. The image sensor of claim 1, wherein at least one of the plurality of first metal elements or one of the plurality of second metal elements is formed of tungsten or aluminum.

12. The image sensor of claim 1, wherein the plurality of microlenses further comprises: Multiple microlenses, each microlens being positioned above one of the SPDs; as well as Multiple large microlenses, each located above one of the LPDs.

13. The image sensor of claim 1, further comprising an attenuation layer, the attenuation layer being at least partially disposed over the plurality of second metal elements formed in the buffer layer.

14. The image sensor of claim 1, wherein at least one of the plurality of first metal elements and the plurality of second metal elements forms a grid located between the plurality of microlenses and the substrate material.

15. A method for manufacturing an image sensor, comprising: Multiple pixel isolators are formed in a substrate material having multiple large photodiodes LPD and multiple small photodiodes SPD. Each LPD has a first full-well capacity, which is greater than the second full-well capacity of each SPD. Each pixel isolator is disposed between one of the SPD and one of the LPD. A passivation layer is formed on the substrate material; A buffer layer is formed on the passivation layer; Multiple openings are formed in the buffer layer by removing material from the buffer layer, each of the openings being positioned above one of the pixel isolators; Forming a plurality of first metal elements involves depositing a first metal layer into the plurality of openings in the buffer layer, wherein the plurality of first metal elements separate different portions of the buffer layer; Forming a plurality of second metal elements includes depositing a second metal layer over a first metal layer, wherein the plurality of second metal elements and the plurality of first metal elements are disposed between the plurality of microlenses and the substrate material, and wherein a first width of each first metal element is the same as a second width of each corresponding second metal element; A plurality of color filters are formed in the gaps between the plurality of second metal elements, and the plurality of second metal elements separate the plurality of color filters; as well as Multiple microlenses are formed on the plurality of color filters. The plurality of second metal elements form a grid surrounding each of the plurality of color filters, wherein the grid is formed between the plurality of microlenses and the substrate material, and wherein the stacked structure of the first metal elements and the second metal elements is located between the plurality of microlenses and the photodiode in the substrate material.

16. The method according to claim 15: The formation of the plurality of first metal elements includes removing excess portions of the first metal layer, such that the upper surfaces of the plurality of first metal elements are flush with the upper surface of the buffer layer; and The formation of the plurality of second metal elements includes removing excess portions of the second metal layer from between adjacent first metal elements.

17. The method of claim 15, wherein each of the plurality of second metal elements is disposed directly above one of the plurality of first metal elements.

18. The method of claim 17, wherein each of the second metal elements is displaced relative to the first metal element disposed above it.

19. The method of claim 16, wherein removing the excess portion of the first metal layer includes using a polishing process, and wherein removing the excess portion of the second metal layer includes using a photolithography process or an etching process.

20. The method of claim 15, wherein the depth of each of the plurality of openings in the buffer layer is less than the depth of the buffer layer.

21. The method of claim 20, wherein the depth of each of the plurality of openings in the buffer layer is 0.005 μm to 0.010 μm less than the thickness of the buffer layer.

22. The method of claim 15, wherein the width of each of the plurality of openings in the buffer layer is equal to or less than the width of the pixel isolator disposed above it.

23. The method of claim 15, wherein forming the plurality of first metal elements comprises forming the plurality of first metal elements such that they do not contact the passivation layer.

24. The method of claim 15, wherein forming the plurality of microlenses comprises forming a microlens array having a plurality of small microlenses and a plurality of large microlenses, each small microlens being located above one of the SPDs and each large microlens being located above one of the LPDs.

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