A method and device for task scheduling

Abstract

The present invention discloses a method and device for task scheduling, which schedules tasks for each processor among multiple processors according to the status and current load information of each processor among multiple processors, log information of historical task execution and historical load data of each processor. The present invention predicts the future load conditions of each processor according to the historical task execution time data and the historical load data of each processor, combined with the current load conditions of each processor, to achieve load balancing scheduling of tasks.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a method and device for task scheduling. Background Art

[0002] In order to achieve large-scale deployment and real-time analysis, it is necessary to use a processor cluster to process tasks. However, in the related art, when a processor cluster is used to process tasks, the balance of task scheduling is poor. Summary of the invention

[0003] To solve the above problems, the purpose of the present invention is to provide a method and device for task scheduling, which can achieve load balancing scheduling of tasks.

[0004] The present invention provides a method for task scheduling, the method comprising:

[0005] Task scheduling is performed on each of the multiple processors according to the status and current load information of each of the multiple processors, log information of historical task execution, and historical load data of each processor.

[0006] As a further improvement of the present invention, the step of performing task scheduling on each of the multiple processors according to the status and current load information of each of the multiple processors, the log information of historical task execution, and the historical load data of each processor includes:

[0007] Obtaining status and current load information of each processor among multiple processors;

[0008] Based on the log information of historical task execution, predict the workload required to execute the tasks to be scheduled;

[0009] Based on the historical load data of each processor, predict the future load information of each processor;

[0010] Based on the status and current load information of each processor, the workload of executing the task to be scheduled and the future load information of each processor, a target processor for executing the task to be scheduled is determined from the multiple processors, and the task to be scheduled is assigned to the target processor for execution.

[0011] As a further improvement of the present invention, the obtaining of the status and current load information of each processor among the multiple processors includes:

[0012] The status and current load information of each processor are obtained through the daemon process of each processor.

[0013] As a further improvement of the present invention, the status and current load information of each processor includes: at least one of processor usage, central processing unit usage, video memory usage, network delay and data throughput.

[0014] As a further improvement of the present invention, the log information of the historical task execution is the log information of the historical task execution within the target time interval.

[0015] As a further improvement of the present invention, the workload required for executing the task to be scheduled is predicted based on the log information of the historical task execution, including:

[0016] According to the log information of historical task execution, obtain the time series data corresponding to each task;

[0017] Based on the time series data corresponding to different types of tasks, predict the workload required to execute the current task.

[0018] As a further improvement of the present invention, the log information of each historical task execution includes at least one of the number of processors, the name of each processor, and the time series data corresponding to each task;

[0019] The time series data corresponding to each task includes: at least one of the time for executing the task, processor usage, central processing unit usage, video memory usage, network delay and data throughput.

[0020] As a further improvement of the present invention, the workload required for executing the current task is predicted based on the time series data corresponding to different types of tasks, including:

[0021] Aggregate time series data of tasks by task type;

[0022] Use data smoothing algorithm on all time series data of each type of task to obtain the dictionary structure of workload corresponding to each type of task;

[0023] According to the dictionary structure of the workload corresponding to the current task type, the workload required to execute the current task is obtained.

[0024] As a further improvement of the present invention, the dictionary structure of the workload corresponding to each type of task includes: the task type and at least one of the average time to execute this type of task, the average processor utilization, the average central processing unit utilization, the average video memory utilization, the network delay and the average data throughput.

[0025] As a further improvement of the present invention, predicting the future load information of each processor based on the historical load data of each processor includes:

[0026] Gather historical load data of each processor among multiple processors and perform data regularization;

[0027] Based on the regularized historical load data of each processor, the future load information of each processor is predicted.

[0028] As a further improvement of the present invention, data regularization is performed on the historical load data of each processor, and all characteristic dimensions of the historical load data of each processor are normalized into a same or similar dimension.

[0029] As a further improvement of the present invention, all characteristic dimensions of the historical load data of each processor are normalized into a same or similar dimension, including:

[0030] All fields of the historical load data of each processor are represented by numbers within the range of 0 to 100.

[0031] As a further improvement of the present invention, all fields of the historical load data of each processor include at least one of the video memory, network delay and data throughput of the processor.

[0032] As a further improvement of the present invention, all fields of the historical load data of each GPU node are represented by numbers within the range of 0 to 100, including:

[0033] Determine the usage and size of each field of each processor;

[0034] If the size of the field is less than or equal to the first threshold, the usage rate of the field is regularized to a first number;

[0035] If the size of the field is greater than the first threshold and less than or equal to the second threshold, the usage rate of the field is regularized to a second number;

[0036] If the size of the field is greater than the second threshold and less than or equal to the third threshold, the usage rate of the field is regularized to a third number;

[0037] And so on, the upper limit is when the number after field regularization reaches 100.

[0038] As a further improvement of the present invention, based on the regularized historical load data of each processor, the future load information of each processor is predicted, including:

[0039] The regularized historical load data of each processor is input into the Bi-LSTM model to predict the future load information of each processor.

[0040] As a further improvement of the present invention, the historical load data of each processor in the plurality of processors is collected, including:

[0041] The historical load data of each processor is collected once every T time interval.

[0042] Among them, based on the regularized historical load data of each processor, the future load information of each processor is predicted, including:

[0043] The regularized historical load data of each processor within the time interval T is input into the Bi-LSTM model to predict the future T of each processor. / Load information at the moment.

[0044] As a further improvement of the present invention, based on the status and current load information of each processor, the workload of executing the task to be scheduled, and the future load information of each processor, a target processor for executing the task to be scheduled is determined from the multiple processors, and the task to be scheduled is assigned to the target processor for execution, including:

[0045] Regularize the acquired status and current load information of each processor, the predicted workload of the task to be scheduled, and the predicted future load information of each processor;

[0046] The regularized data is input into a prediction model to determine a target processor for executing the task to be scheduled, and the task to be scheduled is assigned to the determined target processor for execution, wherein the prediction model is constructed based on a pulse neural network.

[0047] As a further improvement of the present invention, the prediction model includes: a RLIF layer and a fully connected layer.

[0048] As a further improvement of the present invention, the prediction model includes a first RLIF layer, a second RLIF layer and a fully connected layer. The regularized data is processed by the first RLIF layer, the second RLIF layer and the fully connected layer in sequence. The fully connected layer outputs the node name of the target processor that executes the task to be scheduled and the name of the processor group to which it belongs, the time limit for executing the current task, the memory usage limit and the video memory usage limit.

[0049] As a further improvement of the present invention, the RLIF layer is used to determine the biovoltage at time t according to the input at time t and the membrane potential information at time t-1, determine the output value at time t according to the biovoltage at time t and the emission threshold, determine the intermediate vector according to the output value at time t and the biovoltage at time t, and determine the membrane potential information at time t+1 according to the intermediate vector.

[0050] The output value at the time t is used as the input of the next RLIF layer or fully connected layer.

[0051] As a further improvement of the present invention, the output value at time t is determined according to the biovoltage at time t and the emission threshold, including:

[0052] If the biovoltage at time t is greater than or equal to the emission threshold, then determining the output value at time t to be 1;

[0053] If the biovoltage at time t is less than the emission threshold, the output value at time t is determined to be 0.

[0054] As a further improvement of the present invention, after the target processor executes the task to be executed, the method further includes:

[0055] Obtaining log information of the target processor executing the task to be executed;

[0056] The log information of the historical task execution is updated according to the log information of the target processor executing the task to be executed.

[0057] As a further improvement of the present invention, the multiple processors include at least one of a GPU and a many-core processor.

[0058] The present invention also provides a task scheduling device, which adopts the described method. The device schedules tasks for each processor among multiple processors according to the status and current load information of each processor among the multiple processors, log information of historical task execution and historical load data of each processor.

[0059] As a further improvement of the present invention, the device comprises:

[0060] A service discovery module is configured to obtain status and current load information of each processor among the plurality of processors;

[0061] A task workload prediction module is configured to predict the workload required to execute the task to be scheduled based on the log information of historical task execution;

[0062] The node load condition prediction module is configured to predict the future load information of each processor based on the historical load data of each processor;

[0063] The task scheduling module is configured to determine the target processor for executing the task to be scheduled from multiple processors based on the status and current load information of each processor, the workload of executing the task to be scheduled, and the future load information of each processor, and assign the task to be scheduled to the target processor for execution.

[0064] As a further improvement of the present invention, the service discovery module is configured to obtain the status and current load information of each processor through the daemon process of each processor.

[0065] As a further improvement of the present invention, the status and current load information of each processor includes: at least one of processor usage, central processing unit usage, video memory usage, network delay and data throughput.

[0066] As a further improvement of the present invention, the log information of the historical task execution is the log information of the historical task execution within the target time interval.

[0067] As a further improvement of the present invention, the task workload prediction module is configured as follows:

[0068] According to the log information of historical task execution, obtain the time series data corresponding to each task;

[0069] Based on the time series data corresponding to different types of tasks, predict the workload required to execute the current task.

[0070] As a further improvement of the present invention, the log information of each historical task execution includes at least one of the number of processors, the name of each processor, and the time series data corresponding to each task;

[0071] The time series data corresponding to each task includes: at least one of the time for executing the task, processor usage, central processing unit usage, video memory usage, network delay and data throughput.

[0072] As a further improvement of the present invention, the task workload prediction module is configured as follows:

[0073] Aggregate time series data of tasks by task type;

[0074] Use data smoothing algorithm on all time series data of each type of task to obtain the dictionary structure of workload corresponding to each type of task;

[0075] According to the dictionary structure of the workload corresponding to the current task type, the workload required to execute the current task is obtained.

[0076] As a further improvement of the present invention, the dictionary structure of the workload corresponding to each type of task includes: the task type and at least one of the average time to execute this type of task, the average processor utilization, the average central processing unit utilization, the average video memory utilization, the network delay and the average data throughput.

[0077] As a further improvement of the present invention, the node load condition prediction module is configured as follows:

[0078] Gather historical load data of each processor among multiple processors and perform data regularization;

[0079] Based on the regularized historical load data of each processor, the future load information of each processor is predicted.

[0080] As a further improvement of the present invention, the node load condition prediction module is configured to: perform data regularization on the historical load data of each processor, and normalize all feature dimensions of the historical load data of each processor into a same or similar dimension.

[0081] As a further improvement of the present invention, the node load condition prediction module is configured to: represent all fields of the historical load data of each processor by numbers within the range of 0 to 100.

[0082] As a further improvement of the present invention, all fields of the historical load data of each processor include at least one of the video memory, network delay and data throughput of the processor.

[0083] As a further improvement of the present invention, the node load condition prediction module is configured as follows:

[0084] Determine the usage and size of each field of each processor;

[0085] If the size of the field is less than or equal to the first threshold, the usage rate of the field is regularized to a first number;

[0086] If the size of the field is greater than the first threshold and less than or equal to the second threshold, the usage rate of the field is regularized to a second number;

[0087] If the size of the field is greater than the second threshold and less than or equal to the third threshold, the usage rate of the field is regularized to a third number;

[0088] And so on, the upper limit is when the number after field regularization reaches 100.

[0089] As a further improvement of the present invention, the node load condition prediction module is configured to: input the regularized historical load data of each processor into the Bi-LSTM model to predict the future load information of each processor.

[0090] As a further improvement of the present invention, the node load condition prediction module is configured as follows:

[0091] The historical load data of each processor is collected once every T time interval.

[0092] Among them, based on the regularized historical load data of each processor, the future load information of each processor is predicted, including:

[0093] The regularized historical load data of each processor within the time interval T is input into the Bi-LSTM model to predict the future T of each processor. / Load information at the moment.

[0094] As a further improvement of the present invention, the task scheduling module is configured as follows:

[0095] Regularize the acquired status and current load information of each processor, the predicted workload of the task to be scheduled, and the predicted future load information of each processor;

[0096] The regularized data is input into a prediction model to determine a target processor for executing the task to be scheduled, and the task to be scheduled is assigned to the determined target processor for execution, wherein the prediction model is constructed based on a pulse neural network.

[0097] As a further improvement of the present invention, the prediction model includes: a RLIF layer and a fully connected layer.

[0098] As a further improvement of the present invention, the prediction model includes a first RLIF layer, a second RLIF layer and a fully connected layer. The regularized data is processed by the first RLIF layer, the second RLIF layer and the fully connected layer in sequence. The fully connected layer outputs the node name of the target processor that executes the task to be scheduled and the name of the processor group to which it belongs, the time limit for executing the current task, the memory usage limit and the video memory usage limit.

[0099] As a further improvement of the present invention, the RLIF layer is used to determine the biovoltage at time t according to the input at time t and the membrane potential information at time t-1, determine the output value at time t according to the biovoltage at time t and the emission threshold, determine the intermediate vector according to the output value at time t and the biovoltage at time t, and determine the membrane potential information at time t+1 according to the intermediate vector.

[0100] The output value at the time t is used as the input of the next RLIF layer or fully connected layer.

[0101] As a further improvement of the present invention, the output value at time t is determined according to the biovoltage at time t and the emission threshold, including:

[0102] If the biovoltage at time t is greater than or equal to the emission threshold, then determining the output value at time t to be 1;

[0103] If the biovoltage at time t is less than the emission threshold, the output value at time t is determined to be 0.

[0104] As a further improvement of the present invention, each processor is configured with a task execution module and a load sending module. The load sending module of each processor sends the status and current load information of the processor to the service discovery module, and the task scheduling module assigns the task to the task execution module of the target processor for execution.

[0105] As a further improvement of the present invention, after the target processor executes the task to be executed, the device is further configured to: obtain log information of the target processor executing the task to be executed;

[0106] The log information of the historical task execution is updated according to the log information of the target processor executing the task to be executed.

[0107] As a further improvement of the present invention, the multiple processors include at least one of a GPU and a many-core processor.

[0108] The present invention also provides an electronic device, comprising a memory and a processor, wherein the memory is used to store one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the described method.

[0109] The present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program is executed by a processor to implement the method described.

[0110] The beneficial effects of the present invention are:

[0111] Based on the historical task execution time data and the historical load data of each processor, and combined with the current load of each processor, the future load of each processor is predicted to achieve load balancing scheduling of tasks. BRIEF DESCRIPTION OF THE DRAWINGS

[0112] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure or the prior art, the drawings required for use in the embodiments or the prior art descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative labor.

[0113] Figure 1 A system block diagram of a task scheduling device according to an exemplary embodiment of the present disclosure;

[0114] Figure 2 A data flow diagram between modules in a task scheduling device according to an exemplary embodiment of the present disclosure;

[0115] Figure 3A flow chart of a service discovery module according to an exemplary embodiment of the present disclosure;

[0116] Figure 4 A flowchart of a task workload prediction module according to an exemplary embodiment of the present disclosure;

[0117] Figure 5 A schematic diagram of a flow chart of a node load condition prediction module according to an exemplary embodiment of the present disclosure;

[0118] Figure 6 A schematic diagram of a Bi-LSTM model according to an exemplary embodiment of the present disclosure;

[0119] Figure 7 A flowchart of a task scheduling module according to an exemplary embodiment of the present disclosure;

[0120] Figure 8 A schematic diagram of an RLIF network model according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0121] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0122] It should be noted that if the embodiments of the present disclosure involve directional indications (such as up, down, left, right, front, back, etc.), such directional indications are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.

[0123] In addition, in the description of the present disclosure, the terms used are only for illustrative purposes and are not intended to limit the scope of the present disclosure. The terms "include" and / or "comprise" are used to specify the existence of the elements, steps, operations and / or components, but do not exclude the existence or addition of one or more other elements, steps, operations and / or components. The terms "first", "second" and the like may be used to describe various elements, do not represent the order, and do not limit these elements. In addition, in the description of the present disclosure, unless otherwise specified, the meaning of "multiple" is two and more than two. These terms are only used to distinguish one element from another element. In conjunction with the following drawings, these and / or other aspects become apparent, and it is easier for those of ordinary skill in the art to understand the description of the embodiments described in the present disclosure. The accompanying drawings are used to describe the embodiments described in the present disclosure for illustrative purposes only. Those skilled in the art will easily recognize from the following description that, without departing from the principles described in the present disclosure, alternative embodiments of the structures and methods shown in the present disclosure can be adopted.

[0124] Since different tasks have different priorities, processing times, and consumed resources, scheduling based solely on task priority is not comprehensive enough. When allocating tasks, it is necessary to comprehensively consider the remaining resources of the processor cluster nodes and the properties of the tasks to be processed themselves, so as to improve task processing efficiency while reducing the pressure of processor cluster task scheduling.

[0125] A task scheduling method described in an embodiment of the present disclosure includes: scheduling tasks for each of the multiple processors based on the status and current load information of each processor, log information of historical task execution, and historical load data of each processor.

[0126] Based on the historical task execution time data and the historical load data of each processor, combined with the current load of each processor, the future load of each processor is predicted, and load balancing scheduling of tasks can be achieved.

[0127] In an optional implementation, the task scheduling method includes:

[0128] Obtaining status and current load information of each processor among multiple processors;

[0129] Based on the log information of historical task execution, predict the workload required to execute the tasks to be scheduled;

[0130] Based on the historical load data of each processor, predict the future load information of each processor;

[0131] Based on the status and current load information of each processor, the workload of executing the task to be scheduled and the future load information of each processor, a target processor for executing the task to be scheduled is determined from multiple processors, and the task to be scheduled is assigned to the target processor for execution.

[0132] The method disclosed in this disclosure comprehensively considers parameters such as task priority, current load of the processor cluster, and predicted future load, and comprehensively considers the remaining resources of the processor cluster nodes and the properties of the tasks to be processed, to achieve load balancing scheduling of tasks, while improving task processing efficiency and reducing the pressure of task scheduling in the processor cluster. This load balancing scheduling can not only predict the workload required for task execution and the future T / The load situation at any moment can also be used to dynamically allocate tasks through prediction information, which greatly breaks through the limitations of manually selecting target processors. The load-balanced task scheduling method is adopted to enable the processor cluster to maximize the use of hardware resources, thereby expanding the bandwidth of network devices and servers, increasing throughput, strengthening server processing capabilities, and improving server flexibility and scalability.

[0133] In an optional implementation, obtaining the status and current load information of each processor among the multiple processors includes: obtaining the status and current load information of each processor through a daemon process of each processor.

[0134] The daemon process added to each processor is used to maintain the processor and provide an API interface to the outside. By calling the API interface of the daemon process of each processor, the status and current load information of each processor can be obtained.

[0135] In another optional implementation, the status and current load information of each processor includes at least one of processor usage, CPU usage, video memory usage, network delay, and data throughput. The status and current load information of each processor is stored in a database of an available node instance for invocation.

[0136] In an optional implementation, the log information of the historical tasks is the log information of the historical tasks executed within the target time interval. For example, when predicting the execution of the tasks to be scheduled, the target time interval can be set to within 6 months or 12 months from the current time. The method disclosed in the present invention does not make any specific restrictions on the target time interval.

[0137] In an optional implementation, predicting the workload required to execute the task to be scheduled based on the log information of historical task execution includes:

[0138] According to the log information of historical task execution, obtain the time series data corresponding to each task;

[0139] Based on the time series data corresponding to different types of tasks, predict the workload required to execute the current task.

[0140] In an optional implementation, the log information of each historical task execution includes: the number of processors, the names of each processor, and at least one of the time series data corresponding to each task; the time series data corresponding to each task includes: the time of executing the task, processor usage, central processing unit usage, video memory usage, network delay, and at least one of data throughput. In order to reduce the difficulty of workload statistics, the present disclosure uses a fine-grained task: workload statistical method. That is, a hook (hook function) for statistical processor usage, central processing unit usage, video memory usage, network delay, and data throughput time series data and other important contents is embedded in each task. When the exact information of the statistical task is calculated, each processor can calculate at least one task at the same time, which greatly increases the utilization efficiency and statistical coverage of the system.

[0141] In an optional implementation, predicting the workload required for executing the current task based on the time series data corresponding to different types of tasks includes:

[0142] Aggregate time series data of tasks by task type;

[0143] Use data smoothing algorithm on all time series data of each type of task to obtain the dictionary structure of workload corresponding to each type of task;

[0144] According to the dictionary structure of the workload corresponding to the current task type, the workload required to execute the current task is obtained.

[0145] In another optional embodiment, the dictionary structure of the workload corresponding to each type of task includes: the task type and at least one of the average time to execute this type of task, the average processor utilization, the average central processing unit utilization, the average video memory utilization, the network delay and the average data throughput.

[0146] Since the change in server load is a time series with a high degree of self-similarity, the method disclosed in the present invention uses the time series to predict the server load, and based on continuous data, can achieve effective prediction of future load conditions.

[0147] In an optional implementation, predicting future load information of each processor based on historical load data of each processor includes:

[0148] Gather historical load data of each processor among multiple processors and perform data regularization;

[0149] Based on the regularized historical load data of each processor, the future load information of each processor is predicted.

[0150] In an optional implementation, data regularization is performed on the historical load data of each processor, and all feature dimensions of the historical load data of each processor are normalized into a same or similar dimension. When the numerical scale of some unimportant features in the data is too large, the accuracy of the prediction will be reduced. By normalizing all features in the data through data regularization, the numerical scale of unimportant features can be reduced, and the prediction accuracy of the prediction model based on time series data can be improved.

[0151] In an optional implementation, all characteristic dimensions of the historical load data of each processor are normalized into a same or similar dimension, including: all fields of the historical load data of each processor are represented by numbers within a range of 0 to 100. In another optional implementation, all fields of the historical load data of each processor include at least one of the video memory, network latency, and data throughput of the processor.

[0152] In another optional implementation, all fields of the historical load data of each GPU node are represented by numbers within the range of 0 to 100, including:

[0153] Determine the usage and size of each field for each processor;

[0154] If the size of the field is less than or equal to the first threshold, the usage rate of the field is regularized to a first number;

[0155] If the size of the field is greater than the first threshold and less than or equal to the second threshold, the usage rate of the field is regularized to a second number;

[0156] If the size of the field is greater than the second threshold and less than or equal to the third threshold, the usage rate of the field is regularized to a third number;

[0157] And so on, the upper limit is when the number after field regularization reaches 100.

[0158] For example, at a certain moment, the video memory usage of the processor is 87%, and the total video memory size is less than or equal to 10GB (for example, the first threshold is 10GB), the video memory usage field can be regularized to 87 (for example, the first number corresponding to the video memory usage of 87% is 87); if the total video memory size is greater than 10GB but less than or equal to 20GB (for example, the first threshold is 10GB and the second threshold is 20GB), the video memory usage field can be regularized to 92 (for example, the second number corresponding to the video memory usage of 87% is 87+5); if the total video memory size is greater than 20GB If the size of the video memory is less than 30GB (for example, the second threshold is 20GB and the third threshold is 30GB), and the video memory usage rate remains unchanged, the video memory usage rate field can be rounded to 97 (for example, the third number corresponding to 87% of the video memory usage rate is 87+10); if the total size of the video memory is greater than 30GB but less than 40GB (for example, the third threshold is 30GB and the fourth threshold is 40GB), and the video memory usage rate remains unchanged, the video memory usage rate field can be rounded to 100 (for example, the fourth number corresponding to 87% of the video memory usage rate is 87+15, which exceeds 100 and is rounded to 100).

[0159] In an optional implementation, based on the regularized historical load data of each processor, future load information of each processor is predicted, including: inputting the regularized historical load data of each processor into a Bi-LSTM model to predict the future load information of each processor.

[0160] In another optional implementation, collecting historical load data of each processor in a plurality of processors includes:

[0161] The historical load data of each processor is collected once every T time interval.

[0162] Among them, based on the regularized historical load data of each processor, the future load information of each processor is predicted, including:

[0163] The regularized historical load data of each processor within the time interval T is input into the Bi-LSTM model to predict the future T of each processor. / Load information at the moment.

[0164] The Bi-LSTM model, or bidirectional LSTM network, is a lightweight time series network model that takes as input the regularized historical load data of each processor and predicts the accurate load information of each processor at time T in the future. T is a manually set parameter (in seconds). The larger the T value is, the lower the probability of reflecting the correct trend. For example, T can be set to 10S, and the present disclosure does not limit the value of T.

[0165] The Bi-LSTM model is Figure 6As shown, for example, the forward LSTM input "I", "love", "China" obtains three vectors {h L0 ,h L1 ,h L2}, the backward LSTM inputs "love", "China", "I", and obtains three vectors Finally, the forward and backward latent vectors are concatenated to obtain {[h L0 ,h R2 ],[h L1 ,h R1 ],[h L2 ,h R0 ]}, that is, {h0,h1,h2}.

[0166] In an optional implementation, based on the status and current load information of each processor, the workload of executing the task to be scheduled, and the future load information of each processor, a target processor for executing the task to be scheduled is determined from multiple processors, and the task to be scheduled is assigned to the target processor for execution, including:

[0167] Regularize the acquired status and current load information of each processor, the predicted workload of the task to be scheduled, and the predicted future load information of each processor;

[0168] The regularized data is input into the prediction model to determine the target processor for executing the task to be scheduled, and the task to be scheduled is assigned to the determined target processor for execution, wherein the prediction model is constructed based on a pulse neural network.

[0169] The method disclosed in the present invention uses a pulse neural network to realize dynamic configuration of task scheduling, which largely breaks through the limitations of manually setting parameter weights. The pulse neural network has the characteristics of sparsity, low overhead, high throughput, etc., with higher computing efficiency and faster running speed.

[0170] In an optional implementation, the prediction model includes: a RLIF layer and a fully connected layer.

[0171] In an optional embodiment, the prediction model includes a first RLIF layer, a second RLIF layer and a fully connected layer. The regularized data is processed by the first RLIF layer, the second RLIF layer and the fully connected layer in sequence. The fully connected layer outputs the node name of the target processor that executes the task to be scheduled and the name of the processor group to which it belongs, the time limit for executing the current task, the memory usage limit and the video memory usage limit.

[0172] In an optional embodiment, if Figure 8 As shown, the RLIF layer is used to calculate the input And the membrane potential information at time t-1 Determine the biovoltage V at time t t , according to the biovoltage V at time t t and the emission threshold Determine the output value at time t According to the output value at time t And the biovoltage V at time t t , determine the intermediate vector And according to the intermediate vector Determine the membrane potential information at time t+1 Among them, the output value at time t As the input of the next RLIF layer or fully connected layer.

[0173] The present invention utilizes the time attribute of pulse neurons to process input information related to timing, and has stronger biological authenticity and higher computational efficiency.

[0174] In an optional embodiment, according to the biovoltage V at time t t and the emission threshold Determine the output value at time t include:

[0175] If the biovoltage V at time t t Greater than or equal to the emission threshold Then determine the output value at time t is 1;

[0176] If the biovoltage V at time t t Less than the emission threshold Then determine the output value at time t is 0.

[0177] The RLIF network used in the present disclosure is special in that the final output is discrete 0, 1. This greatly increases the routing efficiency of the network and reduces the intermediate storage overhead, which is very suitable for tasks such as load balancing scheduling. The present disclosure utilizes the binary output (only outputs discrete signals of 0 or 1) characteristics of the RLIF network, effectively reducing the computational complexity of the load balancing algorithm, greatly improving the computational efficiency, and enhancing the routing efficiency.

[0178] In an optional implementation manner, after the target processor executes the task to be executed, the method further includes:

[0179] Obtain log information of the target processor executing the task to be executed;

[0180] According to the log information of the target processor executing the task to be executed, the log information of the historical task execution is updated. The newly added log information uses the incremental learning method to continue to enrich the content of the dictionary and fine-tune the workload corresponding to each task.

[0181] In an optional implementation, the plurality of processors disclosed herein include at least one of a GPU and a many-core processor.

[0182] The present invention adopts a load-balanced task scheduling method to enable the processor cluster to maximize the use of hardware resources, and can provide a cheap, effective and transparent method on the existing network structure to expand the bandwidth of network devices and servers, increase throughput, enhance server processing capabilities, and improve server flexibility and scalability.

[0183] A task scheduling device of an embodiment of the present disclosure adopts the above-mentioned method. The device schedules tasks for each of the multiple processors according to the status and current load information of each processor, the log information of historical task execution and the historical load data of each processor.

[0184] The device predicts the future load conditions of each processor based on historical task execution time data and historical load data of each processor, combined with the current load conditions of each processor, and can achieve load balancing scheduling of tasks.

[0185] like Figure 1 and 2 As shown, a task scheduling device described in an embodiment of the present disclosure includes:

[0186] A service discovery module is configured to obtain status and current load information of each processor among the plurality of processors;

[0187] A task workload prediction module is configured to predict the workload required to execute the task to be scheduled based on the log information of historical task execution;

[0188] The node load condition prediction module is configured to predict the future load information of each processor based on the historical load data of each processor;

[0189] The task scheduling module is configured to determine the target processor for executing the task to be scheduled from multiple processors based on the status and current load information of each processor, the workload of executing the task to be scheduled, and the future load information of each processor, and assign the task to be scheduled to the target processor for execution.

[0190] The device disclosed in the present invention comprehensively considers parameters such as task priority, current load of the processor cluster, and predicted future load, and comprehensively considers the remaining resources of the processor cluster nodes and the attributes of the tasks to be processed, so as to achieve load balancing scheduling of tasks, thereby improving task processing efficiency and reducing the pressure of task scheduling in the processor cluster. This load balancing scheduling can not only predict the workload required for task execution and the future T / The load conditions at any moment can also be used to dynamically allocate tasks through predictive information, which to a large extent breaks through the limitations of manually selecting target processors.

[0191] like Figure 3 As shown, in an optional implementation, the service discovery module is configured to obtain the status and current load information of each processor through the daemon process of each processor.

[0192] The daemon added to each processor is used to maintain the processor and provide an API interface to the outside world. The service discovery module obtains the status and current load information of each processor by calling the API interface of the daemon of each processor.

[0193] In another optional implementation, the status and current load information of each processor includes at least one of processor usage, CPU usage, video memory usage, network delay, and data throughput. The status and current load information of each processor is stored in a database of an available node instance for invocation.

[0194] In an optional implementation, the log information of the historical tasks is the log information of the historical tasks executed within the target time interval. For example, when predicting the execution of the scheduled tasks, the target time interval can be set to within 6 months or 12 months from the current time. The device disclosed in the present invention does not impose any specific restrictions on the target time interval.

[0195] like Figure 4 As shown, in an optional implementation, the task workload prediction module is configured as follows:

[0196] According to the log information of historical task execution, obtain the time series data corresponding to each task;

[0197] Based on the time series data corresponding to different types of tasks, predict the workload required to execute the current task.

[0198] In an optional implementation, the log information of each historical task execution includes: the number of processors, the names of each processor, and at least one of the time series data corresponding to each task; the time series data corresponding to each task includes: the time of executing the task, processor usage, central processing unit usage, video memory usage, network delay, and at least one of data throughput. In order to reduce the difficulty of workload statistics, the present disclosure uses a fine-grained task: workload statistical method. That is, a hook (hook function) for statistical processor usage, central processing unit usage, video memory usage, network delay, and data throughput time series data and other important contents is embedded in each task. When the exact information of the statistical task is calculated, each processor can calculate at least one task at the same time, which greatly increases the utilization efficiency and statistical coverage of the system.

[0199] In an optional implementation, the task workload prediction module is configured as follows:

[0200] Aggregate time series data of tasks by task type;

[0201] Use data smoothing algorithm on all time series data of each type of task to obtain the dictionary structure of workload corresponding to each type of task;

[0202] According to the dictionary structure of the workload corresponding to the current task type, the workload required to execute the current task is obtained.

[0203] In another optional embodiment, the dictionary structure of the workload corresponding to each type of task includes: the task type and at least one of the average time to execute this type of task, the average processor utilization, the average central processing unit utilization, the average video memory utilization, the network delay and the average data throughput.

[0204] Since the change of server load is a time series with high self-similarity, the device disclosed in the present invention uses the time series to predict the server load, and based on continuous data, it can effectively predict the future load situation. Figure 5 As shown, in an optional implementation manner, the node load condition prediction module is configured as follows:

[0205] Gather historical load data of each processor among multiple processors and perform data regularization;

[0206] Based on the regularized historical load data of each processor, the future load information of each processor is predicted.

[0207] In an optional implementation, the node load situation prediction module is configured to: perform data regularization on the historical load data of each processor, and normalize all feature dimensions of the historical load data of each processor into a same or similar dimension. When the numerical scale of some unimportant features in the data is too large, the accuracy of the prediction will be reduced. By normalizing all features in the data through data regularization, the numerical scale of unimportant features can be reduced, and the accuracy of the prediction model based on time series data can be improved.

[0208] In an optional implementation, the node load prediction module is configured to: represent all fields of the historical load data of each processor by numbers between 0 and 100. In another optional implementation, all fields of the historical load data of each processor include at least one of the processor's video memory, network latency, and data throughput.

[0209] In an optional implementation, the node load condition prediction module is configured as follows:

[0210] Determine the usage and size of each field for each processor;

[0211] If the size of the field is less than or equal to the first threshold, the usage rate of the field is regularized to a first number;

[0212] If the size of the field is greater than the first threshold and less than or equal to the second threshold, the usage rate of the field is regularized to a second number;

[0213] If the size of the field is greater than the second threshold and less than or equal to the third threshold, the usage rate of the field is regularized to a third number;

[0214] And so on, the upper limit is when the number after field regularization reaches 100.

[0215] For example, at a certain moment, the video memory usage of the processor is 87%, and the total video memory size is less than or equal to 10GB (for example, the first threshold is 10GB), the video memory usage field can be regularized to 87 (for example, the first number corresponding to the video memory usage of 87% is 87); if the total video memory size is greater than 10GB but less than or equal to 20GB (for example, the first threshold is 10GB and the second threshold is 20GB), the video memory usage field can be regularized to 92 (for example, the second number corresponding to the video memory usage of 87% is 87+5); if the total video memory size is greater than 20GB If the size of the video memory is less than 30GB (for example, the second threshold is 20GB and the third threshold is 30GB), and the video memory usage rate remains unchanged, the video memory usage rate field can be rounded to 97 (for example, the third number corresponding to 87% of the video memory usage rate is 87+10); if the total size of the video memory is greater than 30GB but less than 40GB (for example, the third threshold is 30GB and the fourth threshold is 40GB), and the video memory usage rate remains unchanged, the video memory usage rate field can be rounded to 100 (for example, the fourth number corresponding to 87% of the video memory usage rate is 87+15, which exceeds 100 and is rounded to 100).

[0216] In an optional implementation, the node load condition prediction module is configured to: input the regularized historical load data of each processor into the Bi-LSTM model to predict the future load information of each processor.

[0217] In another optional implementation, the node load condition prediction module is configured as follows:

[0218] The historical load data of each processor is collected once every T time interval.

[0219] Among them, based on the regularized historical load data of each processor, the future load information of each processor is predicted, including:

[0220] The regularized historical load data of each processor within the time interval T is input into the Bi-LSTM model to predict the future T of each processor. / Load information at the moment.

[0221] The Bi-LSTM model, or bidirectional LSTM network, is a lightweight time series network model that takes as input the regularized historical load data of each processor and predicts the accurate load information of each processor at time T in the future. T is a manually set parameter (in seconds). The larger the T value is, the lower the probability of reflecting the correct trend. For example, T can be set to 10S, and the present disclosure does not limit the value of T.

[0222] The Bi-LSTM model is Figure 6As shown, for example, the forward LSTM input "I", "love", "China" obtains three vectors {h L0 ,h L1 ,h L2}, the backward LSTM inputs "love", "China", "I", and obtains three vectors Finally, the forward and backward latent vectors are concatenated to obtain {[h L0 ,h R2 ],[h L1 ,h R1 ],[h L2 ,h R0 ]}, that is, {h0,h1,h2}.

[0223] like Figure 7 As shown, in an optional implementation, the task scheduling module is configured as follows:

[0224] Regularize the acquired status and current load information of each processor, the predicted workload of the task to be scheduled, and the predicted future load information of each processor;

[0225] The regularized data is input into the prediction model to determine the target processor for executing the task to be scheduled, and the task to be scheduled is assigned to the determined target processor for execution, wherein the prediction model is constructed based on a pulse neural network.

[0226] The present disclosure uses a pulse neural network to realize dynamic configuration of task scheduling, which largely breaks through the limitations of manually setting parameter weights. The pulse neural network has the characteristics of sparsity, low overhead, high throughput, etc., with higher computing efficiency and faster running speed.

[0227] In an optional implementation, the prediction model includes: a RLIF layer and a fully connected layer.

[0228] In an optional embodiment, the prediction model includes a first RLIF layer, a second RLIF layer and a fully connected layer. The regularized data is processed by the first RLIF layer, the second RLIF layer and the fully connected layer in sequence. The fully connected layer outputs the node name of the target processor that executes the task to be scheduled and the name of the processor group to which it belongs, the time limit for executing the current task, the memory usage limit and the video memory usage limit.

[0229] In an optional embodiment, if Figure 8 As shown, the RLIF layer is used to calculate the input And the membrane potential information at time t-1 Determine the biovoltage V at time t t , according to the biovoltage V at time t t and the emission threshold Determine the output value at time t According to the output value at time t And the biovoltage V at time t t , determine the intermediate vector And according to the intermediate vector Determine the membrane potential information at time t+1 Among them, the output value at time t As the input of the next RLIF layer or fully connected layer.

[0230] The present invention utilizes the time attribute of pulse neurons to process input information related to timing, and has stronger biological authenticity and higher computational efficiency.

[0231] In an optional embodiment, according to the biovoltage V at time t t and the emission threshold Determine the output value at time t include:

[0232] If the biovoltage V at time t t Greater than or equal to the emission threshold Then determine the output value at time t is 1;

[0233] If the biovoltage V at time t t Less than the emission threshold Then determine the output value at time t is 0.

[0234] The RLIF network used in the present disclosure is special in that the final output is discrete 0, 1. This greatly increases the routing efficiency of the network and reduces the intermediate storage overhead, which is very suitable for tasks such as load balancing scheduling. The present disclosure utilizes the binary output (only outputs discrete signals of 0 or 1) characteristics of the RLIF network, effectively reducing the computational complexity of the load balancing algorithm, greatly improving the computational efficiency, and enhancing the routing efficiency.

[0235] In an optional embodiment, each processor is configured with a task execution module and a load sending module. The load sending module of each processor sends the status and current load information of the processor to the service discovery module, and the task scheduling module assigns the task to the task execution module of the target processor for execution.

[0236] In an optional implementation, after the target processor executes the task to be executed, it is also necessary to obtain the log information of the target processor executing the task to be executed; according to the log information of the target processor executing the task to be executed, the log information of the historical task execution is updated. The newly added log information uses the incremental learning method to continue to enrich the content of the dictionary and fine-tune the workload corresponding to each task.

[0237] The scheduling based on task priority is not comprehensive enough, and the modeling is not flexible enough. The time step is generally fixed, resulting in a single feedback method. The feature engineering (for features of different dimensions, such as time-load rate, construction of new features, etc.) is cumbersome and time-consuming, and requires certain human intervention. The present invention predicts and evaluates the task workload (i.e., occupied time and resources) based on the historical task execution time data and time series data, predicts the future load of the processor based on the time series data according to the historical load data of the processor, and comprehensively considers parameters such as task priority, current cluster load, and predicted future load to perform load balancing scheduling on the tasks. This load balancing scheduling can not only predict the workload of task execution and the future T of the node, but also predict the future load of the node. / The load situation at any moment can also be realized by using neural networks to realize dynamic configuration of task scheduling, which breaks through the limitations of manually setting parameter weights to a large extent. It can make the processor cluster utilize hardware resources to the greatest extent, and can provide a cheap, effective and transparent method to expand the bandwidth of network devices and servers on the existing network structure, increase throughput, enhance server processing capabilities, and improve server flexibility and scalability.

[0238] The present disclosure also relates to an electronic device, including a server, a terminal, etc. The electronic device includes: at least one processor; a memory connected to the at least one processor; and a communication component connected to the storage medium, wherein the communication component receives and sends data under the control of the processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to implement the method for task scheduling in the above embodiment.

[0239] In an optional implementation, the memory is a non-volatile computer-readable storage medium that can be used to store non-volatile software programs, non-volatile computer executable programs, and modules. The processor executes various functional applications and data processing of the device by running the non-volatile software programs, instructions, and modules stored in the memory, that is, implementing the above-mentioned task scheduling method.

[0240] The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system and applications required for at least one function; the data storage area may store a list of options, etc. In addition, the memory may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to an external device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0241] One or more modules are stored in the memory, and when executed by one or more processors, the task scheduling method in any of the above method embodiments is executed.

[0242] The above-mentioned product can execute the task scheduling method provided in the embodiment of the present application, and has the functional modules and beneficial effects corresponding to the execution method. For technical details not fully described in this embodiment, please refer to the task scheduling method provided in the embodiment of the present application.

[0243] The present disclosure also relates to a computer-readable storage medium for storing a computer-readable program, wherein the computer-readable program is used for a computer to execute part or all of the above-mentioned task scheduling method embodiments.

[0244] That is, those skilled in the art can understand that all or part of the steps in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a program, and the program is stored in a storage medium, including a number of instructions to enable a device (which can be a single-chip microcomputer, chip, etc.) or a processor to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0245] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0246] In addition, it will be understood by those skilled in the art that although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present invention and form different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.

[0247] It will be appreciated by those skilled in the art that, although the present invention has been described with reference to exemplary embodiments, various changes may be made and equivalents may be substituted for its elements without departing from the scope of the present invention. In addition, many modifications may be made to adapt specific circumstances or materials to the teachings of the present invention without departing from the essential scope of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed, but the present invention will include all embodiments falling within the scope of the appended claims.

Claims

1. A task scheduling method, characterized in that: The method comprises: According to the status and current load information of each processor among the multiple processors, the log information of historical task execution and the historical load data of each processor, the task scheduling is performed on each processor among the multiple processors, including: Based on the log information of historical task execution, predict the workload required to execute the tasks to be scheduled; Based on the historical load data of each processor, predict the future load information of each processor; The status and current load information of each processor, the predicted workload of the task to be scheduled, and the predicted future load information of each processor are input into a prediction model built based on a pulse neural network to determine the target processor for executing the task to be scheduled.

2. The method according to claim 1, characterized in that The method further comprises: Obtain status and current load information of each of a plurality of processors.

3. The method according to claim 2, characterized in that The obtaining of the status and current load information of each processor among the plurality of processors includes: The status and current load information of each processor are obtained through the daemon process of each processor.

4. The method according to claim 2, characterized in that: The status and current load information of each processor includes: at least one of processor usage, central processing unit usage, video memory usage, network delay and data throughput.

5. The method according to claim 2, characterized in that: The log information of the historical task execution is the log information of the historical task execution within the target time interval.

6. The method according to claim 2, characterized in that The process of predicting the workload required to execute the task to be scheduled based on the log information of the historical task execution includes: According to the log information of historical task execution, obtain the time series data corresponding to each task; Based on the time series data corresponding to different types of tasks, predict the workload required to execute the current task.

7. The method according to claim 6, characterized in that The log information of each historical task execution includes: the number of processors, the name of each processor, and at least one of the time series data corresponding to each task; The time series data corresponding to each task includes: at least one of the time for executing the task, processor usage, central processing unit usage, video memory usage, network delay and data throughput.

8. The method according to claim 6, characterized in that The process of predicting the workload required for executing the current task based on the time series data corresponding to different types of tasks includes: Aggregate time series data of tasks by task type; Use data smoothing algorithm on all time series data of each type of task to obtain the dictionary structure of workload corresponding to each type of task; According to the dictionary structure of the workload corresponding to the current task type, the workload required to execute the current task is obtained.

9. The method according to claim 8, characterized in that The dictionary structure of the workload corresponding to each type of task includes: task type and at least one of average time to execute the task of this type, average processor usage, average CPU usage, average video memory usage, network delay and average data throughput.

10. The method according to claim 2, characterized in that The predicting of future load information of each processor based on historical load data of each processor includes: Gather historical load data of each processor among multiple processors and perform data regularization; Based on the regularized historical load data of each processor, the future load information of each processor is predicted.

11. The method according to claim 10, characterized in that The historical load data of each processor is regularized, and all feature dimensions of the historical load data of each processor are normalized into a same or similar dimension.

12. The method according to claim 11, characterized in that Normalize all feature dimensions of the historical load data of each processor into the same or similar dimensions, including: All fields of the historical load data of each processor are represented by numbers between 0 and 100.

13. The method according to claim 12, characterized in that All fields of the historical load data of each processor include at least one of the video memory, network delay and data throughput of the processor.

14. The method according to claim 12, characterized in that All fields of the historical load data of each processor are represented by numbers between 0 and 100, including: Determine the usage and size of each field for each processor; If the size of the field is less than or equal to the first threshold, the usage rate of the field is regularized to a first number; If the size of the field is greater than the first threshold and less than or equal to the second threshold, the usage rate of the field is regularized to a second number; If the size of the field is greater than the second threshold and less than or equal to the third threshold, the usage rate of the field is regularized to a third number; And so on, the upper limit is when the number after field regularization reaches 100.

15. The method according to claim 10, characterized in that Based on the regularized historical load data of each processor, the future load information of each processor is predicted, including: The regularized historical load data of each processor is input into the Bi-LSTM model to predict the future load information of each processor.

16. The method according to claim 10, characterized in that Aggregate historical load data for each of the multiple processors, including: The historical load data of each processor is collected every T time interval; Among them, based on the regularized historical load data of each processor, the future load information of each processor is predicted, including: The regularized historical load data of each processor within the time interval T is input into the Bi-LSTM model to predict the future T of each processor. / Load information at the moment.

17. The method according to claim 1, characterized in that The method further comprises: The acquired status and current load information of each processor, the predicted workload of the tasks to be scheduled, and the predicted future load information of each processor are respectively regularized. The regularized data is input into the prediction model; and the task to be scheduled is assigned to a determined target processor for execution.

18. The method according to claim 17, characterized in that The prediction model includes: a RLIF layer and a fully connected layer.

19. The method according to claim 18, characterized in that The prediction model includes a first RLIF layer, a second RLIF layer and a fully connected layer. The regularized data is processed by the first RLIF layer, the second RLIF layer and the fully connected layer in sequence. The fully connected layer outputs the node name of the target processor that executes the task to be scheduled and the name of the processor group to which it belongs, the time limit for executing the current task, the memory usage limit and the video memory usage limit.

20. The method according to claim 18, characterized in that The RLIF layer is used to determine the biovoltage at time t according to the input at time t and the membrane potential information at time t-1, determine the output value at time t according to the biovoltage at time t and the emission threshold, determine the intermediate vector according to the output value at time t and the biovoltage at time t, and determine the membrane potential information at time t+1 according to the intermediate vector, The output value at the time t is used as the input of the next RLIF layer or fully connected layer.

21. The method according to claim 20, characterized in that According to the biovoltage at time t and the emission threshold, the output value at time t is determined, including: If the biovoltage at time t is greater than or equal to the emission threshold, then determining the output value at time t to be 1; If the biovoltage at time t is less than the emission threshold, the output value at time t is determined to be 0.

22. The method according to claim 1, characterized in that After the target processor executes the task to be scheduled, the method further includes: Obtaining log information of the target processor executing the task to be scheduled; The log information of the historical task execution is updated according to the log information of the target processor executing the task to be scheduled.

23. The method according to any one of claims 1 to 22, characterized in that: The plurality of processors include at least one of a GPU and a many-core processor.

24. A task scheduling device, characterized in that: Adopting the method described in any one of claims 1-23, the device schedules tasks for each of the multiple processors according to the status and current load information of each of the multiple processors, the log information of historical task execution and the historical load data of each processor.

25. An electronic device comprising a memory and a processor, characterized in that: The memory is used to store one or more computer instructions, wherein the one or more computer instructions are executed by the processor to implement the method according to any one of claims 1-23.

26. A computer-readable storage medium having a computer program stored thereon, characterized in that: The computer program is executed by a processor to implement the method according to any one of claims 1 to 23.

Images