Display with configurable switching for power consumption and speed

Abstract

A flat panel display is disclosed, the flat panel display including a switch group for coupling signals from a driver integrated circuit to column data lines of a display panel. The switch group can be adjusted based on a frame rate of the display. When the frame rate is high, all sub-switches in the switch group can be used to reduce the on-resistance of the switch group. This high frame rate configuration can maintain or increase the speed at which pixels can be controlled, but consumes more power. Therefore, when the frame rate is low, part of the sub-switches in the switch group are not used to reduce the power consumed. This low frame rate configuration can maintain or reduce the speed at which pixels can be controlled, but consumes less power.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is a continuation of and claims priority to U.S. Patent Application No. 16 / 372,865 filed on April 2, 2019, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to a flat panel display, and more particularly, to a display system that can be configured to operate at a high frame rate or consume less power. Background Art

[0004] In recent years, flat panel displays have become larger and / or changed shape. For example, the aspect ratio of displays for mobile devices has increased from 16:9 to 21:9. During the same period, the maximum frequency (i.e., frame rate) of these displays has increased. For example, the frame rate of displays for mobile devices has increased from 60 Hertz (Hz) to 120 Hz. Both of these display trends correspond to increases in power consumption.

[0005] When the length of the display is increased, each column of the display includes additional pixels. All pixels in each column are controlled by signals carried by column data lines. When the length of the display is increased, these signals must have a higher switching frequency in order to control the additional pixels. In other words, in order to maintain (or increase) the frame rate, a high column line switching frequency (e.g., >100 kHz) is required. At these frequencies, the parasitic capacitance of each column data line may adversely affect the time constant associated with the switching of each pixel. Therefore, a larger switching device must be used, but a larger switching device requires more power. Therefore, for displays with high aspect ratios, more power may be required to achieve high frame rates. For some example displays, this power consumption trend is shown in Table 1.

[0006] Table 1: Display power consumption

[0007] Aspect Ratio 18.5:9 19:9 21:9 Frame rate (Hz) 60 90 120 Column line switching frequency 89 137 202 Normalized power consumption 1 1.5 2.3 Summary of the invention

[0008] In a general aspect, the present disclosure describes a method for controlling a display. The method includes obtaining a frame rate of the display, and determining whether the frame rate is low (or high) based on a comparison of the frame rate with a threshold value defining a boundary between a high frame rate and a low frame rate. That is, the obtained frame rate can be compared with the threshold value to determine whether the obtained frame rate is higher or lower than the threshold value. If the obtained frame rate is lower than the threshold value, the obtained frame rate can be regarded as a low frame rate (i.e., low). If the obtained frame rate is higher than the threshold value, the obtained frame rate can be regarded as a high frame rate (i.e., high). A panel switch group including a plurality of sub-switches is coupled between a driver IC and a column data line of the display. If the frame rate is low, a portion of the plurality of sub-switches in the panel switch group is deactivated (i.e., a continuous shutdown signal is received) to reduce the power consumption of the display.

[0009] In addition, in some embodiments, the method further includes determining that the frame rate is high, and when the frame rate is high, activating all multiple sub-switches in the panel switch group (i.e., receiving an on / off signal for switching) to reduce the resistance of the panel switch group (i.e., the on-resistance).

[0010] In some embodiments, a low frame rate is a frame rate below a threshold that defines a boundary between a high frame rate and a low frame rate (e.g., an example threshold may be 90 Hz), and a high frame rate is a frame rate above the threshold. For example, in some embodiments, 60 Hz may be a low frame rate and 120 Hz may be a high frame rate.

[0011] The plurality of sub switches may be connected in parallel to each other, and wherein deactivating a portion of the panel switch group may include applying a signal to open the plurality of sub switches when the frame rate is low so that they are disconnected from the panel switch group.

[0012] The method may further include determining that the frame rate is high (e.g., above a threshold defining a boundary between a high frame rate and a low frame rate), and applying a signal to switch all of the plurality of sub-switches in the panel switch group when the frame rate is high to increase the number of sub-switches for coupling the driver IC and the column data lines of the display, thereby reducing the on-resistance of the panel switch group.

[0013] All the plurality of sub-switches in the panel switch group can be simultaneously controlled to be turned on and off by the applied signal according to the column line switching frequency.

[0014] The method may further include deactivating a portion of a plurality of sub switches in a driver switch group coupled between a driver integrated circuit (IC) and a panel switch group to reduce power consumption of the display when the frame rate is low.

[0015] The method may further include determining that the frame rate is high, and activating all of the plurality of sub switches in the driver switch group when the frame rate is high to reduce resistance of the driver switch group.

[0016] Activating all of the plurality of sub-switches in the driver switch group may include controlling each of the plurality of sub-switches while controlling the plurality of sub-switches in the panel switch group.

[0017] In another general aspect, the present disclosure describes a display comprising a controller and a plurality of sub-switches in a panel switch group, the display being configured to operate according to the method described above. The display may also comprise a plurality of sub-switches in a driver switch group.

[0018] In another general aspect, the present disclosure describes a display system. The display system includes a display panel having pixel columns. Each pixel column is controlled by a column data line coupled to a driver IC through a panel switch group. The display system further includes a control configured to determine a frame rate of the display panel and control the panel switch group based on the determined frame rate (e.g., as compared to a threshold).

[0019] In some embodiments, a panel switch group of a display is coupled in series between a driver IC and a column data line and includes a plurality of sub-switches coupled in parallel to each other. Control of the panel switch group for these embodiments includes (i) switching all of the sub-switches of each panel switch group on and off together when the frame rate is determined to be high relative to a threshold, and (ii) switching a portion of the sub-switches of each panel switch group on and off together when the frame rate is determined to be low relative to the threshold. In the case of low frame rates, the rest of the sub-switches of the panel switch group are (continuously) switched off (i.e., not used) to save power.

[0020] In some embodiments, the display system further includes a driver switch group that operates similarly to the panel switch group, the driver switch group including a plurality of sub switches. The panel switch group may include switching all sub switches on and off together when determining that the frame rate is high, and switching a portion of the switches on and off together when determining that the frame rate is low.

[0021] When it is determined that the frame rate is low, the control can be configured to switch off the rest of the sub-switches in the panel switch group to save power. The operation of both the panel switch group and the driver switch group can be controlled by the control. In some embodiments, the control is part of the driver IC, and in some embodiments, the control and the driver IC are physically separated from the driver IC.

[0022] In some embodiments, the display panel has a high aspect ratio greater than 18.5 to 9 (18.5:9). For example, the aspect ratio can be 21:9.

[0023] In another general aspect, the present disclosure describes a flat panel display. The flat panel display includes a plurality of panel switch groups. Each panel switch group is configured to couple a driver IC to a pixel column. Each panel switch group can be configured to couple using: (i) a high frame rate configuration that increases the power consumed to provide a lower on-resistance of the panel switch group, or (ii) a low frame rate configuration that provides a higher on-resistance of the panel switch group and reduces the power consumed by the panel switch group.

[0024] In some embodiments, each panel switch group includes a plurality of sub-switches connected in parallel to each other. In a high frame rate configuration, all sub-switches in each panel switch group are used to couple the driver IC to a pixel column, and in a low frame rate configuration, a portion of the sub-switches in each panel switch group are used to couple the driver IC to a pixel column.

[0025] Optional features of one aspect may be combined with any other aspect described herein.

[0026] The foregoing illustrative summary, as well as other exemplary objects and / or advantages of the present disclosure, and the manner in which the same are accomplished, are further explained in the following detailed description and its accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 Depicts a possible front surface of a mobile device having a display.

[0028] Figure 2 A possible implementation of a display system for a mobile computing device is schematically depicted.

[0029] Figure 3 A first possible implementation of a switching system for columns of a flat-panel display is schematically depicted.

[0030] Figure 4 A second possible implementation of a switching system for columns of a flat-panel display is schematically depicted.

[0031] Figure 5A Depicting a switching system for columns of a display operating in a low frame rate configuration.

[0032] Figure 5B Depicting a switching system for columns of a display operating in a high frame rate configuration.

[0033] Figure 6 A method of operating a display according to an embodiment of the present disclosure is described.

[0034] The components in the drawings are not necessarily drawn to scale and may not be drawn to scale relative to each other. Like reference numerals refer to corresponding parts throughout the several views. DETAILED DESCRIPTION

[0035] The present disclosure describes a flat panel display, which includes at least one switch group to couple a driver integrated circuit (IC) to each pixel column. At least one switch group includes a plurality of sub-switches, which are connected in parallel and each of which is controlled by a signal received from a control. The signal controlling the sub-switches is based on the frame rate of the display. When the flat panel display is operated at a high frame rate, the control provides a switching signal so that all sub-switches in the switch group couple the driver IC to the pixel column. This high frame rate configuration ensures that the on-resistance of the switch group is low. The low on-resistance offsets the capacitance (e.g., parasitic capacitance) of the column data line feeding the pixel column, which increases with the frame rate. However, when the flat panel display is operated at a low frame rate, the control provides a switching signal so that only a portion of the sub-switches in the switch group couple the driver IC to the pixel column. This low frame rate configuration ensures that the power consumed by the switch group is low. This low power consumption helps to reduce the overall power consumption of the display because over time, the display can operate at both high frame rate operation and low frame rate operation.

[0036] Figure 1 An example of a mobile computing device (i.e., mobile device) is depicted. A front surface of the mobile device 100 is shown. The front surface includes a display 110 having an aspect ratio (AR) defined as the ratio of height 120 to width 130 (i.e., AR = height / width). The display 110 for the mobile device 100 may have a height 120 that is greater than twice the width 130. For example, a high AR display may have an AR greater than 18.5 to 9.

[0037] Figure 2 Schematically depicts the Figure 1 The display system 200 includes a display panel (i.e., display 110) that is controlled by electronics to render visual output (e.g., text, graphics, video, images, etc.). The display may be any active matrix display, such as an active matrix organic light emitting diode (AMOLED) display.

[0038] An enlarged portion 210 of the display 110 is shown. The enlarged portion 210 illustrates a row / column configuration of pixels. Each pixel 212 is controlled by a gate signal line 214 (i.e., a horizontal control line) and a column data line 216 (i.e., a vertical control line). All pixels in a row share the same gate signal line, and all pixels in a column share the same column data line. The gate signal line 214 of the display 110 is controlled by a gate driver 240. The column data lines are fed by a driver integrated circuit (i.e., driver IC 230). Each column data line 216 can have a panel switch 220 in series for switching (e.g., demultiplexing) a data voltage from the driver IC 230 (e.g., to control the intensity of the pixel). In some embodiments, the panel switch 220 can be located on a portion of the panel that includes the display 110. In addition, a driver switch 225 can be included. For example, the driver switch can be integrated as part of the driver IC 230. The driver switch 225 can add functionality to the driver IC 230 by controlling the output impedance of the driver IC 230. Although not shown in Figure 2 for clarity, the driver switch 225 can be integrated as a part of the driver IC 230. Figure 2 A single panel switch 220 and a single driver switch 225 are shown in FIG. 2 , but display system 200 may include a driver switch 225 and / or a panel switch 220 for each column data line in display 110 .

[0039] In some embodiments, driver switch 225 is conductive (i.e., closed or on), while display 110 is active and non-conductive (i.e., open or off). Alternatively, driver switch 225 can be switched on / off depending on (e.g., matching) panel switch 220. Panel switch 220 can be switched between an on state and an off state to sequentially control the pixels in a column as each row is activated, and this process is repeated for each frame of the display.

[0040] In the present disclosure, an embodiment in which the driver switch 225 and the panel switch 220 are switched on / off at the same time to operate the display 110 is presented to facilitate understanding. However, the present disclosure is not limited to this specific embodiment. For example, the principles disclosed herein can be applied to an embodiment in which the panel switch 220 is operated separately or independently of the driver switch 225, and vice versa.

[0041] The panel switch 220 and the driver switch 225 (i.e., switches) can affect the speed of the display 110. As previously mentioned, higher frame rates and / or longer displays (i.e., higher AR) may result in high switching frequencies. At these frequencies, each column data line may have a high parasitic capacitance (C). When the parasitic capacitance of the column is high (i.e., large), the large on-resistance of the switch (i.e., resistance R) may result in a large time constant τ (e.g., τ=RC). The time constant corresponds to the time period required to control the pixels in the column (e.g., change from one gray level to another). Therefore, when the column contains multiple pixels and / or when the display is operated at a high frame rate, it may be necessary to reduce / minimize the resistance of the switch to reduce the time period required to control each pixel. In other words, for high frame rate operation, it may be desirable to reduce (e.g., minimize) the resistance of the switch. In addition, reducing (e.g., minimizing) the resistance of the switch may be desirable for high AR displays, which typically have a high column line switching frequency due to the large number of pixels that must be controlled in each frame.

[0042] The switch may be embodied in various ways. For example, in a display system for a mobile device, the switch may be embodied as a P-channel low temperature polysilicon (poly-Si) field effect transistor switch (i.e., a PMOS switch), while in a display system for a larger display (e.g., a television), the switch may be embodied as an N-channel metal oxide semiconductor field effect transistor switch (i.e., an NMOS switch). However, the principles of the present disclosure may be applied to any transistor switch (e.g., BJT, MOSFET, JEET, etc.) and any transistor technology (e.g., NMOS, PMOS, CMOS, etc.).

[0043] Reducing the resistance of a transistor (e.g., on-state resistance) can be achieved by increasing the size of the transistor. For example, the channel size of a PMOS switch can be increased to reduce the resistance of the switch in the on-state. However, larger transistors require more power to switch (e.g., due to larger gate capacitance) than smaller transistors. Therefore, by using large transistors to compensate for the higher parasitic capacitance of the column data lines, the power consumption of the display can be increased. An aspect of the present disclosure is the use of groups of transistors that are connected in parallel and can be configured to operate in concert to avoid the use of a single large transistor switch.

[0044] Another aspect of the present disclosure is the recognition that a display (e.g., a high AR display) may not operate continuously at a high frame rate (e.g., >60 Hz). Another aspect of the present disclosure is to provide an adjustable resistance for a switch (e.g., panel switch 220, driver switch 225) based on the frame rate so that the overall power consumption of the display can be reduced. In other words, aspects of the present disclosure are displays with controllable power consumption based on different operating modes (i.e., frame rate, frequency), where power consumption control is provided by the configuration of the switching system.

[0045] Figure 3 A first possible implementation of a switching system for columns of a flat panel display is schematically depicted. The switching system 300 includes a column data line 320 coupled to a column of pixels 310. The pixels are controlled (e.g., to adjust intensity) by a signal from an amplifier 340, which comprises part of the driver IC 230. The signal from the amplifier 340 is coupled to / decoupled from the column data line 320 through a switch bank.

[0046] One aspect of the present disclosure is that each column of the display includes multiple switch groups. The switch group (i.e., the panel switch group 350) in the panel portion (i.e., the portion including the pixels) of the display system may include multiple (e.g., two) sub-switches 351, 352 coupled in parallel to each other to form the panel switch group 350. The switch group (e.g., the driver switch group 355) in the driver IC 230 portion of the display system may include multiple (e.g., two) sub-switches 356, 357 coupled in parallel to each other to form the driver switch group 355. The panel switch group 350 and the driver switch group 355 are coupled in series between the amplifier 340 of the driver IC and the column data line 320 of the display. The panel switch group 350 and the driver switch group 355 may include the same number of sub-switches or may include different numbers of sub-switches. For example, the panel switch group 350 may include two or more sub-switches, and the driver switch group 355 may include one sub-switch, and vice versa. The present disclosure is not limited to any specific number or range of sub-switches in each group, and is further not limited to any specific relationship between the number of sub-switches used in each group.

[0047] The plurality of sub-switches in the panel switch group 350 and the plurality of sub-switches in the driver switch group 355 may be controlled (e.g., individually controlled) by a plurality of control signals coupled to the corresponding sub-switches from the timing control block (i.e., T-con or control 330). Figure 3In the embodiment shown in FIG. 1 , the control 330 is integrated with the driver IC 230 (i.e., a portion thereof). The plurality of control signals may alternate between a voltage level for controlling the switch in the on state and a voltage level for controlling the switch in the off state. The signal may alternate between the on and off voltage levels at the column line switching frequency for the display.

[0048] The control 330 can provide multiple control signals to the multiple sub-switches in different ways based on the operating conditions of the display. For example, under a first operating condition, the control 330 can transmit a first control signal to each sub-switch in the switch group, and under a second operating condition, the control can transmit the first control signal to a first portion of the multiple sub-switches and transmit the second control signal to a second portion of the multiple sub-switches. The first control signal can be an alternating on / off signal that couples / decouples the column data line with the amplifier at the column line switching frequency, and the second control signal can be a continuous off signal that decouples the second portion of the multiple sub-switches from the first portion of the sub-switches. In other words, the control 330 (i.e., the control block) can effectively use all or part of the multiple sub-switches in the panel switch group 350 and / or the driver switch group 355, depending on the control signals sent to the individual sub-switches in each group.

[0049] The control 330 may provide the same number of control signals to the panel switch group 350 or the driver switch group. Alternatively, the control 330 may provide a different number of control signals to the panel switch group 350 or the driver switch group 355. For example, the control may provide multiple control signals (e.g., via multiple control signal lines) to multiple switches in the panel switch group 350 while providing a single control signal (e.g., via a single control signal line) to a single switch in the driver switch group 355. The present disclosure is not limited to any particular number or range of control signals transmitted to each group, and is further not limited to any particular relationship between the number of control signals transmitted to each switch group.

[0050] Figure 4 A second possible implementation of a switching system 400 for a column of a flat panel display is schematically depicted. In this implementation, the timing control block (i.e., T-con or control 330) is not integrated as part of the driver IC 230 and may be physically separated from the driver IC 230. Otherwise, the control 330 may operate as previously described.

[0051] Figure 5ADepicts a switching system for a column of a display operating in a low frequency mode (i.e., operating at a low frame rate). A low frequency may be simply considered a frame rate that is lower than another frame rate. For example, when frame rates 60 Hz and 120 Hz are used for operation of a display, 60 Hz is a low frequency and 120 Hz is a high frequency. The present disclosure is not limited to any particular low frame rate or range of low frame rates, and is not limited to any particular high frame rate or range of high frame rates.

[0052] Figure 5A The switching system includes two switches in the panel switch group 350. Specifically, the panel switch group 350 includes a first panel switch 511 and a second panel switch 512. Figure 5A The switching system also includes two switches in the driver switch group 355. Specifically, the driver switch group 355 includes a first driver switch 521 and a second driver switch 522. In this embodiment, the control 330 can determine that the frame rate of the display has a low frequency (i.e., the display operates at a low frame rate). The control 330 can determine the current frame rate (i.e., as a low frequency) by receiving a signal indicating the frame rate. Alternatively, the control 330 can determine the current frame rate by applying an algorithm to a display signal, wherein the display signal does not directly indicate the frame rate, but corresponds to the frame rate.

[0053] Upon determining that the display is operating (or requires) a frame rate that is considered to be low frequency (e.g., 60 Hz), the control 330 effectively deactivates (i.e., decouples, turns off, disconnects, disconnects, etc.) a portion of the switches in each group to reduce power consumption. For example, when the frame rate is low, one or more signals may be applied to open a plurality of sub-switches so that they are disconnected from the switch group.

[0054] for Figure 5AIn the embodiment shown in , the control sends (i.e., transmits) a first control signal to turn off (i.e., disconnect) the second panel switch 512 and turn off (i.e., disconnect) the second driver switch 522. At the same time, the control 330 sends a second control signal to switch the first panel switch 511 and the first driver switch 521 on / off according to the display operation. The resistance of each switch group (in the on state) is increased by disabling part of the sub-switches, but the power consumption of each group is reduced. Under this low-power operation, the total load capacitance driven by the control 330 is reduced due to only driving part of the switch. Therefore, the (dynamic) power consumption of the control is reduced, which corresponds to the lower power consumption of the display system. As mentioned above, the increase in the on-resistance of each switch group causes an increase in the time constant (i.e., row-line programming time) associated with the control of the pixel. Specifically, the time constant is proportional to the on-resistance of the switch and the parasitic capacitance of the column data line coupled to the switch. The increase in the time constant caused by only driving part of the switch does not affect the operation of the display because the row-line programming time required for low frame rate operation is longer. Thus, an aspect of the present disclosure is a switching system for a display, the switching system comprising a switch bank that can be partially disabled to reduce power consumption at low frame rates without affecting the performance of the display. Figure 5A In the example implementation of FIG. 3 , the low frame rate configuration effectively uses the first panel switch 511 in the panel switch group 350 and the first driver switch 521 in the driver switch group 355. This low frame rate configuration provides a high on-resistance but reduces the power consumed.

[0055] Figure 5B Depicts a switching system for columns of a display operating in high frequency mode (i.e., the display operates at a high frame rate). Upon determining that the display operates at (or requires) a frame rate considered high frequency (e.g., 120 Hz), control 330 effectively activates all switches in each group to reduce on-resistance.

[0056] for Figure 5BIn the embodiment shown in , the control 330 transmits a control signal to switch the first panel switch 511 and the second panel switch 512 on / off together for normal operation. Similarly, the control 330 transmits a control signal to switch the first driver switch 521 and the second driver switch 522 on / off according to the display operation. The resistance of each switch group (in the on state) is reduced by enabling all sub-switches, and the power consumption of each group is reduced. In high-frequency operation, the time required for row-line programming of pixels is less than in low-frequency operation. Therefore, the reduction in the on-resistance of each switch group reduces the time constant associated with the control of the pixel (i.e., the row-line programming time) to accommodate high-frequency operation. In other words, when the frame rate is increased, the time constant for controlling the switch can be maintained (or reduced) by reducing the on-resistance of the switch. Therefore, another aspect of the present disclosure is a switch system for a display, the switch system including a switch group that can be fully enabled to reduce the resistance at high frame rates. In Figure 5B In the example implementation of , the high frame rate configuration uses two sub switches in the panel switch group 350 and two sub switches in the driver switch group 355. This high frame rate configuration provides low on-resistance to increase the display speed as the power consumed increases. In other words, Figure 5B The embodiment shown in Figure 5A The implementation shown in consumes more power because more switches are controlled. Figure 5B The power consumed may be comparable to an implementation using one large (e.g., low on-resistance) switch. The advantage of a controllable switch group over a single large switch is presented when the display is operated at a low frame rate. In this case, the power drawn (i.e., consumed) by the controllable switch group is lower than a single large switch. For a display that operates at both high and low frame rates over time, less overall power is consumed.

[0057] Figure 6 6 is a flow chart of a method for controlling a display. The method includes obtaining 610 a frame rate of a display (e.g., received at a control 330). Next, the frame rate is determined to be low or high 620. For example, the obtained frame rate can be compared to a threshold defining a boundary between a high frame rate and a low frame rate, and if the frame rate is above the threshold, the frame rate is a high frequency, and if the frame rate is below the threshold, the frame rate is a low frequency. If the frame rate is determined to be low, a switch group (or multiple switch groups) can be controlled 630 in a low frame configuration to operate 640 the display. For example, a continuous off signal can be used to deactivate a portion of multiple sub-switches in a switch group that couples a driver IC and a column data line of a display. If on the other hand the frame rate is determined to be high, a switch group (or multiple switch groups) can be controlled 635 in a high frame rate configuration. For example, all sub-switches in a switch group that couples a driver IC and a column data line of a display can receive the same control signal to operate 640 the display.

[0058] Despite Figure 6 Two alternatives are shown in the method, but the principles of the present disclosure can be applied to more ranges. For example, the frame rate can be determined as one of multiple ranges, and for the range, a suitable number of sub-switches in the switch group can be activated (or deactivated) to provide a suitable on-resistance and / or a suitable power consumption within a predetermined range.

[0059] In the specification and / or drawings, typical embodiments have been disclosed. The present disclosure is not limited to such exemplary embodiments. The use of the term "and / or" includes any one and all combinations of one or more of the associated listed items. Unless otherwise indicated, specific terms have been used in a general and descriptive sense, not for limiting purposes. As used in this specification, spatially relative terms (e.g., in front of, behind, above, below, etc.) are intended to cover different orientations of the device when in use or operation in addition to the orientation depicted in the figure. For example, the "front surface" of a mobile computing device can be a surface that faces the user, in which case the phrase "in front of" implies closer to the user.

[0060] Although certain features of the described embodiments have been described as described herein, many modifications, substitutions, changes and equivalents will now occur to those skilled in the art. Therefore, it should be understood that the appended claims are intended to cover all such modifications and changes that fall within the scope of the embodiments. It should be understood that they are presented only in an exemplary and non-restrictive manner, and various changes can be made in form and detail. In addition to mutually exclusive combinations, any part of the equipment and / or method described herein can be combined in any combination. The embodiments described herein can include various combinations and / or sub-combinations of the functions, components and / or features of the different embodiments described.

Claims

1. A method for controlling a display, the method comprising: Obtaining a frame rate of the display; comparing the frame rate to a threshold defining a boundary between a high frame rate and a low frame rate; determining, based on the comparing, that the frame rate is low; as well as At least one of a plurality of sub-switches in a panel switch group is deactivated to reduce the number of sub-switches for coupling a driver integrated circuit and a column data line of the display, wherein the plurality of sub-switches are connected in parallel to each other, and wherein deactivating the at least one sub-switch comprises: applying a signal to disconnect the at least one sub-switch when the frame rate is low, so that the at least one sub-switch is disconnected from the panel switch group.

2. The method according to claim 1, wherein: The frame rate determined to be low is 60 Hz.

3. The method according to claim 1, further comprising: Determining that the frame rate is high; as well as In response to determining that the frame rate is high, all of the plurality of sub-switches in the panel switch group are activated when the frame rate is high to increase the number of sub-switches used to couple the driver integrated circuit and the column data lines of the display, thereby reducing the on-resistance of the panel switch group.

4. The method according to claim 3, wherein: When the frame rate is high, all of the plurality of sub switches in the panel switch group are simultaneously controlled to be turned on and off according to a column line switching frequency.

5. The method according to any one of claims 1 to 4, further comprising: The at least one sub-switch among a plurality of sub-switches in a driver switch group coupled between the driver integrated circuit and the panel switch group is deactivated when the frame rate is low to reduce power consumption of the display.

6. The method according to claim 5, further comprising: Determining that the frame rate is high; as well as In response to determining that the frame rate is high, all of the plurality of sub switches in the driver switch group are activated when the frame rate is high to reduce resistance of the driver switch group.

7. The method according to claim 6, further comprising: Each of the plurality of sub switches is controlled when the plurality of sub switches in the panel switch group are controlled.

8. The method according to any one of claims 1 to 4, in, The display includes a plurality of column data lines, each column data line coupling the driver integrated circuit to a plurality of pixels of the display, wherein each column data line is coupled to the driver integrated circuit through at least two of the sub-switches between the driver integrated circuit and the column data line, wherein the sub-switches are arranged in parallel with each other, and Wherein, deactivating the at least one sub-switch among the plurality of sub-switches in the panel switch group comprises: for each of the column data lines, deactivating at least one sub-switch coupling the column data line to the driver integrated circuit.

9. A display system comprising: a display panel having a plurality of columns of pixels, each column being controlled by a column data line coupled to a driver integrated circuit through a set of panel switches associated with the column data line controlling the column; as well as a control configured to determine a frame rate of the display panel and control the panel switch group based on the determined frame rate, Each panel switch group associated with a column data line includes a plurality of sub-switches coupled in parallel with each other, and the panel switch group is coupled in series between the driver integrated circuit and the column data line associated with the panel switch group.

10. The display system according to claim 9, wherein: The control is configured to control the panel switch group by: When the frame rate is determined to be high relative to a threshold, switching all sub-switches in each panel switch group on and off together; as well as When the frame rate is determined to be low relative to the threshold, portions of the sub-switches of each panel switch group are switched on and off together.

11. The display system according to claim 10, wherein: The control is configured to switch the rest of the sub-switches in the panel switch group to off when the frame rate is determined to be low.

12. The display system according to claim 9, further comprising a driver switch group connected in series with the panel switch group, the driver switch group comprising a plurality of sub switches.

13. The display system according to claim 12, wherein: The control is configured to control the driver switch group by the following operations: When the frame rate is determined to be high, switching all sub-switches of the driver switch group on and off together; and When the frame rate is determined to be low, a portion of the sub-switches of the driver switch group are switched on and off together.

14. The display system according to claim 13, wherein: The control is configured to switch the rest of the sub-switches in the driver switch group to off when the frame rate is determined to be low.

15. The display system according to any one of claims 9 to 14, wherein: The control is part of the driver integrated circuit.

16. The display system according to any one of claims 9 to 14, wherein: The control is physically separated from the driver integrated circuit.

17. The display system according to any one of claims 9 to 14, wherein: The display panel has an aspect ratio greater than 18.5:

9.

18. A flat panel display comprising: a plurality of panel switch groups, each panel switch group being configured to couple a driver integrated circuit to a column of pixels, wherein each panel switch group is configurable to: coupling using a high frame rate configuration when the flat panel display operates at a high frame rate, the high frame rate configuration increasing the power consumed by the panel switch group to provide a lower on-resistance; and A low frame rate configuration is used for coupling when the flat panel display operates at a low frame rate, the low frame rate configuration providing a higher on-resistance to reduce power consumed by the panel switch group, the high frame rate being greater than the low frame rate.

19. The flat panel display according to claim 18, wherein: Each panel switch group includes a plurality of sub-switches connected in parallel with each other, and wherein: In the high frame rate configuration, all of the sub-switches in each panel switch group are used to couple the driver integrated circuit to one pixel column; and In the low frame rate configuration, a portion of the sub-switches in each panel switch group is used to couple the driver integrated circuit to a pixel column.

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