Voltage converter and power management device comprising the same

Abstract

A voltage converter includes a conversion circuit having an inductor connected to a switching node, a first switching element connected between the switching node and a ground voltage, and a second switching element connected between the switching node and an output node, and a switching control circuit configured to adjust a feedback voltage divided from an output voltage of the output node based on a current state of the inductor, and configured to generate a switching control signal based on a sense signal according to a current of the inductor and the adjusted feedback voltage, for charging the inductor with an input voltage and discharging a voltage charged in the inductor.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2020-0011350, filed on January 30, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] At least some exemplary embodiments of the present invention relate to a power supply device, and more specifically, to a voltage converter and a power management device including the voltage converter. Background Technology

[0004] Electronic circuits and electronic devices may include power supplies that convert voltages input from external sources to supply power voltages. Typically, electronic devices include voltage converters that function as power supplies, and in particular, may include DC-DC converters with relatively small size and high efficiency to efficiently provide a stable power supply voltage.

[0005] Furthermore, conventional boost converters can operate in pulse frequency modulation (PFM) mode in low load current regions and in pulse width modulation (PWM) mode in high load current regions to minimize efficiency degradation due to switching losses. However, due to undershoot during mode switching of boost converters as described above, there is a problem of degraded load transient characteristics. To address this issue, by limiting the inductor charging time based on the on-time, boost converters can prevent sudden mode switching and ensure fast response characteristics, thereby ensuring improved load transient characteristics. However, when the boost converter operates during the on-time, operational stability issues may arise when operating in high load current regions, and the difficulty lies in the fact that the switching frequency is affected by changes in input or output voltage. Summary of the Invention

[0006] One or more exemplary embodiments of the present invention provide a voltage converter and a power management device including the voltage converter to increase power transmission efficiency and stably perform mode switching while improving operational stability.

[0007] According to at least one exemplary embodiment of the present invention, a voltage converter includes: a conversion circuit having an inductor connected to a switching node; a first switching element connected between the switching node and a ground voltage; a second switching element connected between the switching node and an output node; and a switching control circuit configured to adjust a feedback voltage of an output voltage divider from the output node based on the current state of the inductor, and configured to generate a switching control signal based on a sensing signal of the current of the inductor and the adjusted feedback voltage for charging the inductor with an input voltage and discharging the voltage charged in the inductor.

[0008] According to at least one exemplary embodiment of the present invention, a voltage converter includes: a switching circuit having an inductor connected to a switching node; a first switching element connected between the switching node and a ground voltage; a second switching element connected between the switching node and an output node; and a switching control circuit configured to adjust a feedback voltage derived from the output node, and configured to use the adjusted feedback voltage to generate a first switching control signal provided to the first switching element to charge the inductor and a second switching control signal provided to the second switching element to discharge the voltage charging in the inductor, wherein the switching control circuit further includes a ripple injection circuit configured to generate an inverted voltage of the voltage at the switching node, and configured to use the inverted voltage to generate a ripple injection voltage for adjusting the feedback voltage, the ripple injection voltage having the same phase as the current of the inductor.

[0009] According to at least one exemplary embodiment of the present invention, a power management device includes: a reference voltage generation circuit configured to generate a reference voltage; and a voltage converter configured to adjust a feedback voltage of an output voltage divider from an output node, perform pulse frequency modulation or pulse width modulation using the adjusted feedback voltage and the reference voltage to generate a switching control signal, and convert an input voltage to an output voltage in response to the switching control signal, the voltage converter including: a conversion circuit having an inductor connected to a switching node; a first switching element connected to the switching node; a second switching element connected between the switching node and the output node, the first switching element and the second switching element being configured to switch for charging the inductor with the input voltage and discharging the voltage charged in the inductor in response to the switching control signal; and a switching control circuit configured to generate a ripple injection voltage having the same phase as the current of the inductor, adjust the feedback voltage using the ripple injection voltage, and generate the switching control signal using the adjusted feedback voltage.

[0010] According to at least one exemplary embodiment of the present invention, a voltage converter includes: a conversion circuit including an inductor connected to a switching node; a first switching element connected between the switching node and a ground voltage; a second switching element connected between the switching node and an output node, the first and second switching elements being configured to switch for charging the inductor with an input voltage and discharging the voltage charging in the inductor; and a switching control circuit configured to generate a switching control signal for controlling the first and second switching elements, the switching control circuit including a ripple injection circuit configured to use the output voltage of the output node and the switching control signal to generate a ripple injection voltage having the same phase as the current of the inductor, the switching control circuit being further configured to use the ripple injection voltage to adjust a feedback voltage derived from the output node, and to perform a first comparison based on the adjusted feedback voltage and a reference voltage to generate the switching control signal. Attached Figure Description

[0011] The above and other features and advantages of the exemplary embodiments of the inventive concept will become more apparent from the detailed description of these embodiments with reference to the accompanying drawings. The drawings are intended to depict exemplary embodiments of the inventive concept and should not be construed as limiting the scope of the claims. Unless explicitly stated otherwise, the drawings should not be considered as drawn to scale.

[0012] Figure 1 This is a block diagram illustrating at least one exemplary embodiment of a power management device according to a concept of the present invention;

[0013] Figure 2 This is a block diagram illustrating at least one exemplary embodiment of a voltage converter according to a concept of the present invention;

[0014] Figure 3A and Figure 3B It is a diagram. Figure 2 A diagram showing the operation of the voltage converter's conversion circuit;

[0015] Figure 4 The illustrations depict at least one exemplary embodiment of the concept according to the present invention. Figure 2 The circuit diagram of the ripple injection circuit;

[0016] Figure 5 It is a timing diagram used to explain the operation of the ripple injection circuit;

[0017] Figure 6 It is a diagram. Figure 4 The circuit diagram of the DCM reference voltage generation circuit is shown below;

[0018] Figure 7 The illustration shows at least one example embodiment of the concept according to the present invention. Figure 2 The diagram shows the on-time control circuit.

[0019] Figure 8 It is a graph used to explain the changes in ramp voltage, switching node voltage and inductor current when an on-time control operation is performed, according to at least one exemplary embodiment of the present invention.

[0020] Figure 9 This is a detailed illustration. Figure 2 The diagram shows the on-time control circuit.

[0021] Figure 10 This is a block diagram illustrating a power management system including a power management device according to at least one exemplary embodiment of the concept of the present invention;

[0022] Figure 11 This is a block diagram illustrating another example of a power management system including a power management device, based on at least one exemplary embodiment of the concept according to the present invention; and

[0023] Figure 12 This is a block diagram illustrating an electronic device including a voltage converter according to at least one example embodiment of the concept of the present invention. Detailed Implementation

[0024] In the following, at least some exemplary embodiments of the inventive concept will be described in detail with reference to the accompanying drawings.

[0025] Figure 1 This is a block diagram illustrating at least one exemplary embodiment of a power management device according to the concept of the present invention.

[0026] Reference Figure 1 The power management device (PMD) may include a reference voltage generation circuit 40 and a voltage converter 1. The reference voltage generation circuit 40 may generate a reference voltage VREF in response to a reference enable signal or alternatively, a predetermined enable signal. In at least one exemplary embodiment of the invention, the reference voltage generation circuit 40 may be implemented as a voltage divider circuit using distribution resistors, and may be implemented as a bandgap reference circuit providing a stable reference voltage VREF that is insensitive to temperature changes. Although in Figure 1 Not shown in the figure, but when implemented as a bandgap reference circuit, the reference voltage generation circuit 40 may include a startup circuit, multiple PMOS transistors, multiple resistive elements, etc.

[0027] The voltage converter 1 may include a switching control circuit 50, a conversion circuit 10, and an output circuit 20. Hereinafter, the voltage converter 1 may be referred to as a switching mode power supply or power converter. Furthermore, while the voltage converter 1 is primarily described as operating as a boost converter, the technical concept of this disclosure is not limited thereto. The switching control circuit 50 may generate at least one switching control signal SWCS to control the conversion circuit 10. The conversion circuit 10 may convert the input voltage VIN to an output voltage VOUT by repeatedly charging and discharging the inductor in the conversion circuit 10 in response to at least one switching control signal SWCS. The output circuit 20 may provide a load current based on the output voltage VOUT to the load. The output circuit 20 may provide a feedback voltage VFB as an input to the switching control circuit 50, which is distributed and output based on the output voltage VOUT.

[0028] The switching control circuit 50, according to at least one exemplary embodiment of the present invention, can adjust the feedback voltage VFB to generate at least one switching control signal SWCS based on the adjusted feedback voltage. The switching control circuit 50 may include a ripple injection circuit 100, and the ripple injection circuit 100 can generate a ripple injection voltage based on the state of the current flowing through the inductor of the switching circuit 10. Specifically, the ripple injection voltage may have the same phase as the inductor current, and the switching control circuit 50 can adjust the feedback voltage VFB by adding a ripple injection voltage with the DC component removed to the feedback voltage VFB.

[0029] Furthermore, the switching control circuit 50 according to at least one exemplary embodiment of the present invention can limit the charging time of the inductor of the conversion circuit 10 based on the on-time. To limit the charging time of the inductor, the switching control circuit 50 can generate an on-time control signal based on the DC component of the ripple injection voltage. The DC component of the ripple injection voltage is based on the duty cycle of the voltage at the switching node of the inductor connected to the conversion circuit 10. Specifically, the DC component of the ripple injection voltage can be proportional to the duty cycle of the inverting voltage of the switching node. The switching control circuit 50 uses the DC component of the ripple injection voltage to generate the on-time control signal, thereby preventing the switching frequency of the voltage converter 1 from being altered by the input voltage VIN, the output voltage VOUT, and the output current. The switching control circuit 50 can generate at least one switching control signal SWCS based on the on-time control signal and the adjusted feedback voltage.

[0030] A voltage converter 1 or power management device PMD according to at least one exemplary embodiment of the inventive concept of this disclosure adjusts the feedback voltage VFB by using a ripple injection voltage with the DC component removed, and then generates at least one switching control signal SWCS, which can satisfy desired conditions or alternatively predetermined conditions for ensuring operational stability, and can fix the switching frequency within a desired or alternatively predetermined range by using the DC component of the ripple injection voltage to generate an on-time control signal.

[0031] Figure 2 This is a block diagram illustrating at least one exemplary embodiment of a voltage converter according to a concept of the present invention. The voltage converter configuration described below is an example. The voltage converter can be implemented in various configurations capable of adjusting the feedback voltage VFB based on the inductor current IL state and generating an on-time control signal OTCS based on a DC component, the DC component being based on the duty cycle of the voltage of the switching node SN.

[0032] Reference Figure 2 The voltage converter 1 may include a conversion circuit 10, an output circuit 20, a current sensing circuit 30, and a switching control circuit 50. The conversion circuit 10 may include an inductor L, a first switching element 12, and a second switching element 14. The first switching element 12 may be an N-channel power switch connected between the switching node SN and ground voltage, and the second switching element 14 may be implemented as a P-channel power switch connected between the switching node SN and the output node ON, which will be described in detail later.

[0033] The output circuit 20 may include feedback resistor elements R1 and R2, an effective series resistive component ESR, an output capacitor C, and a load 22. Figure 2 The load 22 shown is for illustrative purposes, and the voltage converter 1 in another exemplary embodiment of the inventive concept may not include load 22. Feedback resistors R1 and R2 are connected through feedback node FN and divide the output voltage VOUT at output node ON to output feedback voltage VFB. An effective series resistive component ESR and output capacitor C can be connected in series. Feedback resistors R1 and R2 can be connected in parallel with the effective series resistive component ESR and output capacitor C between output node ON and ground. A load current ILOAD can be supplied from output node ON to load 22. Inductor L and output capacitor C can be used as a low-pass filter to eliminate ripple in the output voltage VOUT.

[0034] Responding to a first switching control signal SWCS1 and a second switching control signal SWCS2, respectively, the first switching element 12 and the second switching element 14 can charge the inductor L using the input voltage VIN or transfer the voltage used to charge the inductor L to the output node ON. The first switching element 12 may include an N-channel power switch having a drain connected to the switching node SN, a source connected to ground, and a gate to which the first switching control signal SWCS1 is applied. The second switching element 14 may include a P-channel power switch having a source connected to the switching node SN, a drain connected to the output node ON, and a gate to receive the second switching control signal SWCS2.

[0035] The current sensing circuit 30 can output a sensing signal ZCS indicating whether the sensing current ISEN is at zero level (or 0 [A]) based on the sensing current ISEN flowing to the first switching element 12. Although in Figure 2 Not shown, but the current sensing circuit 30 can further generate a level sensing signal indicating the level of the sensed current ISEN based on the sensing signal ZCS. The reference voltage generation circuit 40 can generate a reference voltage VREF, which is required to generate the first switching control signal SWCS1 or the second switching control signal SWCS2.

[0036] By performing pulse width modulation (PWM) or pulse frequency modulation (PFM) based on the sensing signal ZCS, feedback voltage VFB, ripple injection voltage VINJ, and the DC component of the ripple injection voltage VINJ_DC, the switching control circuit 50 can generate a first switching control signal SWCS1 and a second switching control signal SWCS2, and can adjust the charging time of the inductor L based on the input voltage VIN.

[0037] The switching control circuit 50 may include a ripple injection circuit 100, an on-time control circuit 200, a comparator 51, a set and reset (SR) latch 52, a logic gate 53, a first drive circuit 54, and a second drive circuit 55. The ripple injection circuit 100 generates a ripple injection voltage VINJ with the same phase as the inductor current IL flowing through the inductor L, and generates a DC component of the ripple injection voltage, VINJ_DC. The switching control circuit 50 sums the ripple injection voltage VINJ (with the DC component VINJ_DC removed) with the feedback voltage VFB. The comparator 51 compares the summed voltage with a reference voltage VREF to generate a comparison result signal VCOMP.

[0038] The on-time control circuit 200 receives a DC component VINJ_DC from the ripple injection circuit 100 and generates an on-time control signal OTCS based on the received DC component VINJ_DC to limit the charging time of inductor L. Specifically, the on-time control circuit 200 compares the DC component VINJ_DC with a ramp voltage generated from the output voltage VOUT at output node ON, and generates the on-time control signal OTCS based on the comparison result. The on-time control signal OTCS sets an on-time period (or on-time) proportional to the duty cycle of the voltage at switching node SN. For example, the switching control circuit 50 compares an adjusted feedback voltage with a reference voltage VREF, and then charges inductor L during the on-time period when the adjusted feedback voltage is lower than the reference voltage VREF. After the on-time period according to the on-time control signal OTCS, the switching control circuit 50 repeatedly performs the operation of charging output capacitor C by passing the voltage charged in inductor L to output node ON.

[0039] SR latch 52 can receive a comparison result signal VCOMP as a set signal S and an on-time control signal OTCS as a reset signal R. SR latch 52 can output a signal Q (hereinafter, a first pulse signal PS1) based on the comparison result signal VCOMP during the on-time period, during which the on-time control signal OTCS has a desired or alternatively predetermined level. The first pulse signal PS1 can be provided to both logic gate 53 and the first drive circuit 54. The first drive circuit 54 can amplify the first pulse signal PS1 and provide the amplified first pulse signal to the first switching element 12 as a first switching control signal SWCS1. Logic gate 53 can also receive an inverted sensing signal ZCSB and can provide a second pulse signal PS2 generated by performing an AND operation on the inverted sensing signal ZCSB and the first pulse signal PS1 to the second drive circuit 55. The second drive circuit 55 can amplify the second pulse signal PS2 and provide the amplified second pulse signal to the second switching element 14 as a second switching control signal SWCS2.

[0040] Figure 3A and Figure 3B It is a diagram. Figure 2 A diagram illustrating the operation of the voltage converter's conversion circuit.

[0041] Reference Figure 2 and Figure 3AWhen the first switching element 12 is turned on and the second switching element 14 is turned off in response to the first switching control signal SWCS1 and the second switching control signal SWCS2, the conversion circuit 10 can perform a current build-up operation to store the input voltage VIN in the inductor L. When the conversion circuit 10 performs the current build-up operation, a first current path IPATH11 is formed, and the inductor current IL flowing through the inductor L can be substantially the same as the sensed current ISEN.

[0042] Reference Figure 2 and Figure 3B When the first switching element 12 is turned off and the second switching element 14 is turned on in response to the first switching control signal SWCS1 and the second switching control signal SWCS2, the conversion circuit 50 can perform a current transfer operation to transfer the energy stored in the inductor L to the output node ON. When the conversion circuit 50 performs the current transfer operation, a second current path IPATH12 is formed, and a load current ILOAD can be provided to the load 22.

[0043] Figure 4 The illustration shows at least one example embodiment of the concept according to the present invention. Figure 2 The circuit diagram of the ripple injection circuit. Figure 5 It is a timing diagram used to explain the operation of the ripple injection circuit, and Figure 6 It is a diagram. Figure 4 The circuit diagram of the DCM reference voltage generation circuit is shown in the figure.

[0044] Reference Figure 4 The ripple injection circuit 100 may include an inverting voltage generation circuit 110, a first-stage circuit 120, a second-stage circuit 130, and a discontinuous conduction mode (DCM) reference voltage generation circuit 140. The inverting voltage generation circuit 110 may include first resistive elements RRIFB1 to third resistive elements RRIFB2, third switching elements SW1 to fifth switching elements SW3, and an NMOS transistor TR. The third switching element SW1 may be connected between the first internal node N1 and the DCM reference voltage generation circuit 140, the fourth switching element SW2 may be connected between the first resistive element RRIFB1 and the first internal node N1, and the fifth switching element SW3 may be connected between the second resistive element RRIFB1 and ground. The drain of the NMOS transistor TR may be connected to the third resistive element RRIFB2, and the source of the NMOS transistor TR may be connected to ground. The inverting voltage generation circuit 110 may receive the DCM reference voltage VDCM_REF from the DCM reference voltage generation circuit 140 through the third switching element SW1, and may receive the voltage from the output node ON through the fourth switching element SW2. Figure 2 ) Receive the output voltage VOUT.

[0045] The first-stage circuit 120 may include a fourth resistive element RRI1 and a first capacitor CRI1. The fourth resistive element RRI1 is connected between the second internal node N2 and the first internal node N1 of the inverting voltage generation circuit 110, and the first capacitor CRI1 may be connected between the second internal node N2 and ground voltage. The first-stage circuit 120 may be referred to as an RC filter, receiving an inverted voltage from the inverting voltage generation circuit 110 and outputting a ripple injection voltage (VINJ) generated through the second internal node N2 by filtering the inverted voltage.

[0046] The second-stage circuit 130 may include a fifth resistive element RRI2 and a second capacitor CRI2. The fifth resistive element RRI2 is connected between the second internal node N2 and the third internal node N3 of the first-stage circuit 120, and the second capacitor CRI2 may be connected between the third internal node N3 and the ground voltage. The second-stage circuit 130 may be referred to as an RC filter, which receives the ripple injection voltage VINJ from the first-stage circuit 120 and outputs the DC component VINJ_DC of the ripple injection voltage VINJ extracted through the third internal node N3.

[0047] In addition, to ensure improved stability, Figure 2 The voltage converter 1 must satisfy the following conditions indicated by Equation 1. In the following text, the reference numerals indicating the elements may be used interchangeably to indicate the specific values ​​of the corresponding elements.

[0048] [Equation 1]

[0049]

[0050] To ensure improved stability of voltage converter 1, refer to Figure 2 The resistance value ESR of the ESR component must satisfy Equation 1, expressed by the relationship between the inductance of the inductor L, the capacitance of the output capacitor C, the load current ILOAD, and the input voltage VIN. However, there are already problems with primarily using the output capacitor C, which does not satisfy the condition indicated by Equation 1, because as the resistance value ESR of the ESR component increases, the ripple of the output voltage VOUT at the output node ON becomes larger. Therefore, even when the resistance value ESR of the ESR component is very small, the technical concept of this disclosure can adjust the feedback voltage VFB to satisfy the condition indicated by Equation 1.

[0051] The output voltage of the output node ON can be expressed as Equation 2 below.

[0052] [Equation 2]

[0053] VOUT = VC + ESR × IC

[0054] The output voltage VOUT at output node ON can be the sum of the voltage across the output capacitor C (VC) and the voltage across the ESR component (ESR). The voltage across the ESR component can be expressed as the product of the ESR component's resistance value (ESR) and the capacitor current IC flowing through the output capacitor C. On the other hand, the capacitor current IC can be obtained by subtracting the load current ILOAD from the inductor current IL, since the comparison timing in comparator 51 is mostly during the period when the voltage charging inductor L is discharging. Therefore, when information about the inductor current IL is reflected in the feedback voltage VFB, it can have the same effect as having an ESR component with a resistance value ESR larger than that expressed by Equation 1, and thus, the voltage converter 1 can have improved stability.

[0055] Reference Figure 5 The inverting voltage generation circuit 110 can generate a voltage VRV in which the phase of the voltage VSN at the switching node SN is inverted. Specifically, the inverting voltage generation circuit 110 can be turned off in continuous conduction mode (CCM) via a fourth switching element SW2 receiving a first switching control signal SWCS1, a fifth switching element SW3 receiving an inverted second switching control signal SWCS2B, and a third switching element SW1 receiving a low-level sensing signal ZCS. Furthermore, the NMOS transistor TR can receive a high-level inverted sensing signal ZCSB through its gate.

[0056] Through the above control, the inverting voltage generation circuit 110 can generate the maximum inverting voltage VRV(MAX) represented by Equation 3 at the first internal node N1.

[0057] [Equation 3]

[0058]

[0059] On the other hand, the average reverse voltage VRV can be expressed as Equation 4 below.

[0060] [Equation 4]

[0061]

[0062] The average inverting voltage VRV can be expressed as the product of the duty cycle D of the inverting voltage VRV and the maximum inverting voltage VRV (MAX), and the duty cycle D of the inverting voltage VRV and the duty cycle D' of the switching node voltage VSN can be expressed by a relationship such as D = 1 - D'. That is, the duty cycle D of the inverting voltage VRV can be determined depending on the duty cycle D' of the switching node voltage VSN. In the switching node voltage VSN, the output voltage VOUT and the input voltage VIN can have a relationship expressed by the equation VIN = VOUT × D'. Therefore, the product of the duty cycle D of the inverting voltage VRV and the output voltage VOUT can be equal to or approximately equal to the value obtained by subtracting the input voltage VIN from the output voltage VOUT.

[0063] The inductor current IL can have a corresponding characteristic during the charging time of the inductor L. The slope, and can have a corresponding slope during the discharge time of inductor L. The slope of the ripple injection circuit 100 allows the inverted voltage VRV to pass through the first-stage circuit 120 to generate a ripple injection voltage VINJ with the same phase as the inductor current IL. During the charging period of the inductor L, the ripple injection voltage VINJ can have a slope corresponding to the inductor current IL. The slope, and during the discharge period of inductor L, the ripple injection voltage VINJ can have a corresponding... The slope of the slope. Furthermore, the resistance value of each of the first to fourth resistive elements RRIFB1, RRIFB2, and RRI1, as well as the capacitance of the first capacitor CRI1, can be determined, or alternatively predetermined, such that the ripple injection voltage VINJ is in phase with the inductor current IL. For example, the first and second resistive elements RRIFB1 can have the same resistance value, and the third resistive element RRIFB2 can have a different resistance value than the first and second resistive elements RRIFB1.

[0064] Furthermore, the ripple injection voltage VINJ can include not only the AC component but also the DC component VINJ_DC. Additionally, the ripple injection circuit 100 can extract the DC component VINJ_DC by passing the ripple injection voltage VINJ through the second-stage circuit 130, since the DC component VINJ_DC can cause a shift in the output voltage VOUT. The feedback voltage VFB can be adjusted by adding the ripple injection voltage VINJ with the DC component VINJ_DC removed to the feedback voltage VFB.

[0065] As described above, when a voltage conversion operation is performed based on the feedback voltage VFB adjusted by the operation of the ripple injection circuit 100, the virtual resistance value ESR of the ESR component can be defined by the following equation 5 from the perspective of the switching control circuit 50.

[0066] [Equation 5]

[0067]

[0068] The resistance value of the fourth resistive element RRI1 and the capacitance of the first capacitor CRI1 can be determined or alternatively predetermined such that the virtual resistance value ESR of the ESR component satisfies the condition indicated by Equation 1. One or more exemplary embodiments of the inventive concept are not limited to this example. For example, according to at least one exemplary embodiment of the inventive concept, Figure 2 The resistance values ​​of the first feedback resistor R1 and the second feedback resistor R2, as well as the resistance values ​​of the first resistive element RRIFB1 to the third resistive element RRIFB2, are shown in Fig. 2 (RRIFB1 and RRIFB2 are not found in Fig. 2). Figure 4 Therefore, the original text did not specify. Figure 2 (As shown in the figure) can be determined or alternatively predetermined such that the virtual resistance value ESR of the ESR component satisfies the condition indicated by Equation 1.

[0069] exist Figure 4 In the DCM operation, since the first switching control signal SWCS1 and the second switching control signal SWCS2 are invalid under DCM conditions, the ripple injection voltage VINJ cannot be generated by configuring the inverting voltage generation circuit 110. During DCM operation, the DCM reference voltage generation circuit 140 can be connected to the first-stage circuit 120 via the third switching element SW1 based on the high-level sensing signal ZCS. To enable the voltage converter 1 to smoothly transition from DCM operation to CCM operation, the DCM reference voltage VDCM_REF generated by the DCM reference voltage generation circuit 140 should be equal to or approximately equal to the DC component VINJ_DC of the ripple injection voltage VINJ in CCM operation.

[0070] The DC component VINJ_DC can be defined by Equation 6.

[0071] [Equation 6]

[0072]

[0073] The DC component VINJ_DC can be defined as the product of the output voltage VOUT, the duty cycle D of the inverting voltage VRV, and the resistance values ​​of the first resistive element RRIFB1 to the third resistive element RRIFB2. The ideal duty cycle D_IDEAL can be defined by the following equation 7, which assumes ideal switching operation in the inverting voltage generation circuit 110.

[0074] [Equation 7]

[0075]

[0076] Using equations 6 and 7, the DC component VINJ_DC can be defined as equation 8.

[0077] [Equation 8]

[0078]

[0079] The DC component VINJ_DC can be defined as the product of the difference between the output voltage VOUT and the input voltage VIN and the resistance values ​​of the first resistive element RRIFB1 to the third resistive element RRIFB2. In other words, because the resistance values ​​of the first resistive element RRIFB1 to the third resistive element RRIFB2 are fixed, the DC component VINJ_DC can be adjusted by the difference between the output voltage VOUT and the input voltage VIN.

[0080] Reference Figure 6 The DCM reference voltage generation circuit 140 may include a fifth resistive element RREF1 and a sixth resistive element RREF2, a third capacitor CREF, first PMOS transistors TR1 to fifth PMOS transistors TR5, a first current source IS1 and a second current source IS2, and an amplifier AMP. The DCM reference voltage generation circuit 140 can receive an output voltage VOUT and an input voltage VIN, respectively, and the first PMOS transistors TR1 to fifth PMOS transistors TR5 can operate as a differential amplifier circuit with a common gate structure. The first current source IS1 and the second current source IS2 can each have the same or approximately the same bias current IBIAS. The DCM reference voltage generation circuit 140 can form an internal voltage VX at the fourth internal node N4 that is the same as or approximately the same as the input voltage VIN, allowing a voltage VX corresponding to the input voltage VIN. The current flows through the fifth resistive element RREF1, and as a result, the DCM reference voltage VDCM_REF is generated as shown in Equation 9.

[0081] [Equation 9]

[0082]

[0083] The DCM reference voltage generation circuit 140 can generate a DCM reference voltage VDCM_REF that is equal to or approximately equal to VDCM_REF according to Equation 8. Therefore, the resistance values ​​of the fifth resistive element RREF1 and the sixth resistive element RREF2 can be determined or alternatively predetermined as shown in Equation 10.

[0084] [Equation 10]

[0085]

[0086] In summary, during CCM operation, the ripple injection circuit 100 can generate the ripple injection voltage VINJ and the DC component VINJ_DC through the switching operation of the inverting voltage generation circuit 110, the first stage circuit 120, and the second stage circuit 130. During DCM operation, the DC component VINJ_DC, which is the same as or similar to that in CCM operation, can be generated through the DCM reference voltage generation circuit 140.

[0087] Furthermore, one or more exemplary embodiments of the present invention are not limited to those described herein. Figure 4 and Figure 6 Examples are shown in the figure. For example, at least one example embodiment of the inventive concept can be implemented using various configurations for generating a ripple injection voltage VINJ having the same phase as the inductor current IL and a DC component VINJ_DC of the ripple injection voltage VINJ.

[0088] Figure 7 The illustration shows at least one example embodiment of the concept according to the present invention. Figure 2 The diagram of the conduction time control circuit. Figure 8 This is a graph illustrating the changes in ramp voltage, switching node voltage, and inductor current when an on-time control operation is performed, according to at least one exemplary embodiment of the present invention. Figure 9 This is a detailed illustration. Figure 2 The diagram shows the on-time control circuit.

[0089] Reference Figure 7 The conduction time control circuit 200 may include a current source IS, a ramp capacitor CRAMP, a sixth switching element SW4, an amplifier AMP, and a first comparator COMP1. The ramp capacitor CRAMP may be connected between the ramp node NRAMP and the ground voltage, and the sixth switching element SW4 may be connected in parallel with the ramp capacitor CRAMP between the ramp node NRAMP and the ground voltage. The sixth switching element SW4 may receive an inverted first switching control signal SWCS1B. A ramp current IRAMP, having an output voltage VOUT divided by the ramp resistor RRAMP, flows through the current source IS, and... Figure 9The configuration related to the current source IS is described in detail below. The first comparator COMP1 can receive the voltage of the ramp node NRAMP (hereinafter, the ramp voltage) generated from the output voltage VOUT, and the DC component VINJ_DC of the ripple injection voltage generated by the ripple injection circuit 100 and amplified by the amplifier AMP. The first comparator COMP1 compares the ramp voltage with the DC component VINJ_DC to generate an on-time control signal OTCS based on the comparison result, used to perform voltage conversion operation using an on-time control method. Furthermore, the switching frequency of the voltage converter including the on-time control circuit 200 can be defined by Equation 11.

[0090] [Equation 11]

[0091]

[0092] The switching frequency (FSW) of a voltage converter can be defined as Figure 5 The duty cycle D of the inverting voltage VRV is the product of the on-time TON of the on-time control signal OTCS. On the other hand, the duty cycle D can vary depending on the input voltage, output voltage, load current, etc. of the voltage converter, and in order to maintain a constant switching frequency FSW even with changes in the input voltage, output voltage, load current, etc., the on-time TON can be set to be proportional to the duty cycle D. The on-time TON can be defined by Equation 12.

[0093] [Equation 12]

[0094]

[0095] In summary, when Equation 6, which defines the DC component VINJ_DC, is applied to Equation 12, which defines the on-time TON, the on-time TON can be proportional to the duty cycle D. Furthermore, as mentioned above, the duty cycle of the inverting voltage VRV is related to the duty cycle of the switching node voltage VSN (e.g., the duty cycle D of the inverting voltage VRV = 1 - the duty cycle of the switching node voltage VSN). Therefore, TON can be based on the duty cycle of the switching node voltage VSN. The switching frequency FSW, according to at least one exemplary embodiment of the present invention, can be defined by Equation 13.

[0096] [Equation 13]

[0097]

[0098] The switching frequency FSW can be defined as the resistance values ​​of the ramp resistor RRAMP, the first resistive element RRIFB1 to the third resistive element RRIFB2, and the capacitance of the ramp capacitor CRAMP. The switching frequency FSW can be fixed because the resistance and capacitance values ​​are fixed.

[0099] Figure 8 Graphs of the ramp voltage VRAMP, switching node voltage VSN, and inductor current IL are shown for a low load current case (LLC CASE), a first high load current case (HLC CASE1) using conventional technology, and a second high load current region case (HLC CASE2) applying at least one example embodiment of the present invention. Furthermore, as described above, the voltage converter of at least one example embodiment of the present invention is assumed to operate in DCM mode in the low load current region and in CCM mode in the high load current region.

[0100] Reference Figure 8 In the low load current region (LLC CASE), the inductor can be charged until the on-time TONa, which corresponds to the time when the ramp voltage VRAMP level becomes equal to the on-time reference voltage VOT_REF level. The ramp voltage VRAMP can have... The slope of the ramp current IRAMP and the capacitance of the ramp capacitor CRAMP. Therefore, the inductor current IL during the conduction time TONa is... The slope of the input voltage VIN and the inductance of inductor L increases, and the switching node voltage VSN can remain low. Subsequently, after the on-time TONa, the ramp voltage VRAMP can remain low during the off-time, and the inductor current IL can increase. The slope of (output voltage VOUT, input voltage VIN, and inductance of inductor L) decreases, and the switching node voltage VSN can remain high to have the same amplitude as the output voltage VOUT. In the low load current region LLC case, the voltage converter can have a first switching period (TSW1).

[0101] In the first high load current region case HLC CASE1, the inductor can be charged to the on-time TONa, which corresponds to the time when the ramp voltage VRAMP level is equal to the on-time reference voltage VOT_REF level. That is, conventionally, the inductor charging time can be the same as in the low load current region case LLC CASE, since the on-time TONa is determined using a fixed on-time reference voltage VOT_REF. On the other hand, in the first high load current region case HLC CASE1, the switching node voltage VSN is raised by a desired or alternatively predetermined gap VGAP. Therefore, sufficient inductor current IL cannot be guaranteed during the on-time TONa period, because the inductor current IL decreases during the on-time TONa period. The slope of (input voltage VIN, inductor L's inductance, gap VGAP) increases. During the turn-off time, the inductor current IL rises at... The slope of (output voltage VOUT, input voltage VIN, inductance of inductor L, gap VGAP) decreases, and as a result, the voltage converter has a second switching period TSW2 in the first high load current region case HLC CASE1. In summary, conventionally, when switching from the low load current region case LLC CASE to the first high load current region case HLC CASE1, the switching period changes from the first switching period TSW1 to the second switching period TSW2. As a result, there is a problem that the switching frequency can vary due to changes in the output voltage VOUT.

[0102] In the second high load current region case HLCCASE2 of at least one example embodiment of the inventive concept of this disclosure, the DC component VINJ_DC of the ripple injection voltage can be varied depending on the output voltage VOUT, as shown in Equation 8, and the on-time (TONb) in response to changes in the output voltage VOUT can be determined using the DC component VINJ_DC. Therefore, the inductor current IL in the on-time TONb is... The slope of (input voltage VIN, inductance of inductor L, gap VGAP) increases, and the on-time TONb is longer than the on-time TONa of the low load current region case LLC CASE, ensuring sufficient inductor current IL. As a result, the voltage converter can have a first switching cycle TSW1 in the second high load current region case HLCCASE2. Therefore, when switching from a low load current region to a high load current region, or from a high load current region to a low load current region, the voltage converter according to at least one example embodiment of the inventive concept of this disclosure can have a fixed switching frequency, thereby performing stable voltage conversion operation.

[0103] Reference Figure 9 ,and Figure 7Compared to the illustrated on-time control circuit 200, the on-time control circuit 200' may include a voltage-to-current converter 210, a first ramp resistor RRAMP1, and a seventh switching element SW5, instead of a current source IS. The voltage-to-current converter 210 may include a sixth PMOS transistor TR6 and a seventh PMOS transistor TR7, an NMOS transistor TR8, a second comparator COMP2, and a second ramp resistor RRAMP2. The sources of the sixth PMOS transistor TR6 and the seventh PMOS transistor TR7 are respectively connected to the power supply voltage VDD, and their respective gates may be interconnected. The drain of the sixth PMOS transistor TR6 may be connected to the drain of the NMOS transistor TR8, and the drain of the seventh PMOS transistor TR7 may be connected to the second comparator COMP2. The output of the second comparator COMP2 may be used as feedback input to the second comparator COMP2. The second ramp resistor RRAMP2 may be connected between the NMOS transistor TR8 and ground.

[0104] According to the configuration of the voltage-to-current converter 210, it has The second ramp current IRAMP2, which is the value of the ramp voltage VRAMP at ramp node NRAMP and the resistance value of ramp resistor RRAMP, can flow through the sixth PMOS transistor TR6.

[0105] On the other hand, the inverted first switching control signal SWCS1B is received by the sixth switching element SW4, and the first switching control signal SWCS1 is received by the seventh switching element SW5, so that having The first ramp current IRAMP1, which represents the output voltage VOUT, the ramp voltage VRAMP at ramp node NRAMP, and the resistance value of ramp resistor RRAMP, can flow through the first ramp resistor RRAMP1. As a result, the on-time control circuit 200' can generate an on-time control signal OTCS, which sets the on-time period using the sum of the first ramp current IRAMP1 and the second ramp current IRAMP2, the on-time period being variable according to the output voltage VOUT.

[0106] However, one or more exemplary embodiments of the present invention are not limited to Figure 7 and Figure 9 The configuration shown is illustrated. For example, the on-time control circuits 200 and 200' can be implemented in various configurations capable of generating an on-time control signal OTCS, which is used to set the on-time period that varies according to changes in the output voltage VOUT.

[0107] Figure 10 This is a block diagram illustrating a power management system including a power management device according to at least one exemplary embodiment of the concept of the present invention.

[0108] Reference Figure 10 The power management system 800 may include a power management device 820 and multiple integrated circuits 630a to 630n mounted on a printed circuit board 810. The power management device 820 may be... Figure 1 The power management device (PMD) shown is illustrated. The power management device 820 can generate an output voltage VOUT based on the input voltage VIN and a reset signal RST based on the power enable signal PEN. The power management device 820 may include... Figure 1 The voltage converter 1 shown is an example. The voltage converter of the power management device 820 can adjust the feedback voltage required to generate the switching control signal based on the state of the inductor current according to the above example embodiment, and generate an on-time control signal that enables the voltage converter to have a fixed switching frequency even during the switching between DCM mode and CCM mode (or the switching between low load current region and high load current region).

[0109] Multiple integrated circuits 830a to 830n can maintain a reset state based on the reset signal RST until the output voltage VOUT reaches the normal state. After the output voltage VOUT reaches the normal state, the reset state is released and the circuit is driven based on the output voltage VOUT.

[0110] Figure 11 This is a block diagram illustrating another example of a power management system including a power management device, based on at least one exemplary embodiment of a concept according to the present invention.

[0111] Reference Figure 11 The power management system 900 may include a system-on-chip 910 and a filter 940. The system-on-chip 910 may include a power management device 920 and a function block 930.

[0112] The voltage converter of the power management device 920 can adjust the feedback voltage required to generate the switching control signal based on the state of the inductor current according to the example embodiment described above, and generate an on-time control signal that enables the voltage converter to have a fixed switching frequency even during the transition between DCM mode and CCM mode (or the transition between low load current region and high load current region).

[0113] Filter 930 may be a low-pass filter including inductor LS and capacitor CS. Function block 930 may maintain a reset state based on the reset signal RST until the output voltage VOUT reaches the normal state, release the reset state after the output voltage VOUT reaches the normal state, and be driven based on the output voltage VOUT.

[0114] Figure 12This is a block diagram illustrating an electronic device including a voltage converter according to at least one exemplary embodiment of the present invention.

[0115] Reference Figure 12 An electronic device 1000, which can be implemented as a data processing device, may include a power management integrated circuit 1050 and a battery 1060. Examples of data processing devices may include personal computers (PCs), tablet computers, netbooks, e-readers, personal digital assistants (PDAs), portable multimedia players (PMPs), MP3 players, and MP4 players.

[0116] The power management integrated circuit 1050 can receive power from the battery 1060 and manage the power of the processor 1010, image sensor 1020, display 1030, or memory 1040. The power management integrated circuit 1050 may include... Figure 1 The voltage converter 1 shown is an example. Therefore, the voltage converter of the power management integrated circuit 1050 can adjust the feedback voltage required to generate the switching control signal based on the state of the inductor current according to the above example embodiment, and generate an on-time control signal, which enables the voltage converter to have a fixed switching frequency even during the mutual conversion between DCM mode and CCM mode (or the mutual conversion between low load current region and high load current region).

[0117] The image sensor 1020 of the electronic device 1000 converts light signals into digital signals, and the converted digital signals are stored in the memory 1040 or displayed on the display 1030 under the control of the processor 1010. Alternatively, the digital signals stored in the memory 1040 are displayed on the display 1030 under the control of the processor 1010.

[0118] Exemplary embodiments of the inventive concept have been described, and it will be apparent that these embodiments can be modified in many ways. Such modifications should not be considered as a departure from the spirit and scope of the exemplary embodiments of the inventive concept, and all such modifications are intended to be included within the scope of the appended claims, as will be apparent to those skilled in the art.

Claims

1. A voltage converter, comprising: The switching circuit has an inductor connected to a switching node, a first switching element connected between the switching node and a ground voltage, and a second switching element connected between the switching node and an output node. as well as A switching control circuit is configured to adjust the feedback voltage of the output voltage divider from the output node based on the current state of the inductor, and is configured to generate a switching control signal based on a sensing signal of the inductor current and the adjusted feedback voltage. The switching control signal is used to charge the inductor with the input voltage and to discharge the voltage charged in the inductor. The switching control circuit is configured to adjust the feedback voltage by adding a ripple injection voltage that reflects the current state of the inductor to the feedback voltage, wherein the ripple injection voltage has the same phase as the current of the inductor.

2. The voltage converter of claim 1, wherein, The DC component in the ripple injection voltage is removed.

3. The voltage converter of claim 2, wherein, The switching control circuit is configured as follows: A first comparison is performed based on the adjusted feedback voltage and the reference voltage; and Based on the on-time control signal used to limit the charging time of the inductor and the result of the first comparison, a first switching control signal for charging the inductor is output to the first switching element.

4. The voltage converter of claim 3, wherein, The switching control circuit is configured to generate the on-time control signal based on the DC component of the ripple injection voltage, the DC component being based on the duty cycle of the voltage of the switching node.

5. The voltage converter of claim 4, wherein, The switching control circuit is configured as follows: The second comparison is performed based on the ramp voltage generated from the output voltage and the DC component; and The on-time control signal is generated based on the result of the second comparison.

6. The voltage converter of claim 4, wherein, The switching control circuit is configured as follows: Generate a discontinuous conduction mode reference voltage with the same level as the DC component in the discontinuous conduction mode; and The on-time control signal is generated using the discontinuous conduction mode reference voltage.

7. The voltage converter of claim 3, wherein, The switching control circuit is configured to output a second switching control signal to the second switching element for discharging the voltage charging in the inductor based on the following: The sensing signal indicates whether the inductor current is at zero level; The result of the first comparison; as well as The on-time control signal.

8. A voltage converter, comprising: The switching circuit has an inductor connected to a switching node, a first switching element connected between the switching node and a ground voltage, and a second switching element connected between the switching node and an output node. as well as A switching control circuit is configured to adjust the feedback voltage derived from the output node and to use the adjusted feedback voltage to generate a first switching control signal and a second switching control signal. The first switching control signal is provided to the first switching element for charging the inductor, and the second switching control signal is provided to the second switching element for discharging the voltage charging the inductor. The switching control circuit further includes a ripple injection circuit configured to generate an inverted voltage of the switching node voltage and configured to use the inverted voltage to generate a ripple injection voltage having the same phase as the current of the inductor for adjusting the feedback voltage.

9. The voltage converter of claim 8, wherein, The ripple injection circuit further includes: An inverting voltage generation circuit is connected to the output node and is configured to generate an inverting voltage of the switching node by using the first switching control signal, the second switching control signal, and a sensing signal based on the current of the inductor. A first-stage circuit is connected to the output of the inverting voltage generation circuit and is configured to filter the inverting voltage to generate the ripple injection voltage; and A second-stage circuit is connected to the output of the first-stage circuit, and the second-stage circuit is configured to extract the DC component of the ripple injection voltage.

10. The voltage converter of claim 9, wherein, The ripple injection circuit further includes a discontinuous conduction mode reference voltage generation circuit, configured to provide the first stage circuit with a discontinuous conduction mode reference voltage having the same level as the DC component of the ripple injection voltage when the inverting voltage generation circuit is deactivated in the discontinuous conduction mode.

11. The voltage converter of claim 8, wherein, The switching control circuit further includes: The pulse generation circuit is configured as follows: Summing the feedback voltage and the ripple injection voltage after removing the DC component, The first comparison is performed based on the summed voltage and the reference voltage, and Based on the result of the first comparison and the sensed signal, at least one of a first pulse signal and a second pulse signal is generated; and The driving circuit amplifies the first pulse signal and the second pulse signal respectively to output the first switching control signal and the second switching control signal.

12. The voltage converter of claim 11, wherein, The pulse generation circuit further includes an on-time control circuit, configured as follows: A conduction time control signal for limiting the charging time of the inductor is generated based on the DC component of the ripple injection voltage; and During the conduction period when the conduction time control signal has a first level, at least one of the first pulse signal and the second pulse signal is generated.

13. The voltage converter of claim 12, wherein, The on-time control circuit is configured as follows: A second comparison is performed based on the DC component and the ramp voltage generated from the output voltage of the output node; and The on-time control signal is generated based on the result of the second comparison. The on-time control signal is used to set the on-time period that is proportional to the duty cycle of the inverting voltage.

14. The voltage converter of claim 8, wherein, The first switching element includes an N-channel power switch, and the second switching element includes a P-channel power switch connected between the switching node and the output node.

15. A power management device, comprising: A reference voltage generation circuit is configured to generate a reference voltage. Voltage converter, configured as Adjust the feedback voltage of the output voltage divider at the output node. The adjusted feedback voltage and the reference voltage are used to perform pulse frequency modulation or pulse width modulation to generate a switching control signal, and In response to the switching control signal, the input voltage is converted into the output voltage. The voltage converter includes a conversion circuit having an inductor connected to a switching node, a first switching element connected to the switching node, and a second switching element connected between the switching node and the output node. The first switching element and the second switching element are configured to switch between charging the inductor with the input voltage and discharging the voltage that charges the inductor in response to the switching control signal; as well as The switching control circuit is configured as follows: A ripple injection voltage is generated that has the same phase as the current in the inductor and reflects the current state of the inductor. The feedback voltage is adjusted using the ripple injection voltage, and The adjusted feedback voltage is used to generate the switching control signal.

16. The power management device of claim 15, wherein, The switching control circuit is configured as follows: The feedback voltage is adjusted by adding a ripple injection voltage with the DC component removed to the feedback voltage; The adjusted feedback voltage is compared with the reference voltage; as well as The switching control signal is generated based on the comparison result.

17. The power management device of claim 15, wherein, The switching control circuit is configured to use the DC component of the ripple injection voltage to generate a conduction time control signal for controlling the conduction period during which the inductor is charged.

18. The power management device of claim 17, wherein, The DC component of the ripple injection voltage is proportional to the duty cycle of the inverted voltage of the switching node.

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