Method and system for signal self-alignment in large-scale phased array systems

Abstract

A method and system for aligning signals in a phased array system having multiple tiles is provided. Tile-to-tile signal alignment is achieved by using internally generated local oscillator signals and existing coupling paths between transmit antenna elements and receive antenna elements in adjacent tiles of the phased array system. The relative phase of the local oscillator signal is measured in two directions between adjacent tiles to determine a phase difference, which can then be used to align signals between adjacent tiles. The self-alignment process can then be repeated on subsequent pairs of adjacent tiles, providing a fully aligned and phase-balanced phased array system. Because no external signals or components that are not already resident on the tiles are required, self-alignment can be performed at system startup, for example, to align a multi-tile phased array before the system is put into operation in a live network.

Description

Technical Field

[0001] The present invention relates generally to phased arrays, and more particularly to methods and systems for self-alignment of large-scale phased array systems. Background Art

[0002] Next generation mobile technologies, such as fifth generation (5G), require ultra-low latency and high data rates to support ubiquitous deployment of multiple users through the use of small cells. For example, a pico cell may typically require up to hundreds of active elements capable of generating thousands of beam patterns. As such, highly integrated phased array systems are fundamental building blocks for next generation communication applications.

[0003] When manufacturing large-scale phased arrays, it is generally preferred to avoid integrating all elements of the system on a single chip because the chip size will become too large and the yield will be reduced. Therefore, it is not uncommon to distribute system elements on various chips. However, distribution on multiple chips can have its own challenges and complexities, such as ensuring the alignment of various system elements to ensure correct response and signal integrity. In a distributed arrangement, "blocks" (e.g., cells) are typically arranged in rows and columns, with one block being electrically coupled to adjacent blocks, such as the previous block and the next block. Although the elements within a block are aligned with each other, the elements between two adjacent blocks are not necessarily aligned, so an additional alignment process is required to maintain signal integrity. In large-scale phased arrays, distributing signals to all blocks for beamforming purposes requires phase balancing, which can be very complex, especially when distributing high-frequency signals, such as 90GHz millimeter-wave (mm-wave) signals using an array of 16 blocks or more blocks on a printed circuit board (PCB). Summary of the invention

[0004] According to various embodiments, a method and system for aligning signals in a phased array system having multiple tiles is provided. Tile-to-tile signal alignment is advantageously achieved by using internally generated local oscillator signals and existing coupling paths between transmit and receive antenna elements in adjacent tiles of the phased array system. For example, the existing antenna coupling paths are utilized to measure the relative phase of the local oscillator (LO) signal in two directions between adjacent tiles to determine a phase difference that can then be used for signal alignment between adjacent tiles. The self-alignment process can then be repeated on subsequent pairs of adjacent tiles, thereby providing a fully aligned and phase-balanced phased array system. Because no external signals or components that are not already resident on the tiles are required, self-alignment can be performed as part of system startup, for example, to align a multi-tile phased array before the system is put into operation in a live network.

[0005] According to an embodiment, a first LO signal is sent from a transmitter in a first block to a receiver in an adjacent second block, wherein the phase of the first LO signal is measured. In a similar manner, a second LO signal is sent from a transmitter in the second block in an opposite direction, and the phase of the second LO signal is measured at the receiver in the first block. If the measured value indicates a phase difference, action can be taken to correct the phase difference, for example, by changing the phase of one of the LO signals by an amount equal to the phase difference, thereby obtaining signal alignment between adjacent blocks in the phased array. According to an embodiment, the phase of the corresponding local oscillator signal is scanned to obtain multiple measurements. According to an embodiment, the corresponding local oscillator signal is mixed with a constant DC voltage value to generate a local oscillator induced DC offset signal so that the phase of the local oscillator signal can be measured with a DC offset cancellation circuit system at the baseband level.

[0006] According to an embodiment, a method for performing block-to-block alignment includes setting at least one of the baseband signal inputs at a transmitter to a constant value (e.g., a constant DC voltage value). An internally generated LO signal is generated from a first block by applying an LO-induced DC offset to a transmit mixer of the first block for up-conversion. The up-converted signal is received and down-converted at an adjacent second block. When the LO signal from the first block is received at the second block, the LO signal is down-converted to a DC value at a baseband module in the second block. The DC value is then measured using an existing DC offset cancellation circuit in the second block, and a value for the received baseband signal is calculated. In an embodiment, the process is then repeated in the opposite direction, i.e., transmission from the second block to the first block, and the detected DC term is used to measure the relative phase and calculate the phase difference to facilitate phase correction for block-to-block alignment.

[0007] The self-alignment aspects of the described embodiments may be particularly beneficial in large-scale systems, such as those expected to be used in next-generation 5G networks. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 A block diagram showing a phased array system configuration;

[0009] Figure 2A and Figure 2B shows a graphical representation of the phase relationship of local oscillator signals in a multi-block configuration according to various embodiments;

[0010] Figure 3 shows a block diagram of a tile-to-tile coupling configuration in a phased array system in accordance with an illustrative embodiment;

[0011] Figure 4 A flow chart showing a block-to-block phase alignment method according to an illustrative embodiment is shown;

[0012] Figure 5 shows a block diagram of a tile-to-tile coupling configuration in a phased array system in accordance with an illustrative embodiment;

[0013] Figure 6 Shown according to Figure 5 a block diagram of an illustrative configuration of elements in an analog baseband module of an embodiment;

[0014] Figure 7 Shown according to Figure 6 a schematic diagram of an illustrative offset cancellation module of an embodiment; and

[0015] Figure 8 A graphical representation of a tile-to-tile phase measurement is shown in accordance with an embodiment. DETAILED DESCRIPTION

[0016] In this document, the term "tile" should be understood to refer to an element forming part of a distributed arrangement of a phased array antenna system, wherein an individual tile comprises one or more transmitters and one or more radio frequency signal receivers (RF).

[0017] Various illustrative embodiments will now be described more fully with reference to the accompanying drawings, in which some illustrative embodiments are shown. However, it should be understood that it is not intended that the illustrative embodiments be limited to the specific form disclosed, but on the contrary, the illustrative embodiments are intended to cover all modifications, equivalents and substitutes falling within the scope of the claims. Where appropriate, throughout the description of the accompanying drawings, the same numerals refer to the same elements. It should be understood that although the terms first, second, etc. can be used to describe various elements in this article, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the illustrative embodiments, the first element can be referred to as the second element, and similarly, the second element can be referred to as the first element. As used herein, the term "and / or" includes any and all combinations of one or more associated listed items. As used herein, the term 5G is intended to refer to the next generation (i.e., the fifth generation) mobile network specified by the International Telecommunication Union Radiocommunication Sector (ITU-R), which is well known to those of ordinary skill in the art.

[0018] As described above, a large-scale phased array may be arranged in a distributed architecture including a plurality of units or blocks (hereinafter referred to as blocks), wherein each block includes various system elements. Figure 1A simplified block diagram of two (2) adjacent tiles 110 and 150 in an exemplary phased array system configuration 100 is shown. In this example, tile 110 includes a 16TX / 8RX configuration, i.e., 16 transmitter modules 115 and 8 receiver modules 120. Similarly, tile 150 has a 16TX / 8RX configuration, with 16 transmitter modules 160 and 8 receiver modules 170. In one example of a phased array system according to an embodiment, sixteen (16) tiles, each having a configuration similar to tiles 110 and 150, can be combined onto a printed circuit board (PCB) to create a 384-element phased array system, e.g., a 256TX / 128RX configuration with 256 transmitter modules and 128 receiver modules. It should be noted that Figure 1 The configurations in are merely illustrative and not limiting in any way. For example, the embodiments described herein may be applied to various nTX / mRX tile configurations, where n and m are integers, such as 8TX / 16RX or any other combination of numbers, which may be a matter of design choice, network requirements, and / or other considerations. Thus, a large-scale phased array may take various forms (e.g., TX / RX configurations, etc.) in terms of the number of tiles and the density of subarrays on the corresponding tiles.

[0019] continue Figure 1 In the example shown in , blocks 110 and 150 are organized in rows and columns and are electrically coupled to each other and to other corresponding adjacent blocks, e.g., each block is coupled to at least the previous and next blocks. Although elements within a single block (e.g., components of transmitter module 115 and receiver module 120 within block 110) can be electrically aligned with each other to ensure signal integrity, elements between two adjacent blocks do not necessarily have to be aligned, and therefore an additional alignment process is required to maintain signal integrity. That is, the signals distributed between block 110 and block 150 are not necessarily phase balanced. For large-scale phased arrays, it is desired that the signals distributed to all blocks in the phased array be phase balanced for effective beamforming, which can be very complex, especially when distributing high-frequency signals, such as millimeter-wave signals in 5G communication networks. For example, consider something like Figure 1, where the transmitter module 115 in block 110 is coupled to the receiver module 170 in block 150 (and the transmitter module 160 in block 150 is coupled to the receiver module 120 in block 110). Each of the blocks 110 and 150 includes a corresponding local oscillator (LO) and a corresponding mixer, not shown in the figure. In operation, the LO phase in block 110 may be different from the LO phase in the adjacent block 150, thereby resulting in LO misalignment between the two blocks. Alignment between blocks in a phased array system can negatively affect beamforming. For example, if there is no block-to-block alignment, the relative phase between each block is random, thereby resulting in a random beam pattern.

[0020] One possible alignment approach is to utilize a receiver to detect / monitor the strength of the transmitted signal while continuously varying the phase at the transmitter until an optimum value of the signal strength is detected at the receiver, indicating that alignment is achieved. However, this approach may not be practical when a large number of antennas in an array need to be aligned. Furthermore, this solution may be an inefficient use of resources because it typically requires external elements (e.g., a remote receiver) to perform the alignment.

[0021] According to various embodiments described herein, block-to-block alignment is achieved by utilizing self-alignment techniques, which do not require external components to perform alignment, but rather utilize the close proximity and coupling paths of antennas on adjacent blocks and utilize existing circuit systems and functionality within the blocks. The positions of the individual antennas on the corresponding adjacent block pairs are selected so that the bidirectional coupling paths between adjacent transmit and receive antenna elements can achieve block-to-block alignment in a multi-block, large-scale phased array system. More specifically, antenna selection that utilizes the existing coupling paths between adjacent blocks is used to measure the relative phase of the local oscillator (LO) signal between adjacent blocks. Once the phase is aligned between two adjacent blocks, the process can then be repeated for the remaining adjacent block pairs until all blocks are aligned. It is worth noting that self-alignment / self-calibration can be performed during system setup (e.g., power-up) without the need to generate a specific intermediate frequency (IF) signal at baseband, as only the internally generated LO signal is required to facilitate the measurement. In addition, phase alignment is maintained as long as the system is not shut down. With the system shut down, self-calibration can be performed again to align and phase balance the signals distributed across the tiles in the phased array system.

[0022] Figure 2A A simplified graphical representation is shown to illustrate the Figure 1The present invention relates to the basic principle of measuring the relative phase of the local oscillator (LO) signal between two adjacent blocks 110 and 150. As will be described in further detail below, a first LO signal is transmitted from a first block to an adjacent block, for example, from a transmitter module 160 in block 150 to a receiver module 120 in block 110, and the phase of the first LO signal is measured at the receiver module 120. In a similar manner, a second LO signal is transmitted from a transmitter module 115 in block 110 to a receiver module 170 in block 150, i.e., in a direction opposite to the transmission direction of the first LO signal, and the phase of the second LO signal is measured at the receiver module 170. As will be understood by those skilled in the art, multiple phase measurements can be obtained by sweeping the phase of the corresponding oscillator from 0 to 360 degrees and deriving the relative phase shift. When the measured phase of each of the first and second LO signals has the same or substantially the same value, alignment of the first and second LO signals is achieved. If the measurements indicate a phase difference, action may be taken to reduce the phase difference to approximately zero, such as by changing the phase of one of the LO signals by an amount equal to the phase difference, thereby achieving signal alignment between adjacent tiles 110 and 150 .

[0023] like Figure 2A As shown in FIG. 1 , plots 201 and 210 correspond to phase representations of a first LO signal transmitted in a direction from block 150 to 110. More specifically, plot 210 represents an actual phase measurement obtained by sweeping the phase of the first LO from 0 to 360 degrees, for example, a plurality of phase measurements obtained by sweeping the phase of the first LO in block 150. Plot 201 represents a "best fit" line corresponding to the actual phase measurement in plot 210. Because the relationship between the received phase and the transmitted phase should be linear, a "best fit" linear approximation can be made to fit the measured phase. Similarly, plots 202 and 211 correspond to phase representations of a second LO signal transmitted in the opposite direction from block 110 to block 150. More specifically, plot 211 represents an actual phase measurement obtained by sweeping the phase of the second LO from 0 to 360 degrees, and plot 202 represents a "best fit" line corresponding to the actual phase measurement in plot 211. Sweeping the phase of the respective oscillators to obtain multiple measurements and using a "best fit" approach can provide a more accurate relative phase estimate than using a single measurement. For example, points 205 and 206 represent single phase measurements of the first and second LO signals, respectively. When the results of using a single measurement point (e.g., points 205 and 206) are compared to sweeping the phase to obtain a relative phase estimate such as Figure 2A The accuracy of using multiple measurements (eg, from scans) is apparent when comparing the "best fit" lines 201 and 202 shown in FIG.

[0024] Thus, the resulting plots 201, 202, 210, and 211 in FIG2 show simplified phase representations of the corresponding LO signals from 0 to 360 degrees. Note that the LO signals have the same frequency, but are phase shifted. As will be described in further detail below, the phase shifter associated with the corresponding local oscillator on the transmitter side is swept from 0 to 360 degrees to facilitate phase measurement on the receiver side.

[0025] return Figure 2A , the phases shown by plotted lines 201 and 202 represent an offset of 2Δφ with respect to each other, for example, the offset represents twice the value of the phase difference (Δφ) between the two LO signals. Therefore, when this offset value is measured and obtained, the phase difference can be obtained. Then, a phase shift equivalent to the phase difference Δφ can be applied in the signal transmission between the blocks, for example, a phase shift equivalent to the phase difference +Δφ can be applied in the signal transmission from one of the blocks, or alternatively, an opposite phase shift of -Δφ can be applied in the signal transmission in the opposite direction from the other block. Through this phase matching, signal alignment between the two blocks is achieved.

[0026] Figure 2B Another embodiment for measuring the phase of the first and second LO signals is shown. In this example, only the phase of the first LO is swept (e.g., from 0 to 360 degrees), while the phase of the second LO is held constant. Plot line 250 represents a phase measurement of the first LO signal (e.g., from transmitter T1 in the first block to receiver R2 in the second block). More specifically, at each sweep point (along plot line 250), the first LO signal is transmitted from the first block and the resulting phase is measured at the receiver in the second block. At each of the aforementioned sweep points, the second LO signal is transmitted from the second block and the resulting phase is recorded by the receiver at the first block. Those measurements made on the second LO signal are shown by plot line 251 (e.g., from transmitter T2 in the second block to receiver R1 in the first block). For the next and subsequent measurements, the phase of the first LO signal is increased and measurements are performed again for each of the first and second LO signals. Thus, the phase of the first LO signal is swept and measured, while the phase of the second LO signal is measured only at each corresponding sweep point for the first LO signal, i.e., the phase of the second LO signal is not swept but remains constant. Plots 260 and 261 represent "best fit" lines of the corresponding phase measurements from plots 250 and 251, respectively. Using this approach, when the phase of the first LO signal measured at the second block is equal to the phase of the second signal measured at the first block, an accuracy of 100% is achieved. Figure 2B Alignment as shown by alignment point 270.

[0027] Various embodiments for implementing the self-alignment process will now be described in more detail. Figure 3 An illustrative embodiment of a block-to-block coupling configuration 300 of a phased array system is shown, where block 310 (block 1) is adjacent to block 350 (block 2). In this example, two adjacent blocks are shown for the purpose of illustrating the self-alignment procedure, although adjacent blocks 310 and 350 may be part of a larger-scale phased array system including multiple blocks, such as the 16-block phased array configuration described above as a non-limiting example. Furthermore, configuration 300 is a simplified block diagram showing only a full subset of the components in a typical block. Each block in a phased array system may typically include an RF integrated circuit (RFIC) that is further integrated with all antenna subarrays on that block (e.g., a 16TX / 8RX phase shifter array, etc.). Figure 3 In FIG. 1 , blocks 310 and 350 are simplified to show just one transmitter and receiver for each block, and only a subset of associated components, although it will be understood that a complete representation of the block includes a full complement of transmitters and receivers, associated components, and a signal distribution network for routing various signals via the RFIC on the block. For example, such components include: antenna subarrays, upconverters / downconverters (mixers, multipliers, etc.), analog baseband modules, phase-locked loop (PLL) circuits, diagnostic circuits for performance monitoring, etc. The signal distribution network within the block facilitates passive and active signal distribution to provide RF signal paths to all antenna elements.

[0028] Reference again Figure 3 , block 310 includes a transmitter 315 and a receiver 320. For simplicity of description, block 310 is shown as including a local oscillator (LO) circuit 311, which works with phase shift elements 312 and 313 to provide a phase-shifted LO signal to a corresponding in-phase / quadrature (I / Q) mixer circuit for appropriate up-conversion for transmission and down-conversion for signal reception. More specifically, I / Q mixers 316 and 317 provide up-conversion for signal transmission via transmitter 315, while I / Q mixers 321 and 322 provide down-conversion for signal reception via receiver 320. Block 310 is also shown to include a DC offset cancellation circuit module 325, which will be described in more detail below. Block 350 is shown as including similar elements as in block 310 to perform the same functions in block 350, such as: transmitter 360; receiver 370; local oscillator (LO) circuit 383; phase shifting elements 352 and 353; I / Q mixers 361, 363, 371 and 372; DC offset cancellation circuit module 375.

[0029] Figure 3Also shown are various parameters that should be considered in the process of measuring and calculating relative phase shifts and phase differences during the self-alignment process. Without considering delays (neither "intra-block" nor "inter-block" delays), alignment between blocks would not be possible. Such delay parameters may include adjustable parameters as well as some non-adjustable parameters. In one illustrative embodiment, Figure 3 As shown in FIG. 3 , these parameters include the delay between blocks 310 and 350 (i.e., the inter-block delay), arrow 390 represents the delay D1 from block 310 to block 350, and arrow 391 represents the delay D2 from block 350 to block 310. Although delays D1 and D2 may not be the same value in all scenarios, the self-alignment procedure according to one illustrative embodiment assumes that the inter-block delays D1 and D2 are the same in both directions.

[0030] As mentioned above, blocks 310 and 350 have been simplified to each show a single transmitter and a single receiver. However, in reality, for the aforementioned example, each of blocks 310 and 350 has multiple transmitters and multiple receivers, for example, each has 16 transmitters and 8 receivers. Therefore, each block will have its corresponding signal distribution network to route signals to the corresponding multiple transmitters and receivers via various components. For example, the LO signal (e.g., voltage controlled oscillator (VCO) signal) is phase shifted, mixed with the I / Q baseband IF signal, and then split (for routing to the transmitter) or combined (in the receiver) onto multiple paths for corresponding routing and distribution between elements on the block. Therefore, the signal distribution network on each block will introduce intra-block delays associated with the signal routing within that block. Figure 3 In FIG. 3 , these intra-block delay parameters are shown as x and y, which are also constants, e.g., non-adjustable, like the inter-block delay D. More specifically, x represents the delay in the corresponding transmit path for each of the blocks 310 and 350, while y represents the delay in the corresponding receive path for each of the blocks 310 and 350.

[0031] Parameters α and γ are adjustable parameters associated with phase shifting operations on the LO signals, e.g., sweeping the phase of the oscillator to obtain phase measurements to determine relative phase shifts, e.g., using phase shift elements 312 and 352 in each of blocks 310 and 350, respectively. Thus, parameters α and γ may also be considered for phase difference measurements between the LO signals in blocks 310 and 350.

[0032] like Figure 4 The various steps in performing block-to-block self-alignment shown in Figure 3 In step 401, the transmitter 360 in the block 350 is enabled, and in step 402, Iin(2) is set to a constant value (e.g., value = 1), where I in(2) 350 ("Block 2"). As previously noted, block-to-block self-alignment can be performed without generating additional and specific baseband signals. The LO signal is generated from block 350 and allowed to "leak," as will be described in further detail below, so that the LO-induced DC offset is applied to the transmit mixer 361 in step 403 for up-conversion in step 404. In step 405, the up-converted signal transmitted from the transmitter 360 in block 350 is received and down-converted at the receiver 320 in the adjacent block 310. It is noteworthy that the LO signals generated from blocks 350 and 310 have the same frequency, but different phases, so when the LO signal from block 350 is transmitted to block 310, the LO signal is down-converted to a DC value at the I and Q receive mixers 321 and 322 in block 310. In step 406, the DC value is measured using the DC offset cancellation circuit module 325 in the analog baseband module of block 310. out(1) and Q out(1) In step 407, it is calculated and expressed as:

[0033]

[0034]

[0035] where ρ2 = D2 + xy; and

[0036] Represents the phase difference between two blocks;

[0037] ω is the angular frequency;

[0038] γ is a parameter related to the phase shift of the local oscillator signal in block 350;

[0039] α is a parameter associated with the local oscillator signal in the phase shift block 310;

[0040] x and y are parameters representing intra-block delays in blocks 310 and 350; and

[0041] D2 represents the inter-block delay between blocks 310 and 350 ( Figure 3 ) parameters.

[0042] Next, in step 408, steps 401 to 407 are applied to the transmission in the reverse direction from block 310 to 350 to calculate I at block 350. out(2) and Q out(2)More specifically, the transmitter 315 in block 310 is enabled, I in(1) 350. The I at block 350 is set to a value of 1, the LO signal is generated from block 310 and allowed to "leak", thereby applying the LO induced DC offset to the transmit mixer 316 for upconversion, transmission, and downconversion at the receiver 370 in the adjacent block 350. The DC value is measured using the DC offset cancellation circuit module 375 in the analog baseband module of block 350. out(2) and Q out(2) is calculated and expressed as:

[0043]

[0044]

[0045] in:

[0046] ρ1=D1|xy; and

[0047] D1 represents the inter-block delay between blocks 310 and 350 ( Figure 3 ) parameters.

[0048] The received I and Q values ​​are then used to calculate the required phase correction in step 409 for tile-to-tile alignment between tiles 310 and 350. In the case where D1 = D2:

[0049] The measured I and Q values ​​can be used to calculate the angle:

[0050]

[0051]

[0052] The angle can be used to find the phase offset between two blocks.

[0053]

[0054] in:

[0055] ∠1 indicates the received I out1 and Q out1 The angle of the value; and

[0056] ∠2 indicates the received I out2 and Q out2 The angle of the value.

[0057] In the case where D1 ≠ D2, a factory calibration should be performed where the initial phase correction and the corresponding ∠1 old and ∠2 oldare measured and stored block by block, e.g.

[0058] as well as

[0059]

[0060] In the event that the system is turned off and then on again, the new phase correction required for alignment can be calculated from the new angle measurement and the previously stored value as follows:

[0061] as well as

[0062]

[0063]

[0064] When Figure 3 Blocks 310 and 350 are considered to be aligned when the phase at reference point P1 in (as shown at position 340 in block 310) is equal to or substantially equal to the phase at reference point P2 (as shown at position 385 in block 350).

[0065] According to another embodiment, multiple measurements of ∠1 and ∠2 may be made by scanning the phase shifters in each of the blocks 310 and 350. In this way, multiple measurements may be used to find the best fit for ∠1 and ∠2. More specifically, this is done during the self-alignment process described above by using the corresponding LO phase shifters on the transmit side in each direction (e.g., phase shifter 352 for transmission from block 350 to block 310 and phase shifter 312 for transmission from block 310 to 350). For example, in one illustrative embodiment, the phase shifter 352 for the LO signal in block 350 may be scanned from 0 degrees to 360 degrees, and the I and Q signals received on the receive side in block 310 are measured accordingly.

[0066] According to various embodiments described herein, tile-to-tile alignment takes advantage of coupling paths that already exist between transmit / receive antenna elements in adjacent tiles. Self-alignment can also be done before the system is powered on, and various efficiencies are achieved by leveraging existing circuits, components, and signals. As described above, no additional and specific baseband signals need to be generated to perform the above measurements. Instead, a DC constant (voltage) can be applied to the transmit mixer.

[0067] In addition, existing, internally generated LO signals can be used for all measurement and alignment purposes. Features and functionality of existing circuit systems (such as DC offset cancellation circuits) already included in the blocks can be utilized to facilitate measurements and calculations that affect signal alignment. For example, DC offset cancellation circuits in analog baseband modules are typically used to cancel any LO-induced DC offsets originating from I / Q downconverter mixers. However, when performing block-to-block self-alignment according to various embodiments, the detected I / Q DC terms are internally digitized and used in a novel way to measure the relative phase between blocks in a multi-block phased array system. In this way, various embodiments take advantage of the use of features that are already available in DC offset cancellation circuits but are not typically used for the purposes described herein. In the described embodiments, DC offset values ​​that are detected but discarded in conventional systems are effectively used to detect and calculate the phase difference between the LO signals of two adjacent blocks. This is possible because the LO signals have the same frequency but different phases, so when the LO signal from one block is transmitted to the next block and mixed with the LO signal of the latter block, they are down-converted to DC values. The measurement of this DC value is performed by existing DC offset cancellation circuitry resident in each block. This value can then be digitized and used to calculate the phase difference.

[0068] Figure 5 Another illustrative embodiment of a block-to-block coupling configuration 500 for a phased array system is shown, where block 550 (block n) is adjacent to block 510 (block n+1). For ease of illustration and description, configuration 500 is a simplified block diagram again showing only a subset of components, with an emphasis on the coupling of transmit antenna 560 in block 550 to receive antenna 520 in block 510. Figure 3 The various components and functionalities described in the context of the embodiments shown in FIG. 1 are equally applicable to Figure 5 510 is a current embodiment of the present invention and therefore will not be described in detail for the sake of brevity. As represented by the distribution network 567, in addition to the transmit antenna 560 (shown), the block 550 actually includes multiple other transmit and receive antennas. The RF signals in the block 550 are split and then routed to the multiple transmit antennas for transmission, and conversely, the RF signals are received by the multiple receive antennas and combined for further routing and processing in the block 510. The configuration 500 also includes a main phase-locked loop (PLL) circuit 501 with associated components to provide a local oscillator signal to each of the blocks 550 and 510 in the large-scale phased array, as well as other blocks (not shown). Similar to Figure 3 In the embodiment of FIG. 5 , blocks 510 and 550 each include phase shifter elements 512 / 513 and 552 / 553 , respectively, for phase shifting the corresponding LO signals.

[0069] Block 550 is shown as including I / Q mixers 561 and 563, respectively, for upconversion. Similarly, block 510 includes I / Q mixers 521 and 522, respectively, which feed the I / Q signals to analog baseband modules 504 and 502, respectively. Importantly, in this embodiment, a switch (inductive LO switch) 564 is used to "leak" the internally generated LO signal for upconversion and transmission to block 510. In this way, the self-alignment / self-calibration process can be performed without any external signals and can be performed as part of a system check / start-up, for example, to align a multi-block phased array before the system is put into operation in a live network.

[0070] As will be described further below, the analog baseband module includes circuitry (521 and 522) for canceling any LO induced DC offset originating from the I / Q downconverter mixers (521 and 522). Figure 5 As mentioned in the previous description, the only purpose of the DC offset cancellation circuit is to ensure that the high gain IF amplifier stage does not saturate under strong LO injection conditions. However, in the present embodiment, the detected I / Q DC term is internally digitized and used in a new calibration scheme to measure the relative phase between blocks in a multi-block phased array system. As shown, as a result of the down-conversion of the signal received from block 550, a DC offset cancellation circuit for I is generated in block 510. out The DC value of 505 and the Q out The DC value 503 where the LO is "leaked" and where a constant DC voltage is applied to the I / Q signals in the transmit mixer (561 and / or 563) in block 550. Then, for I out The DC value of 505 and the Q out The DC value 503 is further processed by the DC offset cancellation circuit in the analog baseband circuit 504 and 502 respectively.

[0071] Figure 6 Shown according to Figure 5 6 is a block diagram of some elements in an analog baseband module 600 of an embodiment. In particular, the analog baseband module 600 is shown to include a tunable low-pass active filter 642 and associated components (e.g., a transimpedance amplifier (TIA), etc.) for receiving an input signal, a ladder attenuator VGA pair 643 and associated components, a linear output driver 644, and a monitoring / control section 645. It is worth noting that the analog baseband module 600 includes two DC offset cancellation feedback loops / modules 625 and 626, wherein the LO-induced DC offset cancellation module 625 pair is used for I out The DC value of 505 and the Q out The DC value is 503 (from Figure 5) performs further processing to measure the phase difference of the LO signals in adjacent blocks.

[0072] Figure 7 A configuration 700 is shown which includes a LO-induced DC offset cancellation module 725 in conjunction with an analog baseband module 600 ( Figure 6 ) is a simplified schematic diagram of other components similar to those described in detail in the accompanying drawings. For example, configuration 700 includes inputs from I / Q mixers 721 / 722 of a receiver 720 (not shown), a tunable low pass active filter 742, and a portion of a ladder attenuator VGA section 743. LO induced DC offset cancellation module 725 is shown as including known components for performing its conventional functions. As previously described with respect to various embodiments, a "leaked" LO signal may be generated by applying a DC offset to a transmit mixer on one block, and the induced DC offset at a receiver in an adjacent block is measured by LO induced DC offset cancellation module 725. The DC value for the received I / Q signal is measured and processed internally via an on-chip analog-to-digital converter (ADC), such as ADC 726, for example, for I out The 505 and Q out 503 (from Figure 5 ). More specifically, the digitized I / QDC signals are measured to derive the relative phase difference of the LO signals in adjacent tiles to perform tile-to-tile self-alignment. Figure 8 A graphical representation of measured DC voltages for the I / Q signals obtained as a result of sweeping the LO signal phase from 0 degrees to 360 degrees is shown (shown as plots 803 and 805).

[0073] Calculating the relative phase and applying the phase correction parameters can be performed in many different ways and are contemplated by the teachings herein. In one embodiment, as described, each RFIC measures its own DC offset value, which can be used to calculate the relative phase. The DC offset value (originally analog) is converted to digital (e.g., in one embodiment via a digital input such as Figure 7The analog-to-digital conversion may be performed on-chip in each RFIC (converted by an on-chip ADC such as ADC 726 in the phased array), which may then be read via the digital interface of each RFIC. A central microprocessor, FPGA, etc. may then collect this data from all RFICs and may calculate the necessary phase information for all RFICs in the phased array system. It should be noted and will be apparent to those skilled in the art that the analog-to-digital conversion does not have to be performed on-chip in each RFIC. In one example, a central ADC may be used to perform this task outside of each RFIC. In another example, a modem may be used to calculate the relative phase and apply phase correction parameters. Other implementations will be apparent to those skilled in the art, with the primary consideration for any alternative being that signals and / or data must be collected between pairs of RFICs in order to calculate their relative phases, etc.

[0074] As noted in the foregoing description, the multi-block, self-alignment process is autonomous in that it does not require or involve any external equipment or components, but rather can achieve signal alignment across many blocks of the phased array by utilizing components and associated signal processing that are organic to the phased array blocks. The autonomous, self-alignment aspects of the described embodiments can be particularly beneficial to large-scale systems, such as those being and to be envisioned for next-generation 5G networks.

[0075] It should be noted that, for the sake of clarity of explanation, the illustrative embodiments described herein may be presented as including a combination of separate functional blocks or functional blocks. The functions represented by these blocks may be provided by using dedicated or shared hardware, including but not limited to hardware capable of executing software. Illustrative embodiments may include digital signal processor ("DSP") hardware and / or software that performs the operations described herein. Thus, for example, those skilled in the art will appreciate that the block diagrams herein represent conceptual diagrams of illustrative functions, operations and / or circuits of the principles described in the various embodiments herein. Similarly, it should be appreciated that any flow chart, job diagram, state transition diagram, pseudocode, program code, etc. represent various processes that can be substantially represented in a computer-readable medium and thus performed by a computer, machine or processor, regardless of whether such a computer, machine or processor is explicitly shown. Those skilled in the art will appreciate that the implementation of an actual computer or computer system may have other structures and may also include other components, and that the high-level representation of some components of such a computer is for illustrative purposes.

[0076] The above only illustrates the principle of the present disclosure. It will therefore be understood that those skilled in the art will be able to design various arrangements, which, although not explicitly described or shown herein, embody the principle of the present disclosure and are included in its spirit and scope. In addition, all examples and conditional language listed herein are primarily intended to be used only for teaching purposes, to help the reader understand the principle of the present disclosure and the concepts contributed by the inventor to advance this area, and will be interpreted as not being limited to these specifically listed examples and conditions. In addition, all statements describing the principles, aspects and embodiments of the present disclosure and their specific examples herein are intended to cover their structural and functional equivalents. In addition, such equivalents are intended to include currently known equivalents and equivalents developed in the future.

Claims

1. A method for aligning signals in a phased array antenna system, the phased array antenna system comprising a plurality of tiles, wherein each tile from the plurality of tiles comprises at least one transmitter and at least one receiver of a radio frequency signal, the method comprising: generating a first local oscillator signal at a first block among the plurality of blocks and generating a second local oscillator signal at a second block among the plurality of blocks; transmitting the first local oscillator signal to a first receiving antenna corresponding to the second block via a first transmitting antenna corresponding to the first block; transmitting the second local oscillator signal to a second receiving antenna corresponding to the first block via a second transmitting antenna corresponding to the second block; measuring a phase of the first local oscillator signal at the second block and a phase of the second local oscillator signal at the first block, wherein the measuring comprises: sweeping the phase of the first local oscillator signal from the first block to generate a first plurality of phase measurements at the second block, wherein the first plurality of phase measurements are linearly approximated to form a first phase linear plot; sweeping the phase of the second local oscillator signal from the second block to generate a second plurality of phase measurements at the first block, wherein the second plurality of phase measurements are linearly approximated to form a second phase linear plot; and determining a phase difference based on the first phase linear plot line and the second phase linear plot line, The first block is adjacent to the second block, the first transmit antenna is electrically coupled to the first receive antenna, and the second transmit antenna is electrically coupled to the second receive antenna.

2. The method according to claim 1, further comprising: The phase of one of the first local oscillator signal at the second block and the second local oscillator signal at the first block is adjusted by an amount corresponding to the phase difference. 3 . The method of claim 1 , wherein the determining of the phase difference is performed at a time corresponding to a system startup of the phased array antenna system. 4 . The method of claim 1 , wherein sweeping the phase of the first local oscillator signal and sweeping the phase of the second local oscillator signal comprises sweeping the phase from 0 to 360 degrees. 5 . The method according to claim 1 , wherein the first local oscillator signal is generated internally in the first block and the second local oscillator signal is generated internally in the second block.

6. The method according to claim 5, further comprising: mixing the first local oscillator signal with a first signal having a constant DC voltage value to generate a first local oscillator induced DC offset signal; as well as The second local oscillator signal is mixed with a second signal having a constant DC voltage value to generate a second local oscillator induced DC offset signal.

7. The method of claim 6, wherein measuring the phase of the first local oscillator signal at the second block and measuring the phase of the second local oscillator signal at the first block are performed using digitization terms associated with a DC offset cancellation function.

8. A system for aligning signals in a phased array antenna system, the phased array antenna system comprising at least a first block and a second block positioned adjacent to the first block, wherein the first block and the second block each comprise at least one transmitter and at least one receiver of a radio frequency signal, the system comprising: a first local oscillator circuit configured to generate a first local oscillator signal at the first block; a second local oscillator circuit configured to generate a second local oscillator signal at the second block; a first transmitting antenna, corresponding to the first block, configured to transmit the first local oscillator signal to a first receiving antenna corresponding to the second block, the first transmitting antenna being electrically coupled to the first receiving antenna; a second transmitting antenna, corresponding to the second block, configured to transmit the second local oscillator signal to a second receiving antenna corresponding to the first block, the second transmitting antenna being electrically coupled to the second receiving antenna; a first baseband circuit, corresponding to the first block, configured to measure the phase of the second local oscillator signal; a second baseband circuit, corresponding to the second block, configured to measure the phase of the first local oscillator signal; as well as a first phase shifter coupled to the first local oscillator circuit, and the first phase shifter is configured to sweep the phase of the first local oscillator signal from the first block to generate a first plurality of phase measurements at the second block, wherein the first plurality of phase measurements are linearly approximated to form a first phase linear plot; a second phase shifter coupled to the second local oscillator circuit and configured to sweep the phase of the second local oscillator signal from the second block to generate a second plurality of phase measurements at the first block, wherein the second plurality of phase measurements are linearly approximated to form a second phase linear plot; as well as A processor is configured to calculate a phase difference based on the first phase-linear plot and the second phase-linear plot.

9. The system of claim 8, wherein the processor is further configured to communicate with the first local oscillator circuit and the second local oscillator circuit to enable adjusting the phase of one of the first local oscillator signal and the second local oscillator signal by an amount corresponding to the phase difference.

10. The system of claim 8, wherein the processor is configured to calculate the phase difference at a time corresponding to a system startup of the phased array antenna system.

11. The system of any one of claims 8 to 10, wherein the first local oscillator signal is generated internally within the first block and the second local oscillator signal is generated internally within the second block, and wherein: The first baseband circuit further includes a first switch for selectively generating the first local oscillator signal; and The second baseband circuit further includes a second switch for selectively generating the second local oscillator signal.

12. The system of claim 11, wherein: The first baseband circuit further includes a first mixer configured to mix the first local oscillator signal with a first signal having a constant DC voltage value to generate a first local oscillator induced DC offset signal; and The second baseband circuit also includes a second mixer configured to mix the second local oscillator signal with a second signal having a constant DC voltage value to generate a second local oscillator induced DC offset signal.

13. The system of claim 12, wherein: The first baseband circuit further includes a first DC offset cancellation circuit configured to measure a phase of the second local oscillator signal; and The second baseband circuit also includes a second DC offset cancellation circuit configured to measure a phase of the first local oscillator signal.

14. A system for performing alignment in a phased array antenna configuration, wherein the phased array antenna system comprises at least a first block and a second block positioned adjacent to the first block, wherein the first block and the second block each comprise at least one transmitter and at least one receiver of radio frequency signals, the system comprising a processor, the processor being configured to execute computer program instructions stored in a memory, which when executed by the processor cause the system to perform operations comprising: setting a first value for at least one baseband signal input associated with a first transmitter in the first block and a second value for at least one baseband signal input associated with a second transmitter in the second block, the first value and the second value being constant DC voltage values; mixing the at least one baseband signal input associated with the first transmitter with a first local oscillator signal to generate a first local oscillator induced DC offset signal for up-conversion by the first transmitter and transmission to the second block; mixing the at least one baseband signal input associated with the second transmitter with a second local oscillator signal to generate a second local oscillator induced DC offset signal for up-conversion by the second transmitter and transmission to the first block; down-converting a first signal transmitted from the first transmitter to generate one or more DC voltage values ​​in a baseband block of the second block; down-converting the first signal transmitted from the second transmitter to generate one or more additional DC voltage values ​​in a baseband block of the first block; sweeping a phase of the first local oscillator signal from the first block to generate a first plurality of phase measurements at the second block, wherein the first plurality of phase measurements are linearly approximated to form a first phase linear plot; sweeping a phase of the second local oscillator signal from the second block to generate a second plurality of phase measurements at the first block, wherein the second plurality of phase measurements are linearly approximated to form a second phase linear plot; calculating a phase difference based on the first phase linear plot line and the second phase linear plot line; as well as The phase of the first local oscillator signal is calculated based on the one or more DC voltage values ​​associated with one or more baseband signal outputs derived from a DC offset cancellation function at the second block.

15. The system of claim 14, wherein the operations further comprise: setting a value for at least one baseband signal input associated with a second transmitter in the second block, the value of the at least one baseband signal input associated with a second transmitter in the second block being a constant DC voltage value; mixing at least one baseband signal input associated with the second transmitter with a second local oscillator signal to generate a second local oscillator induced DC offset signal for up-conversion by the second transmitter and transmission to the second block; down-converting the first local oscillator-induced DC offset signal transmitted from the second transmitter to generate one or more DC voltage values ​​in a baseband block of the first block; as well as The phase of the second local oscillator caused DC offset signal is calculated based on the one or more DC voltage values ​​associated with one or more baseband signal outputs derived from a DC offset cancellation function at the first block.

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