Security components and preloading methods

Abstract

The present disclosure provides a security component and a preloading method. The security component includes a memory, a plurality of registers and a preloading management device, wherein the memory stores a plurality of items to be configured, and the preloading management device is started after the security component is powered on, and includes: the random number generator for generating a random code, wherein the random code is used to indicate the corresponding configuration item of the plurality of items to be configured; and the preloading controller for reading the corresponding configuration item according to the random code, and loading the corresponding configuration item into the corresponding register of the plurality of registers. The security component provided by the embodiment of the present disclosure randomly loads the corresponding items to be configured into the corresponding register through a random code, so that the loading time of all items to be loaded is unpredictable, and the implementation of this step is performed immediately after the security component is powered on, and the startup of other components is all after this step, thereby improving the security of the security component.

Description

Technical Field

[0001] The present disclosure relates to the field of trusted computing, and in particular to a security component and a preloading method. Background Art

[0002] A security chip is an integrated circuit chip that implements one or more cryptographic algorithms, directly or indirectly using cryptographic techniques to protect root keys and sensitive information. Security chips typically have independent microprocessors and memory units, where root keys and sensitive information are stored. Currently, security chips are increasingly being used in smart devices, providing reliable protection for financial payments and online identity authentication.

[0003] The usual startup process of a security chip is as follows: Figure 1 As shown, the process includes power-on reset release S110, preloading S120, root key decryption S130, key derivation S140, bus reset release S150, and processor reset release S160. Power-on reset release S110 resets all components to their initial states. Preloading S120 loads the root key and security configuration information stored in the security chip into the storage unit. Root key decryption S130 extracts the root key from the security chip. Key derivation S140 derives application keys subsequently used in other steps. Bus reset release S150 and processor reset release S160 reset the bus and processor to their initial states. Preloading S120 is a crucial process for the security chip to start up. Other chip components must operate only after the preloading process is complete, ensuring that the entire chip's operating environment is controlled by the security chip's security configuration. Furthermore, it is necessary to ensure that the entire preloading process is secure and controllable, preventing physical attacks against the security chip from obtaining or tampering with the root key and security configuration information stored in the security chip.

[0004] However, existing technologies do not provide specific protection for preloading. Therefore, if the security chip is physically attacked during the preloading process, the preloading process will become untrustworthy, and the subsequent operating environment of the entire chip will become untrustworthy. For example, electromagnetic radiation may cause certain security configuration steps to not be executed or the root key to be tampered with. Summary of the Invention

[0005] Based on this, the purpose of the present disclosure is to provide a security component for providing special protection measures for the preloading process of the system to improve the credibility of the preloading result.

[0006] In a first aspect, an embodiment of the present disclosure provides a security component, including a memory, a plurality of registers, and a preload management device, wherein the memory stores a plurality of items to be configured, and the preload management device is started after the security component is powered on, including:

[0007] The random number generator is used to generate a random code, where the random code is used to indicate a corresponding configuration item of the multiple items to be configured;

[0008] The preloading controller is configured to read the corresponding configuration item according to the random code, and load the corresponding configuration item into a corresponding register of the plurality of registers.

[0009] Optionally, the preloading management device includes a preloading counter, which counts the loading of the preloading controller. The preloading controller also maintains a preloading status table, which includes multiple data items, each data item is used to represent whether the corresponding to-be-configured item has been loaded into the corresponding register. The preloading controller determines whether the multiple to-be-configured items have all been loaded based on the preloading status table and the count value of the preloading counter, and judges whether the preloading process is complete based on this. If the preloading process is incomplete, the preloading controller controls the security component to restart.

[0010] Optionally, the memory further stores a plurality of check words, and the preload controller is further configured to read the plurality of check words for verification, and determine whether it is necessary to control the embedded system to be powered on again according to the verification result.

[0011] Optionally, the random code is further used to indicate a corresponding check word of the multiple check words, and the preloading controller reads the corresponding check code according to the random code for verification.

[0012] Optionally, the random code further includes an identifier for characterizing verification or loading, and the preloading controller randomly performs verification or loading operations based on a judgment of the random code.

[0013] Optionally, the multiple check words correspond to the multiple items to be configured one by one, and the preloading controller checks whether the multiple items to be configured are correct according to the multiple check words.

[0014] Optionally, the multiple check words and the multiple items to be configured are stored in a dispersed manner in the memory.

[0015] Optionally, the memory is a read-only memory.

[0016] Optionally, the read-only memory is a one-time programmable memory.

[0017] Optionally, a processing unit is further included, the multiple registers are located inside the processing unit, and the processing unit uses the multiple items to be configured to complete system startup.

[0018] Optionally, the random number generator and the preload controller are integrated into the processing unit.

[0019] Optionally, the multiple items to be configured include a root password and security configuration information. The preloading controller loads the root password into a password register and loads the security configuration information into a control register. During the startup process, the processing unit executes cryptographic algorithm processing and program instructions for security configuration.

[0020] Optionally, the security component is integrated into a system on a chip.

[0021] Optionally, the security component can be applied to the following products: vehicle-mounted terminals, smart homes, consumer electronics, robot controllers, programmable controllers, financial service terminals, and video conferencing terminals.

[0022] In a second aspect, an embodiment of the present disclosure provides an embedded system, comprising any of the security components described above.

[0023] In a third aspect, an embodiment of the present disclosure provides a computer system comprising any of the security components described above.

[0024] In a fourth aspect, an embodiment of the present disclosure provides a system on chip, comprising any of the security components described above.

[0025] In a fifth aspect, an embodiment of the present disclosure provides a preloading method, wherein a preloading process is performed after the system is powered on, the preloading process comprising the following steps repeatedly performed for the multiple items to be configured:

[0026] Obtaining a random code, where the random code is used to indicate a corresponding configuration item of a plurality of to-be-configured items;

[0027] The corresponding configuration item is read according to the random code, and the corresponding configuration item is loaded into a corresponding register of the plurality of registers.

[0028] Optionally, the preloading method further includes

[0029] Count load operations;

[0030] Maintaining a preload status table, the preload status table including a plurality of data items, each data item being used to indicate whether the corresponding item to be configured has been loaded into the corresponding register;

[0031] It is determined whether all of the plurality of items to be configured have been loaded according to the preloading status table and the loading count value, and whether the preloading process is complete is judged accordingly.

[0032] Optionally, the preloading method further includes: reading a plurality of pre-stored check words for verification to determine whether the preloading process is normal.

[0033] Optionally, the random code is further used to indicate a corresponding check word of the multiple check words, and the preloading method further includes: reading the corresponding check code for verification according to the random code.

[0034] Optionally, the random code further includes an identifier for characterizing verification or loading, and the preloading method further includes: judging the random code and randomly performing a verification or loading operation.

[0035] Optionally, the multiple check words correspond to the multiple items to be configured one by one, and the preloading method further includes: checking whether the multiple items to be configured are correct according to the multiple check words.

[0036] Optionally, the multiple items to be configured are stored in a read-only memory.

[0037] Optionally, the preloading method is executed after the embedded system or the computer system is powered on.

[0038] The security component provided by the disclosed embodiments utilizes random codes to randomly load corresponding configuration items into corresponding registers, making the loading time of all loaded items unpredictable. Furthermore, this step is performed immediately after the security component is powered on, and other components are loaded after this step, thereby improving the security of the security component. Furthermore, the security component can be integrated into embedded systems, computer systems, or system-on-chips. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] The above and other objects, features and advantages of the present disclosure will become more apparent through description of the embodiments of the present disclosure with reference to the following drawings, in which:

[0040] Figure 1 Shows the normal startup process of the security chip;

[0041] Figure 2 A schematic diagram showing an exemplary network structure;

[0042] Figure 3 A schematic diagram illustrating a computer system including a security component according to an embodiment of the present disclosure;

[0043] Figure 4 A schematic diagram illustrating an embedded system including a security component according to an embodiment of the present disclosure;

[0044] Figure 5a and 5b Schematic diagram showing two integration methods of a system on chip and a security chip according to an embodiment of the present disclosure;

[0045] Figure 6a is an exemplary structural diagram of a security component provided by an embodiment of the present disclosure;

[0046] Figure 6b is another exemplary structural diagram of a security component provided by an embodiment of the present disclosure;

[0047] Figure 7 yes Figure 6a A structural diagram of an embodiment of a preloading management device is shown;

[0048] Figure 8 yes Figure 6a A structural diagram of another embodiment of a preload management device is shown;

[0049] Figure 9 shows an exemplary random code data structure diagram;

[0050] Figure 10a and 10b This is a flowchart of the preloading method provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0051] The present disclosure is described below based on examples, but the present disclosure is not limited to these examples. Certain specific details are described in detail in the detailed description of the present disclosure below. Those skilled in the art will appreciate that the present disclosure is fully understood without these details. To avoid obscuring the essence of the present disclosure, well-known methods, processes, and procedures have not been described in detail. The accompanying drawings are not necessarily drawn to scale.

[0052] Figure 2 Figure 2 shows a schematic diagram of the network structure. Figure 2 As shown, various terminals 201 establish communication with a data center 203 via a network 203. Terminals 201 are various electronic devices using computer systems, such as personal computers, mobile phones, laptops, mobile terminals, and the like. Network 203 can be based on one or a combination of various communication technologies implemented by exchanging signals, including but not limited to wired technologies using electrical and / or optical cables, and wireless technologies using infrared, radio frequency, and / or other forms. In different application scenarios, network 203 can be the Internet, a wide area network, or a local area network, such as a company's proprietary network. Network 203 can also be a wired network or a wireless network.

[0053] Data center 203 contains a large number of servers 140 for actual processing. Servers 140 are hardware entities that provide computing and storage capabilities to users or various application systems. Virtualization technology can be used to integrate the hardware and software resources of each server 140 into a resource pool. Based on this resource pool, computing power, storage capacity, or virtual machine services are provided to users or various application systems on demand. In this case, servers 140 are referred to as cloud servers.

[0054] Access switches 130 are used to connect servers 140 to the data center. One access switch 130 connects to multiple servers 140. Access switches 130 are typically located at the top of a rack, and are therefore also called top-of-rack switches. They physically connect to the servers.

[0055] Each aggregation switch 120 connects to multiple access switches 130 and provides other services, such as firewall, intrusion detection, network analysis, etc.

[0056] Core switch 110 provides high-speed forwarding for packets entering and leaving the data center and connectivity for aggregation switch 120. The entire data center network is divided into an L3 routing network and an L2 routing network. Core switch 110 generally provides a flexible L3 routing network for the entire data center network.

[0057] Typically, aggregation switch 120 is the demarcation point between the L2 and L3 routing networks. The network below aggregation switch 120 is the L2 network, and the network above it is the L3 network. Each aggregation switch group manages a point of delivery (POD), each of which is an independent VLAN network. Servers can migrate within a POD without changing their IP addresses or default gateways, as each POD corresponds to a single L2 broadcast domain.

[0058] The Spanning Tree Protocol (STP) is typically used between aggregation switches 120 and access switches 130. STP ensures that only one aggregation switch 120 is available for a given VLAN network, with other aggregation switches 120 being used only in the event of a failure (dashed lines in the figure above). This means that horizontal scalability is impossible at the aggregation switch 120 level because even if multiple aggregation switches 120 are added, only one is still operational.

[0059] Although the functions, appearance interfaces, operating systems, etc. of the terminal 201 and the server 140 are different, or even vary greatly, the basic hardware structure of the terminal 201 and the server 140 is a universal computer architecture. Figure 3 This general computer architecture is shown in FIG. Figure 3 As shown, computer system 10 may include one or more processors 12 , and memory 14 .

[0060] The memory 14 in the computer system 10 may be a main memory (abbreviated as main memory or internal memory). It is used to store instruction information and / or data information represented by data signals, such as storing data provided by the processor 12 (e.g., calculation results). It can also be used to implement data exchange between the processor 12 and an external storage device 16 (also called auxiliary memory or external memory).

[0061] In some cases, the processor 12 may need to access the memory 14 to obtain data in the memory 14 or modify the data in the memory 14. Since the access speed of the memory 14 is slow, in order to alleviate the speed gap between the processor 12 and the memory 14, the computer system 10 also includes a cache memory 18 coupled to the bus 11. The cache memory 18 is used to cache some program data or message data in the memory 14 that may be repeatedly called. The cache memory 18 is implemented by a storage device such as a static random access memory (SRAM). The cache memory 18 can be a multi-level structure, such as a three-level cache structure with a first-level cache (L1Cache), a second-level cache (L2Cache) and a third-level cache (L3Cache), or a cache structure with more than three levels or other types of cache structures. In some embodiments, a portion of the cache memory 18 (such as the first-level cache, or the first-level cache and the second-level cache) can be integrated into the processor 12 or integrated into the same system on a chip as the processor 12.

[0062] Based on this, the processor 12 may include an instruction execution unit 121, a memory management unit 122, and other components. When executing instructions that require memory modification, the instruction execution unit 121 initiates a write access request, which specifies the write data to be written into the memory and the corresponding physical address. The memory management unit 122 is configured to translate the virtual addresses specified by these instructions into physical addresses mapped to the virtual addresses. The physical addresses specified by the write access request may be consistent with the physical addresses specified by the corresponding instructions.

[0063] The information exchange between memory 14 and cache memory 18 is typically organized in blocks. In some embodiments, cache memory 18 and memory 14 can be divided into data blocks of the same spatial size. A data block can serve as the minimum unit of data exchange between cache memory 18 and memory 14 (including one or more data of a preset length). For the sake of brevity and clarity, each data block in cache memory 18 is referred to as a cache block (which may also be referred to as a cache line or cache line), and different cache blocks have different cache block addresses; each data block in memory 14 is referred to as a memory block, and different memory blocks have different memory block addresses. A cache block address, for example, includes a physical address tag used to locate the data block.

[0064] Due to space and resource constraints, cache memory 18 cannot cache all the contents of memory 14. Specifically, the storage capacity of cache memory 18 is typically smaller than that of memory 14, and the cache block addresses provided by cache memory 18 cannot correspond to all the memory block addresses provided by memory 14. When processor 12 needs to access memory, it first accesses cache memory 18 via bus 11 to determine whether the content to be accessed is already stored in cache memory 18. If so, it is a cache hit, and processor 12 directly retrieves the content to be accessed from cache memory 18. If the content to be accessed is not in cache memory 18, processor 12 needs to access memory 14 via bus 11 to search for the corresponding information in memory 14. Because cache memory 18 has a very fast access rate, a cache hit significantly improves the efficiency of processor 12, thereby enhancing the performance and efficiency of the entire computer system 10.

[0065] In addition, the computer system 10 may also include input / output devices such as a storage device 16, a display device 13, an audio device 14, and a mouse / keyboard 15. The storage device 16 may be, for example, a hard disk, an optical disk, or a flash memory device coupled to the bus 11 via a corresponding interface for storing and accessing information. The display device 13 may be coupled to the bus 11 via a corresponding graphics card, for example, for displaying information based on display signals provided by the bus 11.

[0066] The computer system 10 typically also includes a communication device 17, so that it can communicate with a network or other devices in various ways. The communication device 17 may include, for example, one or more communication modules. As an example, the communication device 17 may include a wireless communication module suitable for a specific wireless communication protocol. For example, the communication device 17 may include a WLAN module for implementing Wi-Fi™ communication that complies with the 802.11 standard established by the Institute of Electrical and Electronics Engineers (IEEE); the communication device 17 may also include a WWAN module for implementing wireless wide area communication that complies with cellular or other wireless wide area protocols; the communication device 17 may also include a communication module that uses other protocols, such as a Bluetooth module, or other custom types of communication modules; the communication device 17 may also be a port for serial data transmission.

[0067] Of course, the structure of different computer systems may vary depending on the motherboard, operating system, and instruction set architecture. For example, many current computer systems are equipped with an input / output control center connected between the bus 11 and various input / output devices, and the input / output control center can be integrated into the processor 12 or independent of the processor 12.

[0068] The figure also shows a security component 19 for implementing embodiments of the present disclosure. As shown, security component 19 is integrated within computer system 10 and communicates with other components via bus 11. For example, security component 19 can be coupled to computer system 10 via a printed circuit board or various boards. Security component 19 can serve as a trusted platform module, allowing important information and operations with high security requirements to be performed within security component 19. For example, password generation operations can be performed within security component 19. For example, a root key stored in security component 19 can be used in one computer system 10 to generate a public key and a private key. The private key is then used to encrypt important data, and the public key is published. The encrypted important data is then transmitted to another computer system 10, where the corresponding public key is retrieved and decrypted using the public key to retrieve the important data. In this way, all cryptographic processing is performed within security component 19, thereby improving security. For another example, root passwords and security configuration information can be stored within security component 19, such as storing BIOS configuration information. After the security chip is booted, this configuration information is read and used to verify the actual runtime configuration information of the BIOS to determine whether the BIOS has been correctly booted. The specific structure and function of the security component 19 provided in the embodiment of the present disclosure will be described in detail below.

[0069] The security component 19 provided in the embodiment of the present disclosure can also be applied to electronic devices of embedded systems, such as various consumer electronic products, IoT devices, mobile terminals, smart homes, robot controllers, vehicle-mounted terminals, industrial control devices, and the like. Figure 4 A system architecture diagram of an embedded system 400 is shown.

[0070] Although embedded systems are highly similar to computer systems in hardware structure, the characteristics of embedded system applications make them quite different from general computer systems in hardware composition and implementation.

[0071] First, in order to meet the requirements of the embedded system 400 in terms of speed, volume and power consumption, the operating system, application software, special data and other data that need to be stored for a long time usually do not use a storage medium with large capacity and slow speed such as a disk, but mostly use a random access memory 402 or a flash memory 403, such as Figure 1 shown.

[0072] In addition, embedded system 400 requires an A / D (analog / digital conversion) interface 405 and a serial interface 406 for measurement and control purposes, which are rarely used in general-purpose computers. A / D interface 405 primarily performs the conversion of analog signals into digital signals and digital signals into analog signals required for testing. Embedded system 400 often requires testing when used in industrial production. Since the single-chip microcomputer generates digital signals, they need to be converted into analog signals for testing. Therefore, unlike general-purpose computers, an A / D (analog / digital conversion) interface 405 is required to perform the relevant conversions. Furthermore, industry often requires multiple embedded systems to be connected in series to perform related functions, thus requiring a serial interface 406 for connecting multiple embedded systems in series, which is generally not required in general-purpose computers.

[0073] In addition, as a basic processing unit, embedded system 400 often requires connecting multiple embedded systems 400 to a network in industrial design. Therefore, a network interface 407 is required to connect the embedded system 400 to the network. This is not usually required in general-purpose computers. In addition, depending on the actual application and scale, some embedded systems 400 need to use an external bus 404. With the rapid expansion of the application field of embedded systems 400, embedded systems 400 are becoming more and more personalized, and the types of buses used according to their own characteristics are also increasing. In addition, in order to test the internal circuits of embedded processor 401, processor chips generally use boundary scan testing technology. To adapt to this test, a debug interface 408 is used.

[0074] As shown in the figure, security component 19 communicates with other components via bus 11. For example, security component 19 is secured to embedded system 400 via soldering. As a trusted platform module, security component 19 provides a higher level of security than other components of the embedded system. Therefore, some important information and some fixed, critical operations within the embedded system are placed in the security chip. In addition to placing the root password and security configuration information and password generation operations in security component 19 as described above, operations such as payment verification can also be placed in security component 19.

[0075] With the rapid development of very large scale integration (VLSI) and semiconductor technology, part or all of the above embedded systems can be implemented on a single silicon chip, namely an embedded system on chip (SoC).

[0076] Figure 5a is a schematic diagram of an exemplary embedded system-on-chip (SoC). As shown, SoC 500 includes an arithmetic logic unit (ALU) 501, registers 502, and a control unit 503. ALU 501 performs actual computations. Registers 502 store instructions and intermediate results during computations. Control unit 503 controls access to external RAM 511 and flash memory 512.

[0077] When executing an instruction to be executed, ALU 501 moves the instruction to be executed from RAM 511 or flash memory 512 to register 502, and receives the next instruction fetch address or calculates the next instruction fetch address according to an instruction fetch algorithm. The instruction fetch algorithm includes, for example, increasing or decreasing the address according to the instruction length.

[0078] After fetching the instruction, the ALU 501 enters the instruction decoding stage. It decodes the fetched instruction according to the predetermined instruction format to obtain the operand fetch information required for the instruction, thereby preparing for instruction execution. The operand fetch information may, for example, point to an address in RAM 511 or flash memory 512. After decoding, the ALU retrieves the operand stored in RAM 511 or flash memory 512 according to the operand fetch information and executes the operation.

[0079] When executing certain instructions (eg, memory access instructions), the ALU 501 needs to access the RAM 511 or the flash memory 512 to obtain information stored therein or provide data to be written into the RAM 511 or the flash memory 512 .

[0080] After the memory access instruction is retrieved by the ALU 501, the ALU 501 may decode the memory access instruction to obtain the source operand of the memory access instruction. The ALU 501 may perform a corresponding operation on the source operand of the memory access instruction (for example, the arithmetic logic unit may perform an operation on the source operand stored in a register) to obtain the address information corresponding to the memory access instruction, and initiate a corresponding request based on the address information, such as an address translation request or a write access request.

[0081] The source operand of a memory access instruction typically includes an address operand. ALU 501 operates on this address operand to obtain a virtual address corresponding to the memory access instruction. Based on this virtual address, ALU 501 initiates an address translation request to control unit 503. This address translation request includes the virtual address corresponding to the address operand of the memory access instruction. Control unit 503 responds to the address translation request and, based on a table entry matching the virtual address, converts the virtual address in the address translation request into a physical address, allowing ALU 501 to access RAM 511 or flash memory 512 based on the translated physical address.

[0082] Depending on their functions, memory access instructions may include load instructions and store instructions. The execution of a load instruction generally does not require modifying the information in RAM 511 or flash memory 512. ALU 501 only needs to read data stored in RAM 511, flash memory 512, or an external storage device based on the address operand of the load instruction.

[0083] Unlike load instructions, the source operand of a store instruction includes not only an address operand but also data information. The execution of a store instruction typically requires modifying RAM 511 or flash memory 512. The data information of a store instruction can point to write data, which can be the execution result of an instruction such as a calculation instruction or a load instruction, data in register 502, or an immediate value.

[0084] As shown in the figure, security component 19 is located outside of system-on-chip 500 and is in communication with registers 502 and control unit 503. Security component 19 can be used to enhance the security of the system-on-chip. For example, it can be used to control the startup process of system-on-chip 500. Specifically, when system-on-chip 500 is powered on and started, control unit 503 transfers process control to security component 19. Security component 19 executes a firmware program through its internal processor to load security configuration information into various registers. Control unit 503 then receives process control and starts the system-on-chip according to the security configuration information.

[0085] Figure 5b FIG is a schematic diagram of an exemplary embedded system on chip (SoC). As shown in the figure, the system on chip 510 has Figure 5aThe same arithmetic logic unit (ALU) 501, registers 502 and control unit 503. The difference is that in this example, the security component 19 is integrated inside the system on chip 510.

[0086] Furthermore, the aforementioned security component can be used as a standalone device, connected to the aforementioned system via an external interface such as USB for security protection. Such a security component, or a system including such a security component, can be used in application scenarios requiring high system security and high pre-loading speed, such as financial payments, online identity authentication, copyright protection, consumables tracking, device authentication, industrial control, video conferencing, medical services, and gaming authentication.

[0087] Figure 6a This is an exemplary structural diagram of the security component provided by an embodiment of the present disclosure. As shown in the figure, the security component 60 includes a processing unit 601, a read-only memory 602, a random access memory 603, a flash memory 604, an I / O interface 605, a clock circuit 621, a reset circuit 622 and a preload management device 611. The clock circuit 621 and the reset circuit 622 are structures and functions in the usual sense, and are not described here. The read-only memory 602 generally stores fixed program code, such as an operating system (OS), a kernel, and a device driver. The random access memory 603 stores the running program code and the data to be used. The flash memory 604 generally stores applications and data. The I / O interface 605 provides an input and output interface for communicating with external devices.

[0088] The cryptographic algorithm module 612 contains program instructions related to cryptographic technology, such as password generation, encryption and decryption. The processing unit 601 can be a variety of processor types, such as a microprocessor, microcontroller, processor, graphics processor, and acceleration unit. After the preload management device 611 completes its operations, the processing unit 601 can read and execute the program instructions.

[0089] The preloading management device 611 is a hardware module for implementing the preloading solution of the embodiment of the present disclosure, and is used to load the configuration items into registers (not shown in the figure), such as registers within the processing unit 601 or registers within a processing unit outside the security component. The preloading management device 611 is activated after the security component 60 is powered on. Other components such as the processing unit 601, read-only memory 602, random access memory 603, flash memory 604, I / O interface 605, clock circuit 621, reset circuit 622, etc. must be activated only after the operation of the preloading management device 611 is completed. This ensures that the operating environment of the entire system is controlled by the security configuration of the preloading management device 611.

[0090] Read-only memory 602 can be further categorized into the following types: Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), and Electrically Erasable Programmable Read-Only Memory (EEEPROM). PROM is also known as One-Time Programmable Memory (OTP), which can only be written to once and cannot be modified. EPROM can be repeatedly erased and written to, overcoming the drawback of PROM, which can only be written to once. However, EPROM erase operations require an EPROM eraser. EEEPROM can be erased and reprogrammed (rewritten) using voltages higher than normal.

[0091] As described in the background art, sensitive information and root keys can be stored in the read-only memory 602 and loaded into a register (not shown) after the secure element is started. To prevent sensitive information and root keys from being tampered with, the read-only memory 602 can also be a programmable read-only memory (PROM).

[0092] It should be noted that Figure 6a The illustrated security component structure diagram is for illustrative purposes only and is not intended to limit the actual structure of the security component. In product design and manufacturing, designers may intentionally adjust the hardware and software architecture based on various factors, such as the specific purpose, manufacturing process, and economic benefits. For example, they may replace random access memory 603 and flash memory 604 with other memory for power consumption and price reasons, or remove the cryptographic algorithm module 612 if cryptographic processing is not required.

[0093] Figure 6b is another exemplary structural diagram of the security component provided by the embodiment of the present disclosure. Figure 6a The difference is that the preload management device 611 is integrated into the processing unit 601. After the security component 60 is powered on, the preload management device 611 is first started. Other components in the processing unit 601, such as the read-only memory 602, random access memory 603, flash memory 604, I / O interface 605, clock circuit 621, reset circuit 622, etc., must not start until the preload management device 611 has completed its operation. This ensures that the operating environment of the entire system is controlled by the security configuration of the preload management device 611.

[0094] In addition, the above-mentioned security component may be implemented as an embedded system or a system on a chip. When implemented as a system on a chip, the security component may be further implemented as the security chip described in the background art.

[0095] In addition, when the above-mentioned security component is integrated into an embedded system or a computer system, the security component can be set to start after the system is powered on and can serve as the starting point for system startup.

[0096] Figure 7 yes Figure 6a The structure diagram of an embodiment of the preloading management device shown in FIG. As shown in the figure, the read-only memory 616 stores multiple items 1-n to be loaded. Here, the read-only memory 616 and Figure 6a The read-only memories 602 can be the same or different read-only memories. The preload management device 611 is used to read multiple items 1-n to be loaded and store them in multiple registers respectively. Depending on the different meanings of the items to be loaded, different registers within the security component 60 are used to store the corresponding items to be loaded. For example, if the item to be loaded is a root key, the key register is used. If the item to be loaded is multiple security configuration information, the multiple security configuration information is stored in corresponding control registers of the multiple control registers. The processing unit 601 can perform cryptographic algorithm processing according to the program instructions stored in the memory and perform security configuration using the security configuration information when the system is started.

[0097] As shown in the figure, the preload management device 611 includes a random number generator 612 and a preload controller 614. The random number generator 612 is used to generate a random code. The preload controller 614 determines the loading order of multiple items 1-n to be loaded based on the random code. More specifically, the random number generator 612 is capable of generating the same number of random codes as the number of items to be loaded. The preload controller 614 maintains a matching rule between random codes and items to be loaded. Upon receiving a random code, the preload controller determines the corresponding item to be loaded based on the matching rule and stores it in the corresponding register.

[0098] The following describes the operating sequence of random number generator 612 and preload controller 614 in more detail. First, random number generator 612 is activated and generates a first random code. Preload controller 614 uses the first random code to find the item to be loaded corresponding to the first random code from the matching rules between random codes and items to be loaded, and loads the item. Random number generator 612 continues to operate and generates a second random code. Preload controller 614 uses the second random code to find the item to be loaded corresponding to the second random code from the matching rules between random codes and items to be loaded, and loads the item. This continues in this order.

[0099] Based on the above content, it can be seen that since the operation of the random number generator is uncontrollable, the loading time of all items to be loaded is unpredictable, thereby improving the security of the loading process.

[0100] As an optional embodiment, as shown in the figure, the preload management device 611 further includes a preload counter 613. The preload counter 613 is used to count the loads of the preload controller 614. Each time the preload controller 614 loads an item to be loaded into the register, the preload counter 613 increases the number of loads by 1. The preload controller 614 determines in real time whether the number of loads of the preload counter 613 is equal to the number of items to be loaded. If the number of loads of the preload counter 613 is equal to the number of items to be loaded, control is transferred to the next processing module. If the number of loads of the preload counter 613 is not equal to the number of items to be loaded, an alarm is issued and the safety component is set to return to the initial state to repeat the power-on startup process, or a system abnormality is directly prompted.

[0101] As an optional embodiment, as shown in the figure, the preloading controller 614 also maintains a preloading status table. The preloading status table includes a plurality of data items C0-Cn that are the same in number as the plurality of items to be loaded and correspond to each other. Each data item stores the current status of the corresponding item to be loaded. For example, 0 is used to indicate that the corresponding item to be loaded has not been loaded, and 1 is used to indicate that the corresponding item to be loaded has been loaded. The preloading management device 611 modifies the value of the corresponding data item in the preloading status table each time it loads an item to be loaded. The preloading controller 614 checks the value of each data item in the preloading status table in real time to determine whether the preloading process is complete, that is, whether all items to be loaded have been loaded. When the preloading controller 614 determines that the preloading process is complete, it transfers control to the next processing module. If it determines that the preloading process is incomplete, it issues an alarm message and sets the security chip back to the initial state to repeat the power-on startup process, or simply directly prompts a system abnormality.

[0102] As an optional embodiment, the preloading management device 611 can use the preloading status table and the preloading counter 613 to jointly determine whether the preloading process is complete. Specifically, the preloading controller 614 determines in real time whether the number of loading times of the preloading counter 613 is equal to the number of items to be loaded. If the number of loading times of the preloading counter 613 is equal to the number of items to be loaded, the value of each data item in the preloading status table is continuously checked to determine whether the corresponding items to be loaded have all been loaded. If the number of loading times is equal to the number of items to be loaded and it can be determined through the preloading status table that multiple items to be loaded have all been loaded, the control right is handed over to the next processing module. If at least one of them is not met, an alarm message is given and the safety component is set back to the initial state to repeat the power-on startup process, or only a direct prompt of system abnormality is given.

[0103] As an optional embodiment, the number of random codes generated by the random number generator 612 may be more than the number of items to be loaded. Since the preloading controller 614 maintains the corresponding rules between random codes and items to be loaded, when the random code received by the preloading controller 614 cannot find the corresponding item to be loaded in the corresponding rules, the preloading controller 614 is in a dormant state to wait for the next random code.

[0104] Based on the above content, it can be seen that the preloading status table and the preloading counter are used to jointly determine the integrity of the preloading process, thereby preventing the security component from being physically attacked and skipping the loading process.

[0105] Figure 8 yes Figure 6a FIG2 is a schematic diagram of another embodiment of a preload management device. The preload management device 711 is configured to read multiple items 1-n to be loaded and store them in multiple registers. Depending on the meaning of the items to be loaded, different registers are used to store the corresponding items to be loaded. For example, if the items to be loaded are root keys, the key register is used. If the items to be loaded are multiple security configuration information, the multiple security configuration information is stored in corresponding control registers of the multiple control registers.

[0106] As shown in the figure, the preload management device 711 includes Figure 7 In addition, the preloading management device 711 further includes a verification unit 615, which uses a verification word to perform verification. The verification here has the following two meanings.

[0107] First, use the checksum to verify whether the item to be loaded has been damaged or tampered with.

[0108] As shown in the figure, the read-only memory 616 pre-stores multiple check words 1-n. The check unit 615 reads one of the multiple check words 1-n each time and determines whether the check word matches the corresponding item to be loaded. If it matches, the subsequent operation continues. If it does not match, the security component is set back to the initial state to repeat the startup process, or the system is directly determined to be abnormal.

[0109] Due to the effect of the random code, the preloading controller 614 randomly loads the items to be loaded 1-n. At a certain moment, when the preloading controller 614 loads a specific item to be loaded K, the verification unit 615 reads the verification word K corresponding to the item to be loaded K, first calculates the theoretical verification word based on the item to be loaded K, and then compares the theoretical verification word with the verification word K to determine whether they match.

[0110] In this case, the check words 1-n and the items to be loaded 1-n can be stored separately. This way, if the contents of the items to be loaded are damaged or tampered with, the damage can be detected based on the check words that have not been tampered with or damaged. For example, if someone knows the approximate storage location of the root key on the security component and attacks that location using a device such as electromagnetic radiation, since the root key and its associated check words are stored separately, even if the root key is damaged, its corresponding check word will still be correct. Therefore, the root key can be verified based on the check word.

[0111] Second, the check word is used to check whether the system is normal. The check unit 615 randomly reads the check word and determines whether the check word meets specific rules. If it does not meet the specific rules, the safety component is set back to the initial state, restarted or only an alarm message is issued.

[0112] Figure 9 The following diagram shows an exemplary random code data structure. As shown, random code 90 consists of three 8-bit data items. Flag occupies one bit. When the value is 0, it indicates reading the check word; when the value is 1, it indicates reading the item to be loaded. Check Word Index indicates the check word sequence number to be read. Content Index indicates the sequence number of the item to be loaded.

[0113] Figure 10a and 10b This is a flow chart of the preloading method provided by the embodiment of the present disclosure. Figure 1 The same as S110 in FIG. 1 and S110 in FIG. 2 are omitted here. In addition, the random code of this embodiment adopts Figure 9 The data structure shown. Figure 10a The following steps are included.

[0114] Step S121 obtains a random code.

[0115] Step S122 determines whether the highest bit of the random code is 1. If it is 1, step S124 is executed, otherwise step S123 is executed. If the highest bit of the random code is 1, it indicates that the item to be loaded is read, and if the highest bit of the random code is 0, it indicates that the check word is read.

[0116] Step S123 obtains the check word from the position indicated by the Check Word Index.

[0117] Step S124 obtains the item to be loaded from the location indicated by the Content Index.

[0118] Step S125 stores the item to be loaded into the corresponding control register or key register.

[0119] Step S126 updates the preloading status table and the preloading counter, that is, updates the data item corresponding to the currently read item to be loaded in the preloading status table.

[0120] Steps S121 to S126 are repeatedly executed. Generally, the number of repetitions is greater than or equal to the number n of the items to be loaded.

[0121] Step S127 determines whether the check word is correct. If so, step S121 is continued. Otherwise, it indicates that the preloading is abnormal, the process ends abnormally, and the control system can be restarted.

[0122] Figure 10b The following steps are included.

[0123] Step S130 determines whether the preload status table matches the number of loads in the preload counter. If so, step S131 is executed. Otherwise, it indicates that the preload is abnormal, the process ends abnormally, and the control system can be restarted.

[0124] Step S131: The preloading status table and the preloading counter are both loaded with the number of times indicating that the preloading process is complete. If yes, continue with the subsequent steps of system startup. If no, it indicates that the preloading is abnormal, the process ends abnormally, and the system can be restarted.

[0125] Of course, the preloading method provided in the embodiment of the present disclosure is not limited to the use of Figure 9 The data structure described. When the random code adopts other data structures, the process of the preloading method will also change accordingly. For example, if the random code contains only two items: the first item indicates the corresponding item to be loaded, that is, it indicates the position of an item to be loaded, and the second item indicates the corresponding check word, that is, it indicates the position of a check word. When the preloading process starts, the random code is obtained, and then the position of the corresponding item to be loaded is obtained from the first item of the random code, and the corresponding item to be loaded is obtained and stored in the register, and the preloading counter is updated, and then the position of the corresponding check word is obtained from the second item of the random code, and then the corresponding check word is obtained from the position of the corresponding check word for verification. When the verification fails, the process ends abnormally. The above steps are performed multiple times (the number of executions can be equal to the number of items to be loaded or check words), and then the preloading status table and the preloading counter are judged to determine whether the security chip is normal.

[0126] It should be understood that the above-mentioned preloading method is generally implemented through hardware, but in theory it can also be implemented through software. If implemented through software, the preloading method can be integrated into the startup firmware, which is enabled before the operating system to improve system security.

[0127] The commercial value of the disclosed embodiments

[0128] At present, various smart devices are facing severe security challenges. The security component provided by the embodiment of the present disclosure can be used as an independent device to provide security protection for smart devices, and can also be integrated into the interior of smart devices to provide security protection for smart devices. The security component provided by this embodiment is versatile and can be implemented in various systems including computer systems and embedded systems. At the same time, the security component of the embodiment of the present disclosure can be used in a variety of electronic products, for example, it can be applied to vehicle terminals, smart homes, consumer electronic products, programmable logic controllers (PLC), robot controllers, game terminals, financial service terminals, video conferencing terminals, medical service terminals, and so on. Through the security component, the safety performance of various electronic products can be significantly improved, and since the cost of the components required for the security component is relatively limited, especially, there is the possibility of reusing some components that are already equipped in the existing system, so in general, the cost of electronic products that need to be increased is relatively limited.

[0129] Those skilled in the art will appreciate that the present disclosure can be implemented as systems, methods, and computer program products. Therefore, the present disclosure can be specifically implemented in the following forms, namely, complete hardware, complete software (including firmware, resident software, microcode), and can also be implemented in the form of a combination of software and hardware. In addition, in some embodiments, the present disclosure can also be implemented in the form of a computer program product in one or more computer-readable media, wherein the computer-readable medium contains computer-readable program code.

[0130] Any combination of one or more computer-readable media can be used. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. Computer-readable storage media are, for example, but not limited to, electrical, magnetic, optical, electromagnetic, infrared or semiconductor systems, devices or components, or any combination thereof. More specific examples of computer-readable storage media include: an electrical connection of one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof. In this article, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by a processing unit, device or device, or used in combination with it.

[0131] A computer-readable signal medium may include a data signal propagated in baseband or as part of a chopped wave, which carries computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any other suitable combination. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transfer a program for use by or in conjunction with an instruction system, apparatus, or device.

[0132] Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., and any suitable combination of the foregoing.

[0133] The computer program code for executing the disclosed embodiments can be written in one or more programming languages ​​or combinations thereof. The programming languages ​​include object-oriented programming languages, such as JAVA, C++, and can also include conventional procedural programming languages, such as C. The program code can be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (e.g., using an Internet service provider to connect via the Internet).

[0134] The foregoing description is merely a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present disclosure shall be included within the scope of protection of the present disclosure.

Claims

1. A security component comprising a memory, a plurality of registers, and a preload management device, wherein the memory stores a plurality of items to be configured, and the preload management device is activated after the security component is powered on, comprising: A random number generator, configured to generate a random code, wherein the random code is used to indicate a corresponding configuration item of the plurality of items to be configured; A preload controller is configured to read the corresponding configuration item according to the random code and load the corresponding configuration item into a corresponding register of the plurality of registers.

2. The security component according to claim 1, wherein the preload management device includes a preload counter, which counts the loading of the preload controller. The preload controller also maintains a preload status table, which includes multiple data items, each data item is used to indicate whether the corresponding to-be-configured item has been loaded into the corresponding register. The preload controller determines whether the multiple to-be-configured items have all been loaded based on the preload status table and the count value of the preload counter, and judges whether the preloading process is complete based on this. If the preloading process is incomplete, the preload controller controls the security component to restart.

3. The security component according to claim 1, wherein the memory further stores a plurality of check words, and the preload controller is further configured to read the plurality of check words for verification, and determine whether it is necessary to control the security component to restart according to the verification result.

4. The security component according to claim 3, wherein the random code is further used to indicate a corresponding check word of the multiple check words, and the preloading controller reads the corresponding check code according to the random code for verification.

5. The security component according to claim 4, wherein the random code further comprises an identifier for characterizing verification or loading, and the preloading controller randomly performs verification or loading operations based on a judgment of the random code. 6 . The security component according to claim 3 , wherein the plurality of check words correspond to the plurality of items to be configured one by one, and the preloading controller verifies whether the plurality of items to be configured are correct according to the plurality of check words. 7 . The security component according to claim 3 , wherein the plurality of check words and the plurality of items to be configured are stored in a dispersed manner in the memory. The security component according to claim 1 , wherein the memory is a read-only memory. The security component according to claim 8 , wherein the read-only memory is a one-time programmable memory. 10 . The security component according to claim 1 , further comprising a processing unit, wherein the plurality of registers are located inside the processing unit, and the processing unit uses the plurality of items to be configured to complete system startup.

11. The safety assembly according to any one of claims 1 to 10, wherein: The preloading management device is integrated in the processing unit.

12. The security component according to claim 10, wherein the multiple items to be configured include a root password and security configuration information, the preloading controller loads the root password into a password register and the security configuration information into a control register, and the processing unit executes program instructions for cryptographic algorithm processing and security configuration during startup. The security component according to claim 1 , wherein the security component is a system on chip.

14. The security component according to any one of claims 1 to 10 or any one of claims 12 to 13, wherein the security component is applied to the following products: vehicle-mounted terminals, smart homes, consumer electronics, robot controllers, programmable controllers, financial service terminals, or video conferencing terminals.

15. An embedded system comprising the security component according to any one of claims 1 to 13.

16. A computer system comprising the security component according to any one of claims 1 to 13.

17. A system on chip comprising the security component according to any one of claims 1 to 13.

18. A preloading method, wherein a preloading process is performed after a system is powered on, wherein the preloading process comprises the following steps, which are repeatedly performed for a plurality of items to be configured: Obtaining a random code, where the random code is used to indicate a corresponding configuration item of the multiple items to be configured; The corresponding configuration item is read according to the random code, and the corresponding configuration item is loaded into a corresponding register of the plurality of registers.

19. The preloading method according to claim 18, further comprising Count load operations; Maintaining a preload status table, the preload status table including a plurality of data items, each data item being used to indicate whether the corresponding item to be configured has been loaded into the corresponding register; It is determined whether the plurality of items to be configured have been loaded according to the preloading status table and the loading count value, and whether the preloading process is complete is judged accordingly.

20. The preloading method according to claim 18, further comprising: Read a plurality of pre-stored check words for verification to determine whether the preloading process is normal.

21. The preloading method according to claim 20, wherein the random code is further used to indicate a corresponding check word of the plurality of check words, and the preloading method further comprises: The corresponding check code is read according to the random code for verification.

22. The preloading method according to claim 21, wherein the random code further comprises an identifier for characterizing verification or loading, and the preloading method further comprises: The random code is judged by randomly performing a check or load operation.

23. The preloading method according to claim 22, wherein the plurality of check words correspond one-to-one to the plurality of items to be configured, the preloading method further comprising: Verify whether the multiple items to be configured are correct according to the multiple verification words. The preloading method according to claim 18 , wherein the plurality of items to be configured are stored in a read-only memory.

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