Low-noise amplifier circuit and RF front-end module

Abstract

The present invention discloses a low-noise amplifier circuit and a radio frequency front-end module. The low-noise amplifier circuit includes a signal input terminal, a signal output terminal, a first-stage amplifier circuit, a second-stage amplifier circuit, a first-stage output matching network, and a second-stage output matching network. The first-stage amplifier circuit and the second-stage amplifier circuit are cascaded in series between the signal input terminal and the signal output terminal. The first-stage output matching network has one end connected to the output terminal of the first-stage amplifier circuit and the other end connected to the first power supply terminal. The second-stage output matching network has one end connected to the output terminal of the second-stage amplifier circuit and the other end connected to the second power supply terminal. The output impedance of the low-noise amplifier circuit is associated with the second-stage output matching network. This technical solution can quickly perform impedance matching on the output impedance of the low-noise amplifier circuit while also ensuring the gain of the low-noise amplifier circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency integrated circuits, and in particular to a low-noise amplifier circuit and a radio frequency front-end module. Background Art

[0002] Radiofrequency integrated circuits (RFICs) typically include a receiver for transmitting or receiving RF signals. The receiver includes a low-noise amplifier (LNA) for amplifying the RF signal. As the first stage of the receiver, the LNA amplifies the RF signal transmitted or received by the RFIC.

[0003] However, the currently available low-noise amplifier circuit cannot provide sufficient gain and meet the output impedance matching requirements of the low-noise amplifier circuit during the process of amplifying radio frequency signals. Summary of the Invention

[0004] Embodiments of the present invention provide a low-noise amplifier circuit and a radio frequency front-end module to solve the problem that the existing low-noise amplifier circuit cannot simultaneously meet the output impedance matching and gain requirements of the low-noise amplifier circuit.

[0005] A low-noise amplifier circuit includes a signal input terminal, a signal output terminal, a first-stage amplifier circuit, a second-stage amplifier circuit, a first-stage output matching network, and a second-stage output matching network;

[0006] The first-stage amplifier circuit and the second-stage amplifier circuit are connected in series between the signal input terminal and the signal output terminal;

[0007] The first-stage output matching network connected between the output terminal of the second-stage amplifier circuit and the first power supply terminal is configured to be associated with the imaginary part of the output impedance of the low-noise amplifier circuit;

[0008] The second-stage output matching network is connected between the output terminal of the second-stage amplifier circuit and the second power supply terminal. The second-stage output matching network is a resistor network configured to be associated with the real part of the output impedance of the low-noise amplifier circuit.

[0009] Furthermore, the gain of the low-noise amplifier circuit is associated with the second-stage output matching network.

[0010] Furthermore, the resistor network is an output matching resistor, wherein the output impedance of the low-noise amplifier circuit is proportional to the resistance value of the output matching resistor.

[0011] Furthermore, the resistor network is an adjustable resistor, and the adjustable resistor is configured to adjust the real part of the output impedance of the low-noise amplifier circuit.

[0012] Furthermore, the resistor network includes a plurality of impedance adjustment branches, and each of the impedance adjustment branches includes a matching switch and a matching resistor connected in series.

[0013] Furthermore, the first-stage output matching network includes a first capacitor and a first inductor connected in parallel.

[0014] Furthermore, the first-stage amplifier circuit includes a first DC blocking capacitor, a first amplifying transistor, a second amplifying transistor and a second DC blocking capacitor;

[0015] A first end of the first DC blocking capacitor is connected to the signal input end, and a second end of the first DC blocking capacitor is connected to the first end of the first amplifying transistor;

[0016] The second end of the first amplifying transistor is connected to the third end of the second amplifying transistor, and the third end of the first amplifying transistor is connected to the ground end;

[0017] The first terminal of the second amplifying transistor is connected to the ground terminal through the second DC blocking capacitor;

[0018] The second end of the second amplifying transistor is connected to the output end of the first-stage amplifying circuit and the input end of the second-stage amplifying circuit.

[0019] Furthermore, the second-stage amplifier circuit includes a third DC blocking capacitor, a fourth DC blocking capacitor, a third amplifying transistor, and a fourth amplifying transistor;

[0020] The first end of the third DC blocking capacitor is connected to the output end of the first stage amplifying circuit as the input end of the second stage amplifying circuit, and the second end of the third DC blocking capacitor is connected to the first end of the third amplifying transistor;

[0021] The second end of the third amplifying transistor is connected to the third end of the fourth amplifying transistor, and the third end of the third amplifying transistor is connected to the ground end;

[0022] The first end of the fourth amplifying transistor is connected to the ground end through the fourth DC blocking capacitor, and the second end of the fourth amplifying transistor is connected to the second-stage output matching network as the output end of the second-stage amplifying circuit.

[0023] Furthermore, the low-noise amplifier circuit further includes a first gain adjustment circuit and a second gain adjustment circuit;

[0024] The first gain adjustment circuit has one end connected to the first-stage amplifying circuit and the other end connected to the ground, and is configured to perform gain adjustment on the first-stage amplifying circuit;

[0025] The second gain adjustment circuit has one end connected to the second-stage amplifying circuit and the other end connected to the ground, and is configured to perform gain adjustment on the second-stage amplifying circuit.

[0026] A radio frequency front-end module comprises a substrate and a low-noise amplifier chip arranged on the substrate, wherein the low-noise amplifier chip is provided with the low-noise amplifier circuit described above.

[0027] Furthermore, the RF front-end module further includes a first gain adjustment circuit and a second gain adjustment circuit; the first gain adjustment circuit includes a first gain adjustment inductor provided on the substrate, and the second gain adjustment circuit includes a second gain adjustment inductor provided on the substrate;

[0028] The first gain adjustment inductor has one end connected to the first-stage amplifier circuit provided on the low-noise amplifier chip, and the other end connected to the ground;

[0029] One end of the second gain adjustment inductor is connected to the second-stage amplifier circuit provided on the low-noise amplifier chip, and the other end is connected to the ground.

[0030] In the above-mentioned low-noise amplifier circuit and RF front-end module, the first-stage output matching network of the low-noise amplifier circuit is connected between the output end of the second-stage amplifier circuit and the first power supply end, and is configured to be associated with the imaginary part of the output impedance of the low-noise amplifier circuit; the second-stage output matching network is connected between the output end of the second-stage amplifier circuit and the second power supply end. The second-stage output matching network is a resistor network, which is configured to be associated with the real part of the output impedance of the low-noise amplifier circuit. The second-stage output matching network is connected to the output end of the second-stage amplifier circuit. The output impedance and gain of the low-noise amplifier circuit can be adjusted through the second-stage output matching network, thereby achieving not only impedance matching at the output end of the low-noise amplifier circuit but also the gain of the low-noise amplifier circuit within a wider frequency band. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0032] Figure 1 is a circuit diagram of a low-noise amplifier circuit in one embodiment of the present invention;

[0033] Figure 2 is another circuit diagram of a low-noise amplifier circuit in one embodiment of the present invention;

[0034] Figure 3 is another circuit diagram of a low-noise amplifier circuit in one embodiment of the present invention;

[0035] Figure 4 is another circuit diagram of a low-noise amplifier circuit in one embodiment of the present invention;

[0036] Figure 5 is another circuit diagram of a low-noise amplifier circuit in one embodiment of the present invention;

[0037] Figure 6 FIG. 4 is another circuit diagram of a low-noise amplifier circuit according to an embodiment of the present invention.

[0038] In the figure: 10, first-stage amplifier circuit; 20, second-stage amplifier circuit; 30, first-stage output matching network; 40, second-stage output matching network; 41, impedance adjustment branch; 50, first gain adjustment circuit; 60, second gain adjustment circuit. DETAILED DESCRIPTION

[0039] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0040] It should be understood that the present invention can be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to make the disclosure thorough and complete and to fully convey the scope of the invention to those skilled in the art. In the drawings, the dimensions and relative dimensions of layers and regions may be exaggerated for clarity. Like reference numerals denote like elements throughout.

[0041] It should be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" another element or layer, it may be directly on, adjacent to, connected to, or coupled to the other element or layer, or there may be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there may be no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Thus, a first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part without departing from the teachings of the present invention.

[0042] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," etc., may be used herein for convenience of description to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that the spatially relative terms are intended to include different orientations of the device in use and operation in addition to the orientations shown in the figures. For example, if the device in the drawings is flipped, then the elements or features described as "under" or "beneath" or "beneath" the other elements will be oriented as "over" the other elements or features. Thus, the exemplary terms "under" and "under" may include both the upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or in other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0043] The purpose of the terms used herein is only to describe specific embodiments and is not intended to limit the present invention. When used herein, the singular forms "a", "an" and " / the" are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "comprising", when used in this specification, identify the presence of features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0044] In order to fully understand the present invention, detailed structures and steps will be provided in the following description to illustrate the technical solutions proposed by the present invention. Preferred embodiments of the present invention are described in detail below. However, in addition to these detailed descriptions, the present invention may also have other implementations.

[0045] like Figure 1As shown, this embodiment provides a low-noise amplifier circuit, including a signal input terminal Vin, a signal output terminal Vout, a first-stage amplifier circuit 10, a second-stage amplifier circuit 20, a first-stage output matching network 30 and a second-stage output matching network 40; the first-stage amplifier circuit 10 and the second-stage amplifier circuit 20 are connected in series between the signal input terminal Vin and the signal output terminal Vout; the first-stage output matching network 30 connected between the output terminal of the second-stage amplifier circuit 20 and the first power supply terminal is configured to be associated with the imaginary part of the output impedance of the low-noise amplifier circuit; the second-stage output matching network 40 connected between the output terminal of the second-stage amplifier circuit 20 and the second power supply terminal is a resistor network, and is configured to be associated with the real part of the output impedance of the low-noise amplifier circuit.

[0046] The signal input terminal Vin is the input terminal of the low-noise amplifier circuit for inputting the RF input signal. The signal output terminal Vout is the output terminal of the low-noise amplifier circuit for outputting the amplified RF amplified signal. The RF amplified signal is the RF signal obtained by amplifying the RF input signal through the first-stage amplifier circuit 10 and the second-stage amplifier circuit 20.

[0047] As an example, the first-stage amplifier circuit 10 and the second-stage amplifier circuit 20 are connected in series between the signal input terminal Vin and the signal output terminal Vout, and are configured to perform multi-stage amplification on the RF input signal. It should be noted that the low-noise amplifier circuit in this embodiment may include at least two-stage amplifier circuits, wherein the second-stage amplifier circuit 20 serves as the last-stage amplifier circuit. For example: if the low-noise amplifier circuit includes N-stage amplifier circuits, the first N-1-stage amplifier circuits are all first-stage amplifier circuits 10, and the last-stage amplifier circuit is the second-stage amplifier circuit 20. After the RF input signal is amplified by the first N-1 first-stage amplifier circuits 10, it is amplified by the second-stage amplifier circuit 20 for the last stage, thereby outputting the RF amplified signal, so as to ensure the gain of the low-noise amplifier circuit within a wider frequency band.

[0048] As another example, a first-stage output matching network 30 is connected at one end to the output of the first-stage amplifier circuit 10 and at the other end to the first power supply terminal. It is configured to correlate with the imaginary part of the output impedance of the low-noise amplifier circuit. It is understood that if the low-noise amplifier circuit includes multiple first-stage amplifier circuits 10, then each first-stage amplifier circuit 10 is connected to a corresponding first-stage output matching network 30. In this embodiment, in addition to serving as a load for the first-stage amplifier circuit 10, the first-stage output matching network 30 is also correlated with the imaginary part Im[] of the output impedance of the low-noise amplifier circuit. That is, the imaginary part Im[] of the output impedance of the low-noise amplifier circuit is primarily determined by the first-stage output matching network 30. The first-stage output matching network 30 preferably includes a first capacitor and a first inductor connected in parallel. Furthermore, the first capacitor and / or the first inductor can be configured to be adjustable to adjust the imaginary part Im[] of the output impedance of the low-noise amplifier circuit to achieve impedance matching.

[0049] As another example, one end of the second-stage output matching network 40 is connected to the output end of the second-stage amplifier circuit 20, and the other end is connected to the second power supply end; the second-stage output matching network 40 is a resistor network, which is configured to be associated with the real part of the output impedance of the low-noise amplifier circuit, that is, the second-stage output matching network 40 in the present application only affects the real part of the output impedance of the low-noise amplifier circuit, and the imaginary part of the output impedance of the low-noise amplifier circuit depends on the first-stage output matching network 30. In a specific embodiment, the output end of the low-noise amplifier circuit generally needs to achieve an impedance matching of 50 ohms, and achieving an impedance matching of 50 ohms requires ensuring that both the real part Re[] and the imaginary part Im[] of the output impedance meet the impedance matching requirements. However, when the low-noise amplifier circuit operates within a wider frequency band, the impedance matching of the output end of the low-noise amplifier circuit mainly depends on the real part of the output impedance. In the present application, a first-stage output matching network 30 is connected to the output end of the first-stage amplifier circuit 10, which is configured to be associated with the imaginary part of the output impedance of the low-noise amplifier circuit, and a second-stage output matching network 40 is connected to the output end of the second-stage amplifier circuit 20. The second-stage output matching network 40 is a resistor network and is configured to be associated with the real part of the output impedance of the low-noise amplifier circuit; thereby, the output impedance of the output end of the low-noise amplifier circuit can be accurately adjusted through the second-stage output matching network 40 within a wider frequency band, thereby achieving impedance matching.

[0050] Furthermore, the gain of the low-noise amplifier circuit in this embodiment is associated with the second-stage output matching network. In a specific embodiment, the low-noise amplifier circuit needs to ensure a certain gain while considering achieving output impedance matching. The total gain G of the low-noise amplifier circuit is ain =G m1 *G m2 *Rout It can be seen that in the first stage amplification gain G m1 and the second stage amplifier gain G m2 Under certain conditions, the total gain of the low-noise amplifier circuit mainly depends on the output impedance R out Since the second-stage output matching network of the present application is a resistor network, the output impedance R out The size of is mainly determined by the resistance value R presented by the resistor network; therefore, by adjusting the second-stage output matching network, the present application can not only ensure the impedance matching of the output end of the low-noise amplifier circuit within a wider frequency band, but also ensure the gain of the low-noise amplifier circuit. Among them, the first-stage amplifier gain G m1 The gain of the second stage is mainly related to the size of the amplifier transistor in the first stage amplifier circuit. m2 The gain is mainly related to the size of the amplifying transistor in the second-stage amplifying circuit.

[0051] In a specific embodiment, refer to the following Figure 2 As shown, the output impedance R of the low noise amplifier circuit out In addition to being related to the total resistance value R presented by the second-stage output matching network 40, it is also related to the impedance of the node B at the output end of the second-stage amplifier circuit 20, that is, the output impedance R of the output end of the low-noise amplifier circuit. out =R / / R0, where R out is the actual output impedance of the low-noise amplifier circuit. R is the total resistance value presented by the second-stage output matching network 40. R0 is the impedance of the node B at the output end of the second-stage amplifier circuit 20. It can be understood that since the low-noise amplifier circuit includes N-stage amplifier circuits, the first N-1-stage amplifier circuits are all first-stage amplifier circuits 10, and the last-stage amplifier circuit is the second-stage amplifier circuit 20. In this way, the impedance R0 of the node B at the output end of the second-stage amplifier circuit 20 will be much larger than the total resistance value R presented in the second-stage output matching network 40, and then according to the output impedance R of the low-noise amplifier circuit out =R / / R0, it can be directly deduced that the output impedance of the low-noise amplifier circuit is mainly related to the second-stage output matching network 40.

[0052] Furthermore, the output impedance of the low-noise amplifier circuit is proportional to the total resistance value R corresponding to the second-stage output matching network 40, that is, the larger the total resistance value R presented by the second-stage output matching network 40, the lower the output impedance R of the low-noise amplifier circuit. out The larger the value, the greater the total gain of the low-noise amplifier circuit will be when the first-stage amplifier gain Gm1 and the second-stage amplifier gain Gm2 are determined. Conversely, the smaller the total resistance value R presented by the second-stage output matching network 40, the lower the output impedance R of the low-noise amplifier circuit will be.out The smaller the total gain G of the low noise amplifier circuit is, the ain Therefore, the output impedance and gain of the low-noise amplifier circuit can be accurately adjusted through the second-stage output matching network 40, thereby ensuring that the output end of the low-noise amplifier circuit achieves impedance matching and the gain of the low-noise amplifier circuit is maintained within a wide frequency band.

[0053] In this embodiment, the first-stage output matching network 30 is connected between the output end of the second-stage amplifier circuit 20 and the first power supply end, and is configured to be associated with the imaginary part of the output impedance of the low-noise amplifier circuit; the second-stage output matching network 40 is connected between the output end of the second-stage amplifier circuit 20 and the second power supply end. The second-stage output matching network 40 is a resistor network and is configured to be associated with the real part of the output impedance of the low-noise amplifier circuit. In this application, by connecting a second-stage output matching network 40 of the resistor network type to the output end of the second-stage amplifier circuit 20, the output impedance of the low-noise amplifier circuit mainly depends on the second-stage output matching network 40 within a wider frequency band. The output impedance and gain of the low-noise amplifier circuit can be adjusted through the second-stage output matching network 40, thereby achieving not only impedance matching at the output end of the low-noise amplifier circuit within a wider frequency band, but also ensuring the gain of the low-noise amplifier circuit.

[0054] In one embodiment, the resistor network is an output matching resistor, wherein the output impedance of the low-noise amplifier circuit is proportional to the resistance value of the output matching resistor.

[0055] The output matching resistor is a resistor with a fixed resistance value. In one specific embodiment, since the output impedance and gain of the low-noise amplifier circuit are both related to the second-stage output matching network 40, when the impedance matching of the output end of the low-noise amplifier circuit needs to be considered, the resistance value of the output matching resistor connected to the output end of the second-stage amplifier circuit can be directly determined based on the impedance matching value of the output end. When the total gain value of the low-noise amplifier circuit needs to be considered, the resistance value of the output matching resistor connected to the output end of the second-stage amplifier circuit can also be directly determined based on the total gain value of the low-noise amplifier circuit. This ensures that not only impedance matching is achieved at the output end of the low-noise amplifier circuit, but also the gain of the low-noise amplifier circuit is maintained over a wide frequency band.

[0056] In one embodiment, if Figure 2 As shown, the resistor network is an adjustable resistor R, and the adjustable resistor R is configured to adjust the real part of the output impedance of the low-noise amplifier circuit.

[0057] In one embodiment, the resistor network is configured as an adjustable resistor R, facilitating real-time adjustment of the output impedance and gain of the low-noise amplifier circuit based on actual requirements. For example, the low-noise amplifier circuit can set the adjustable resistor R to any desired resistance value based on received control instructions, thereby enabling adjustment of the output impedance and gain of the low-noise amplifier circuit's output terminal over a wide frequency range through the second-stage output matching network 40.

[0058] In one embodiment, if Figure 6 As shown, the second-stage output matching network 40 includes multiple impedance adjustment branches 41, each impedance adjustment branch 41 includes a matching switch and a matching resistor connected in series, the first ends of the multiple impedance adjustment branches 41 are connected to the output end of the second-stage amplification circuit 20, and the second ends of the multiple impedance adjustment branches 41 are connected to the second power supply end.

[0059] As an example, the second-stage output matching network 40 includes multiple impedance adjustment branches 41, each impedance adjustment branch 41 includes a matching switch and a matching resistor connected in series, wherein the resistance value of the matching resistor in each impedance adjustment branch 41 can be customized according to actual needs to adjust the output impedance and gain of the low-noise amplifier circuit.

[0060] In this embodiment, the second-stage output matching network 40 includes a first impedance adjustment branch 41, a second impedance adjustment branch 41 / ... / Nth impedance adjustment branch 41. The first impedance adjustment branch 41 includes a first matching switch S1 and a first matching resistor R1, the second impedance adjustment branch 41 includes a second matching switch S2 and a second matching resistor R2 / ... / Nth impedance adjustment branch 41 includes an Nth matching switch Sn and an Nth matching resistor Rn. It should be noted that through the first matching switch S1, the second matching switch S2 / ... / Nth matching switch Sn, the first matching resistor R1, the second matching resistor R2 / ... / Nth matching resistor Rn connected to the low-noise amplifier circuit can be controlled respectively to adjust the output impedance and gain of the low-noise amplifier circuit so as to meet the impedance matching while ensuring the gain size. For example, when the first matching switch S1 is closed and the second matching switch S2 / ... / Nth matching switch Sn is open, the first matching resistor R1 serves as the second-stage output matching network. At this time, the resistance value of the first matching resistor R1 is associated with the output impedance and gain of the low-noise amplifier circuit. As another example, when the first matching switch S1 and the second matching switch S2 are closed and the remaining matching switches are disconnected, the first matching resistor R1 and the second matching resistor R2 serve as the second-stage output matching network. At this time, the parallel resistance value of the first matching resistor R1 and the second matching resistor R2 is associated with the output impedance and gain of the noise amplifier circuit.

[0061] In one embodiment, if Figures 3 to 5 As shown, the first-stage output matching network 30 may be formed by connecting at least two of a first resistor R31 , a first capacitor C31 , and a first inductor L31 in parallel.

[0062] In this embodiment, the first-stage output matching network 30 includes a first resistor R31 and a first capacitor C31 connected in parallel. Alternatively, the first-stage output matching network 30 includes a first capacitor C31 and a first inductor L31 connected in parallel. Alternatively, the first-stage output matching network 30 includes a first resistor R31 and a first inductor L31 connected in parallel. Alternatively, the first-stage output matching network 30 includes a first resistor R31, a first capacitor C31, and a first inductor L31 connected in parallel. It should be noted that the parallel connection mode between the first resistor R31, the first capacitor C31, and the first inductor L31, as well as the parameter sizes corresponding to the first resistor R31, the first capacitor C31, and the first inductor L31 can be selected according to actual needs to adjust the imaginary impedance in the output impedance of the low-noise amplifier circuit.

[0063] It should be noted that, in a specific embodiment, when the first-stage output matching network 30 includes a first resistor R31, the size of the first resistor R31 will affect the real part of the output impedance of the low-noise amplifier circuit. However, in this application, since a second-stage output matching network 40 in the form of a resistor network is connected to the output end of the second-stage amplifier circuit 20, the real part of the output impedance of the low-noise amplifier circuit mainly depends on the second-stage output matching network 40, and the first resistor R31 in the first-stage output matching network 30 has almost no effect on the real part of the output impedance of the low-noise amplifier circuit.

[0064] In one embodiment, if Figure 2 As shown, the first-stage output matching network 30 includes a first capacitor C31 and a first inductor L31 connected in parallel, wherein the first capacitor C31 is an adjustable capacitor.

[0065] In this embodiment, the first-stage output matching network 30 includes a first capacitor C31 and a first inductor L31 connected in parallel, and is configured to adjust the imaginary impedance of the output impedance of the low-noise amplifier circuit. Preferably, the first capacitor C31 is an adjustable capacitor to facilitate adjustment of the imaginary impedance of the output impedance of the low-noise amplifier circuit, thereby ensuring that the imaginary impedance of the output impedance of the low-noise amplifier circuit can be adjusted over a wide frequency band.

[0066] In one embodiment, if Figure 2As shown, the first-stage amplifier circuit 10 includes a first DC blocking capacitor C11, a first amplifier transistor M11, a second amplifier transistor M12, and a second DC blocking capacitor C12; the first end of the first DC blocking capacitor C11 is connected to the signal input terminal Vin, and the second end of the first DC blocking capacitor C11 is connected to the first end of the first amplifier transistor M11; the second end of the first amplifier transistor M11 is connected to the third end of the second amplifier transistor M12, and the third end of the first amplifier transistor M11 is connected to the ground end; the first end of the second amplifier transistor M12 is connected to the ground end through the second DC blocking capacitor C12; the second end of the second amplifier transistor M12 is connected to the input end of the second-stage amplifier circuit 20 as the output end of the first-stage amplifier circuit 10.

[0067] As an example, the first amplifying transistor M11 and the second amplifying transistor M12 may be a triode or a field-effect transistor. The second amplifying transistor M12 may also be a plurality of cascaded triodes or a plurality of cascaded field-effect transistors. When the first-stage amplifying circuit 10 receives an RF input signal inputted from the signal input terminal Vin, the RF input signal is amplified in multiple stages by the first amplifying transistor M11 and the second amplifying transistor M12, and a first-stage RF amplified signal is outputted.

[0068] As another example, Figure 2 or Figure 3 As shown, when the first amplifying transistor M11 and the second amplifying transistor M12 are triodes, the first amplifying transistor M11 and the second amplifying transistor M12 may be NPN transistors. A first end of the first DC blocking capacitor C11 is connected to the signal input terminal Vin, and a second end of the first DC blocking capacitor C11 is connected to a first end of the first amplifying transistor M11; a second end of the first amplifying transistor M11 is connected to a third end of the second amplifying transistor M12, and a third end of the first amplifying transistor M11 is connected to ground, and is configured to amplify the RF input signal.

[0069] As another example, the first end of the second amplifying transistor M12 is connected to the ground end via a second DC blocking capacitor C12. The second end of the second amplifying transistor M12 is connected to the output end of the first-stage amplifying circuit 10 and the input end of the second-stage amplifying circuit 20, and is configured to further amplify the RF input signal amplified by the first amplifying transistor M11 and output the first-stage RF amplified signal. The second DC blocking capacitor C12 is configured to filter harmonics or interference signals input to the first end of the second amplifying transistor M12.

[0070] In one embodiment, if Figure 2As shown, the second-stage amplifier circuit 20 includes a third DC blocking capacitor C21, a fourth DC blocking capacitor C22, a third amplifier transistor M21 and a fourth amplifier transistor M22; the first end of the third DC blocking capacitor C21 is connected to the output end of the first-stage amplifier circuit 10 as the input end of the second-stage amplifier circuit 20, and the second end of the third DC blocking capacitor C21 is connected to the first end of the third amplifier transistor M21; the second end of the third amplifier transistor M21 is connected to the third end of the fourth amplifier transistor M22, and the third end of the third amplifier transistor M21 is connected to the ground end; the first end of the fourth amplifier transistor M22 is connected to the ground end through the fourth DC blocking capacitor C22, and the second end of the fourth amplifier transistor M22 is connected to the second-stage output matching network 40 as the output end of the second-stage amplifier circuit 20.

[0071] As an example, the third amplifying transistor M21 and the fourth amplifying transistor M22 may be triodes or field-effect transistors. The fourth amplifying transistor M22 may also be a plurality of cascaded triodes or a plurality of cascaded field-effect transistors. When the first-stage amplifying circuit 10 receives an RF input signal inputted from the signal input terminal Vin, the third amplifying transistor M21 and the fourth amplifying transistor M22 perform a second-stage amplification on the RF input signal amplified by the first-stage amplifying circuit, and output a second-stage amplified RF signal.

[0072] As another example, when the third amplifying transistor M21 and the fourth amplifying transistor M22 are triodes, the third amplifying transistor M21 and the fourth amplifying transistor M22 may be NPN transistors. A first end of the third DC blocking capacitor C21 is connected to the output end of the first-stage amplifying circuit 10 as the input end of the second-stage amplifying circuit 20, and a second end of the third DC blocking capacitor C21 is connected to the first end of the third amplifying transistor M21; a second end of the third amplifying transistor M21 is connected to the third end of the fourth amplifying transistor M22, and a third end of the third amplifying transistor M21 is connected to the ground end, and is configured to amplify the first-stage RF amplified signal.

[0073] As another example, the first end of the fourth amplifying transistor M22 is connected to the ground end via a fourth DC blocking capacitor C22. The second end of the fourth amplifying transistor M22 is connected to the second-stage output matching network 40 as the output end of the second-stage amplifying circuit 20. The fourth amplifying transistor M22 is configured to further amplify the first-stage RF amplified signal after amplification by the third amplifying transistor M21 and output a second-stage RF amplified signal. The second DC blocking capacitor C12 is configured to filter harmonics or interference signals input to the first end of the fourth amplifying transistor M22.

[0074] In one embodiment, if Figure 2As shown, the low-noise amplifier circuit also includes a first gain adjustment circuit 50 and a second gain adjustment circuit 60; the first gain adjustment circuit 50 is connected to the first-stage amplifier circuit 10 at one end and to the ground at the other end, and is configured to perform gain adjustment on the first-stage amplifier circuit 10; the second gain adjustment circuit 60 is connected to the second-stage amplifier circuit 20 at one end and to the ground at the other end, and is configured to perform gain adjustment on the second-stage amplifier circuit 20.

[0075] As an example, the first gain adjustment circuit 50 has one end connected to the first-stage amplifier circuit 10 and the other end connected to the ground, and is configured to perform gain adjustment on the first-stage amplifier circuit 10. Specifically, the first gain adjustment circuit 50 includes a first gain adjustment inductor L51, which has one end connected to the first-stage amplifier circuit 10 and the other end connected to the ground, and is configured to perform gain adjustment on the first-stage amplifier circuit 10.

[0076] As another example, the second gain adjustment circuit 60 has one end connected to the second-stage amplifier circuit 20 and the other end connected to the ground, and is configured to perform gain adjustment on the second-stage amplifier circuit 20. Specifically, the second gain adjustment circuit 60 includes a second gain adjustment inductor L61, which has one end connected to the first-stage amplifier circuit 10 and the other end connected to the ground, and is configured to perform gain adjustment on the second-stage amplifier circuit 20.

[0077] In this embodiment, the first gain adjustment circuit 50 has one end connected to the first-stage amplifier circuit 10 and the other end connected to the ground end, and is configured to perform gain adjustment on the first-stage amplifier circuit 10; the second gain adjustment circuit 60 has one end connected to the second-stage amplifier circuit 20 and the other end connected to the ground end, and is configured to perform gain adjustment on the second-stage amplifier circuit 20 to increase the gain of the low-noise amplifier circuit.

[0078] This embodiment provides a radio frequency front-end module, including a substrate and a low-noise amplifier chip arranged on the substrate. The low-noise amplifier chip is provided with the low-noise amplifier circuit of the above embodiment. The low-noise amplifier circuit can achieve impedance matching at the output end while also ensuring a certain gain size.

[0079] In one embodiment, the RF front-end module also includes a first gain adjustment circuit 50 and a second gain adjustment circuit 60; the first gain adjustment circuit 50 includes a first gain adjustment inductor L51, and the second gain adjustment circuit 60 includes a second gain adjustment inductor L61. One end of the first gain adjustment inductor L51 is connected to the first-stage amplifier circuit 10 on the low-noise amplifier chip, and the other end is connected to the ground end; one end of the second gain adjustment inductor L61 is connected to the second-stage amplifier circuit 20 on the low-noise amplifier chip, and the other end is connected to the ground end; the first gain adjustment inductor L51 and the second gain adjustment inductor L61 are respectively arranged on the substrate.

[0080] In this embodiment, the first gain-adjusting inductor L51 has one end connected to the first-stage amplifier circuit 10 on the low-noise amplifier chip and the other end connected to the ground, and is configured to perform gain adjustment on the first-stage amplifier circuit 10. The second gain-adjusting inductor L61 has one end connected to the second-stage amplifier circuit 20 on the low-noise amplifier chip and the other end connected to the ground, and is configured to perform gain adjustment on the second-stage amplifier circuit 20. Furthermore, because the total occupied area of ​​the first gain-adjusting inductor L51 and the second gain-adjusting inductor L61 is relatively large, the first gain-adjusting inductor L51 and the second gain-adjusting inductor L61 are separately disposed on the substrate, which can reduce the total occupied area of ​​the low-noise amplifier chip, reduce the number of masks for the low-noise amplifier chip, and reduce the cost of the low-noise amplifier chip.

[0081] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present invention, and should all be included in the scope of protection of the present invention.

Claims

1. A low-noise amplifier circuit, characterized in that: It includes a signal input terminal, a signal output terminal, a first-stage amplifying circuit, a second-stage amplifying circuit, a first-stage output matching network and a second-stage output matching network; The first-stage amplifier circuit and the second-stage amplifier circuit are connected in series between the signal input terminal and the signal output terminal; a first-stage output matching network connected between the output terminal of the first-stage amplifier circuit and the first power supply terminal, configured to be associated with the imaginary part of the output impedance of the low-noise amplifier circuit and used to adjust the imaginary part of the output impedance of the low-noise amplifier circuit; The second-stage output matching network is connected between the output terminal of the second-stage amplifier circuit and the second power supply terminal. The second-stage output matching network is a resistor network, which is configured to be associated with the real part of the output impedance of the low-noise amplifier circuit and is used to adjust the output impedance of the low-noise amplifier circuit.

2. The low-noise amplifier circuit according to claim 1, wherein: The gain of the low-noise amplifier circuit is associated with the second-stage output matching network.

3. The low-noise amplifier circuit according to claim 1, wherein: The resistor network is an output matching resistor, wherein the output impedance of the low-noise amplifier circuit is proportional to the resistance value of the output matching resistor.

4. The low-noise amplifier circuit according to claim 1, wherein: The resistor network is an adjustable resistor configured to adjust the real part of the output impedance of the low-noise amplifier circuit.

5. The low-noise amplifier circuit according to claim 1, wherein: The resistor network includes a plurality of impedance adjustment branches, and each of the impedance adjustment branches includes a matching switch and a matching resistor connected in series.

6. The low-noise amplifier circuit according to claim 1, wherein: The first-stage output matching network includes a first capacitor and a first inductor connected in parallel.

7. The low-noise amplifier circuit according to claim 1, wherein: The first-stage amplifier circuit includes a first DC blocking capacitor, a first amplifying transistor, a second amplifying transistor and a second DC blocking capacitor; A first end of the first DC blocking capacitor is connected to the signal input end, and a second end of the first DC blocking capacitor is connected to the first end of the first amplifying transistor; The second end of the first amplifying transistor is connected to the third end of the second amplifying transistor, and the third end of the first amplifying transistor is connected to the ground end; The first terminal of the second amplifying transistor is connected to the ground terminal through the second DC blocking capacitor; The second end of the second amplifying transistor is connected to the output end of the first-stage amplifying circuit and the input end of the second-stage amplifying circuit.

8. The low-noise amplifier circuit according to claim 1, wherein: The second stage amplifying circuit includes a third DC blocking capacitor, a fourth DC blocking capacitor, a third amplifying transistor and a fourth amplifying transistor; The first end of the third DC blocking capacitor is connected to the output end of the first stage amplifying circuit as the input end of the second stage amplifying circuit, and the second end of the third DC blocking capacitor is connected to the first end of the third amplifying transistor; The second end of the third amplifying transistor is connected to the third end of the fourth amplifying transistor, and the third end of the third amplifying transistor is connected to the ground end; The first end of the fourth amplifying transistor is connected to the ground end through the fourth DC blocking capacitor, and the second end of the fourth amplifying transistor is connected to the second-stage output matching network as the output end of the second-stage amplifying circuit.

9. The low-noise amplifier circuit according to claim 1, wherein: The low-noise amplifier circuit further includes a first gain adjustment circuit and a second gain adjustment circuit; The first gain adjustment circuit has one end connected to the first-stage amplifying circuit and the other end connected to the ground, and is configured to perform gain adjustment on the first-stage amplifying circuit; The second gain adjustment circuit has one end connected to the second-stage amplifying circuit and the other end connected to the ground, and is configured to perform gain adjustment on the second-stage amplifying circuit.

10. A radio frequency front-end module, comprising a substrate and a low-noise amplifier chip arranged on the substrate, characterized in that: The low-noise amplifier chip is provided with the low-noise amplifier circuit according to any one of claims 1 to 8.

11. The radio frequency front-end module according to claim 10, wherein: The RF front-end module further includes a first gain adjustment circuit and a second gain adjustment circuit; the first gain adjustment circuit includes a first gain adjustment inductor provided on the substrate, and the second gain adjustment circuit includes a second gain adjustment inductor provided on the substrate; The first gain adjustment inductor has one end connected to the first-stage amplifier circuit provided on the low-noise amplifier chip, and the other end connected to the ground; One end of the second gain adjustment inductor is connected to the second-stage amplifier circuit provided on the low-noise amplifier chip, and the other end is connected to the ground.

Images