Programmable millimeter wave radar integrated circuit
By designing programmable gain amplifiers and bandpass filters in radar systems and adopting acceleration mode, the problem of long transient establishment time in short-range FMCW radar signal processing is solved, and fast scanning and efficient target distance resolution are achieved.
Patent Information
- Application Number
- CN201980094300.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-03-29
- Publication Date
- 2025-03-04
- Estimated Expiration
- 2039-03-29
AI Technical Summary
When existing radar systems deal with short-range FMCW radar signals, there is a problem of long transient establishment time, which affects the target distance resolution and scanning efficiency.
An integrated circuit is designed that includes a programmable gain amplifier, a bandpass filter and a low-pass filter to achieve optimal receiver-level performance through software configuration. The integrated circuit adopts an acceleration mode to shorten the transient establishment time by switching the center frequency of the bandpass filter during the transient.
It realizes rapid scanning in the FMCW system, shortens the transient establishment time of the received signal path, and improves the target distance resolution and scanning efficiency.
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Figure CN113614560B_ABST
Abstract
Description
Technical Field
[0001] The present invention generally relates to processing received radar signals in a radar system. Background Art
[0002] Radar systems operate by transmitting a radar signal toward a target and detecting the reflected signal. Information that can be determined from the reflected signal includes the range, velocity, and size (and possibly angle of direction) of various objects, including the target. Traditionally, long-range radars have been used in conjunction with commercial and military aircraft and similar applications. More recently, radar has found use in relatively short-range applications - detecting targets within 0.025-0.5 meters from the transmitter / detector. In such short-range applications, it can prove advantageous to integrate the components of a radar system into a single integrated circuit.
[0003] Frequency modulated continuous wave (FMCW) signals are used to measure distance with high accuracy. In an FMCW system, the transmitted signal consists of a continuous wave carrier that is modulated by a periodic function. A common example is a sawtooth waveform. In this case, the frequency of the carrier increases linearly over a fixed period of time, generating a sawtooth waveform. The frequency difference between the received signal and the transmitted signal increases with the time delay, so the target distance can be determined.
[0004] The Doppler system uses a static (i.e., non-modulated or non-scanned) frequency carrier signal and has a received signal with a 0.01 to 1 kHz offset from the carrier depending on the speed of the target. This system is primarily used to measure the presence, speed, or movement of a target without accurately knowing the distance to the target. Summary of the invention
[0005] According to one aspect of the present invention, an integrated circuit is provided, the integrated circuit comprising a radar receiver for processing received radar signals. The integrated circuit comprises a low noise amplifier for connecting to a receiving antenna structure. The integrated circuit also comprises a first programmable gain amplifier. The integrated circuit also comprises a first programmable bandpass filter. The integrated circuit also comprises a second programmable gain amplifier. The integrated circuit also comprises a second programmable bandpass filter. The integrated circuit also comprises a programmable low pass filter.
[0006] Optionally, in any of the above aspects, the integrated circuit further comprises a mixer having an input connected to an output of the low noise amplifier, and an output connected to an input of the first programmable gain amplifier.
[0007] Optionally, in any of the above aspects, the integrated circuit includes the following integrated circuit: in the integrated circuit, the second programmable gain amplifier has an input terminal connected to the output terminal of the first programmable bandpass filter, and an output terminal connected to the second programmable bandpass filter.
[0008] Optionally, in any of the above aspects, the integrated circuit comprises an integrated circuit in which the second programmable bandpass filter has an output terminal connected to an input terminal of the programmable low-pass filter.
[0009] Optionally, in any of the above aspects, the integrated circuit comprises the following integrated circuit: the integrated circuit also includes an analog-to-digital converter, the analog-to-digital converter having an input terminal connected to the output terminal of the programmable low-pass filter.
[0010] Optionally, in any of the above aspects, the integrated circuit comprises an integrated circuit in which each amplifier comprises an amplifier stage, the amplifier stage comprising at least two amplifier elements and at least two bypass elements.
[0011] Optionally, in any of the above aspects, the integrated circuit comprises an integrated circuit in which each bandpass filter comprises a bandpass filter stage, the bandpass filter stage comprising at least two bandpass filter elements and at least two bypass elements.
[0012] Optionally, in any of the above aspects, the integrated circuit includes the following integrated circuit: in the integrated circuit, the output of the mixer includes an in-phase signal and an orthogonal signal, and the in-phase signal and the orthogonal signal represent the difference between the transmitted modulated carrier and the received radar signal.
[0013] Optionally, in any of the above aspects, the integrated circuit includes an integrated circuit in which the first programmable bandpass filter is programmed with a lower center frequency than the second bandpass filter.
[0014] Optionally, in any of the above aspects, the integrated circuit includes an integrated circuit in which the first programmable gain amplifier is programmed with a lower gain than the second programmable gain amplifier.
[0015] Optionally, in any of the above aspects, the integrated circuit includes an integrated circuit as follows: in the integrated circuit, the first bandpass filter and the second bandpass filter can be programmed during reception of the received radar signal, and the first bandpass filter and the second bandpass filter are used to be programmed with a frequency between an optimal center frequency and a maximum center frequency.
[0016] Optionally, in any of the above aspects, the integrated circuit includes the following integrated circuit: in the integrated circuit, the received radar signal is a sawtooth frequency modulated continuous wave radar signal, and the first bandpass filter and the second bandpass filter are used to program the frequency between the optimal center frequency and the maximum center frequency during the waiting period between each slope in the sawtooth signal.
[0017] According to another aspect of the present invention, a method for processing a received radar signal in a radar receiver-level integrated circuit is provided. The method may include: selecting a radar system configuration, the radar system configuration including a system type, which is an FMCW system or a Doppler system; programming at least a first programmable gain amplifier stage to a first gain; programming a first programmable bandpass filter stage to a first center frequency; and programming a programmable low-pass filter to a first LPF gain.
[0018] Optionally, in any of the above aspects, the method further includes programming the second programmable gain amplifier to a second gain; and programming the second programmable bandpass filter to a second center frequency.
[0019] Optionally, in any of the above aspects, the first center frequency is lower than the second center frequency.
[0020] Optionally, in any of the above aspects, the first gain is lower than the second gain.
[0021] Optionally, in any of the above aspects, the method also includes: programming the first programmable bandpass filter stage to the first center frequency during a first portion of the radar signal; programming the second programmable bandpass filter stage to the second center frequency during a first portion of the received radar signal; and programming the first programmable bandpass filter stage and the second programmable bandpass filter stage to a maximum center frequency during a second portion of the received radar signal.
[0022] Optionally, in any of the above aspects, the received radar signal is a sawtooth frequency modulated continuous wave radar signal, and the first part of the received radar signal is a slope in the received radar signal, and the second part of the received radar signal is a waiting period between the slopes.
[0023] Optionally, in any of the above aspects, the method further includes programming the second programmable gain amplifier to be bypassed; and programming the second programmable bandpass filter to be bypassed.
[0024] According to another aspect of the present invention, there is provided a method of operating a radar receiver for receiving a reflected sawtooth frequency modulated continuous wave radar signal. The method comprises: programming at least a first programmable gain amplifier stage to a first gain; programming a first programmable bandpass filter stage to a first center frequency during a first portion of the radar signal; and programming the first programmable bandpass filter stage to a maximum center frequency higher than the first center frequency during a second portion of the radar signal.
[0025] Optionally, in any of the above aspects, the method also includes: during a first portion of the radar signal, programming a second programmable bandpass filter stage connected in series with the first programmable bandpass filter stage to the first center frequency; during the second portion of the radar signal, programming the second programmable bandpass filter stage to the maximum center frequency.
[0026] Optionally, in any of the above aspects, the radar signal is a sawtooth frequency modulated continuous wave radar signal, and the first part of the radar signal is a slope in the radar signal, and the second part of the radar signal is a waiting period between the slopes in the radar signal.
[0027] Optionally, in any of the above aspects, the method is repeated during each cycle of the FMCW radar signal. This summary briefly introduces some concepts that will be further described in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to help determine the scope of the claimed subject matter. The claimed subject matter is not limited to implementations that solve any or all of the disadvantages mentioned in the background technology. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The present invention in its various aspects is illustrated by way of example and not limitation in the accompanying figures, in which like references indicate similar elements.
[0029] Figure 1 A first embodiment of a radar system provided on an integrated circuit is shown.
[0030] Figure 2 shows the configuration for Figure 1 A flow chart of a method of receiving a radar system.
[0031] Figure 3 yes Figure 1 Block diagram of the receive channel of a radar system.
[0032] Figure 4 It is configuration Figure 2 A flow chart of a step in a method of a radar system.
[0033] Figure 5 is a frequency-time graph showing a transmitted signal in a frequency modulated continuous wave radar system.
[0034] Fig. 6A is a graph of the output voltage versus time of the low-pass filter stage in an FMCW radar system.
[0035] Figure 6B It is a graph of the output voltage of the low-pass filter stage relative to time in a frequency modulated continuous wave radar system using the acceleration technology provided by the present invention.
[0036] Figure 7 is a flow chart of an accelerated method for operating a receiver stage of a radar system.
[0037] Figure 8 is a block diagram of a first programming state of a receiving stage of a radar system integrated circuit.
[0038] Fig. 9 is a block diagram of a second programming state of a receiving stage of a radar system integrated circuit.
[0039] Fig.10 is a block diagram of a third programming state of a receiving stage of a radar system integrated circuit.
[0040] Fig.11 is a graph of selected center frequency selection and received signal bandwidth for a bandpass filter stage of a first FMCW receiver system with a 0 Hz offset (ie, zero intermediate frequency or zero IF).
[0041] Fig.12 is a graph of selected center frequency selection and received signal bandwidth for a bandpass filter stage of a second FMCW receiver system with a 0 Hz offset.
[0042] Fig.13 is a graph of selected center frequency selection and received signal bandwidth for a bandpass filter stage of a third FMCW receiver system with a 0 Hz offset.
[0043] Fig.14 is a graph of selected center frequency selection and received signal bandwidth for a bandpass filter stage of a fourth FMCW receiver system with a 0 Hz offset, and received signal bandwidth for a bandpass filter stage of a FMCW receiver system with a 500 Hz offset. DETAILED DESCRIPTION
[0044] The present invention is now described with reference to the accompanying drawings and is generally directed to an integrated circuit that provides optimal radar reception for many different radar systems and configurations. The technology provides a single integrated circuit that can be configured by software to provide optimal receiver-level performance for multiple variations of frequency modulated continuous-wave (FMCW) radar systems as well as Doppler systems, and in both types of systems, including zero offset or non-zero offset frequency tones. In addition, a precise "speed-up" mode for the receiver level is disclosed to support fast scanning in FMCW systems. The integrated circuit can be configured by software to create optimal performance regardless of which radar system is used and whether the transmitted signal uses frequency offset.
[0045] The integrated circuit described herein is suitable for applications using a short-range FMCW radar system that can detect targets within a range of 0.025-0.5m. Examples of applications for this type of system include detecting a person's hand or finger to detect fine finger and gestures, etc. The frequency sweep slope of such a system can be in the range of about 8 to 64MHz / μs with a sweep bandwidth (BW) of up to 15GHz. The received signal is then offset from the transmitted offset tone (zero or non-zero) by 1 to 200kHz. The receiver signal to noise ratio (SNR) can be greater than –9dB (2MHz BW). An FMCW system with these parameters provides accurate distances to stationary or moving targets.
[0046] The integrated circuits described herein are also suitable for use in applications using Doppler radar systems. Heart rate and respiration monitors are exemplary applications of short-range Doppler systems. It should be noted that the range of a Doppler system can extend to more than 0.5 meters.
[0047] Variations of these two types of systems are referred to herein as "offset" FMCW and Doppler systems. In such systems, the transmission stage may use an offset frequency signal (i.e., 500kHz relative to the carrier) rather than the carrier itself. This causes the received signal to be offset. For example, with a 500kHz offset, the received signal is shifted to 300-499kHz rather than the 1-200kHz band of a zero-offset FMCW system. Similar offsets occur in Doppler systems. This type of offset is used to avoid low-frequency noise inherent in all semiconductor devices used in integrated circuits.
[0048] Figure 1 A first embodiment of a radar system 50 is shown. The radar system 50 includes an integrated circuit 100, the radar system 50, and a host 190. Figure 1An embodiment in which the integrated circuit includes RF front-end circuitry is shown. In another embodiment, the processor 172 and the receiver stage module may comprise a portion of the IC 100. The integrated circuit 100 includes a transmitter stage 110 capable of outputting radar signals at frequencies in the range of 56-71 GHz via an output antenna structure 105. Figure 1 , the antenna structure 105 is shown as a single antenna element. However, it should be understood that the configuration of the output antenna structure 105 may vary and include any suitable antenna structure suitable for outputting radar signals from the transmitter stage 110. In addition, although the output antenna structure 105 is shown as being external to the integrated circuit 100, the antenna structure may be formed into the integrated circuit 100. In this FMCW radar scheme, the transmit signal is a linear frequency-modulated continuous wave (L-FMCW) sequence, and its frequency-time characteristics follow Figure 5 The stepped sawtooth pattern shown. Each cycle of the modulation is applied at a new step in the carrier frequency. In an FMCW radar implementation, the radio frequency carrier (RF carrier, stepped or non-stepped) in the transmit stage is modulated by a sawtooth pattern, producing a linear frequency modulated continuous wave local oscillator, which is amplified and transmitted from the output antenna stage 105.
[0049] The radar system 50 also includes a receiver stage 120 for detecting reflected signals transmitted by the transmitter stage 110. Figure 1 As shown, four separate antenna elements may constitute antenna stage 115. Each element may be selected by receiver stage 120 as described below. Receiver stage 120 includes a low noise amplifier stage 125, a mixer stage 130, a first programmable gain amplifier stage 135, a first programmable bandpass filter stage 140, a second programmable gain amplifier stage 145, a second programmable bandpass filter stage 150, a low pass filter stage 155, and an analog-to-digital converter stage 160. The output of the analog-to-digital converter is connected to a host 190.
[0050] The stages are connected in series, and in one embodiment, the order of the stages in series is a unique aspect and provides unique flexibility in the receiver stage 120 .
[0051] The host 190 may optionally include a processor 172 for executing code that instructs the processor to program various components of the receiver stage 120 according to any of the various configurations and operations described herein. The host 190 may also include non-volatile memory 185 and system memory 188. The non-volatile memory may store code 183 and other data for use by the processor 172 in the system 188. The system memory 188 is shown as including an operating system 182, code 183 including instructions that can be executed by the processor 172 to implement any of the processes described herein, and a receiver stage control register 180 that provides control signals 195 to program the elements of the receiver stage 120, as described below. In one embodiment, the processor 172 may include a dual-core processor having a general-purpose processor core and a digital signal processor (DSP) core. The code 183 may be executed on one or both cores to control the IC 100. Although not shown, control lines from the host are provided to the transmitter stage 110, and a digital-to-analog converter may be included in the transmitter stage signal path. The control code 180 indicates the combination of Figure 3 Describes the programming of the receiver stage components.
[0052] Figure 2 shows the configuration for Figure 1 1 and 2. The method of the receiver stage 120 is shown. At 210, the type and configuration of the radar system to be used by the host system (offset or non-offset, and the sweep slope if it is an FMCW system) is selected. At 220, the low noise amplifier, programmable gain amplifier, band pass filter, and low pass filter are programmed to implement the selected system. Figure 4 and the accompanying description describe one embodiment for programming these elements. Various configurations of receiver stages for different types of systems are disclosed herein.
[0053] Figure 3 yes Figure 1 1 is a more detailed diagram of the receiver stage 120 of FIG. 1, showing the analog components of each stage. The circuit described herein is for a differential quadrature phase receiver. In the receiver stage 120, the low noise amplifier stage 125 includes four low noise amplifiers (or amplifier elements), two of which are shown - amplifier 302 and amplifier 304. Each amplifier (302, 304) is selectively enabled to select one of four antenna elements (connections to two of which are shown). A single antenna element ( Figure 3301, 303 associated with each amplifier 302-304. More or fewer antenna elements and low noise amplifiers may be used, depending on the technique.
[0054] Each low noise amplifier in low noise amplifier stage 125 may have a gain of 21 dB+ / −2 dB and a noise figure of 6 dB+ / −2 dB, but the technology should not be construed as limited to the above gain and noise parameters. The low noise amplifier outputs the received signal from the selected element to mixer stage 130 .
[0055] The output of the low noise amplifier stage 125 is connected to the mixer stage 130. The mixer stage 130 is used to remove the RF carrier, thereby generating an intermediate frequency. In one embodiment, the mixer stage 130 is not programmable. The mixer stage 130 includes a transformer element 315 that couples the low noise amplifier stage 125 to the mixers 310 and 312. The mixer stage outputs the in-phase component of the received signal from the low noise amplifier and the quadrature component of the received signal. Each mixer 310, 312 has a gain of -4dB + / -2dB and a noise figure of 6dB + / -2dB. The mixer 310 receives an input from the transmitting stage local oscillator in-phase signal path, while the mixer 312 receives an input from the transmitting stage local oscillator quadrature signal path. The received signal from the low noise amplifier stage 125 is mixed with the in-phase and quadrature outputs of the local oscillator from the transmitting stage, which removes the RF carrier and leaves the in-phase (I) and quadrature (Q) channels for further processing in the receiver stage. These in-phase and quadrature signals include the target information and any frequency offset (zero or non-zero).
[0056] The output of the mixer stage is summed with a receiver digital-to-analog (DAC) compensation signal 350 before being input to the first programmable amplifier stage 135. As is well known, interference may exist between the transmit signal and the receive signal in a radar system depending on the degree of isolation between the transmit antenna stage 105 and the receive antenna stage 115. This self-interference may be partially or completely canceled by a compensation signal (via the receiver compensation signal 350) from a receiver compensation DAC (not shown).
[0057] The first programmable gain amplifier stage 135 includes a first programmable differential operational amplifier (or amplifier element) 322 and a bypass switch (or bypass element) 326, and a second programmable differential operational amplifier 324 and a bypass switch 328. The gain of each programmable differential operational amplifier 322, 324 can be programmed between 3 and 30 dB in 3 dB steps (+ / -1 dB), and the equivalent input noise of each amplifier is 16 (+ / -4) nV / rtHz. A 0 dB bypass state can also be obtained by bypassing switches 326, 328.
[0058] The first programmable bandpass filter stage 140 includes a first bandpass filter (or filter element) 332 and a bypass switch (or bypass element) 336 and a second bandpass filter 334 and a bypass switch 338. Each filter has a center frequency (Fc) that can be programmed between 50-400kHz in binary steps (1x, 2x, 4x, 8x). A 600kHz state is also available, used as a "maximum center frequency" state for a unique acceleration operating mode, as described below. Each programmable bandpass filter 332, 334 has an equivalent input noise of 90nV / rtHz at 50kHz and an equivalent input noise of 41nV / rtHz at 400kHz. A 0dB bypass state is also available.
[0059] The second programmable gain amplifier stage 145 includes the first programmable differential operational amplifier 342 and the bypass switch 346, and the second programmable differential operational amplifier 344 and the bypass switch 348. In one embodiment, the amplifier stage 145 is of the same design as the amplifier stage 135. As with the first programmable gain amplifier stage 135, the gain can be programmed between 3 and 30 dB in 3 dB steps, and a 0 dB bypass state is also available. It should be appreciated that, as described herein, during operation, the second programmable gain amplifier stage 145 may not be programmed to the same center frequency or bypass state as the first programmable gain amplifier stage 135.
[0060] The second programmable bandpass filter stage 150 includes a first bandpass filter 352 and a bypass switch 356 and a second bandpass filter 354 and a bypass switch 358. In one embodiment, the second programmable bandpass filter stage 150 is the same design as the first programmable bandpass filter stage 140. Each filter has the same programmability as the first programmable bandpass filter stage 140, with the same bypass and the same maximum center frequency capabilities. It should be recognized that, as described herein, during operation, the second programmable bandpass filter stage 150 may not be programmed to the same center frequency or bypass state as the first programmable bandpass filter stage 140.
[0061] Low pass filter stage 155 includes a first low pass filter (or filter element) 362 and bypass switch 366 and a second low pass filter 364 and bypass switch 368. Each filter has a programmable gain between 0 and 6 dB in a single 6 dB step and has a 0 dB bypass state (to remove filtering).
[0062] The analog-to-digital converter (ADC) stage 160 includes two ADCs 372 and 374 with 14-bit amplitude quantization. Each ADC responds to an ADC clock, which in one embodiment can run at 96 MHz. The output of ADC 372 is a digitized in-phase signal, and the output of ADC 374 is a digitized quadrature signal.
[0063] The control code 183 controls the programming of each component by writing to the receiver stage control registers 180. These hardware registers 180 are dedicated to the control bits of each component in the receiver stage 120. There can be a direct connection between the registers 180 and the control signals 195, Figure 3 The number of bits used to program each element in the receiver stage is shown.
[0064] Additional instructions to the processor 172 control the transmit state of the transmit stage 110 through other dedicated registers (not shown). For example, the transmit power and offset frequency (if any) can be programmed by software running on the processor. As part of the FMCW setup, the local oscillator settings are also controlled by the processor. However, due to precise timing requirements, the actual sweep commands to the LO can be performed by custom hardware.
[0065] The numbers appended to the lines represent the number of bits of binary information required to control the various states. For example, the first programmable gain amplifier stage 135 and the second programmable gain amplifier stage 145 have 10 available gain states plus one bypass state, so 4 bits are required to cover all states. Similarly, the first programmable bandpass filter stage 140 and the second programmable bandpass filter stage 150 each require 3 bits to cover 5 center frequencies, plus 1 bypass state. The low pass filter 155 uses 2 bits to cover 2 gain states plus one bypass state.
[0066] Figure 4 A method of programming the receiver stage is shown. Figure 4 It can be shown Figure 2An embodiment of step 220 of . In 210, while selecting three variables including the radar system type, an offset frequency (if any) and a sweep slope (if any) are selected. Based on the selection in 210, the following are known: (a) the type of system being programmed; FMCW or continuous wave system; (b) the offset frequency value (if any); (c) the sweep (i.e., ramp) rate if FMCW is being implemented; (d) the transmit power and TX-RX antenna leakage; (e) the required transient settling time; (f) the expected target range (e.g., up to 0.5 meters for finger gesture recognition). Using the given parameters (a), (b), (c), and (f), and through well-known radar calculations, the expected target frequency seen at the receiver will be known. (Any offset frequency (b) is added to the expected target frequency at the receiver.) Based on (d), the self-interference signal amplitude is known.
[0067] When configuring the receiver stage, important receive channel performance parameters can be optimized and analyzed in a system link budget simulation to assume zero offset in an FMCW system, deriving Table 1 (below). Similar optimizations can be performed for FMCW systems with non-zero offset. Items optimized for each sweep slope include: noise figure, dynamic range, signal to noise ratio (SNR), and transient settling time, all of which are well-known parameters for any radio design. The optimization techniques used for programming (in Figure 4 ) As shown in steps 420-460, the technique generates Table 1 and is based on a link budget simulation.
[0068] At 420, the gain of the first programmable gain amplifier is determined based on the maximum expected signal amplitude. The maximum signal amplitude is typically a self-interference signal in the transmitter antenna design. In other embodiments, the signal amplitude can be measured by a software gain calibration process. The software process sets all subsequent elements (blocks 140-155) after the first programmable gain amplifier 135 to a bypass state (0 dB gain and no filtering), so the ADC (160) can directly measure the output amplitude of the first programmable gain amplifier 135.
[0069] Based on the values of Table 1, or based on calibration, the gain of the first programmable gain amplifier 135 is then set to the maximum allowed gain. The maximum allowed gain is the gain that reduces the overall receive channel noise figure, thereby tending to increase the dynamic range.
[0070] In step 430, the center frequency of the first programmable bandpass filter 140 is determined based on the expected target frequency. The center frequency should be equal to or greater than the maximum expected frequency, but as low as possible to avoid excessive noise figure degradation caused by signal attenuation. The goal is that the bandpass filter 140 has the highest gain at the lowest signal amplitude. This occurs in the highest target range, where the signal amplitude is the lowest and the received frequency is the highest. Therefore, setting the center frequency of the first programmable bandpass filter equal to or slightly above this maximum expected signal frequency will help optimize the noise filter.
[0071] At 440, the center frequency of the second programmable bandpass filter 150 is determined. This center frequency must also be greater than or equal to the maximum expected signal frequency, taking into account transient settling times. It is well known that a bandpass filter with a fixed "bandwidth-to-Fc" ratio (i.e., BW / Fc) will settle faster as the center frequency increases. (An alternative term is "BW percentage," which is equal to (BW / Fc)*100.) In order to meet the settling time criteria of (e) above (even when using the acceleration techniques described herein), the center frequency of the second programmable bandpass filter 150 must be greater than the center frequency of the first programmable bandpass filter 140 for the low center frequency cases shown in Table 1 (i.e., the 8, 16, and 32 MHz / μs sweep cases). For the highest Fc case (64 MHz / μs), this restriction is not necessary.
[0072] In step 450, the gain of the second programmable gain amplifier 145 is determined by the maximum amplitude signal. The maximum signal at the second programmable gain amplifier 145 may be a self-interference signal, just like the first programmable gain amplifier 135. That is, even if the first programmable bandpass filter 140 is attenuating this undesired signal (which is present at low frequencies), the signal is still greater than the desired target signal at any frequency. Therefore, the gain of the second programmable gain amplifier 145 is then set to the maximum gain allowed. The criteria are selected to avoid any saturation or excessive distortion in the second programmable gain amplifier 145.
[0073] In 460 , the gain of the low pass filter 155 is typically fixed at 6 dB, but in extremely high self-interference situations, the gain may be set to 0 dB to avoid saturation or distortion at the output of the low pass filter 155 .
[0074] At this point, the values (center frequency and gain) are available for programming. Using the selections shown in Table 1 (or based on in-field calibration), the values determined in 420-460 are programmed in 470 by code 183 (running on processor 172). The result is that all optimized center frequencies and gains are set prior to scanning. Programming of the filter center frequencies and programmable amplifier gains is accomplished by well-known techniques.
[0075] The programmable receiver stage 120 solves a number of problems.
[0076] Figure 5-Figure 7 There is shown one problem solved by a first configuration and operation of a programmable receiver stage and programmable radar integrated circuit receiver stage 120. The first problem solved is FMCW transient establishment (FMCW signaling). Figure 5 is a frequency-time graph showing a transmitted signal in a frequency modulated continuous wave radar system.
[0077] refer to Figure 5 , during a multi-GHz (requiring multiple segments, each step) sweep of the FMCW transmit signal 510, the gate turns the transmit stage sweep modulation off and on during the wait time (Wait0) of the signal 510. Wait0 is used to step the RF carrier frequency in preparation for a new segment using a new starting point. The total sweep from 56 to 71 GHz may occur in 256 μs. The non-signaling transients (caused by the gating) must settle to a steady-state value at the receive stage output in just 256 μs. Therefore, the goal is to quickly settle the receive stage during the transient portion of each segment. This allows for fast signal slopes because there is less time waiting for transients to settle and more time to measure the desired signal. Fast signal slopes can improve range resolution of radar targets.
[0078] like Figure 5 As shown, the ideal transmitted radar signal 505 is a linear frequency ramp (i.e., chirp) from the beginning of ramp 0 to the end of ramp 3. That is, the frequency increases linearly between these points without any discontinuities. This sweep will then be repeated continuously during the radar measurement according to the sawtooth modulation. However, for extremely wide frequency sweeps, hardware limitations require that each sweep be divided into linear step segments, with Figure 5 There are four segments shown in FIG: ramp 0, ramp 1, ramp 2, and ramp 3. However, it should be noted that in alternative embodiments, there may be any number of segments from 2 to N.
[0079] At the beginning of each ramp segment (the beginning of the "wait0" time window), there is a discontinuity. Because linearity in the overall sweep is what is most important, this discontinuity is ignored in the receiver stage processing. The receiver stage must ignore the "wait2", "wait0", and "wait1" time windows in order to piece together all the segments into a completely linear sweep from end to end. Each discontinuity that appears at the beginning of the "wait0" window will cause a transient spike in the receiver stage signal. The spike must be established during the combined "wait0" and "wait1" time windows when the receiver is not processing the data. Otherwise, the segmented sweep will not appear linear from end to end after reconstruction.
[0080] Fig. 6A shows a transient spike, Fig. 6Ais a graph of the voltage output by the LPF term 362 or 364 of the LPF 155 versus time. Fig. 6A and Figure 6B In the , the x-axis is time in seconds. The y-axis scale shown is for relative analysis, as these exact voltages may or may not exist in an embodiment. Two transients are shown, but the 40 microseconds between the transients are not necessarily representative of the actual system scan timing. Fig. 6A Shown with Figure 6B The transient build-up for the accelerated method compared to the non-accelerated case is shown.
[0081] Fast bandpass filter stage settling during transient periods (between linear ramp segments) can reduce overall scan time. Shorter scan times provide more scans per second to collect more target data. This data can then be averaged over a shorter processing period to improve the accuracy of target parameters such as range or motion.
[0082] Among the unique features of this technology is the provision of Figure 6B and Figure 7 The “speed up” method of operating the receiver stage is shown. The speed up method is able to reduce the transient settling time of the receive signal path, specifically the bandpass filter stage in an FMCW system (without the transmit signal offset frequency). In order for the receiver signal path to settle within the “wait0” and “wait1” time windows, the bandpass filter stage should have a high center frequency. In a practical implementation, the center frequency required for optimal radar performance may be too low to settle within this time, which may be only 10-20μs. Figure 7 A method of switching the center frequency of each bandpass filter from the optimum radar center frequency to a higher center frequency and then back to the optimum radar center frequency during transients.
[0083] exist Figure 7 Prior to the method, according to the configuration of the receiver stage for a given radar application, (according to Figure 4 ) to program each bandpass filter to its operating settings. Figure 7 6 , the center frequency of each bandpass filter stage 140, 150 is programmed to a maximum value (i.e., Max FC) at the beginning of each transient in 710, which in the above embodiment is 600kHz. After a short wait in 730 (equal to the Wait0 period in one embodiment), each center frequency is programmed to its original setting 740 (depending on the selected operating mode of the receiver stage), and the method waits for the next transient in 750. In another embodiment, the wait time 730 corresponds to the pulse shown as 610 in FIG6 . During the pulse-on state, the center frequency is programmed to the maximum value. The pulse 610 may or may not be equivalent to the duration of Wait0.
[0084] Figure 6B The corresponding maximum frequency "pulse" 610 is shown during which the bandpass filter is set relative to the maximum center frequency of the transient, and how the pulse affects the transient period. Figure 6B A fast bandpass filter settling during the transient period (between linear ramp segments) is shown. In one embodiment, the maximum center frequency is used only during the "wait0" window, where the transient spike will be settling near its final value. Then, at the beginning of "wait1", the center frequency is switched back to the programmed value so that the transient spike is fully settling before the next linear ramp segment. In another embodiment, pulse 610 can be wider or narrower than Wait0, and / or can start at Wait0 and end at Wait1.
[0085] exist Fig. 6A In the example, the transient spike is quite wide and the settling time is about 35μs (to within a few millivolts of the final settled value). Figure 6B The acceleration method shown, the rising and falling edges of the 4μs pulse indicate the precise moment of switching from the optimal center frequency to the maximum center frequency (rising edge) and back to the optimal center frequency again (falling edge). This 4μs time interval is programmable and can represent the entire "wait0" window or a small part of it. The final value can be selected for each system used and each scan used. The settling time shown above is about 16μs with acceleration and about 35μs without acceleration.
[0086] Turbo mode can be used in a variety of applications, but not all applications will benefit from implementing it. For example, in an offset FMCW system using an offset of about 500kHz, the optimal programming value for the bandpass filter stage is at or near the maximum center frequency, so no speed-up is needed.
[0087] As a second problem addressed, the integrated circuit described herein also provides a programmable improvement in the dynamic range of the receiving stage. This improvement in dynamic range is provided by using programmable blocks in the receiver stage. The receiver-level system settings are defined by selecting the type of radar system (FMCW, Doppler), the transmit offset frequency (0, 500kHz) (if any), and the scan slope (0, 8, 16, 32, 64MHz / μs). By appropriately programming each block, the best receiver performance (i.e., the maximum achievable dynamic range (DR)) can be achieved for any system setting, where the dynamic range is the amplitude ratio between the largest signal and the smallest signal that can be reliably processed to provide good quality results.
[0088] Figure 8An embodiment of a programmed receiver stage configured to implement an FMCW system with no offset and a sweep slope of 8 is shown. Figure 8 As shown, the first programmable gain amplifier stage 135 has a programmed gain of 6 dB, the first programmable bandpass filter stage 140 has a programmed center frequency of 50 kHz, the second programmable gain amplifier stage 135 has a programmed gain of 30 dB, the second bandpass filter stage 150 has a programmed center frequency of 100 kHz, and the low-pass filter stage 155 has a programmed gain of 6 dB.
[0089] Although the first programmable bandpass filter stage 140 has a programmed center frequency of 50 kHz, it should be appreciated that each of the programmable bandpass filter stages 140, 150 may be programmed at a center frequency of 50 kHz. Figure 7 Operate in the acceleration method. Fig. 9 and Fig.10 Other examples of programmed receiver stages are shown.
[0090] Fig. 9 A programmed receiver stage 120 of an FMCW system is shown with no offset and a sweep slope of 64. Fig.10 The receiver stage of a radar system with a 500kHz offset and a sweep slope of 8 is shown. Fig.10 In the embodiment of , due to the offset, the sweep slope becomes irrelevant, so the system is equivalent to a Doppler system configuration with a 500kHz offset. As described above, in an offset FMCW system, the optimal setting of the bandpass filter stage is at or near the maximum center frequency, so no acceleration is required. Other receiver states are available, but not shown above.
[0091] Even in Figures 8 to 10In all the examples in the figure, the gain of the first programmable gain amplifier stage 135 is set to 6dB, but it should be noted that the gain of the first programmable gain amplifier stage 135 will actually be determined by two factors: the degree of isolation between the transmit antenna stage 105 and the receive antenna stage 115 and / or the amount of cancellation provided to the first programmable gain amplifier stage 135 by the receiver DAC compensation signal 350. With respect to the degree of isolation between the transmit / receiver stages, since the transmit stage 110 and the receiver stage 120 operate simultaneously, the leakage of the transmit signal into the receiver usually occurs at a much higher amplitude than the desired receiver signal reflected from the radar target. This "self-interference" can cause saturation and / or distortion in the receiver signal path and reduce the dynamic range (DR). Therefore, the gain of the first programmable gain amplifier stage 135 is set by a gain calibration process before the radar system is operated to avoid this situation. As a result, if the antenna isolation is high, the gain of the first programmable gain amplifier stage can be increased. With respect to the amount of cancellation provided by the receiver DAC compensation signal 350, the self-interference signal can be partially or completely cancelled by the compensation signal 350 from the receiver compensation DAC (not shown). This may be performed by digital baseband processor operation, and if more cancellation is provided, higher gain in the first programmable amplifier stage 135 may be achieved.
[0092] FMCW and offset FMCW systems operable to use the techniques discussed herein can have sweep slopes ranging from 0-64 MHz / μs and managed in binary steps (1x, 2x, 4x, ...), resulting in possible slopes of 8, 16, 32, and 64 MHz / μs. Thus, the integrated circuits described herein provide a wide range of FMCW sweep slopes. Within the sweep slope range of 8-64 MHz / μs, targets within 0.025-0.5 m produce receiver baseband signals of 1.3-209 kHz (for zero transmit offset conditions).
[0093] Another advantage of the inventive technique is that the bandpass filter stage can be used as a range compensation filter. Range compensation means that the amplitude of close targets is attenuated and the amplitude of distant targets is not attenuated, resulting in a receiver signal level that is nearly constant regardless of the receiver's distance.
[0094] In an offset-free FMCW system, the bandpass filter stage center frequency is greater than the maximum receiver frequency encountered in order to properly use the bandpass filter stage as a range compensation filter. The amplitude slope of each bandpass filter stage is selected to be 20 dB / decade for receiver frequencies below the center frequency. Two bandpass filter stages in series produce 40 dB / decade, which can theoretically compensate for targets in any range. Having two of these bandpass filter stages in the receiver signal path allows the maximum possible dynamic range, provided that the available center frequency is greater than any receiver signal frequency. In an FMCW system with zero offset frequency, a sweep slope of 8-64 MHz / μs, and a target range of 0.025-0.5 m, the receiver baseband frequencies will cover 1.3-209 kHz. However, any one sweep slope will only produce a small fraction of these frequencies. For example, an 8 MHz / μs sweep slope produces receiver frequencies within 1.3-26 kHz within the specified target range of 0.025-0.5 m, while a 64 MHz / μs sweep slope produces receiver frequencies within the range of 10-209 kHz. The frequency doubles as the sweep slope doubles. In this embodiment, a unique center frequency is selected for each sweep slope. This allows for maximum dynamic range for each slope used.
[0095] For offset FMCW systems, the bandpass filter stage does not provide range compensation because the occupancy of all possible baseband receiver signal frequencies is much smaller than a single decade, regardless of sweep slope or target range. For offset systems, a single center frequency is chosen that closely matches the offset frequency. It is not based on sweep slope, as in a zero-offset FMCW system.
[0096] Figure 11 to Figure 14 The center frequency selections chosen for the first bandpass filter stage 140 for different sweep slopes in a FMCW receiver system with a 0 Hz offset are shown. In all cases, the target range is 0.025-0.5 m. Fig.14 Also shown is the center frequency of any sweep slope used in an offset FMCW system with a 500kHz offset example. Figure 11-Figure 14 In the figure, the x-axis is the receiver baseband frequency (Hz), the left y-axis is the bandpass filter stage gain (dB), and the right y-axis is the bandpass filter stage group delay (seconds). Regarding group delay, the bandpass filter stage design is a second-order filter with Q = 0.625 (quality factor). This allows the group delay to be relatively constant over the receiver signal frequency for each bandpass filter stage center frequency setting.
[0097] Fig.11 A graph showing the range of received signal frequencies 1100 and the center frequency (50 kHz) for an 8 MHz / μs sweep slope is shown.
[0098] Fig.12 The range and center frequency (100 kHz) of the received signal frequency 1200 for a 16 MHz / μs sweep slope are shown.
[0099] Fig.13 The range and center frequency (200 kHz) of the received signal frequency 1300 for a 32 MHz / μs sweep slope are shown.
[0100] Fig.14 The range and center frequency (400 kHz) of the received signal frequency 1400 for a 64 MHz / μs sweep slope, and the offset 1402 in the FMCW system using any sweep slope are shown.
[0101] The center frequency of the second bandpass filter stage 150 may be selected to be higher than the center frequency of the first bandpass filter stage 140 to shorten the receiver transient settling time, whether or not the speed-up mode is used.
[0102] In one embodiment, the bandpass filter stage center frequency configuration may be as shown in the following table.
[0103]
[0104] A possible disadvantage of having a higher center frequency for the second bandpass filter stage 150 than for the first bandpass filter stage 140 is a greater signal attenuation in the bandpass filter 150. The reduced signal level will generally reduce the receiver dynamic range, but this can be compensated for by selecting a larger programmable gain (30 dB) in the second programmable amplifier stage 135 in the receiver sequence before the bandpass filter stage 150. Therefore, a second programmable amplifier stage 145 is used before the second bandpass filter 150.
[0105] The programmability of each bandpass filter stage is an aspect of the technology that allows for the maximum possible dynamic range given the many possible sweep slopes that can be implemented in a radar system and can further enable optimal performance of an offset FMCW system regardless of the sweep slope.
[0106] Considering any possible radar system settings that can be used in radar products, the use of programmable blocks and sequencing of programmable blocks in the receiver signal path can configure the receiver stage to provide a state that provides maximum dynamic range performance. The sequencing of each stage optimizes end-to-end noise and high dynamic range. In addition, other useful receiver states can be programmed for internal calibration of the transmit and receive stages. These internal calibrations include first programmable gain amplifier gain calibration, transmit IQ balance, receiver IQ balance, and transmit local oscillator (LO) leakage calibration.
[0107] A fixed gain low noise amplifier stage is used for low noise. The low noise amplifier stage gain is high enough to provide a good overall noise figure, but low enough to avoid signal compression in the output of the first programmable gain amplifier stage due to the self-interference signal. The use of differential operational amplifiers in the programmable amplifier stage and the use of orthogonal signal paths can have a large received signal when using a low power supply voltage (e.g., less than one volt). The 14-bit ADC converter used in the analog-to-digital converter stage 160 is used to provide a spurious free dynamic range of at least 75 dB. The gains of the first programmable gain amplifier stage 135, the first programmable bandpass filter stage 140, the second programmable gain amplifier stage 145, the second programmable bandpass filter stage 150, and the low pass filter stage 155 are calibrated according to the self-interference signal level. Low gain is required when the optional "self-interference signal DAC compensation" is not used. A higher gain is used when the self-interference signal is canceled at the input port of the first programmable gain amplifier stage 135. Each programmable gain amplifier stage 135 and the bandpass filter stage are designed for lowest noise and highest linearity to avoid distortion products that look like actual targets. The bandpass filter stage can perform the same range compensation function as the prior art high pass filter, with the added benefit of reducing high frequency noise. Thus, the technique offers unique flexibility, as the receiver stage can be used with or without cancellation, with or without transmit offset tones, and with FMCW or CW signaling.
[0108] In another aspect, the subject matter of the present invention includes a module 120 for processing a received radar signal. The module 120 includes: a low noise module 125 for amplifying the received radar signal, the low noise module connected to a receiving antenna; a first programmable gain module 135 for amplifying the output of the low noise module; a first programmable bandpass module 140 for filtering the output of the first programmable module for amplification; a second programmable gain module 145 for amplifying the output of the first programmable bandpass module; a second programmable bandpass module 150 for filtering the output of the second programmable gain module; and a programmable low pass module 155 for filtering the output of the second programmable bandpass module.
[0109] It should be understood that the present subject matter can be embodied in many different forms and should not be construed as the present subject matter being limited to the embodiments set forth herein. On the contrary, these embodiments are provided to make the present subject matter thorough and complete and to fully convey the present invention to those skilled in the art. In fact, the present subject matter is intended to cover substitutes, modifications and equivalents of these embodiments within the scope and spirit of the present subject matter defined by the appended claims. In addition, in the following detailed description of the present subject matter, many specific details are set forth in order to provide a thorough understanding of the present subject matter. However, it will be clear to those of ordinary skill in the art that the present subject matter can be practiced without these specific details.
[0110] The present invention is described in detail herein in conjunction with the flowchart and / or block diagram of the method, device (system) and computer program product provided in the embodiment of the present invention. It should be understood that each frame of the flowchart and / or block diagram and the combination of frames in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to form a machine, so that the instructions executed by the processor of the computer or other programmable instruction execution device create a mechanism for implementing the function / action specified in one or more frames of the flowchart and / or block diagram.
[0111] The description of the present invention is presented for the purpose of illustration and description, but is not intended to be exhaustive or limited to the present invention in the disclosed form. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the present invention. Various aspects of the present invention are selected and described in order to better explain the principles and practical applications of the present invention, and to enable those of ordinary skill in the art to understand the present invention with various modifications suitable for the intended specific use.
[0112] The present invention has been described in conjunction with various embodiments. However, other changes and modifications to the disclosed embodiments may be understood and implemented through study of the drawings, the disclosure and the appended claims, and these changes and modifications are intended to be included within the scope of protection of the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the term "a" or "an" does not exclude a plurality.
[0113] For the purposes of this document, it is noted that the dimensions of the various features depicted in the figures are not necessarily drawn to scale.
[0114] For purposes herein, the specification may refer to "an embodiment," "one embodiment," "some embodiments," or "another embodiment" to describe different embodiments or the same embodiment.
[0115] For the purposes of this document, a connection may be a direct connection or an indirect connection (e.g., through one or more other parts). In some cases, when an element is referred to as being connected to another element, the element may be directly connected to the other element or indirectly connected to the other element through an associated element. When an element is referred to as being directly connected to another element, there are no associated elements between the element and the other element. Two devices are in "communication" if they are directly or indirectly connected so that electronic signals can be transmitted between them.
[0116] For purposes herein, the term "based on" may be understood as "based at least in part on."
[0117] For purposes of this document, unless otherwise specified, the use of numerical terms such as a "first" item, a "second" item, and a "third" item is used to identify the different items for identification purposes and does not imply an ordering of the items.
[0118] The foregoing detailed description has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the subject matter claimed herein to the precise form or forms disclosed. Many modifications and variations are possible in light of the foregoing teachings. The various embodiments described are selected to best explain the principles of the disclosed technology and its practical application, thereby enabling those skilled in the art to best utilize the technology in various embodiments and to make various modifications as appropriate for the intended specific use. The intended scope is defined by the appended claims.
[0119] Although the subject matter has been described in language specific to structural features and / or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.
Claims
1. An integrated circuit, characterized in that: Applied in a radar system supporting a FMCW system and a Doppler system, the integrated circuit comprises: a low noise amplifier for connection to a receiving antenna structure; a first programmable gain amplifier; a first programmable bandpass filter; a second programmable gain amplifier; a second programmable bandpass filter; Programmable low-pass filter; Mixer; The input end of the first programmable gain amplifier is connected to the output end of the mixer, the input end of the mixer is connected to the output end of the low noise amplifier, the output end of the first programmable gain amplifier is connected to the input end of the first programmable bandpass filter, the output end of the first programmable bandpass filter is connected to the input end of the second programmable gain amplifier, the output end of the second programmable gain amplifier is connected to the input end of the second programmable bandpass filter, and the output end of the second programmable bandpass filter is connected to the input end of the programmable low-pass filter.
2. The integrated circuit according to claim 1, characterized in that Also included is an analog-to-digital converter having an input connected to the output of the programmable low pass filter.
3. The integrated circuit according to claim 1, characterized in that Each programmable gain amplifier includes an amplifier stage including at least two amplifier elements and at least two bypass elements.
4. The integrated circuit according to claim 1, characterized in that Each programmable bandpass filter comprises a bandpass filter stage including at least two bandpass filter elements and at least two bypass elements.
5. The integrated circuit according to claim 4, characterized in that The output of the mixer includes an in-phase signal and a quadrature signal representing the difference between the transmitted modulated carrier and the received radar signal.
6. The integrated circuit according to claim 1, characterized in that The first programmable bandpass filter is programmed with a lower center frequency than the second programmable bandpass filter.
7. The integrated circuit according to claim 1, characterized in that The first programmable gain amplifier is programmed with a lower gain than the second programmable gain amplifier.
8. The integrated circuit according to any one of claims 1 to 7, characterized in that: The first programmable bandpass filter and the second programmable bandpass filter are programmable during reception of the received radar signal, and the first programmable bandpass filter and the second programmable bandpass filter are for programmed frequencies between an optimal center frequency and a maximum center frequency.
9. The integrated circuit according to any one of claims 1 to 7, characterized in that: The received radar signal is a sawtooth frequency modulated continuous wave radar signal, and the first programmable bandpass filter and the second programmable bandpass filter are programmed to a maximum center frequency during a waiting period between each slope in the sawtooth signal and to an optimal center frequency during each slope in the sawtooth signal.
10. A method for processing a received radar signal in a radar receiver-level integrated circuit, characterized in that: The integrated circuit is an integrated circuit as claimed in any one of claims 1 to 9, and the method comprises: Selecting a radar system configuration, wherein the radar system configuration includes a system type, which is an FMCW system or a Doppler system; programming at least a first programmable gain amplifier stage to a first gain; programming a first programmable bandpass filter stage to a first center frequency; The programmable low pass filter is programmed to a first LPF gain.
11. The method according to claim 10, characterized in that The method further comprises: programming the second programmable gain amplifier to a second gain; The second programmable bandpass filter is programmed to a second center frequency.
12. The method according to claim 11, characterized in that The first center frequency is lower than the second center frequency.
13. The method according to claim 11, characterized in that The first gain is lower than the second gain.
14. The method according to any one of claims 11 to 13, characterized in that The method further comprises: programming the first programmable bandpass filter stage to the first center frequency during a first portion of the radar signal; programming a second programmable bandpass filter stage to said second center frequency during a first portion of said received radar signal; The first programmable bandpass filter stage and the second programmable bandpass filter stage are programmed to a maximum center frequency during a second portion of the received radar signal.
15. The method according to any one of claims 11 to 13, characterized in that The received radar signal is a sawtooth frequency modulated continuous wave radar signal, and the first part of the received radar signal is a ramp in the received radar signal, and the second part of the received radar signal is a waiting period between the ramps.
16. The method according to claim 11, characterized in that The method further comprises: programming the second programmable gain amplifier to be bypassed; The second programmable bandpass filter is programmed to be bypassed.
17. A method of operating a radar receiver, characterized in that The radar receiver is used to receive a reflected sawtooth frequency modulated continuous wave radar signal, the radar receiver comprises an integrated circuit according to any one of claims 1 to 9, and the method comprises: programming at least a first programmable gain amplifier stage to a first gain; programming a first programmable bandpass filter stage to a first center frequency during a first portion of the radar signal; During a second portion of the radar signal, the first programmable bandpass filter stage is programmed to a maximum center frequency that is higher than the first center frequency.
18. The method according to claim 17, characterized in that Also includes: programming a second programmable bandpass filter stage connected in series with the first programmable bandpass filter stage to the first center frequency during a first portion of the radar signal; The second programmable bandpass filter stage is programmed to the maximum center frequency during the second portion of the radar signal.
19. The method according to claim 17, characterized in that The radar signal is a sawtooth frequency modulated continuous wave radar signal, and the first part of the radar signal is a ramp in the radar signal, and the second part of the radar signal is a waiting period between the ramps in the radar signal.
20. The method according to any one of claims 17 to 19, characterized in that The method is repeated during each cycle of the FMCW radar signal.
21. A module for processing received radar signals, characterized in that Applicable to radar systems that support FMCW and Doppler systems, including: A low noise module, used for amplifying the received radar signal, wherein the low noise module is connected to a receiving antenna; A first programmable gain module, used to amplify the output of the low noise module; A first programmable bandpass module, used for filtering the output of the first programmable gain module for amplification; A second programmable gain module, used to amplify the output of the first programmable bandpass module; A second programmable bandpass module, configured to filter the output of the first programmable gain module; a programmable low-pass module for applying a gain at an output of the second programmable band-pass module; Mixer; The input end of the first programmable gain module is connected to the output end of the mixer, the input end of the mixer is connected to the output end of the low noise module, the output end of the first programmable gain module is connected to the input end of the first programmable bandpass module, the output end of the first programmable bandpass module is connected to the input end of the second programmable gain module, the output end of the second programmable gain module is connected to the input end of the second programmable bandpass module, and the output end of the second programmable bandpass module is connected to the input end of the programmable low-pass module.
22. The module according to claim 21, characterized in that Also included is a module for converting the analog output of the programmable low-pass module into a digital output.
23. The module according to claim 21, characterized in that Also included is a module for programming, wherein the first programmable bandpass module is programmed with a lower center frequency than the second programmable bandpass module.
24. The module according to claim 21, characterized in that Also included is means for programming the first programmable gain block for amplifying with a lower gain than the second programmable gain block for amplifying.
25. A module according to any one of claims 21 to 24, characterised in that Also included is means for programming a first programmable bandpass module for filtering and a second programmable bandpass module for filtering between an optimal center frequency and a maximum center frequency during reception of the received radar signal.
26. A module according to any one of claims 21 to 24, characterized in that The received radar signal is a sawtooth frequency modulated continuous wave radar signal, and the module for programming the first programmable bandpass module for filtering and the second programmable bandpass module for filtering during reception of the received radar signal programs a maximum center frequency during a waiting period between each ramp in the sawtooth signal.
Citation Information
Patent Citations
Radar unit, integrated circuit and methods for detecting and mitigating mutual interference
EP3444628A1