Storage system with scalable capacity and method of operating the same

Abstract

The present disclosure provides a storage system that includes a first storage device (e.g., a primary storage device) and one or more additional storage devices (e.g., sub storage devices). The first storage device includes a host interface for communicating with a host device and is directly connected to the host device. The additional storage devices can be directly connected to the first storage device and can communicate with the host device through the host interface included in the first storage device. Thus, the storage system has a total combined capacity of both the capacity of the first storage device and the capacity of the one or more additional storage devices. Furthermore, the one or more additional storage devices can be added or removed to increase or decrease the total capacity of the storage system, and the one or more additional storage devices themselves can not necessarily include a host interface.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0077061, filed on June 24, 2020, with the Korean Intellectual Property Office (KIPO), the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] The example embodiments generally relate to semiconductor integrated circuits, and more specifically, to a storage system with scalable capacity and a method of operating the storage system. Background Technology

[0004] Electronic devices such as computers, tablets, and smartphones may contain one or more storage devices. Storage devices store digital data, such as images, videos, and documents. Storage devices include one or more semiconductor memory devices. Certain types of data storage devices include one or more semiconductor memory devices. Examples of such data storage devices include solid-state drives (SSDs). These types of data storage devices can have various design and / or performance advantages compared to storage devices such as hard disk drives (HDDs). Examples of potential advantages include the absence of moving mechanical parts, higher data access speeds, stability, durability, and / or lower power consumption. Various systems (e.g., laptops, cars, airplanes, drones, etc.) have already adopted SSDs for data storage.

[0005] In conventional storage systems, if the storage device's capacity is insufficient (e.g., to increase storage capacity), the storage device can be replaced, or the entire electronic device can be replaced. In some examples, the storage device can be physically removed from the electronic device and replaced with a new, unused storage device. This can lead to long replacement times, the potential risk of damaging the electronic device, the need to reinstall software, and other inconveniences. Therefore, there is a need in the art for improved systems and methods for replacing or upgrading storage devices. Summary of the Invention

[0006] At least one example embodiment of this disclosure provides a storage system including a modular storage device capable of efficiently increasing capacity. At least one example embodiment of this disclosure provides a method of operating a storage system including a modular storage device.

[0007] According to an example embodiment, a storage system includes a first storage device (e.g., a main storage device) and a second storage device (e.g., one or more sub-storage devices). The first storage device has a first capacity, is directly connected to a host device, and includes a host interface for communicating with the host device. The second storage device has a second capacity, is directly connected to the first storage device, and is configured to communicate with the host device through the host interface included in the first storage device. The capacity of the storage system is the sum of the first capacity of the first storage device and the second capacity of the second storage device.

[0008] According to an example embodiment, in a method of operating a storage system, a first storage device (e.g., a primary storage device) is directly connected to a host device. The first storage device has a first capacity and includes a host interface. A second storage device (e.g., one or more sub-storage devices) has a second capacity and is directly connected to the first storage device. The storage system is powered on, and a Basic Input / Output System (BIOS) stored in the host device is loaded. A boot loader stored in at least one of the first and second storage devices is loaded. Register initialization is performed on both the first and second storage devices. Whether the second storage device is connected to the first storage device is checked based on whether a connection acknowledgment signal has been provided to the second storage device and whether a response signal has been received from the second storage device. The storage system is operated by loading firmware stored in at least one of the first and second storage devices.

[0009] According to an example embodiment, a storage system includes a host device, a first storage device (e.g., a primary storage device), and a second storage device (e.g., one or more sub-storage devices). The first storage device has a first capacity and is directly connected to the host device. The second storage device has a second capacity, is directly connected to the first storage device, and is configured to communicate with the host device through the first storage device. The first storage device includes a host interface for communicating with the host device, a first storage controller configured to control the operation of the first storage device, and a first connector configured to form a connection between the first and second storage devices. The second storage device includes a second storage controller configured to control the operation of the second storage device, a plurality of non-volatile memories configured to store data, and a second connector configured to form a connection between the second and first storage devices. When the storage system is powered on, a Basic Input / Output System (BIOS) stored in the host device is loaded, a bootloader stored in at least one of the first and second storage devices is loaded, register initialization is performed on the first and second storage devices, the connection of the second storage device is checked based on whether a connection acknowledgment signal has been provided to the second storage device and whether a response signal has been received from the second storage device, and the storage system is operated by loading firmware stored in at least one of the first and second storage devices. When a response signal is received, the second storage device is identified as connected to the first storage device, and the total capacity of the storage system, including the sum of the first capacity of the first storage device and the second capacity of the second storage device, is notified to the host device.

[0010] The storage system according to the example embodiment may include modular storage devices. Modular storage devices may be categorized into primary types (e.g., main storage devices) and subtypes (e.g., sub-storage devices). The main storage device may be physically directly connected to a host device for operation, and the sub-storage devices may be connected to the main storage device for operation. When the storage system's capacity is insufficient or when an increase in capacity is desired, capacity can be efficiently increased by additionally connecting sub-storage devices to the main storage device. Additionally or alternatively, because sub-storage devices do not include a host interface, the manufacturing cost of sub-storage devices can be lower than that of main storage devices, and it is possible to implement multiple sub-storage devices connected to a single main storage device. Therefore, the total capacity of the storage system can be increased efficiently with relatively little time, cost, and effort, and the storage system can have excellent capacity scalability or extensibility. Attached Figure Description

[0011] The illustrative, non-limiting exemplary embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0012] Figure 1This is a diagram illustrating a storage system according to an example embodiment.

[0013] Figure 2A and Figure 2B This is a diagram illustrating an example of the connection between storage devices included in a storage system according to an example embodiment.

[0014] Figure 3 , Figure 4A and Figure 4B It is used to describe Figure 1 A diagram illustrating the operation of the storage system.

[0015] Figure 5 This is a block diagram illustrating an example of a host device included in a storage system according to an example embodiment.

[0016] Figure 6 This is a block diagram illustrating an example of a storage controller included in a storage device in a storage system according to an example embodiment.

[0017] Figure 7 This is a block diagram illustrating an example of a non-volatile memory included in a storage device in a storage system according to an example embodiment.

[0018] Figure 8 This is a flowchart illustrating a method for operating a storage system according to an example embodiment.

[0019] Figure 9A , Figure 9B and Figure 9C This is a diagram used to describe a method of operating a storage system according to an example embodiment.

[0020] Figure 10 It is shown in Figure 8 The flowchart shows an example of checking whether the first and second storage devices are properly connected.

[0021] Figure 11A , Figure 11B and Figure 11C It is used to describe Figure 10 The diagram shows the operation.

[0022] Figure 12 This is a diagram illustrating a storage system according to an example embodiment.

[0023] Figure 13 It is used to describe Figure 12 A diagram illustrating the operation of the storage system.

[0024] Figure 14 This is a diagram illustrating a storage system according to an example embodiment.

[0025] Figure 15 It is used to describe Figure 14A diagram illustrating the operation of the storage system.

[0026] Figure 16 This is a diagram illustrating a storage system according to an example embodiment.

[0027] Figure 17 It is used to describe Figure 16 A diagram illustrating the operation of the storage system.

[0028] Figure 18 This is a block diagram illustrating a data center including a storage system according to an example embodiment. Detailed Implementation

[0029] Electronic devices such as computers, tablets, and smartphones may contain one or more storage devices. Storage devices store digital data, such as images, videos, and documents. Storage devices include one or more semiconductor memory devices. Certain types of data storage devices include one or more semiconductor memory devices. Examples of such data storage devices include solid-state drives (SSDs). These types of data storage devices can have various design and / or performance advantages compared to storage devices such as hard disk drives (HDDs). Examples of potential advantages include the absence of moving mechanical parts, higher data access speeds, stability, durability, and / or lower power consumption. Various systems (e.g., laptops, cars, airplanes, drones, etc.) have already adopted SSDs for data storage.

[0030] In conventional storage systems, if the storage device's capacity is insufficient (e.g., to increase storage capacity), the storage device can be replaced, or the entire electronic device can be replaced. In some examples, the storage device can be physically removed from the electronic device and replaced with a new, unused storage device. This can lead to long replacement times, the potential risk of damaging the electronic device, and the need to reinstall software, among other inconveniences. Furthermore, when connecting additional storage devices while maintaining the existing connected storage devices as is, an interface device for connecting the additional storage devices is required. Therefore, there is a need in the art for improved systems and methods for replacing or upgrading storage devices without removing the entire storage device from the electronic device.

[0031] This disclosure generally relates to semiconductor integrated circuits, and more specifically, to a storage system with scalable capacity and a method of operating the storage system. In some embodiments, this disclosure includes more than one storage device (e.g., a modular storage device) and a simpler storage device replacement process.

[0032] The technology described herein provides a storage system with modular storage devices. Modular storage devices can be categorized into primary types (e.g., main storage devices) and subtypes (e.g., sub-storage devices). The main storage device can be physically (e.g., directly) connected to a host device, and the sub-storage devices can be connected to the main storage device to operate as additional storage capacity. Thus, when the storage system's capacity is insufficient, or when an increase in capacity is desired, capacity can be efficiently increased by additionally connecting one or more sub-storage clients to the main storage device. Therefore, it is not necessary to replace previously connected storage devices (e.g., main storage devices directly connected to the host). Furthermore, additional interfaces for connecting any additional sub-storage devices to the host device are not required. Because sub-storage devices do not include host interfaces, the manufacturing cost of such sub-storage devices can be reduced (e.g., less than the manufacturing cost of main storage devices).

[0033] In some embodiments, multiple sub-storage devices may be connected to a primary storage device. In some embodiments, when storage is full, sub-storage devices may be removed without removing the primary storage device; larger-capacity sub-storage devices may be added; additional sub-storage devices may be added; and so on. The storage system may have a total storage capacity equal to the sum of the capacity of the primary storage device and the capacity of any additional sub-storage devices connected to the primary storage device. Therefore, the total capacity of the storage system can be increased efficiently with relatively little time, cost, and effort, and the storage system can have improved capacity scalability and extensibility.

[0034] Various exemplary embodiments will be described more fully with reference to the accompanying drawings, in which embodiments are illustrated. However, this disclosure may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Throughout this application, the same reference numerals refer to the same elements.

[0035] Figure 1 This is a diagram illustrating a storage system according to an example embodiment.

[0036] Reference Figure 1 The storage system 100 includes a host device 200, a first storage device 300, and a second storage device 400.

[0037] The host device 200 controls the overall operation of the storage system 100. (Refer to...) Figure 5 The host device 200 may include a processor, memory, etc. The processor can control one or more operations of the host device 200. For example, the processor may run an operating system (OS). The memory may store instructions and / or data that can be executed and / or processed by the processor. For example, the operating system run by the processor may include a file system for file management and device drivers for controlling peripheral devices together with storage devices 300 and 400 at the operating system level.

[0038] The first storage device 300 is accessed by the host device 200. The first storage device 300 is directly connected to the host device 200 and has a first capacity. The first storage device 300 may include a first connector 301, a first bus 310, a host interface (HOST I / F) 320, a first storage controller (SCONT) 330, a plurality of first non-volatile memories (NVMs) 340, and a first buffer memory (BUF) 350.

[0039] The first connector 301 can be a component for connecting to the second storage device 400. For example, the first storage device 300 can be directly connected to the second storage device 400 via the first connector 301. An example structure of the first connector 301 will be provided below. Figure 2A and Figure 2B To describe.

[0040] The first bus 310 can be connected to the first connector 301, host interface 320, first storage controller 330, multiple first non-volatile memories 340, and first buffer memory 350 included in the first storage device 300. Additionally or alternatively, the first bus 310 may include some or all of the transmission paths for transmitting signals between these components. For example, the first bus 310 may include an address bus, a control bus, a data bus, etc.

[0041] The host interface 320 can be a component used for communicating with the host device 200. The first storage device 300 can communicate directly with the host device 200 through the host interface 320.

[0042] The first storage controller 330 can control the operation of the first storage device 300 and / or the operation of multiple first non-volatile memories 340 based on commands, addresses and data received from the host device 200.

[0043] Multiple first non-volatile memories 340 can store multiple data. For example, multiple first non-volatile memories 340 can store metadata, various user data, etc.

[0044] Examples of storage devices (e.g., memory devices) described herein generally include random access memory (RAM), read-only memory (ROM), or hard disks. Examples of storage devices include solid-state memory and hard disk drives. In some examples, the storage device is used to store computer-readable, computer-executable software including instructions that, when executed, cause a processor to perform the various functions described herein. In some cases, the memory includes, among other things, a basic input / output system (BIOS) that controls basic hardware or software operations, such as interaction with peripheral components or devices. In some cases, a memory controller operates the memory cells. For example, a memory controller may include a row decoder, a column decoder, or both. In some cases, the memory cells within the memory store information in the form of logical states.

[0045] In some cases, examples of storage devices described herein may include flash memory. Flash memory is an electronic (solid-state) non-volatile computer storage medium that can be electrically erased and reprogrammed. Two main types of flash memory are named after NAND and NOR logic gates. Individual flash memory cells exhibit internal characteristics similar to their corresponding gates. NAND flash memory can be written to and read from blocks (or pages) that are generally much smaller than the entire device, where an EPROM must be completely erased before rewriting. NOR flash memory allows individual machine words (bytes) to be written to—to the erase location—or read independently. NAND types primarily operate in memory cards, USB flash drives, solid-state drives (those manufactured in 2009 or later), and similar products for general storage and data transfer. NAND or NOR flash memory is also frequently used in many digital products to store configuration data, a task previously accomplished by EEPROM or battery-powered static RAM. A key drawback of flash memory is that it can only withstand a relatively small number of write cycles within a given block. Example applications for both types of flash memory include personal computers, PDAs, digital audio players, digital cameras, mobile phones, synthesizers, video games, scientific instruments, industrial robots, and medical electronics. In addition to being non-volatile, flash memory offers fast read access times, although not as fast as static RAM or ROM. Its mechanical shock resistance, as well as its high durability, ability to withstand high pressure, temperature, and immersion in water, help explain its popularity over hard drives in portable devices.

[0046] Although flash memory is technically a type of EEPROM, the term "EEPROM" is generally used specifically to refer to non-flash EEPROMs that can be erased in small blocks (typically bytes). Because of its slow erase cycle, the large block size used in flash memory erasures gives it a significant speed advantage over non-flash EEPROMs when writing large amounts of data. Flash memory costs less than byte-programmable EEPROMs and has become the dominant memory type wherever systems require large amounts of non-volatile solid-state storage. Flash memory stores information in an array of memory cells made of floating-gate transistors. In single-cell (SLC) devices, each cell stores only one bit of information. In multi-cell (MLC) devices (including triple-cell (TLC) devices), each cell can store more than one bit of data. The floating gate can be conductive or non-conductive. In NOR flash memory, each cell has one end directly grounded and the other end directly connected to a bit line. This arrangement is called "NOR flash" because it is similar to how a NOR gate works: when one of the word lines goes high, the corresponding storage transistor acts to pull the output bit line low. NAND flash memory also uses floating-gate transistors, but they are connected in a manner similar to NAND gates: several transistors are connected in series, and the bit lines are only pulled low when all word lines are pulled high. These groups are then connected to the NOR bit line array via additional transistors in the same way that individual transistors are linked in NOR flash memory. Compared to NOR flash, using series-linked groups instead of individual transistors adds an extra level of addressing.

[0047] In some example embodiments, each of the plurality of first non-volatile memories 340 may include NAND flash memory. In other example embodiments, each of the plurality of first non-volatile memories 340 may include one of electrically erasable programmable read-only memory (EEPROM), phase-change random access memory (PRAM), resistive random access memory (RRAM), nanofloating gate memory (NFGM), polymer random access memory (PoRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), etc.

[0048] The first buffer memory 350 may store instructions and / or data executed and / or processed by the first memory controller 330. Additionally or alternatively, the first buffer memory 350 may temporarily store data stored in or to be stored in multiple first non-volatile memories 340. For example, the first buffer memory 350 may include at least one of various volatile memories, such as dynamic random access memory (DRAM).

[0049] The second storage device 400 is accessed by the host device 200. The second storage device 400 is directly connected (e.g., without intermediate hardware or components other than the connection components) to the first storage device 300 and has a second capacity. The second storage device 400 may include a second connector 401, a second bus 410, a second storage controller 430, a plurality of second non-volatile memories 440 and a second buffer memory 450.

[0050] Except that the second storage device 400 does not include the host interface 320, the second storage device 400 can be substantially the same as the first storage device 300. Therefore, redundant descriptions will be omitted.

[0051] The second connector 401 can be a component for connecting to the first storage device 300. For example, the second storage device 400 can be directly connected to the first storage device 300 via the second connector 401. An example structure of the second connector 401 will be provided below. Figure 2A and Figure 2B To describe.

[0052] The second storage device 400 may not be directly connected to the host device 200 and may not include the host interface 320. Therefore, the second storage device 400 can communicate with the host device 200 through the first storage device 300. Thus, the second storage device 400 can communicate with the host device 200 through the host interface 320 included in the first storage device 300.

[0053] The host interface 320 can manage input and output signals for the host device 200. The host interface 320 can also manage peripheral devices not integrated into the host device 200. In some cases, the host interface 320 can represent a physical connection or port to a peripheral device. In other cases, the host interface 320 can utilize, for example... Or another known operating system. In other cases, host interface 320 may represent or interact with a modem, keyboard, mouse, touchscreen, or similar device. In some cases, host interface 320 may be implemented as part of a processor. In some cases, first storage device 300 may interact with host device 200 via host interface 320 or hardware components controlled by host interface 320.

[0054] The second bus 410 can be connected to the second connector 401, the second storage controller 430, the plurality of second non-volatile memories 440, and the second buffer memory 450 included in the second storage device 400. The second storage controller 430 can control the operation of the second storage device 400 and / or the operation of the plurality of second non-volatile memories 440. The plurality of second non-volatile memories 440 can store a plurality of data. The second buffer memory 450 can store instructions and / or data executed and / or processed by the second storage controller 430. Additionally or alternatively, the second buffer memory 450 can temporarily store data that is stored in or will be stored in the plurality of second non-volatile memories 440.

[0055] According to an example embodiment, the first storage device 300 and the second storage device 400 included in the storage system 100 can be implemented as modular storage devices. For example, the first storage device 300, which is directly connected to the host device 200, may include a host interface 320 and can be used as a primary storage device. The second storage device 400, which is not directly connected to the host device 200 but is directly connected to the first storage device 300, may not include a host interface 320 and can be used as a sub-storage device. Additionally or alternatively, the first storage device 300 and the second storage device 400 may include a first connector 301 and a second connector 401 for electrical connection between them. Thus, it is possible to attach the second storage device 400 to the first storage device 300 and / or detach the second storage device 400 from the first storage device 300. When the first storage device 300 and the second storage device 400 are directly connected to each other via the first connector 301 and the second connector 401, the storage system 100 may have a total capacity equal to the sum of a first capacity of the first storage device 300 and a second capacity of the second storage device 400.

[0056] In some example embodiments, each of the first storage device 300 and the second storage device 400 may be a solid-state drive (SSD). In other example embodiments, each of the first storage device 300 and the second storage device 400 may be universal flash memory (UFS), a multimedia card (MMC), or an embedded multimedia card (eMMC). In still other example embodiments, each of the first storage device 300 and the second storage device 400 may be one of a secure digital card (SD), a micro SD card, a memory stick, a chip card, a universal serial bus (USB) card, a smart card, a compact flash memory (CF) card, etc.

[0057] In some example embodiments, host interface 320 may support one of the following interfaces: Advanced Technology Attachment (ATA), Serial ATA (SATA), Parallel ATA (PATA), High-Speed ​​Peripheral Component Interconnect (PCIe), Serial ATA Small Computer System (SAS), Small Computer System Interface (SCSI), Universal Serial Bus (USB), Non-volatile Memory Express (NVMe), eMMC, and UFS. Additionally or alternatively, host interface 320 may be a block-accessible interface, and storage devices 300 and 400 may be connected to host device 200 via the block-accessible interface. Storage devices 300 and 400 may use a block-accessible address space corresponding to the access size of non-volatile memories 340 and 440 to provide a block-accessible interface to host device 200 for memory block-level access to data stored in non-volatile memories 340 and 440.

[0058] In some example embodiments, storage system 100 can be any computing system, such as a personal computer (PC), server computer, data center, workstation, digital television, set-top box, navigation system, etc. In other example embodiments, storage system 100 can be any mobile system, such as mobile phone, smartphone, tablet computer, laptop computer, personal digital assistant (PDA), portable multimedia player (PMP), digital camera, portable game console, music player, portable camcorder, video player, navigation device, wearable device, Internet of Things (IoT) device, Internet of Everything (IoE) device, e-book reader, virtual reality (VR) device, augmented reality (AR) device, robotic device, drone, etc.

[0059] According to an example embodiment, storage system 100 may include modular storage devices. Modular storage devices can be categorized into primary types (e.g., main storage devices) and subtypes (e.g., sub-storage devices). The main storage device can be physically and directly connected to host device 200 for operation, and the sub-storage devices can be connected to the main storage device for operation. When the storage system's capacity is insufficient and needs to be increased, capacity can be efficiently increased by additionally connecting sub-storage devices to the main storage device. Therefore, it is not necessary to replace previously connected storage devices, and additional interfaces for connecting additional storage devices to host device 200 are not required. Additionally or alternatively, because sub-storage devices do not include host interfaces, the manufacturing cost of sub-storage devices can be lower than that of main storage devices. Sub-storage devices can be implemented by connecting multiple sub-storage devices to a single main storage device. Therefore, the total capacity of storage system 100 can be increased efficiently with relatively little time, cost, and effort, and storage system 100 can have excellent capacity scalability or extensibility.

[0060] Figure 2A and Figure 2B This is a diagram illustrating an example of the connection between storage devices included in a storage system according to an example embodiment.

[0061] Reference Figure 2A The first storage device (e.g., Figure 1 The first storage device 300 includes a first connector 301a and a second storage device (e.g., ...). Figure 1 The second connectors 401a included in the second storage device 400 can be directly connected to each other. Therefore, the first bus included in the first storage device (e.g., Figure 1 The first bus 310 in the first storage device and the second bus included in the second storage device (e.g., Figure 1 The second bus 410 in the first connector 301a can be electrically connected to each other. For example, the first connector 301a can be a socket or can have a recessed structure (or groove structure). The second connector 401a can be a terminal or can have a protruding structure corresponding to the shape of the first connector 301a. The first connector 301a and the second connector 401a can include electrical pins or pads. For example, the pins or pads can be contact pads or contact pins, but the example embodiment is not limited thereto.

[0062] Reference Figure 2B The first storage device (e.g., Figure 1 The first storage device 300 includes a first connector 301b and a second storage device (e.g., ...). Figure 1The second connector 401b included in the second storage device 400 can be connected to each other via a wired cable 50. Therefore, the first bus included in the first storage device (e.g., Figure 1 The first bus 310 in the first storage device and the second bus included in the second storage device (e.g., Figure 1 The second bus 410 in the cable 50 can be electrically connected to each other. For example, each of the first connector 301b and the second connector 401b can be a socket or can have a recessed structure corresponding to the shape of the wired cable 50.

[0063] Although reference Figure 2A and Figure 2B Example structures for first connectors 301a and 301b and second connectors 401a and 401b have been described, but the example embodiments are not limited thereto. The first and second connectors may have at least one of various structures for implementing modular storage devices (e.g., for directly connecting the first storage device 300 and the second storage device 400 to each other and for electrically connecting the first bus 310 and the second bus 410 to each other).

[0064] Figure 3 , Figure 4A and Figure 4B It is used to describe Figure 1 A diagram illustrating the operation of the storage system.

[0065] Reference Figure 3 This shows the result of Figure 1 The storage system 100 has a hierarchical structure for the software running on it. The software may include code for implementing aspects of this disclosure. The software may be stored in a non-transitory computer-readable medium such as system memory or other memory. In some cases, the software may not be directly executable by a processor, but may (e.g., during compilation and runtime) enable a computer to perform the functions described herein.

[0066] The first storage device SD1 and the second storage device SD2 can respectively correspond to Figure 1 The first storage device 300 and the second storage device 400 are described. (See reference...) Figure 1 The first storage device SD1 and the second storage device SD2 may be physically separate components. However, when the first storage device SD1 and the second storage device SD2 are connected to each other, the first storage device SD1 and the second storage device SD2 can operate as a single storage device.

[0067] The first storage device SD1 includes a first storage controller (e.g., Figure 1 The first storage controller 330 in the system can be based on the host interface (e.g., Figure 1The host interface 320 in the first storage controller 330 operates the host interface layer (HIL) 1110. The first storage controller 330 can operate the first flash translation layer (or flash transaction layer, FTL) (FTL1) 1120 and the first non-volatile memory manager (or NAND manager, NM) (NM1) 1130 based on the control of the host interface layer 1110, and can access multiple first non-volatile memories (e.g., ...). Figure 1 Multiple first non-volatile memories 340 in the memory.

[0068] Similarly, the second storage controller included in the second storage device SD2 (e.g., Figure 1 The second storage controller 430 can operate the second flash translation layer (FTL2) 1220 and the second non-volatile memory manager (NM2) 1230 based on the control of the host interface layer 1110, and can access multiple second non-volatile memories (e.g., Figure 1 Multiple secondary non-volatile memories 440 in the middle. See reference Figure 1 The second storage device SD2 may not include the host interface 320. Therefore, the second storage device SD2 may not include the host interface layer 1110. The second storage device SD2 can communicate with the host device 200 using the host interface 320 and the host interface layer 1110 in the first storage device SD1.

[0069] Reference Figure 4A When host device 200 wants to access first storage device 300 (e.g., when first storage device 300 will be accessed by host device 200), host device 200 and first storage device 300 can directly exchange first command CMD1, first address ADDR1, and first data DAT1. For example, first command CMD1 and first address ADDR1 can be sent from host device 200 to first storage controller 330 via host interface 320 and first bus 310. When first command CMD1 is a write command, first data DAT1 can be write data, which can be sent from host device 200 to multiple first non-volatile memories 340 via host interface 320 and first bus 310, and can be stored in multiple first non-volatile memories 340. When first command CMD1 is a read command, first data DAT1 can be read data, which can be sent from multiple first non-volatile memories 340 to host device 200 via first bus 310 and host interface 320.

[0070] Reference Figure 4BWhen host device 200 wants to access second storage device 400 (e.g., when second storage device 400 will be accessed by host device 200), host device 200 and second storage device 400 can exchange second command CMD2, second address ADDR2 and second data DAT2 through first storage device 300. For example, second command CMD2 and second address ADDR2 can be sent from host device 200 to second storage controller 430 through host interface 320, first bus 310, first connector 301, second connector 401 and second bus 410. When second command CMD2 is a write command, second data DAT2 can be write data, which can be sent from host device 200 to multiple second non-volatile memories 440 through host interface 320, first bus 310, first connector 301, second connector 401 and second bus 410, and can be stored in multiple second non-volatile memories 440. When command CMD2 is a read command, second data DAT2 can be read data and can be sent from multiple second non-volatile memories 440 to host device 200 via second bus 410, second connector 401, first connector 301, first bus 310 and host interface 320.

[0071] Figure 5 This is a block diagram illustrating an example of a host device included in a storage system according to an example embodiment.

[0072] Reference Figure 5 The host device 600 may include a bus 605, a processor 610, a basic input / output system (BIOS) memory 620, a main memory 630, a user interface 640, and a storage interface 650. The host device 600 may be controlled by the processor 610, and the host device 600 may be referred to as a computing device.

[0073] Processor 610 can control the overall operation of host device 600. For example, processor 610 can be a central processing unit (CPU), application processor (AP), etc. Processor 610 can be connected to and control BIOS memory 620, main memory 630, user interface 640, and storage interface 650 via bus 605. Bus 605 can be considered to include some or all signal paths for transmitting signals between processor 610, BIOS memory 620, main memory 630, user interface 640, and storage interface 650. For example, bus 605 can include address bus, control bus, data bus, etc.

[0074] BIOS memory 620 can store the BIOS. In a broad sense, BIOS can be the lowest-level program in a computing system used to control hardware. BIOS can be firmware that is an intermediate form of hardware and software. When host device 600 is powered on to perform its basic functions, the BIOS in BIOS memory 620 can control host device 600. For example, when host device 600 is powered on, the BIOS in BIOS memory 620 can be loaded into main memory 630, and the loaded BIOS in main memory 630 can be run by processor 610 to perform initialization of host device 600. Additionally or alternatively, various applications can be stored in BIOS memory 620. For example, applications supporting storage protocols such as ATA, SATA, PATA, PCIe, SAS, SCSI, USB, NVMe, eMMC, UFS, etc., can be stored in BIOS memory 620. For example, BIOS memory 620 can be implemented using erasable programmable read-only memory (EPROM). For example, BIOS memory 620 can be implemented using flash memory.

[0075] Main memory 630 can be a memory used to store data and programs. Data can also be stored on external storage devices (e.g., ...). Figure 1 The bootloader, OS, and applications in storage devices 300 and 400 can be loaded into main memory 630 for fast access. For example, main memory 630 may include volatile memory devices such as dynamic random access memory (DRAM) and static random access memory (SRAM).

[0076] User interface 640 may include physical hardware and / or logical software as a physical and / or virtual medium for exchanging information between the user and the hardware and programs of host device 600. User interface 640 may include input devices for user operation of host device 600 and output devices for processing results reflecting user input.

[0077] Storage interface 650 may include physical hardware and / or logical software for connecting external storage devices to host device 600. For example, storage interface 650 may support storage protocols such as ATA, SATA, PATA, PCIe, SAS, SCSI, USB, NVMe, eMMC, UFS, etc.

[0078] Figure 6 This is a block diagram illustrating an example of a storage controller included in a storage device in a storage system according to an example embodiment.

[0079] Reference Figure 6The storage controller 700 may include a bus 705, at least one processor 710, a memory 720, at least one register (REG) 730, an error correction code (ECC) block 740, and a memory interface 750.

[0080] Processor 710 can respond to a host device (e.g., Figure 1 The host device 200 receives commands to control the operation of the storage controller 700. In some example embodiments, the processor 710 can control the operation of the storage controller 700 by employing commands for operating the storage device (e.g., ...). Figure 1 The processor 710 controls the various components via firmware for storage devices 300 and 400. The processor 710 can connect to and control the memory 720, registers 730, ECC block 740, and memory interface 750 via bus 705. Bus 705 can be considered to include some or all signal paths for transmitting signals between the processor 710, memory 720, registers 730, ECC block 740, and memory interface 750. For example, bus 705 may include an address bus, control bus, data bus, etc.

[0081] The memory 720 can store instructions and data that are executed and processed by the processor 710. For example, the memory 720 can be implemented using volatile memory (such as SRAM, cache memory, etc.) with relatively small capacity and high speed.

[0082] Register 730 can control, set, and monitor various aspects related to the functionality of storage controller 700 and / or storage devices 300 and 400. For example, register 730 may include special function registers (SFRs) or special purpose registers (SPRs).

[0083] The ECC block 740 used for error correction can be encoded and modulated using Bose-Chaudhuri-Hocquenghem (BCH) codes, low-density parity-check (LDPC) codes, turbine codes, Reed-Solomon codes, convolutional codes, recursive systematic codes (RSC), trellis-coded modulation (TCM), block-coded modulation (BCM), etc., or can be used to perform ECC encoding and ECC decoding using the above codes or other error-correcting codes.

[0084] The memory interface 750 can interface with non-volatile memory (e.g., ...). Figure 1The memory interface 750 exchanges data with non-volatile memories 340 and 440. The memory interface 750 can transfer data to or receive data read from non-volatile memories 340 and 440. In some example embodiments, the memory interface 750 may be connected to non-volatile memories 340 and 440 via a single channel. In other example embodiments, the memory interface 750 may be connected to non-volatile memories 340 and 440 via two or more channels.

[0085] Figure 7 This is a block diagram illustrating an example of a non-volatile memory included in a storage device in a storage system according to an example embodiment.

[0086] Reference Figure 7 The non-volatile memory 800 includes a memory cell array 810, an address decoder 820, a page buffer circuit 830, a data input / output (I / O) circuit 840, a voltage generator 850, and a control circuit 860.

[0087] The memory cell array 810 is connected to the address decoder 820 via multiple serial select lines (SSL), multiple word lines (WL), and multiple ground select lines (GSL). The memory cell array 810 is also connected to the page buffer circuitry 830 via multiple bit lines (BL). The memory cell array 810 may include multiple memory cells (e.g., multiple non-volatile memory cells) connected to the multiple word lines (WL) and multiple bit lines (BL). The memory cell array 810 may be divided into multiple memory blocks BLK1, BLK2, ..., BLKz, each of which includes memory cells. Additionally or alternatively, each of the multiple memory blocks BLK1 to BLKz may be divided into multiple pages.

[0088] In some example embodiments, multiple memory cells can be arranged in a two-dimensional (2D) array structure or a three-dimensional (3D) vertical array structure. A three-dimensional vertical array structure may include vertical cell strings that are vertically oriented such that at least one memory cell is located above another memory cell. At least one memory cell may include a charge trapping layer. Suitable configurations for memory cell arrays with 3D vertical array structures, in which the three-dimensional memory array is configured as multiple levels and word lines and / or bit lines are shared between levels, are described by reference in the following patent documents, which are incorporated herein by reference in their entirety: U.S. Patent Nos. 7,679,133; 8,553,466; 8,654,587; 8,559,235; and U.S. Patent Publication No. 2011 / 0233648.

[0089] The control circuit 860 is controlled from the outside (e.g., Figure 1The host device 200 and / or storage controllers 330 and 430 receive commands CMD and addresses ADDR, and control the erase, program, and read operations of the non-volatile memory 800 based on the commands CMD and addresses ADDR. Erasing operations may include executing a series of erase cycles, and programming operations may include executing a series of programming cycles. Each program cycle may include a programming operation and a programming verification operation. Each erase cycle may include an erase operation and an erase verification operation. Read operations may include normal read operations and data recovery read operations.

[0090] For example, control circuit 860 can generate control signal CON for controlling voltage generator 850. Control circuit 860 can generate control signal PBC for controlling page buffer circuit 830 based on command CMD, and can generate row address R_ADDR and column address C_ADDR based on address ADDR. Control circuit 860 can provide row address R_ADDR to address decoder 820, and can provide column address C_ADDR to data I / O circuit 840.

[0091] The address decoder 820 can be connected to the memory cell array 810 via multiple serial select lines (SSL), multiple word lines (WL), and multiple ground select lines (GSL).

[0092] For example, in a data erase / write / read operation, based on the row address R_ADDR, the address decoder 820 can identify at least one of the multiple word lines WL as the selected word line, and can identify the remaining word lines in the multiple word lines WL other than the selected word line as unselected word lines.

[0093] Additionally or alternatively, during data erase / write / read operations, based on the row address R_ADDR, the address decoder 820 can determine at least one of the multiple string select lines SSL as the selected string select line, and can determine the remaining string select lines other than the selected string select line as the unselected string select lines.

[0094] Furthermore, during data erase / write / read operations, based on the row address R_ADDR, the address decoder 820 can identify at least one of the multiple ground select lines GSL as the selected ground select line, and can identify the remaining ground select lines other than the selected ground select line as unselected ground select lines.

[0095] Voltage generator 850 can generate a voltage VS for the operation of non-volatile memory 800 based on power PWR and control signal CON. Voltage VS can be applied via address decoder 820 to multiple serial select lines SSL, multiple word lines WL, and multiple ground select lines GSL. Alternatively, voltage generator 850 can generate an erase voltage VERS for data erase operations based on power PWR and control signal CON. Eraser voltage VERS can be applied directly or via bit line BL to memory cell array 810.

[0096] For example, during an erase operation, voltage generator 850 may apply an erase voltage VERS to the common source line and / or bit line BL of the memory block (e.g., the selected memory block), and may apply an erase permission voltage (e.g., ground voltage) to some or all or a portion of the word lines of the memory block via address decoder 820. Additionally or alternatively, during an erase verification operation, voltage generator 850 may apply an erase verification voltage simultaneously to some or all the word lines of the memory block or sequentially to the word lines one after another.

[0097] For example, during a programming operation, the voltage generator 850 can apply a programming voltage to the selected word line and apply a programming pass voltage to the unselected word line via the address decoder 820. Additionally or alternatively, during a programming verification operation, the voltage generator 850 can apply a programming verification voltage to the selected word line and apply a verification pass voltage to the unselected word line via the address decoder 820.

[0098] Alternatively or additionally, during normal read operations, the voltage generator 850 can apply a read voltage to the selected word line and can apply a read pass voltage to the unselected word line via the address decoder 820. During data recovery read operations, the voltage generator 850 can apply a read voltage to the word line adjacent to the selected word line and can apply a recovery read voltage to the selected word line via the address decoder 820.

[0099] Page buffer circuitry 830 can be connected to memory cell array 810 via multiple bit lines BL. Page buffer circuitry 830 may include multiple page buffers. In some example embodiments, each page buffer may be connected to one bit line. In other example embodiments, each page buffer may be connected to two or more bit lines.

[0100] Page buffer circuit 830 can store the data DAT to be programmed into memory cell array 810, or can read the data DAT sensed from memory cell array 810. In other words, depending on the operating mode of non-volatile memory 800, page buffer circuit 830 can operate as a write driver or a memory driver.

[0101] Data I / O circuit 840 can be connected to page buffer circuit 830 via data line DL. Based on column address C_ADDR, data I / O circuit 840 can provide data DAT from outside non-volatile memory 800 to memory cell array 810 via page buffer circuit 830, or it can provide data DAT from memory cell array 810 to outside non-volatile memory 800.

[0102] Figure 8 This is a flowchart illustrating a method for operating a storage system according to an example embodiment. Figure 9A , Figure 9B and Figure 9C This is a diagram used to describe a method of operating a storage system according to an example embodiment.

[0103] exist Figure 9A , Figure 9B and Figure 9C In this context, the host device HD, the first storage device SD1, and the second storage device SD2 can respectively correspond to... Figure 1 The host device HD includes a host device 200, a first storage device 300, and a second storage device 400. The BIOS memory (ROM) 910 and main memory (RAM) 920 included in the host device HD can respectively correspond to... Figure 5 The host device 600 includes a BIOS memory 620 and a main memory 630. The first storage device SD1 and the second storage device SD2 include a first buffer memory (RAM1) 930, a first non-volatile memory (NVM1) 950, a second buffer memory (RAM2) 960, and a second non-volatile memory (NVM2) 980, which can respectively correspond to... Figure 1 The storage device SD1 includes a first buffer memory 350, a plurality of first non-volatile memories 340, a second buffer memory 450, and a plurality of second non-volatile memories 440. Each of the first register (REG1) 940 and the second register (REG2) 970 included in the first storage device SD1 and the second storage device SD2 can correspond to... Figure 6 The storage controller 700 includes register 730.

[0104] Reference Figure 8 , Figure 9A , Figure 9B and Figure 9CIn the method of operating a storage system according to an example embodiment, a first capacity and including a host interface (e.g., Figure 1 The first storage device (host interface 320) is directly connected to the host device (step S100). A second storage device with a second capacity is directly connected to the first storage device (step S200). See reference... Figure 1 , Figure 2A and Figure 2B Each of the first storage device SD1 and the second storage device SD2 can be implemented as a modular storage device, and the first storage device SD1 and the second storage device SD2 can use connectors (e.g., Figure 1 The first connector 301 and the second connector 401 in the memory are connected to each other. When the first storage device SD1 and the second storage device SD2 are already connected to each other, steps S100 and S200 can be omitted.

[0105] Next, the storage system is powered on (step S300), the BIOS stored in the host device is loaded (step S400), and the boot loader stored in at least one of the first and second storage devices is loaded (step S500). For example, as Figure 9A As shown, when power is applied to the storage system, the BIOS stored in the BIOS memory 910 of the host device HD can be loaded into the main memory 920 of the host device HD, and the operating system OS and boot loader BTL stored in the first storage device SD1 can be loaded into the main memory 920 of the host device HD. However, the example embodiment is not limited to this; the operating system OS and boot loader BTL can be stored in the second storage device SD2.

[0106] When the storage system is powered on, power can be supplied to hardware such as host device HD, first storage device SD1, and second storage device SD2, and the BIOS can perform a power-on self-test (POST). After the POST is complete, the BIOS can scan a predetermined list of storage devices (e.g., a boot device sequence) until a bootable device is found. The BIOS can determine the bootable device and load the boot sector from the determined bootable device into main memory 920. The boot sector may include information about how to organize partitions in the storage medium of the bootable device. Additionally or alternatively, the boot sector may include executable code for loading the operating system OS, referred to as the boot loader BTL. The operating system OS can be loaded from the bootable device into main memory 920 via the boot loader BTL. After the loaded operating system OS loads the system configuration file into main memory 920, the operating system OS can run initial instructions and then wait for instructions from the user.

[0107] Next, register initialization is performed on both the first and second storage devices (step S600). For example, as... Figure 9B As shown, initialization operations and / or initial setting operations can be performed on the first register 940 and the second register 970 included in the first storage device SD1 and the second storage device SD2.

[0108] Next, the first storage device and the second storage device are determined to be connected (step S700). Step S700 will refer to... Figure 10 , Figure 11A , Figure 11B and Figure 11C To describe.

[0109] Based on the inspection results in step S700, the storage system operates normally by loading the firmware stored in the first and second storage devices (step S800). For example, as Figure 9C As shown, the firmware (FW) stored in the first non-volatile memory 950 and the second non-volatile memory 980 can be loaded into the first buffer memory 930 and the second buffer memory 960 of the first storage device SD1 and the second storage device SD2. Next, as referred to... Figure 4A and Figure 4B The first storage device SD1 and the second storage device SD2 can be accessed normally.

[0110] Figure 10 It is shown Figure 8 The flowchart shows an example of checking whether the first and second storage devices are properly connected. Figure 11A , Figure 11B and Figure 11C It is used to describe Figure 10 The diagram shows the operation.

[0111] Reference Figure 8 , Figure 10 , Figure 11A , Figure 11B and Figure 11C When checking whether the first storage device and the second storage device are properly connected (step S700), the first storage device is determined to be properly connected.

[0112] For example, a first connection confirmation signal can be provided to the first storage device (step S710), and a first response signal can be received from the first storage device based on the first connection confirmation signal (step S720). For example, such as Figure 11AAs shown, a first connection confirmation signal CHK1 can be provided from the host device 200 to the first storage controller 330 through the host interface 320 and the first bus 310, and a first response signal RSP1 can be provided from the first storage controller 330 to the host device 200 through the first bus 310 and the host interface 320.

[0113] The first response signal may not be received correctly (step S730: No), indicating that the first storage device, acting as the primary storage device, is not properly connected. Therefore, the process can be terminated without performing subsequent steps. In some example embodiments, an error message indicating a connection error with the first storage device may be output.

[0114] When the first response signal is received normally (step S730: Yes), the second storage device is determined to be normally connected.

[0115] For example, a second connection confirmation signal can be provided to the second storage device (step S740), and a second response signal can be received from the second storage device based on the second connection confirmation signal (step S750). For example, such as Figure 11B As shown, a second connection confirmation signal CHK2 can be sent from the host device 200 to the second storage controller 430 via the host interface 320, the first bus 310, the first connector 301, the second connector 401, and the second bus 410. A second response signal RSP2 can also be sent from the second storage controller 430 to the host device 200 via the second bus 410, the second connector 401, the first connector 301, the first bus 310, and the host interface 320. The first storage controller 330 can also receive the second response signal RSP2.

[0116] Depending on whether the second response signal is received normally, the total capacity of the storage system can be notified to the host device. For example, such as Figure 11C As shown, a notification signal NTF indicating total capacity can be provided from the first storage controller 330 to the host device 200 via the first bus 310 and the host interface 320.

[0117] When the second response signal is received normally (step S760: Yes), the second storage device is determined to be normally connected to the first storage device. The total capacity of the storage system can be notified to the host device as the sum of the first capacity of the first storage device and the second capacity of the second storage device (step S770).

[0118] When the second response signal is not received normally (step S760: No), the second storage device is determined to be not properly connected to the first storage device, and the first capacity of the first storage device can be notified to the host device as the total capacity of the storage system. In some example embodiments, an error message indicating a connection error of the second storage device can be output.

[0119] According to the example embodiment, in step S700, it is checked whether one or more sub-storage devices connected to the main storage device are properly connected. Therefore, according to the example embodiment, the latency (or response time) for performing step S700 can be longer than the default latency (or reference latency) for checking whether the storage devices are properly connected in a conventional storage system.

[0120] Those skilled in the art will understand that the inventive concept can be embodied in systems, methods, computer program products, and / or computer program products having computer-readable program code thereon embodied in one or more computer-readable media. The computer-readable program code can be provided to a processor of a general-purpose computer, special-purpose computer, or other programmable data processing apparatus. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be any tangible medium that contains or stores a program for use by or in conjunction with an instruction execution system, apparatus, or device. For example, a computer-readable medium can be a non-transitory computer-readable medium.

[0121] Figure 12 This is a diagram illustrating a storage system according to an example embodiment. Figure 13 It is used to describe Figure 12 A diagram illustrating the operation of a storage system. (The remaining text is incomplete and likely refers to a separate topic.) Figure 1 and Figure 3 Repeated description.

[0122] Reference Figure 12 The storage system 100a includes a host device 200, a first storage device 300a, and a second storage device 400.

[0123] In addition to Figure 12 Apart from omitting multiple first non-volatile memories 340 in the first storage device 300a, Figure 12 Storage system 100a can be with Figure 1 The storage systems are basically the same as those of 100.

[0124] Although the first storage device 300a includes the host interface 320 and operates as a primary storage device, the first storage device 300a may not include multiple first non-volatile memories 340. Therefore, the first storage device 300a may not operate as a storage medium. Therefore, when the second storage device 400, operating as a sub-storage device, is connected to the first storage device 300a, Figure 12 The storage system 100a can operate normally. Because the first storage device 300a does not include multiple first non-volatile memories 340, the first storage device 300a can operate at a higher speed than... Figure 1 The first storage device in the 300 is implemented in a smaller size.

[0125] Reference Figure 13 This shows the result of Figure 12 The storage system 100a operates on a hierarchical structure for the software. As described, the software may include code for implementing aspects of this disclosure. The software may be stored in a non-transitory computer-readable medium, such as system memory or other memory. In some cases, the software may not be directly executable by a processor, but may (e.g., during compilation and runtime) enable a computer to perform the functions described herein.

[0126] Except for omitting the first flash memory conversion layer 1120 and the first non-volatile memory manager 1130 included in the first storage device SD1, Figure 13 Examples can be compared with Figure 3 The examples are basically the same.

[0127] Figure 14 This is a diagram illustrating a storage system according to an example embodiment. Figure 15 It is used to describe Figure 14 A diagram illustrating the operation of a storage system. (The remaining text is incomplete and likely refers to a separate topic.) Figure 1 and Figure 3 Repeated description.

[0128] Reference Figure 14 The storage system 100b includes a host device 200, a first storage device 300b, a second storage device 400, and a third storage device 500.

[0129] In addition to the first storage device 300b, it also includes a third connector 303 and a power supply circuit (PSC) 360, and the storage system 100b also includes a third storage device 500 directly connected to the first storage device 300b. Figure 14 Storage system 100b can be used with Figure 1 The storage systems are basically the same as those of 100.

[0130] The third connector 303 can be a component for connecting to the third storage device 500. For example, the first storage device 300b can be directly connected to the third storage device 500 via the third connector 303. The third connector 303 can have a structure substantially the same as the first connector 301.

[0131] The power supply circuit 360 can supply power to the second storage device 400 and the third storage device 500. Because the first storage device 300b also includes the power supply circuit 360, it is possible to stably supply power to some or all of the storage devices even when several sub-storage devices are simultaneously connected to a main storage device. In some example embodiments, the power supply circuit 360 may be omitted.

[0132] The third storage device 500 is accessed by the host device 200. The third storage device 500 is directly connected to the first storage device 300b and has a third capacity. The third storage device 500 may include a fourth connector 501, a third bus 510, a third storage controller 530, multiple third non-volatile memories 540, and a third buffer memory 550. The third storage device 500 can communicate with the host device 200 through the host interface 320 included in the first storage device 300.

[0133] The fourth connector 501, third bus 510, third storage controller 530, multiple third non-volatile memories 540, and third buffer memory 550 included in the third storage device 500 can be substantially the same as the second connector 401, second bus 410, second storage controller 430, multiple second non-volatile memories 440, and second buffer memory 450 included in the second storage device 400. Therefore, redundant descriptions will be omitted.

[0134] When the first to third storage devices 300b, 400 and 500 are connected via the first to fourth connectors 301, 401, 303 and 501, the storage system 100b may have a total capacity consisting of the first capacity of the first storage device 300b, the second capacity of the second storage device 400 and the third capacity of the third storage device 500.

[0135] Reference Figure 15 This shows the result of Figure 14 The storage system 100b operates on a hierarchical structure of software. As described, the software may include code for implementing aspects of this disclosure. The software may be stored in a non-transitory computer-readable medium, such as system memory or other memory. In some cases, the software may not be directly executable by a processor, but may (e.g., during compilation and runtime) enable a computer to perform the functions described herein.

[0136] In addition to adding a third storage device, SD3 Figure 15Examples can be compared with Figure 3 The examples are basically the same.

[0137] The third storage device SD3 includes a third storage controller (e.g., Figure 14 The third storage controller 530 can operate the third flash translation layer (FTL3) 1320 and the third non-volatile memory manager (NM3) 1330 based on the control of the host interface layer 1110, and can access multiple third non-volatile memories (e.g., Figure 14 Multiple third non-volatile memories 540 in the first storage device SD1). The third storage device SD3 may not include the host interface 320 and the host interface layer 1110, and can communicate with the host device 200 using the host interface 320 and the host interface layer 1110 in the first storage device SD1.

[0138] Figure 16 This is a diagram illustrating a storage system according to an example embodiment. Figure 17 It is used to describe Figure 16 A diagram illustrating the operation of a storage system. (The remaining text is incomplete and likely refers to a separate topic.) Figure 1 , Figure 3 , Figure 14 and Figure 15 Repeated description.

[0139] Reference Figure 16 The storage system 100c includes a host device 200, a first storage device 300, a second storage device 400c, and a third storage device 500.

[0140] In addition to the second storage device 400c, it also includes a third connector 403 and a power supply circuit 460, and the storage system 100c also includes a third storage device 500 directly connected to the second storage device 400c. Figure 16 The 100c storage system can be used with Figure 1 The storage systems are basically the same as those of 100.

[0141] The third connector 403 and power circuit 460 included in the second storage device 400c can be respectively connected to... Figure 14 The third connector 303 and power supply circuit 360 included in the first storage device 300b are essentially the same. The power supply circuit 460 can supply power to the third storage device 500. Because the second storage device 400c also includes the power supply circuit 460, it can stably supply power to the storage device at a later stage.

[0142] Except for the third storage device 500 being directly connected to the second storage device 400c instead of the first storage device 300, the third storage device 500 can be connected to... Figure 14The third storage device 500 is basically the same as the first storage device 300 and the second storage device 400c. The third storage device 500 can communicate with the host device 200 through the host interface 320 included in the first storage device 300 and the second storage device 400c.

[0143] When the first to third storage devices 300, 400c and 500 are connected via the first to fourth connectors 301, 401, 403 and 501, the storage system 100c may have a total capacity consisting of the first capacity of the first storage device 300, the second capacity of the second storage device 400c and the third capacity of the third storage device 500.

[0144] Reference Figure 17 This shows the result of Figure 16 The storage system 100c has a hierarchical structure for the software running on it. As described, the software may include code for implementing aspects of this disclosure. The software may be stored in a non-transitory computer-readable medium, such as system memory or other memory. In some cases, the software may not be directly executable by a processor, but may (e.g., during compilation and runtime) enable a computer to perform the functions described herein.

[0145] In addition to adding a third storage device, SD3 Figure 17 Examples can be compared with Figure 3 The examples are essentially the same. The third storage device SD3, the third flash memory conversion layer 1320, and the third non-volatile memory manager 1330 can be compared with the reference. Figure 15 The descriptions are basically the same.

[0146] Although the example embodiment has been described based on the example of additionally connecting one or two sub-storage devices, the example embodiment is not limited thereto. For example, three or more sub-storage devices may be additionally connected to the main storage device.

[0147] Figure 18 This is a block diagram illustrating a data center including a storage system according to an example embodiment.

[0148] Reference Figure 18 Data center 3000 can be a facility that collects various types of data and provides various services, and can be referred to as a data storage center. Data center 3000 can be a system for operating search engines and databases, and can be a computing system used by companies such as banks or government agencies. Data center 3000 can include application servers 3100 to 3100n and storage servers 3200 to 3200m. According to example embodiments, the number of application servers 3100 to 3100n and the number of storage servers 3200 to 3200m can be selected in various ways. The number of application servers 3100 to 3100n and the number of storage servers 3200 to 3200m can differ from each other.

[0149] Application server 3100 may include at least one processor 3110 and at least one memory 3120, and storage server 3200 may include at least one processor 3210 and at least one memory 3220. The operation of storage server 3200 will be described as an example. Processor 3210 may control the overall operation of storage server 3200 and may access memory 3220 to execute instructions and / or data loaded in memory 3220. Memory 3220 may include at least one of Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM), High Bandwidth Memory (HBM), Hybrid Memory Cubic (HMC), Dual In-line Memory Module (DIMM), Optane DIMM, Non-Volatile DIMM (NVDIMM), etc. According to example embodiments, the number of processors 3210 and the number of memories 3220 included in storage server 3200 can be selected in various ways. In some example embodiments, processors 3210 and memory 3220 may provide processor-memory pairs. In some example embodiments, the number of processors 3210 and the number of memories 3220 may differ from each other. Processors 3210 may include single-core or multi-core processors. The above description of storage server 3200 can be similarly applied to application server 3100. Application server 3100 may include at least one storage device 3150, and storage server 3200 may include at least one storage device 3250. In some example embodiments, application server 3100 may not include storage device 3150. According to example embodiments, the number of storage devices 3250 included in storage server 3200 can be selected in various ways.

[0150] Application servers 3100 to 3100n and storage servers 3200 to 3200m can communicate with each other via network 3300. Network 3300 can be implemented using Fibre Channel (FC) or Ethernet. FC can be a medium for relatively high-speed data transmission, and optical switches providing high performance and / or high availability can be used. Depending on the access scheme of network 3300, storage servers 3200 to 3200m can be provided as file storage, block storage, or object storage.

[0151] In some example embodiments, network 3300 may be a storage-only network or a network dedicated to storage, such as a Storage Area Network (SAN). For example, the SAN may be an FC-SAN implemented using an FC network and according to the FC protocol (FCP). As another example, the SAN may be an IP-SAN implemented using a Transmission Control Protocol / Internet Protocol (TCP / IP) network and according to the iSCSI (TCP / IP over SCSI or Internet SCSI) protocol. In other example embodiments, network 3300 may be a general or ordinary network, such as a TCP / IP network. For example, network 3300 may be implemented according to at least one of the protocols such as FC over Ethernet (FCoE), Network Attached Storage (NAS), and a non-volatile memory express over Fabrics (NVMe-oF).

[0152] In the following description, example embodiments will be based on application server 3100 and storage server 3200. The description of application server 3100 can be applied to another application server 3100n, and the description of storage server 3200 can be applied to another storage server 3200m.

[0153] Application server 3100 can store data requested by users or clients to one of storage servers 3200 to 3200m via network 3300. Additionally or alternatively, application server 3100 can retrieve data requested by users or clients from one of storage servers 3200 to 3200m via network 3300. For example, application server 3100 can be implemented as a web server or a database management system (DBMS).

[0154] Application server 3100 can access memory 3120n or storage device 3150n included in another application server 3100n via network 3300, and / or can access memory 3220 to 3220m or storage device 3250 to 3250m included in storage servers 3200 to 3200m via network 3300. Therefore, application server 3100 can perform various operations on data stored in application servers 3100 to 3100n and / or storage servers 3200 to 3200m. For example, application server 3100 can run commands for moving or copying data between application servers 3100 to 3100n and / or storage servers 3200 to 3200m. Data can be transferred directly or via storage devices 3250 to 3250m of storage servers 3200 to 3200m to storage devices 3220 to 3220m of application servers 3100 to 3100n. For example, data transmitted via network 3300 may be encrypted data for security or privacy purposes.

[0155] In storage server 3200, interface 3254 can provide a physical connection between processor 3210 and controller 3251 and / or between network interface card (NIC) 3240 and controller 3251. For example, interface 3254 can be implemented based on a direct-attached storage (DAS) scheme, in which storage device 3250 is directly connected to a dedicated cable. For example, interface 3254 can be implemented based on at least one of various interface schemes such as Advanced Technology Attachment (ATA), Serial ATA (SATA), External SATA (e-SATA), Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), Peripheral Component Interconnect (PCI), High Speed ​​PCI (PCIe), NVMe, IEEE 1394, Universal Serial Bus (USB), Secure Digital (SD) card interface, Multimedia Card (MMC) interface, Embedded MMC (eMMC) interface, Universal Flash Storage (UFS) interface, Embedded UFS (eUFS) interface, Compact Flash (CF) card interface, etc.

[0156] Storage server 3200 may also include switch 3230 and NIC 3240. Under the control of processor 3210, switch 3230 can selectively connect processor 3210 to storage device 3250 or selectively connect NIC 3240 to storage device 3250. Similarly, application server 3100 may also include switch 3130 and NIC 3140.

[0157] In some example embodiments, NIC 3240 may include a network interface card, network adapter, etc. NIC 3240 can connect to network 3300 via a wired interface, wireless interface, Bluetooth interface, optical interface, etc. NIC 3240 may also include internal memory, digital signal processor (DSP), host bus interface, etc., and can connect to processor 3210 and / or switch 3230 via the host bus interface. The host bus interface can be implemented as one of the above examples of interface 3254. In some example embodiments, NIC 3240 may be integrated with at least one of processor 3210, switch 3230, and storage device 3250.

[0158] In storage servers 3200 to 3200m and / or application servers 3100 to 3100n, the processor can send commands to storage devices 3150 to 3150n and 3250 to 3250m or memories 3120 to 3120n and 3220 to 3220m to program or retrieve data. For example, the data can be error-corrected data generated by an error-correcting code (ECC) engine. For example, the data can be processed via data bus inversion (DBI) or data masking (DM) and can include cyclic redundancy check (CRC) information. For example, the data can be encrypted data for security or privacy purposes.

[0159] Storage devices 3150 to 3150m and 3250 to 3250m can send control signals and command / address signals to NAND flash memory devices 3252 to 3252m in response to a read command received from the processor. When reading data from NAND flash memory devices 3252 to 3252m, the read enable (RE) signal can be input as a data output control signal and can be used to output data to the DQ bus. The RE signal can be used to generate a data strobe signal (DQS). Command and address signals can be latched in the page buffer based on the rising or falling edge of the write enable (WE) signal.

[0160] Controller 3251 can control the overall operation of storage device 3250. In some example embodiments, controller 3251 may include static random access memory (SRAM). Controller 3251 can write data to NAND flash memory device 3252 in response to a write command, or can read data from NAND flash memory device 3252 in response to a read command. For example, write and / or read commands can be provided from processor 3210 in storage server 3200, processor 3210m in another storage server 3200m, or processors 3110 to 3110n in application servers 3100 to 3100n. DRAM 3253 can temporarily store (e.g., can buffer) data to be written to or read from NAND flash memory device 3252. In addition, DRAM 3253 can store metadata. Metadata can be data generated by controller 3251 for managing user data or NAND flash memory device 3252. Storage device 3250 may include connector (CN) 3255 and may be implemented as a modular storage device with scalable capacity.

[0161] Storage devices 3150 to 3150m and 3250 to 3250m can be based on reference Figures 1 to 17 The storage system and method described in the example embodiments are implemented.

[0162] This invention concept can be applied to various electronic devices and systems, including storage devices and storage systems. For example, it can be applied to systems such as PCs, server computers, data centers, workstations, mobile phones, smartphones, tablet computers, laptop computers, PDAs, PMPs, digital cameras, portable game consoles, music players, portable camcorders, video players, navigation devices, wearable devices, IoT devices, IoE devices, e-book readers, VR devices, AR devices, robotic devices, drones, etc.

[0163] The foregoing is illustrative of exemplary embodiments and should not be construed as limiting them. Although some exemplary embodiments have been described, those skilled in the art will readily understand that many modifications can be made to the exemplary embodiments without substantially departing from the novel teachings and advantages of the exemplary embodiments. Therefore, all such modifications are intended to be included within the scope defined in the claims of the exemplary embodiments. It will be understood that the foregoing is illustrative of various exemplary embodiments and should not be construed as limiting to the specific exemplary embodiments disclosed, and that modifications to the disclosed exemplary embodiments and other exemplary embodiments are intended to be included within the scope of the appended claims.

Claims

1. A storage system, comprising: A first storage device having a first capacity, wherein the first storage device is connected to a host device and includes a host interface for communicating with the host device, wherein the first storage device is configured to operate a host interface layer (HIL) using the host interface and a first flash translation layer (FTL). as well as A second storage device having a second capacity, wherein the second storage device is connected to a first storage device and configured to communicate with a host device via a host interface included in the first storage device, wherein the second storage device is configured to operate a second flash translation layer (FTL) when communicating with the first storage device's HIL (Host Interchange Layer). The storage system has a third capacity, which includes at least the sum of the first and second capacities.

2. The storage system according to claim 1, wherein the first storage device further comprises: The first bus connected to the host interface; A first storage controller connected to a first bus, wherein the first storage controller is configured to control the operation of a first storage device; as well as A first connector connected to a first bus, wherein the first connector is configured to form a connection between a first storage device and a second storage device.

3. The storage system according to claim 2, wherein the first storage device further comprises: A plurality of first non-volatile memory devices connected to a first bus, wherein the plurality of first non-volatile memory devices are configured to store data.

4. The storage system according to claim 2, wherein the second storage device comprises: Second bus; A second storage controller connected to a second bus, wherein the second storage controller is configured to control the operation of a second storage device; A plurality of second non-volatile memory devices connected to a second bus, wherein the plurality of second non-volatile memory devices are configured to store data; as well as A second connector is connected to a second bus, wherein the second connector is configured to form a connection between the second storage device and the first storage device.

5. The storage system of claim 4, wherein the first connector and the second connector are connected to electrically connect the first bus to the second bus.

6. The storage system of claim 4, wherein the first connector and the second connector are connected by a wired cable.

7. The storage system according to claim 4, wherein: The first storage controller is configured to run the host interface layer based on the host interface, and The second storage controller is configured to operate the second flash translation layer and the non-volatile memory manager (NM) based on control of the host interface layer to access the plurality of second non-volatile memory devices.

8. The storage system according to claim 7, wherein the second storage device does not include a host interface and a host interface layer.

9. The storage system according to claim 1, wherein, When the storage system is powered on, it loads the Basic Input / Output System BIOS stored in the host device, loads the bootloader stored in at least one of the first and second storage devices, performs register initialization on the first and second storage devices, checks the connection of the second storage device based on whether a connection acknowledgment signal has been provided to the second storage device and whether a response signal has been received from the second storage device, and operates by loading the firmware stored in the first and second storage devices.

10. The storage system according to claim 9, further comprising: Upon receiving a response signal, it is determined that the second storage device is connected to the first storage device; as well as The third capacity of the host device is the total capacity of the storage system.

11. The storage system according to claim 9, further comprising: If no response signal is received normally, it is determined that the second storage device is not connected to the first storage device; as well as The first capacity of the host device is the total capacity of the storage system.

12. The storage system according to claim 1, further comprising: A third storage device with a fourth capacity, wherein the third storage device is directly connected to the first storage device and configured to communicate with a host device via a host interface included in the first storage device, and The third capacity includes the sum of the first, second, and fourth capacities.

13. The storage system of claim 12, wherein the first storage device further comprises: The power supply circuit is configured to supply power to the second and third storage devices.

14. The storage system according to claim 1, further comprising: A third storage device having a fourth capacity, wherein the third storage device is connected to the second storage device and configured to communicate with a host device via a host interface included in the first and second storage devices, and The third capacity includes the sum of the first, second, and fourth capacities.

15. The storage system of claim 14, wherein the second storage device comprises: The power supply circuit is configured to supply power to the third storage device.

16. The storage system of claim 1, wherein each of the first storage device and the second storage device comprises a solid-state drive (SSD).

17. The storage system of claim 1, wherein each of the first storage device and the second storage device comprises one of general-purpose flash storage (UFS), multimedia card (MMC), and embedded MMC (eMMC).

18. The storage system of claim 1, wherein the host interface supports one of the following interfaces: Advanced Technology Accessories (ATA), Serial ATA (SATA), Parallel ATA (PATA), High Speed ​​Peripheral Component Interconnect (PCIe), Serial Connect Small Computer System (SAS), Small Computer System Interface (SCSI), Universal Serial Bus (USB), eMMC, and UFS.

19. A method of operating a storage system, the method comprising: A first storage device having a first capacity is connected to a host device, wherein the first storage device includes a host interface; Connect a second storage device with a second capacity to the first storage device; Power on the storage system; Load the Basic Input / Output System BIOS stored in the host device; Load the bootloader stored in at least one of the first and second storage devices; Perform register initialization on the first and second storage devices; The system checks whether the second storage device is connected to the first storage device by providing connection confirmation signals from the host device to the first storage device and from the first storage device to the second storage device, and by providing response signals from the second storage device to the first storage device and from the first storage device to the host device. as well as The storage system is operated by loading firmware stored in the first and second storage devices.

20. A storage system, comprising: Host equipment; A first storage device having a first capacity, wherein the first storage device is connected to a host device; as well as A second storage device having a second capacity, wherein the second storage device is connected to a first storage device and configured to communicate with a host device through the first storage device; The first storage device includes: Host interface, used for communication with host devices; The first storage controller is configured to control the operation of the first storage device based on the operation of the Host Interface Layer (HIL); and The first connector is configured to form a connection between the first storage device and the second storage device. The second storage device includes: The second storage controller is configured to control the operation of the second storage device; Multiple non-volatile memories, configured to store data; and A second connector is configured to form a connection between a second storage device and a first storage device via a HIL, wherein the second storage device is not configured to operate the additional HIL. When the storage system is powered on, it loads the Basic Input / Output System BIOS stored in the host device, loads the bootloader stored in at least one of the first and second storage devices, performs register initialization on the first and second storage devices, checks the connection of the second storage device based on whether a connection acknowledgment signal has been provided to the second storage device and whether a response signal has been received from the second storage device, and operates by loading the firmware stored in the first and second storage devices. When a response signal is received, the second storage device is identified as connected to the first storage device, and a third capacity, which includes the sum of the first and second capacities, is notified to the host device as the total capacity of the storage system.

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