A chip verification method, device, equipment and readable storage medium
By recording the mapping relationship between test cases and coverage groups in the mapping configuration file and generating a verification report with coverage information, the problem of unclear contribution of test cases and coverage groups in the HVP verification result file is solved, and a more comprehensive verification progress and effect check is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD
- Filing Date
- 2021-08-27
- Publication Date
- 2026-06-30
Smart Images
Figure CN113850035B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of chip verification and testing technology, and in particular to a chip verification method, apparatus, device and readable storage medium. Background Technology
[0002] Currently, chips can be verified based on HVP (Hierarchical Verification Plan), but the HVP verification result files generated by this method do not clearly indicate the test contribution of each test case to a specific coverage group. Therefore, the existing HVP verification result files cannot clearly define the magnitude of the test contribution between test cases and coverage groups, which is detrimental to technicians in checking verification progress and effectiveness.
[0003] Therefore, determining the magnitude of the test contribution between test cases and coverage groups is a problem that needs to be solved by those skilled in the art. Summary of the Invention
[0004] In view of this, the purpose of this application is to provide a chip verification method, apparatus, device, and readable storage medium to clarify the magnitude of the test contribution between test cases and coverage groups. The specific solution is as follows:
[0005] Firstly, this application provides a chip verification method, including:
[0006] If the HVP verification chip is used, then the mapping configuration file is queried; the mapping configuration file records at least one mapping group, and the mapping group includes: at least one test case that is mapped to each other and at least one coverage group;
[0007] If the mapping configuration file is found, the coverage information corresponding to each mapping group in the mapping configuration file is recorded during the verification process.
[0008] If an HVP verification result file is obtained, the coverage information corresponding to each mapping group is added to the HVP verification result file to obtain a verification report.
[0009] Preferably, recording the coverage information corresponding to each mapping group in the mapping configuration file includes:
[0010] The coverage information for each mapping group is recorded according to the chip-level structure.
[0011] Preferably, the coverage information corresponding to any mapping group includes: functional coverage and / or assertion coverage.
[0012] Preferably, adding the coverage information corresponding to each mapping group to the HVP verification result file to obtain a verification report includes:
[0013] The verification plan information and verification result information in the HVP verification result file are categorized into various mapping groups, and the corresponding coverage information is filled into each mapping group to obtain the verification report.
[0014] Preferably, after adding the coverage information corresponding to each mapping group to the HVP verification result file to obtain the verification report, the method further includes:
[0015] The verification report determines the coverage information corresponding to all mapping groups included in any chip level; the chip level is: module level, subsystem level, or system level.
[0016] The coverage information corresponding to all mapping groups included in this chip level is analyzed to obtain the corresponding visualization charts.
[0017] Preferably, the step of analyzing the coverage information corresponding to all mapping groups included in the chip level to obtain corresponding visualization charts includes:
[0018] Using time progress as the analysis dimension, the overall coverage information of the chip level at different time points is determined, and the change curve of the overall coverage information is obtained.
[0019] and / or
[0020] Using each coverage group in the chip level as the analysis dimension, the test cases used for any coverage group and the coverage information generated by the test cases for that coverage group are determined, and the corresponding visualization charts are obtained.
[0021] Preferably, it further includes:
[0022] The mapping configuration file is updated according to the update command entered by the user.
[0023] Secondly, this application provides a chip verification apparatus, comprising:
[0024] The query module is used to query the mapping configuration file if the verification chip is based on HVP; the mapping configuration file records at least one mapping group, the mapping group includes at least one test case and at least one coverage group that are mapped to each other;
[0025] The recording module is used to record the coverage information corresponding to each mapping group in the mapping configuration file during the verification process if the mapping configuration file is found.
[0026] The report generation module is used to add the coverage information corresponding to each mapping group to the HVP verification result file if an HVP verification result file is obtained, so as to obtain a verification report.
[0027] Thirdly, this application provides an electronic device, comprising:
[0028] Memory, used to store computer programs;
[0029] A processor is used to execute the computer program to implement the aforementioned disclosed chip verification method.
[0030] Fourthly, this application provides a readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the aforementioned disclosed chip verification method.
[0031] As can be seen from the above scheme, this application provides a chip verification method, including: if the chip is verified based on HVP, then querying the mapping configuration file; the mapping configuration file records at least one mapping group, the mapping group includes: at least one test case and at least one coverage group that are mutually mapped; if the mapping configuration file is found, then during the verification process, recording the coverage information corresponding to each mapping group in the mapping configuration file; if an HVP verification result file is obtained, then adding the coverage information corresponding to each mapping group to the HVP verification result file to obtain a verification report.
[0032] As can be seen, this application records at least one mapping group in the mapping configuration file. Each mapping group includes at least one mutually mapped test case and at least one coverage group. During the subsequent HVP-based chip verification process, the coverage information corresponding to each mapping group can be recorded. After obtaining the HVP verification result file, the coverage information corresponding to each mapping group can be added to the HVP verification result file, thus obtaining a more comprehensive verification report. Assuming a mapping group includes a mutually mapped test case and a coverage group, the coverage information corresponding to that mapping group reflects the coverage information generated when the test cases in that mapping group test the coverage group in that mapping group. This clarifies the test contribution (i.e., the size of the coverage information) of the test cases in that mapping group to the coverage group. Therefore, for each mapping group, the corresponding test contribution size can be clearly defined. Thus, the verification report generated by this application includes not only existing verification plans and verification result information, but also the mapping relationship between test cases and coverage groups, the size of the test contribution, etc., which is beneficial for technicians to check the verification progress and verification effect.
[0033] Correspondingly, the chip verification device, equipment, and readable storage medium provided in this application also have the above-mentioned technical effects. Attached Figure Description
[0034] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0035] Figure 1 This is a flowchart of a chip verification method disclosed in this application;
[0036] Figure 2 This is a schematic diagram of coverage information disclosed in this application;
[0037] Figure 3 This is a schematic diagram of a chip hierarchy structure disclosed in this application;
[0038] Figure 4 This is a schematic diagram illustrating another type of coverage information disclosed in this application;
[0039] Figure 5 This is a schematic diagram of a chip verification device disclosed in this application;
[0040] Figure 6 This is a schematic diagram of an electronic device disclosed in this application;
[0041] Figure 7 This is a schematic diagram of a verification process disclosed in this application;
[0042] Figure 8 This is a schematic diagram of the code for determining mapping relationships and attribute parameters as disclosed in this application. Detailed Implementation
[0043] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0044] Currently, existing HVP verification result files cannot clearly define the magnitude of the test contribution between test cases and coverage groups, which is not conducive to technicians checking verification progress and effectiveness. Therefore, this application provides a chip verification scheme that can clearly define the magnitude of the test contribution between test cases and coverage groups, facilitating technicians in checking verification progress and effectiveness.
[0045] See Figure 1 As shown in the figure, this application discloses a chip verification method, including:
[0046] S101. If based on the HVP verification chip, query the mapping configuration file; the mapping configuration file records at least one mapping group, the mapping group includes: at least one test case and at least one coverage group that are mapped to each other.
[0047] It's important to note that HVP-based chip verification means using HVP to develop a verification plan for chip verification. Specifically, this requires defining the verification plan (including various attribute information), the hierarchical structure of the chip to be verified, and other details using the HVP language. Based on this verification plan, the entire chip's design functionality can be verified, and the verification progress can also be tracked.
[0048] Verification progress can be represented by functional coverage, code coverage, and / or assertion coverage.
[0049] Functional coverage: The proportion of tested functions out of all functions to be tested. It can be used to determine which functions have been tested and which have not.
[0050] Code coverage: The percentage of executed test code out of all test code to be executed, used to determine which code has been executed and which has not.
[0051] Assertion coverage: The proportion of tested assertions out of all assertions to be tested. It determines which assertions have been tested and which have not. It is a type of functional coverage and helps automatically monitor which assertions are activated during regression testing. An assertion is a programming technique used to determine the result of a logical expression within a function. Regression testing is a type of software testing designed to verify whether the original functionality of software remains intact after modifications. In chip design verification, when there are new changes to the RTL (Register Transfer Level) code, all test cases need to be tested together in the same verification environment to ensure that the new changes do not affect the previously verified functionality. To improve the automation of regression testing, regression testing tools (such as those used in conjunction with shell scripts and Makefiles) can be used.
[0052] The various attribute information can be found in Table 1.
[0053] Table 1
[0054]
[0055]
[0056] S102. If the mapping configuration file is found, during the verification process, the coverage information corresponding to each mapping group in the mapping configuration file is recorded.
[0057] In one specific implementation, the coverage information corresponding to any mapping group includes: functional coverage and / or assertion coverage.
[0058] The mapping groups in the mapping configuration file can be found in Table 2. It should be noted that if a mapping group includes multiple test cases and multiple coverage groups (as shown in column 6 of Table 2), then these multiple test cases and multiple coverage groups can be considered as one set. In this case, a particular coverage group and a particular test case should not be considered as a one-to-one mapping relationship, but rather the two sets should be considered as a one-to-one mapping relationship. However, the test contribution value of a test case to a coverage group can still be calculated. Similarly, if a mapping group includes multiple test cases and one coverage group (as shown in column 5 of Table 2), or one test case and multiple coverage groups (as shown in column 4 of Table 2), the one-to-one mapping relationship is also understood based on many-to-many mapping groups.
[0059] Table 2
[0060] Test case name Functional Override Group Name Column number VO_Rst_Test1 Rst_cov 1 VO_Clk_Test2 Clk_cov 2 VO_Reg_Test3 Reg_cov 3 Test4 Coverage group 4 Coverage group 5 4 Test5 Test6 Coverage Group 6 5 Test7 Test8 Coverage group 7 Coverage group 8 6
[0061] The test case names and functional coverage group names in Table 2 are for illustrative purposes only.
[0062] It is easy to understand that if a mapping group includes a test case and a coverage group that are mapped to each other, then the coverage information corresponding to the mapping group can reflect the coverage information generated when the test cases in the mapping group test the coverage group in the mapping group. Thus, it can be clearly determined how much the test cases in the mapping group contribute to the testing of the coverage group in the mapping group (i.e., the size of the coverage information).
[0063] However, if a mapping group includes test cases and coverage groups in a one-to-many, many-to-one, or many-to-many manner, then the coverage information generated by the tests can be found in [reference needed]. Figure 2 To record and represent.
[0064] exist Figure 2 In the diagram, func_cov1, func_cov2, func_cov3, func_cov4, func_cov5, and func_cov6 are the names of six coverage groups, and testcase1, testcase2, testcase3, and testcase4 are the names of four test cases. Taking functional coverage as an example, for func_cov1, testcase1 and testcase3 were used for testing. Testcase1 provides over 60% functional coverage for func_cov1, while testcase3 provides coverage between 20% and 40%. The same principle applies to the others.
[0065] S103. If an HVP verification result file is obtained, the coverage information corresponding to each mapping group is added to the HVP verification result file to obtain a verification report.
[0066] The HVP verification result file is output by the HVP tool. The HVP tool is a tool implemented based on the HVP language. This tool defines the verification plan, the hierarchical structure of the chip to be verified, and other content, and is used for automatic verification and backtracking of the verification progress.
[0067] This embodiment combines the coverage information recorded by the mapping group with the HVP verification result file to obtain a more comprehensive verification report. In addition to existing verification plans and results, this report also includes the mapping relationship between test cases and coverage groups, the size of test contributions, etc., which helps technical personnel check the verification progress and effectiveness.
[0068] It should be noted that the mapping configuration file can be flexibly modified and updated. Therefore, in one specific implementation, the method further includes updating the mapping configuration file according to the update command input by the user. Specifically, the user can input the update command through the human-computer interaction interface and specify the content to be modified.
[0069] As can be seen, this embodiment records at least one mapping group in the mapping configuration file. Each mapping group includes at least one mutually mapped test case and at least one coverage group. During the subsequent HVP-based chip verification process, the coverage information corresponding to each mapping group can be recorded. After obtaining the HVP verification result file, the coverage information corresponding to each mapping group can be added to the HVP verification result file, thereby obtaining a more comprehensive verification report. This embodiment can clearly define the corresponding test contribution size for each mapping group. Therefore, the verification report generated by this application includes not only existing verification plans and verification result information, but also the mapping relationship between test cases and coverage groups, the test contribution size, etc., which is beneficial for technicians to check the verification progress and verification effect.
[0070] Based on the above embodiments, it should be noted that recording the coverage information corresponding to each mapping group in the mapping configuration file includes: recording the coverage information corresponding to each mapping group according to the chip-level structure. The chip level can be: module level, subsystem level, or system level; a specific structural diagram can be found in [reference needed]. Figure 3 , Figure 3 Coverage information is not shown.
[0071] To ensure that test cases correspond to the levels they test, different names can be assigned to test cases at different levels. For example, prefix "A" can be added to the names of module-level test cases, "B" to the names of subsystem-level test cases, and "C" to the names of system-level test cases. Based on this naming convention, test cases can be correctly matched to the levels they test, thus completing the division of test cases into the three levels of module, subsystem, and system.
[0072] Based on the above embodiments, it should be noted that adding the coverage information corresponding to each mapping group to the HVP verification result file to obtain the verification report includes: classifying the verification plan information and verification result information in the HVP verification result file to each mapping group, and filling each mapping group with the corresponding coverage information to obtain the verification report, as detailed in Table 3.
[0073] Table 3
[0074]
[0075]
[0076] Table 3 illustrates some verification results. As shown in Table 3, a test scenario can be considered a mapping group. Of course, Table 3 can also correspond to a mapping group, where the test cases and coverage groups are many-to-many. Therefore, classifying various information into mapping groups is actually classifying them into the test cases and coverage groups within those mapping groups, so as to describe coverage information from the perspective of test cases and coverage groups.
[0077] Based on the above embodiments, it should be noted that after adding the coverage information corresponding to each mapping group to the HVP verification result file to obtain the verification report, the method further includes: determining the coverage information corresponding to all mapping groups included in any chip level in the verification report; the chip level is: module level, subsystem level, or system level; analyzing the coverage information corresponding to all mapping groups included in the chip level to obtain the corresponding visualization chart.
[0078] The analysis of coverage information corresponding to all mapping groups included in the chip level, and the resulting visualization charts, includes: using time progress as the analysis dimension to determine the overall coverage information of the chip level at different time points, and obtaining a curve of the overall coverage information change (e.g., ...). Figure 4 (as shown); and / or using each coverage group in this chip level as the analysis dimension, determine the test cases used for any coverage group, the coverage information generated by the test cases testing the coverage group, and obtain the corresponding visualization charts (such as...). Figure 2 (As shown).
[0079] Depend on Figure 4 As can be seen, overall functional coverage, assertion coverage, and code coverage are all steadily increasing over time. Users can also select to view the changes in each type of coverage for any given day. If specific coverage details for a particular day are required, a view can be generated. Figure 2 The bar chart shown illustrates the functional coverage of each test case and the coverage group mapped to a specific test case. Figure 2 and Figure 4 The charts shown are visual and interactive.
[0080] The following describes a chip verification device provided in an embodiment of this application. The chip verification device described below and the chip verification method described above can be referred to each other.
[0081] See Figure 5 As shown in the figure, this application discloses a chip verification device, including:
[0082] The query module 501 is used to query the mapping configuration file if the verification chip is based on HVP; the mapping configuration file records at least one mapping group, the mapping group includes at least one test case and at least one coverage group that are mapped to each other;
[0083] The recording module 502 is used to record the coverage information corresponding to each mapping group in the mapping configuration file during the verification process if the mapping configuration file is found.
[0084] The report generation module 503 is used to add the coverage information corresponding to each mapping group to the HVP verification result file if the HVP verification result file is obtained, so as to obtain a verification report.
[0085] In one specific embodiment, the recording module is specifically used for:
[0086] The coverage information for each mapping group is recorded according to the chip-level structure.
[0087] In one specific implementation, the coverage information corresponding to any mapping group includes: functional coverage and / or assertion coverage.
[0088] In one specific implementation, the report generation module is specifically used for:
[0089] The verification plan information and verification result information in the HVP verification result file are categorized into various mapping groups, and the corresponding coverage information is filled into each mapping group to obtain the verification report.
[0090] In one specific implementation, it further includes:
[0091] The determination module is used to determine the coverage information corresponding to all mapping groups included in any chip level in the verification report; the chip level is: module level, subsystem level, or system level.
[0092] The analysis module is used to analyze the coverage information of all mapping groups included in the chip level and obtain the corresponding visualization charts.
[0093] In one specific implementation, the analysis module includes:
[0094] The first analysis unit is used to determine the overall coverage information of the chip layer at different time points using time progress as the analysis dimension, and to obtain the change curve of the overall coverage information.
[0095] and / or
[0096] The second analysis unit is used to determine the test cases used for any coverage group and the coverage information generated by the test cases for that coverage group, using each coverage group in the chip level as the analysis dimension, and to obtain the corresponding visualization charts.
[0097] In one specific implementation, it further includes:
[0098] The update module is used to update the mapping configuration file according to the update command input by the user.
[0099] For more detailed information on the working process of each module and unit in this embodiment, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.
[0100] As can be seen, this embodiment provides a chip verification device. The verification report generated by this device includes not only existing verification plans and verification result information, but also the mapping relationship between test cases and coverage groups, the size of test contributions, etc., which is beneficial for technicians to check the verification progress and verification effect.
[0101] The following describes an electronic device provided by an embodiment of this application. The electronic device described below can be referred to in conjunction with the chip verification method and apparatus described above.
[0102] See Figure 6 As shown in the figure, an embodiment of this application discloses an electronic device, including:
[0103] Memory 601 is used to store computer programs;
[0104] Processor 602 is configured to execute the computer program to implement the method disclosed in any of the above embodiments.
[0105] The following describes a readable storage medium provided in an embodiment of this application. The readable storage medium described below can be referred to in conjunction with the chip verification method, apparatus and device described above.
[0106] A readable storage medium is provided for storing a computer program, wherein the computer program, when executed by a processor, implements the chip verification method disclosed in the foregoing embodiments. Specific steps of this method can be found in the corresponding content disclosed in the foregoing embodiments, and will not be repeated here.
[0107] To provide a clearer understanding of this application, a detailed explanation of the verification process is provided below.
[0108] For large SoC chips, the functional coverage flowcharts at the module level, subsystem level, and system level can be found in [reference needed]. Figure 7 .
[0109] The process of verifying a chip is a regression testing process. Each simulation generates a database with coverage information. The HVP tool is used for testing and records the random walk trajectory. By merging all this information together, the functional coverage can be obtained, thereby measuring the overall verification progress.
[0110] In this embodiment, to record coverage information for each coverage group and clarify the relationship between coverage groups and test cases, a mapping configuration file is preset, and an information collection tool for collecting coverage information corresponding to each mapping group is designed and implemented. This information collection tool, together with the HVP tool, completes the verification process of this embodiment. The HVP tool is used for test verification, and the tool designed and implemented in this embodiment is used to determine the mapping relationship according to the mapping configuration file, so that the HVP tool records coverage information according to the mapping relationship.
[0111] The mapping configuration file is set according to Table 2. The mapping relationship between test cases and assertions can also be set in Table 2. In this embodiment, the information collection tool can determine the chip level to which the coverage group or assertion belongs in the test environment based on the mapping configuration file, and automatically add the determined chip level to the existing HVP tool according to the HVP syntax rules, generating a more comprehensive HVP verification report.
[0112] Please see Figure 8 , Figure 8 The attributes in Table 1 are illustrated, and the mapping relationship between use cases and coverage groups, as well as the path of coverage groups (i.e., chip level), are clarified based on the four-layer code structure. Figure 8The record "source=group:pkg_name::coverage_class::cov_name" contains the path and name (cov_name) of the coverage group. Combined with source="test1", "test2", "test3", it can be seen that this coverage group corresponds to test1, test2, and test3, meaning that test1, test2, and test3 all participate in testing this coverage group. Thus, the mapping relationship between test cases and coverage groups is clear.
[0113] according to Figure 8 As can be seen, information such as the relevant functions, responsible persons, and update history of each test case, as well as the number of functional coverage groups conducting coverage testing in a certain test scenario, can all be clearly recorded in the final verification report. This facilitates the responsible person's review and verification of the validity of the verification plan and functional coverage, saving significant time and manpower costs. The final verification report is in HVP text format, which is convenient for subsequent version maintenance. Figure 8 All the illustrated attribute information can be customized and extended.
[0114] Of course, the final verification report also includes the verification plan, all test cases and other related content. The information collection tool in this embodiment can then use the verification report to statistically analyze coverage information and automatically generate coverage information charts with one click using Python. This is beneficial for project management, enables reasonable optimization and allocation of resources, and allows the project to progress smoothly.
[0115] This embodiment has the following advantages:
[0116] 1. Employing information collection tools enables a direct mapping between functional coverage and verification plans and test cases, strengthening the connection between these verification metrics without requiring users to spend additional time and effort. It automatically generates charts reflecting the coverage verification status, including not only overall module coverage curves but also the contribution of each functional coverage group to the overall coverage.
[0117] 2. Strong extensibility and continuity: New verification plans and reports can be generated based on parameter definitions and configuration file modifications, which is beneficial for inheritance between projects.
[0118] The terms “first,” “second,” “third,” “fourth,” etc., used in this application (if applicable) are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, or apparatus that includes a series of steps or units is not necessarily limited to those explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, or apparatus.
[0119] It should be noted that the use of terms such as "first" and "second" in this application is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of those features. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed in this application.
[0120] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0121] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of readable storage medium known in the art.
[0122] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. A chip verification method, characterized in that, include: If the chip is verified based on HVP, then query the mapping configuration file; The mapping configuration file records at least one mapping group, which includes at least one test case and at least one coverage group that are mapped to each other; wherein the mapping group supports many-to-many mapping relationships and records the independent coverage contribution value of each test case to each coverage group; If the mapping configuration file is found, during the verification process, the coverage information corresponding to each mapping group in the mapping configuration file is recorded. Recording the coverage information corresponding to each mapping group in the mapping configuration file includes: recording the coverage information corresponding to each mapping group according to the chip-level structure; associating the test cases with the chip level through preset naming rules, wherein different name prefixes are set for test cases at different levels to complete the division of test cases at the module level, subsystem level, or system level. If an HVP verification result file is obtained, the coverage information corresponding to each mapping group is added to the HVP verification result file to obtain a verification report; Based on the mapping configuration file, the chip level to which the coverage group belongs is determined in the test environment, and the determined chip level is automatically added to the existing HVP tool according to the HVP syntax rules to generate a more comprehensive HVP verification report.
2. The chip verification method according to claim 1, characterized in that, Coverage information for any mapping group includes: functional coverage and / or assertion coverage.
3. The chip verification method according to claim 1, characterized in that, The step of adding the coverage information corresponding to each mapping group to the HVP verification result file to obtain a verification report includes: The verification plan information and verification result information in the HVP verification result file are categorized into various mapping groups, and the corresponding coverage information is filled into each mapping group to obtain the verification report.
4. The chip verification method according to claim 1, characterized in that, After adding the coverage information corresponding to each mapping group to the HVP verification result file to obtain the verification report, the process further includes: The verification report determines the coverage information corresponding to all mapping groups included in any chip level; the chip level is: module level, subsystem level, or system level. The coverage information corresponding to all mapping groups included in this chip level is analyzed to obtain the corresponding visualization charts.
5. The chip verification method according to claim 4, characterized in that, The analysis of the coverage information corresponding to all mapping groups included in the chip level yields corresponding visualization charts, including: Using time progress as the analysis dimension, the overall coverage information of the chip level at different time points is determined, and the change curve of the overall coverage information is obtained. and / or Using each coverage group in the chip level as the analysis dimension, the test cases used for any coverage group and the coverage information generated by the test cases for that coverage group are determined, and the corresponding visualization charts are obtained.
6. The chip verification method according to any one of claims 1-5, characterized in that, Also includes: The mapping configuration file is updated according to the update command entered by the user.
7. A chip verification device, characterized in that, include: The query module is used to query the mapping configuration file if the chip is verified based on HVP. The mapping configuration file records at least one mapping group, which includes at least one test case and at least one coverage group that are mapped to each other; wherein the mapping group supports many-to-many mapping relationships and records the independent coverage contribution value of each test case to each coverage group; The recording module is used to record the coverage information corresponding to each mapping group in the mapping configuration file during the verification process if the mapping configuration file is found. The recording of the coverage information corresponding to each mapping group in the mapping configuration file includes: recording the coverage information corresponding to each mapping group according to the chip-level structure; associating the test cases with the chip level through a preset naming rule, wherein different name prefixes are set for test cases at different levels to complete the division of test cases at the module level, subsystem level, or system level. The report generation module is used to add the coverage information corresponding to each mapping group to the HVP verification result file if the HVP verification result file is obtained, so as to obtain a verification report; Based on the mapping configuration file, the chip level to which the coverage group belongs is determined in the test environment, and the determined chip level is automatically added to the existing HVP tool according to the HVP syntax rules to generate a more comprehensive HVP verification report.
8. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the chip verification method as described in any one of claims 1 to 6.
9. A readable storage medium, characterized in that, Used to store a computer program, wherein the computer program, when executed by a processor, implements the chip verification method as described in any one of claims 1 to 6.