Display driver integrated circuit and driving method

Abstract

A display driver integrated circuit includes a first memory, a compensator, an accumulator, and a second memory. The first memory stores multiple compensation data for compensating for degradation of multiple pixels. The compensator generates multiple output image data for image display by compensating multiple input image data based on the multiple compensation data. The accumulator groups multiple pixels into multiple blocks, generates multiple block image data by sampling the multiple output image data in block units, generates multiple block accumulated data in block units based on the multiple block image data, and generates multiple pixel accumulated data in pixel units by synthesizing portions of the multiple output image data and portions of the multiple block accumulated data. The second memory stores the multiple block accumulated data in a first time period. The multiple pixel accumulated data may be stored in a third memory in a second time period longer than the first time period.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0083188, filed on July 7, 2020, with the Korean Intellectual Property Office (KIPO), the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] This disclosure generally relates to semiconductor integrated circuits, and more specifically, to display driver integrated circuits for driving display panels, display devices including display driver integrated circuits, and methods for driving display panels using display driver integrated circuits. Background Technology

[0004] With the development of information technology, display devices have become increasingly important for providing information to users. Various display devices such as liquid crystal displays (LCDs), plasma displays, and electroluminescent displays have become popular. Among them, electroluminescent displays use light-emitting diodes (LEDs) or organic light-emitting diodes (OLEDs) that emit light through the recombination of electrons and holes, resulting in fast response speeds and low power consumption.

[0005] Electroluminescent displays can feature fast response and low power consumption. OLED display devices use driving transistors in each pixel to provide current corresponding to a data signal, thereby generating light through the OLED in each pixel. In this way, electroluminescent display devices use current to display images. Driving transistors and OLEDs can degrade over time due to use, thermal cycling, mechanical stress, and / or age, and various techniques have been investigated to compensate for this phenomenon. Summary of the Invention

[0006] At least one embodiment of this disclosure provides a display driver integrated circuit capable of effectively compensating for the degradation of pixels included in a display panel.

[0007] At least one embodiment of this disclosure provides a display device including a display driver integrated circuit.

[0008] At least one embodiment of this disclosure provides a method for driving a display panel using a display driver integrated circuit.

[0009] According to an embodiment, a display driver integrated circuit for driving a display panel comprising a plurality of pixels includes: a memory configured to store a plurality of compensation data; a compensator configured to generate a plurality of output image data based on the plurality of compensation data; and an accumulator configured to group the plurality of pixels into a plurality of blocks, generate a plurality of block image data by sampling the plurality of output image data in block units, generate a plurality of block accumulator data in block units based on the plurality of block image data and store the plurality of block accumulator data in the memory in a first time period, and generate a plurality of pixel accumulator data in pixel units by synthesizing portions of the plurality of output image data and portions of the plurality of block accumulator data.

[0010] According to an embodiment, a display driver integrated circuit for driving a display panel comprising multiple pixels includes a first memory, a compensator, an accumulator, and a second memory. The first memory stores multiple compensation data for compensating for degradation of the multiple pixels. The compensator generates multiple output image data for image display by compensating multiple input image data based on the multiple compensation data. The accumulator groups the multiple pixels into multiple blocks, generates multiple block image data by sampling the multiple output image data in block units, generates multiple block accumulated data in block units based on the multiple block image data, and generates multiple pixel accumulated data in pixel units by synthesizing portions of the multiple output image data and portions of the multiple block accumulated data. The second memory stores the multiple block accumulated data every first time period. The multiple pixel accumulated data may be stored in a third memory every second time period longer than the first time period, and the third memory is located outside the display driver integrated circuit.

[0011] According to an embodiment, a display device includes a display panel and a display driver integrated circuit. The display panel includes a plurality of pixels. The display driver integrated circuit drives the display panel and includes a first memory, a compensator, an accumulator, and a second memory. The first memory stores a plurality of compensation data for compensating for degradation of the plurality of pixels. The compensator generates a plurality of output image data for image display by compensating a plurality of input image data based on the plurality of compensation data. The accumulator groups the plurality of pixels into a plurality of blocks, generates a plurality of block image data by sampling the plurality of output image data in block units, generates a plurality of block accumulated data in block units based on the plurality of block image data, and generates a plurality of pixel accumulated data in pixel units by synthesizing portions of the plurality of output image data and portions of the plurality of block accumulated data. The second memory stores the plurality of block accumulated data every first time period. The plurality of pixel accumulated data may be stored in a third memory every second time period longer than the first time period, and the third memory is located outside the display driver integrated circuit.

[0012] According to an embodiment, in a method of driving a display panel comprising multiple pixels, multiple compensation data for compensating for degradation of the multiple pixels are stored in a first memory. Multiple output image data for image display are generated by compensating multiple input image data based on the multiple compensation data. Multiple block image data can be generated by grouping multiple pixels into multiple blocks and sampling the multiple output image data in block units. Multiple block accumulated data can be generated in block units based on the multiple block image data. The multiple block accumulated data can be stored in a second memory every first time period. Multiple pixel accumulated data can be generated in pixel units by synthesizing portions of the multiple output image data and portions of the multiple block accumulated data. The multiple pixel accumulated data can be stored in a third memory every second time period longer than the first time period. The third memory is an external memory.

[0013] In the display driver integrated circuit, display device, and method for driving a display panel according to embodiments, the degradation of multiple pixels can be compensated based on an accumulation compensation scheme. Accumulated data of multiple pixels corresponding to the usage or degradation of multiple pixels can be stored in an external non-volatile memory. Therefore, an internal volatile memory with a relatively large capacity can be omitted, and power consumption and chip size can be minimized.

[0014] Furthermore, multiple compensation data points, which are only a portion of the accumulated data for multiple pixels stored in external non-volatile memory, can be loaded and stored in internal volatile memory. Compensation operations can be performed based on these multiple compensation data points. Therefore, the internal volatile memory can be implemented with a relatively small capacity, and the time required to load multiple compensation data points can be minimized.

[0015] Furthermore, to reflect frequent changes in the image, multiple blocks of accumulated image information, representing small-sized and low-resolution data, can be stored in another internal volatile memory over a relatively short period. Conversely, multiple pixels of accumulated image information, representing large-sized and high-resolution data, can be stored in an external non-volatile memory over a relatively long period. Therefore, the other internal volatile memory can be implemented with a relatively small capacity, and power consumption and chip size can be minimized without compromising compensation performance. Attached Figure Description

[0016] The illustrative, non-limiting embodiments will become more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0017] Figure 1 This is a block diagram illustrating a display driver integrated circuit and a display device including the display driver integrated circuit according to an embodiment;

[0018] Figure 2 It shows that it is included Figure 1 A circuit diagram illustrating an example of pixels in a display panel of a display device;

[0019] Figure 3 This is a block diagram illustrating an accumulator and a compensator included in a display driver integrated circuit according to an embodiment;

[0020] Figure 4 This is a block diagram illustrating an example of an accumulator and a compensator according to an embodiment;

[0021] Figure 5 It is used to describe what is included Figure 4 A diagram illustrating the operation of the compensator in the accumulator and compensator;

[0022] Figure 6 It shows that it is included Figure 4 A block diagram of an example combiner in an accumulator and a compensator;

[0023] Figure 7 It is used to describe Figure 6 A diagram illustrating the operation of the combiner;

[0024] Figure 8A , Figure 8B and Figure 8C This is a conceptual diagram used to describe the operation of a display driver integrated circuit according to an embodiment;

[0025] Figure 9 This is a conceptual diagram used to describe the operation of a display driver integrated circuit according to an embodiment;

[0026] Figure 10A , Figure 10B , Figure 10C and Figure 10D This is a conceptual diagram used to describe the operation of a display driver integrated circuit according to an embodiment;

[0027] Figure 11A , Figure 11B and Figure 11C This is a conceptual diagram used to describe the operation of a display driver integrated circuit according to an embodiment;

[0028] Figure 12 This is a data diagram used to describe the operation of the display driver integrated circuit according to an embodiment;

[0029] Figure 13A and Figure 13B This is a block diagram used to describe the operation of a display driver integrated circuit according to an embodiment;

[0030] Figure 14 This is a flowchart illustrating a method for driving a display panel according to an embodiment; and

[0031] Figure 15 This is a block diagram illustrating an electronic system according to an embodiment. Detailed Implementation

[0032] This disclosure will be described more fully with reference to the accompanying drawings, which illustrate illustrative embodiments. However, this disclosure may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Throughout this application, the same reference numerals may refer to the same elements.

[0033] Figure 1 This is a block diagram illustrating a display driver integrated circuit and a display device including the display driver integrated circuit according to an embodiment.

[0034] refer to Figure 1 The display device 100 includes a display panel 110 and a display driver integrated circuit. The display driver integrated circuit may include a data driver 120, a scan driver 130, a power supply 140, and a timing controller 150. In other words, in... Figure 1 The components shown, excluding the display panel 110 and the external memory 200, can form a display driver integrated circuit.

[0035] The display panel 110 operates based on image data or data signals (e.g., displaying an image). The display panel 110 can be connected to the data driver 120 via multiple data lines D1, D2, ..., DM. It can also be connected to the scan driver 130 via multiple scan lines S1, S2, ..., SN. The multiple data lines D1, D2, ..., DM can extend in a first direction, and the multiple scan lines S1, S2, ..., SN can extend in a second direction that intersects the first direction (e.g., is substantially perpendicular to the first direction).

[0036] Display panel 110 may include a plurality of pixels PX arranged in a matrix having multiple rows and columns. (See reference...) Figure 2 In more detail, each of the plurality of pixels PX may include a light-emitting element and a driving transistor for driving the light-emitting element. Each of the plurality of pixels PX may be electrically connected to a corresponding one of a plurality of data lines D1, D2, ..., DM and a corresponding one of a plurality of scan lines S1, S2, ..., SN.

[0037] In this embodiment, the display panel 110 may be a self-emissive display panel that emits light without using a backlight unit. For example, the display panel 110 may be an OLED display panel that includes an organic light-emitting diode (OLED) as the light-emitting element.

[0038] In embodiments, each of the plurality of pixels PX included in the display panel 110 may have various configurations depending on the driving scheme of the display device 100. For example, the display device 100 may be driven using either analog or digital driving schemes. Analog driving schemes use variable voltage levels corresponding to input data to generate grayscale, while digital driving schemes use variable durations in which LEDs (e.g., OLEDs, but not limited to) emit light to generate grayscale. If the display is large and has a high resolution, an analog driving scheme may be implemented using a complex driving integrated circuit (IC). On the other hand, a digital driving scheme can easily achieve high resolution with a simpler IC structure. (See reference...) Figure 2 Describe the descriptive structure of each pixel PX.

[0039] The timing controller 150 controls the overall operation of the display device 100. For example, the timing controller 150 can receive input control signals ICONT from an external host device, and can provide predetermined control signals to the data driver 120, scan driver 130, and power supply 140 based on the input control signals ICONT to control the operation of the display device 100. For example, the input control signals ICONT may include a master clock signal, a data enable signal, a horizontal synchronization signal, a vertical synchronization signal, etc.

[0040] The timing controller 150 receives multiple input image data IIMGs from an external host device and generates multiple output image data OIMGs for image display based on the multiple input image data IIMGs. For example, the input image data may include red image data, green image data, and blue image data. Additionally, the input image data may include white image data. Alternatively, the input image data may include magenta image data, yellow image data, cyan image data, etc. Each of the multiple input image data IIMGs and each of the multiple output image data OIMGs may correspond to one frame image.

[0041] The timing controller 150 includes an accumulator and compensator (ACC & COMP) 152. The accumulator and compensator 152 can receive and store multiple compensation data CDATs from external memory 200. The multiple compensation data CDATs are used to compensate for degradation (e.g., aging) of multiple pixels (PXs). The accumulator and compensator 152 can generate multiple output image data OIMGs by compensating multiple input image data IIMGs based on the multiple compensation data CDATs. Furthermore, the accumulator and compensator 152 can internally store first image information or a first accumulated value during a first time period and output second image information or a second accumulated value during a second time period longer than the first time period, so as to externally store the second image information or the second accumulated value. The first image information or the first accumulated value is low-resolution information and is associated with the amount of degradation or usage of the multiple pixels (PXs). The second image information or the second accumulated value is high-resolution information and is generated based on the first image information or the first accumulated value. The multiple pixel accumulated data PADAT, output to and stored in an external memory 200 located outside the display driver integrated circuit, can correspond to second image information or a second accumulated value. (Refer to...) Figures 3 to 14 A more detailed description of the structure and operation of the accumulator and compensator 152 is provided.

[0042] Image sticking or ghosting can occur due to the degradation of multiple pixels (PX), where frequently used image formats permanently appear on the screen, potentially affecting image quality. Techniques for compensating for the degradation of multiple pixels (PX) can be broadly categorized into two approaches. One approach detects and compensates for the amount of degradation by using a separate circuit to sense the electrical characteristics of the multiple pixels (PX), and the other approach predicts and compensates for the total degradation by using an input image (e.g., based on accumulation) and by accumulating the degradation amount. The first approach (e.g., a sensing approach) can use a separate circuit for sensing the electrical characteristics and can additionally perform a separate sensing operation. The second approach (e.g., an accumulation compensation approach) can be used in mobile devices because it does not require a separate sensing circuit and a separate sensing operation, and compensation is performed in real time without additional operations. The accumulator and compensator 152 included in the display driver integrated circuit and display device 100 according to the embodiment can be implemented based on the second approach described above (e.g., the accumulation compensation approach).

[0043] The data driver 120 can generate multiple data voltages based on the control signal CONT1 and multiple output image data OIMGs, and can apply the multiple data voltages to the display panel 110 through multiple data lines D1, D2, ..., DM. For example, the data driver 120 may include a digital-to-analog converter (DAC) that converts the multiple output image data OIMGs in digital form into multiple data voltages in analog form.

[0044] The scan driver 130 can generate multiple scan signals based on the control signal CONT2, and can apply the multiple scan signals to the display panel 110 through multiple scan lines S1, S2, ..., SN. The multiple scan lines S1, S2, ..., SN can be activated sequentially based on the multiple scan signals.

[0045] In one embodiment, the data driver 120, scan driver 130, and timing controller 150 may be implemented as a single integrated circuit (IC). In another embodiment, the data driver 120, scan driver 130, and timing controller 150 may be implemented as two or more integrated circuits. A driver module that includes at least the timing controller 150 and the data driver 120 may be referred to as a Timing Controller Embedded Data Driver (TED).

[0046] Power supply 140 can provide a first power supply voltage ELVDD and a second power supply voltage ELVSS to display panel 110 based on control signal CONT3. For example, the first power supply voltage ELVDD can be a high power supply voltage, and the second power supply voltage ELVSS can be a low power supply voltage.

[0047] In embodiments, at least some of the components included in the display driver integrated circuit may be disposed (e.g., directly mounted) on the display panel 110, or may be connected to the display panel 110 in a tape carrier package (TCP) type. Alternatively, at least some of the components included in the display driver integrated circuit may be integrated onto the display panel 110. In embodiments, the components included in the display driver integrated circuit may be implemented separately using individual circuits / modules / chips. In other embodiments, based on layout optimization features, some of the components included in the display driver integrated circuit may be combined into a single circuit / module / chip, or may be further separated into multiple circuits / modules / chips.

[0048] Figure 2 It shows that it is included Figure 1 A circuit diagram of an example of pixels in a display panel of a display device.

[0049] refer to Figure 2 Each pixel PX may include a switching transistor TS, a storage capacitor CST, a driving transistor TD, and an organic light-emitting diode EL.

[0050] The switching transistor TS may have a first electrode connected to the data line Di, a second electrode connected to the storage capacitor CST, and a gate electrode connected to the scan line Sj. In response to the scan signal SSC received from the scan driver 130, the switching transistor TS may transfer the data voltage VDAT received from the data driver 120 to the storage capacitor CST.

[0051] The storage capacitor CST may have a first electrode connected to a first power supply voltage ELVDD and a second electrode connected to the gate electrode of the driving transistor TD. The storage capacitor CST may store the data voltage VDAT transmitted through the switching transistor TS.

[0052] The driving transistor TD may have a first electrode connected to a first power supply voltage ELVDD, a second electrode connected to an organic light-emitting diode EL, and a gate electrode connected to a storage capacitor CST. The driving transistor TD can be turned on or off according to the data voltage VDAT stored in the storage capacitor CST.

[0053] An organic light-emitting diode (OLED) EL may have an anode electrode connected to a second electrode of a driving transistor TD and a cathode electrode connected to a second power supply voltage ELVSS. In an alternative embodiment, the OLED EL may have an anode electrode connected to a first power supply voltage ELVDD and a cathode electrode connected to a first electrode of the driving transistor TD.

[0054] When the driving transistor TD is turned on, the organic light-emitting diode EL can emit light based on the current flowing from the first power supply voltage ELVDD to the second power supply voltage ELVSS. The brightness of the pixel PX can increase as the current flowing through the organic light-emitting diode EL increases.

[0055] although Figure 2 An OLED pixel is shown as an example of each pixel PX that can be included in the display panel 110, but it should be understood that the embodiment is not limited to OLED pixels and can be applied to pixels of various types and configurations.

[0056] Figure 3 This is a block diagram illustrating an accumulator and a compensator included in a display driver integrated circuit according to an embodiment.

[0057] refer to Figure 3The accumulator and compensator 300 includes a first memory 310, a compensator 320, an accumulator 330, and a second memory 340. The accumulator and compensator 300 may also include a write buffer 350.

[0058] The first memory 310 stores multiple compensation data CDATs used to compensate for degradation of multiple pixels PX. The multiple compensation data CDATs can be loaded from the third memory 200 located outside the accumulator and compensator 300, and can also be stored in the first memory 310. (Refer to...) Figure 13A and Figure 13B Describe the operation of loading multiple compensation data CDATs.

[0059] In an embodiment, the multiple compensation data CDATs may be portions of multiple pixel accumulated data PADATs stored in the third memory 200. (See reference...) Figure 12 Describe the configuration of multiple compensation data CDAT and multiple pixel accumulation data PADAT.

[0060] The compensator 320 generates multiple output image data OIMGs for image display by compensating multiple input image data IIMGs based on multiple compensation data CDAT. (Refer to...) Figure 4 and Figure 5 Describe the detailed structure and operation of compensator 320.

[0061] Accumulator 330 groups multiple pixels PX into multiple blocks, each comprising two or more pixels, generates multiple block image data by sampling multiple output image data OIMG on a block-by-block basis (or on a block-by-block basis), generates multiple block-accumulated data BADAT on a block-by-block basis based on the multiple block image data, and generates multiple pixel-accumulated data PADAT on a pixel-by-pixel basis (or on a pixel-by-pixel basis) by synthesizing (or combining) portions of multiple output image data OIMG and portions of multiple block-accumulated data BADAT. (Refer to...) Figures 4 to 7 Describe the detailed structure and operation of accumulator 330.

[0062] In the embodiments, as referenced Figure 10A and Figure 10B As described, each of the multiple block-accumulated data in BADAT can correspond to multiple blocks and can include multiple block-accumulated values ​​for multiple blocks. This can be done in the first time period (e.g., Figure 10A and Figure 10B In time period T1, multiple block cumulative data BADAT is generated for multiple blocks. The multiple block cumulative data BADAT can correspond to a reference. Figure 1 The description of the low-resolution first image information or the first accumulated value.

[0063] In the embodiments, as referenced Figure 10C and Figure 11C As described, each of the multiple pixel accumulated data PADAT can correspond to one of multiple blocks and can include multiple pixel accumulated values ​​from one of the multiple blocks. A second time period longer than the first time period T1 (e.g., Figure 11C In time period T2, multiple pixel accumulation data PADAT are generated for the same block, corresponding to the pixel accumulation data of the same block. Multiple pixel accumulation data PADAT can correspond to a reference. Figure 1 The description refers to the high-resolution second image information or the second accumulated value.

[0064] In one embodiment, at least a portion of the compensator 320 and / or accumulator 330 may be implemented as hardware. For example, at least a portion of the compensator 320 and / or accumulator 330 may be included in a computer-based electronic system. In another embodiment, at least a portion of the compensator 320 and / or accumulator 330 may be implemented as instruction code or program routines (e.g., software programs). For example, the instruction code or program routines may be executed by the computer-based electronic system and may be stored in any storage device located inside or outside the computer-based electronic system.

[0065] The second memory 340 stores multiple block-accumulated data BADAT during the first time period T1. The second memory 340 can be implemented separately from the first memory 310 in the accumulator and compensator 300 without limitation.

[0066] The write buffer 350 can output the accumulated data PADAT of multiple pixels to the third memory 200, which serves as external memory.

[0067] The third memory 200 stores multiple pixel accumulation data PADATs during the second time period T2. For example, pixel accumulation data corresponding to the same block among the multiple pixel accumulation data PADATs can be stored in the third memory 200 during the second time period T2.

[0068] In this embodiment, each of the first memory 310 and the second memory 340 may include volatile memory, and the third memory 200 may include non-volatile memory. For example, volatile memory may include any type of volatile memory, such as Dynamic Random-Access Memory (DRAM), Static Random-Access Memory (SRAM), etc. Non-volatile memory may include any type of non-volatile memory, such as flash memory, Phase Random-Access Memory (PRAM), Resistive Random-Access Memory (RRAM), Nano Floating Gate Memory (NFGM), Polymer Random-Access Memory (PoRAM), Magnetic Random-Access Memory (MRAM), Ferroelectric Random-Access Memory (FRAM), Thyristor Random-Access Memory (TRAM), etc.

[0069] Figure 4 This is a block diagram illustrating an example of an accumulator and a compensator according to an embodiment. Figure 5 It is used to describe what is included Figure 4 A diagram illustrating the operation of the compensator in the accumulator and compensator.

[0070] refer to Figure 4 and Figure 5 The accumulator and compensator 300a includes a first memory 310, a compensator 320a, an accumulator 330a and a second memory 340, and may also include an adder 352. Figure 4 The first memory 310, the second memory 340, and the third memory 200 can be respectively connected to... Figure 3 The first memory 310, the second memory 340, and the third memory 200 are basically the same. Repeated descriptions can be omitted.

[0071] The compensator 320a may include a gain generator 322 and a multiplier 324.

[0072] Gain generator 322 can generate multiple compensation gains CGAIN based on multiple compensation data CDAT. For example, the multiple compensation data CDAT can include multiple compensation values ​​for multiple pixels PX. Gain generator 322 can convert multiple compensation values ​​into multiple compensation gains CGAIN.

[0073] For example, gain generator 322 can be based on Figure 5 The curve graph converts multiple compensation values ​​into multiple compensation gains CGAIN. Figure 5 In the graph, the horizontal axis can represent multiple compensation values, and the vertical axis can represent multiple compensation gains (CGAIN). In other words, Figure 5 The graph can represent the relationship between multiple compensation values ​​and multiple compensation gains CGAIN. For example, the gain generator 322 can include a graph corresponding to... Figure 5 The predetermined lookup table (LUT) for the curve graph. However, the embodiments are not limited to this, and the relationship between the multiple compensation values ​​and the multiple compensation gains CGAIN can be changed according to alternative embodiments.

[0074] In an embodiment, each of the plurality of compensation data CDAT and each of the plurality of compensation values ​​may correspond to the amount of usage and / or degradation of each of the plurality of pixels PX.

[0075] Multiplier 324 can generate multiple output image data OIMGs by multiplying multiple input image data IIMGs and multiple compensation gains CGAINs. For example, each of the multiple input image data IIMGs may include multiple input pixel values ​​(e.g., grayscale, brightness, luminance, etc.) of multiple pixels PX, and each of the multiple output image data OIMGs may include multiple output pixel values ​​of multiple pixels PX. Multiplier 324 can generate output pixel values ​​included in an output image data unit by multiplying the input pixel values ​​included in an input image data unit by the corresponding compensation gain.

[0076] For example, multiplier 324 can generate multiple current output pixel values ​​in multiple output image data OIMG by multiplying multiple current input pixel values ​​in the current input image data that are included in multiple input image data IIMG by multiple compensation gains CGAIN.

[0077] In the embodiments, as referenced Figure 1 Each of the multiple input image data IIMG and multiple output image data OIMG can correspond to a frame image, so the compensator 320a can perform the above-described compensation operation on each frame image.

[0078] The accumulator 330a may include an averaging unit 332, a first adder 334, a region selector 336, and a combiner 338.

[0079] Average unit 332 can group multiple pixels PX into multiple blocks (e.g., Figure 9 The current block image data B(t) can be generated by sampling the current output image data i(t) in multiple output image data OIMGs on a block-by-block basis. For example, the current block image data B(t) can include multiple block values ​​of multiple block BLKs. For example, each of the multiple block values ​​can be the average of the pixel values ​​of the pixels included in each of the multiple block BLKs. In other words, the averaging unit 332 can sample (e.g., average) the pixel values ​​on a block-by-block basis to generate a low-resolution image, and the current block image data B(t) can represent low-resolution image information of the entire screen. Referring to Figure 8 and... Figure 9 Describe the detailed operation of the averaging unit 332.

[0080] The first adder 334 generates the current block accumulated data M(t) by adding the current block image data B(t) output from the averaging unit 332 to the previous block accumulated data M(t-1) stored in the second memory 340 in multiple block accumulated data BADAT. For example, the current block accumulated data M(t) may include multiple block accumulated values ​​of multiple blocks BLK. In other words, the first adder 334 can perform the accumulation operation on a block-by-block basis. (Refer to...) Figure 10A and Figure 10B Describe the detailed operation of the first adder 334.

[0081] In an embodiment, each of the multiple block accumulation values ​​included in the current block accumulation data M(t) may correspond to the usage and / or degradation of each of the multiple pixels PX, and specifically may correspond to the usage and / or degradation of each of the multiple blocks BLK. The current block accumulation data M(t) may correspond to a reference Figure 1 The description refers to the first low-resolution image information or the first accumulated value, and can represent the result of accumulating the low-resolution image information of the entire screen over a relatively short time interval.

[0082] In the embodiments, as referenced Figure 3 The current block accumulated data M(t) can be generated in the first time period and stored in the second memory 340 in the first time period.

[0083] Region selector 336 can select a portion i of the current output image data i(t) corresponding to the current block. x,y(t), and can select a portion M of the current block's accumulated data M(t) corresponding to the current block. X,Y (t). (Refer to) Figure 10C Describe the detailed operation of region selector 336.

[0084] Combiner 338 can synthesize (or combine or mix) selected portions of the current output image data i(t) based on different weights. x,y The selection part M of the current block accumulated data M(t) and M(t) X,Y (t) generates the current pixel accumulation data Acc corresponding to the current block from multiple pixel accumulation data PADAT. x,y (t). In other words, the selected portion i assigned to the current output image data i(t). x,y The weights of M(t) and the selection portion M assigned to the current block of accumulated data M(t) X,Y The weights of (t) can be different from each other. Current pixel accumulated data Acc x,y (t) can include the cumulative pixel value of some pixels in a multi-pixel PX. (Refer to...) Figure 6 , Figure 7 and Figure 10C Describe the detailed operation of combiner 338.

[0085] In the embodiment, the data included in the current pixel accumulation data Acc is... x,y Each of the multiple pixel accumulation values ​​in (t) can correspond to the usage and / or degradation of each of the multiple pixels PX. Current pixel accumulation data Acc x,y (t) can correspond to the reference Figure 1 The description refers to high-resolution second image information or a second accumulated value, and can represent the result of accumulating high-resolution image information of a portion of the screen (e.g., a portion of the screen corresponding to a block) over a relatively long time interval.

[0086] In the embodiments, as referenced Figure 3 The current pixel accumulated data Acc x,y (t) can be generated for the same block in the second time period and can be stored in the third memory 200 in the second time period.

[0087] Adder 352 can accumulate pixel data P stored in third memory 200. x,y (t-1) and the current pixel accumulation data Acc output from combiner 338 x,y (t) are added together to generate the updated pixel accumulation data P. x,y (t). Updated pixel accumulation data P x,y(t) can be stored in the third memory 200. In an embodiment, adder 352 may be included. Figure 3 In the write buffer 350, or it can be used with Figure 3 The write buffer 350 is implemented separately.

[0088] The third memory 200 can be based on the updated pixel accumulation data P x,y (t) is used to store the cumulative pixel values ​​of multiple pixels PX, and a portion of the cumulative pixel values ​​stored therein can be provided as multiple compensation data CDAT.

[0089] Figure 6 It shows that it is included Figure 4 A block diagram of an example combiner in an accumulator and a compensator. Figure 7 It is used to describe Figure 6 A diagram illustrating the operation of the combiner.

[0090] refer to Figure 6 and Figure 7 The combiner 338 may include a weight selector 410, a first multiplier 420, a second multiplier 430, and a second adder 440.

[0091] The weight selector 410 can select a portion M based on the current block accumulated data M(t). X,Y (t) is used to select the first weight w and the second weight 1-w. For example, the sum of the first weight w and the second weight 1-w can be one, and when one of the first weight w and the second weight 1-w is selected, the other of the first weight w and the second weight 1-w can be automatically determined.

[0092] For example, the weight selector 410 can be based on Figure 7 The curve is used to select the first weight w, and the second weight 1-w can be determined based on the selected first weight w. Figure 7 In the graph, the horizontal axis can represent the selected portion M(t) included in the current block of accumulated data. X,Y The current block accumulation value in (t), and the vertical axis can represent the first weight w. In other words, Figure 7 A graph can represent the relationship between the current block's accumulated value and the first weight w. For example, the weight selector 410 can include a graph corresponding to... Figure 7 The predefined lookup table (LUT) for the curve graph.

[0093] In an embodiment, such as Figure 7 As shown, with the selection portion M included in the current block's accumulated data M(t) X,YAs the current block accumulation value in (t) increases, the first weight w can increase. Furthermore, as the first weight w increases, the second weight 1-w can decrease. However, the embodiment is not limited to this, and the relationship between the current block accumulation value and the first weight w can be changed according to alternative embodiments.

[0094] The first multiplier 420 can select a portion of the current output image data i(t) i. x,y (t) is multiplied by the first weight w. The second multiplier 430 can select the portion M(t) of the current block accumulated data M(t). X,Y (t) is multiplied by the second weight 1-w. The second adder 440 can generate the current pixel accumulation Acc by adding the output of the first multiplier 420 and the output of the second multiplier 430. x,y (t).

[0095] Figure 8A , Figure 8B , Figure 8C , Figure 9 , Figure 10A , Figure 10B , Figure 10C , Figure 10D , Figure 11A , Figure 11B , Figure 11C , Figure 12 , Figure 13A and Figure 13B This is a diagram illustrating the operation of a display driver integrated circuit according to an embodiment.

[0096] refer to Figure 8A , Figure 8B and Figure 8C This shows from Figure 4 The compensator 320a in the middle provides Figure 4 The current output image data i(t) of the accumulator 330a in the middle.

[0097] like Figure 8A As shown, multiple output image data OIMGs generated based on multiple input image data IIMGs can correspond to multiple frame images F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14, F15, and F16. For example, compensator 320a can generate one output image data corresponding to one frame image by performing a compensation operation on one input image data.

[0098] like Figure 8B and 8C As shown, the output image data corresponding to the shadow frame image among multiple frame images F1 to F16 can be provided as the current output image data i(t).

[0099] For example, such as Figure 8B As shown, multiple output image data OIMGs corresponding to multiple frame images F1 to F16 can be sequentially provided as the current output image data i(t). In this example, the input time period T1a of the current output image data i(t) can be approximately equal to the frame time period, which is the time interval between two adjacent frame images among the multiple frame images F1 to F16.

[0100] As another example, such as Figure 8C As shown, the output image data corresponding to the odd-numbered frame images F1, F3, F5, F7, F9, F11, F13, and F15 among multiple frame images F1 to F16 can be sequentially provided as the current output image data i(t). In this example, the input time period T1b of the current output image data i(t) can be approximately equal to about twice the frame time period.

[0101] However, the embodiments are not limited thereto, and the configuration of the current output image data i(t) can be changed according to alternative embodiments.

[0102] As described above, the input time period of the current output image data i(t) (e.g., Figure 8B The input time period T1a or Figure 8C The input time period T1b) can be an integer multiple of the frame time period. In addition, whenever the current output image data i(t) is input, the current block accumulation data M(t) can be generated, so the input time period of the current output image data i(t) can be substantially the same as the first time period in which the current block accumulation data M(t) is generated and stored in the second memory 340.

[0103] refer to Figure 9 and 10A This shows the result of Figure 4 The operation of generating the current block image data B(t) in the average unit 332.

[0104] like Figure 9 As shown, the current output image data i(t) can include multiple output pixel values ​​i corresponding to multiple pixels PX. 1,1 (t), i 1,2 (t), i 1,3 (t), i 1,4 (t), i 2,1 (t), i 2,2 (t), i 2,3 (t), i 2,4 (t), i 3,1 (t), i 3,2 (t), i 3,3 (t), i 3,4 (t), i 4,1 (t), i 4,2(t), i 4,3 (t), i 4,4 (t), i 5,1 (t), i 5,2 (t), i 5,3 (t), i 5,4 (t), i 6,1 (t), i 6,2 (t), i 6,3 (t) and i 6,4 (t). For example, each output pixel value can represent the grayscale, brightness, and / or luminance of each pixel. Although Figure 9 An example is shown where the number of pixels PX is 24 and the current output image data i(t) includes 24 output pixel values ​​corresponding to the 24 pixels, but the embodiment is not limited thereto.

[0105] The averaging unit 332 can group multiple pixels PX into multiple blocks BLK, and can generate the current block image data B(t) by sampling the current output image data i(t) in block units.

[0106] In an embodiment, the size of a block can be determined based on the data transfer capability or performance of the write buffer 350.

[0107] The current block image data B(t) can include multiple block values ​​B corresponding to multiple blocks BLK. 1,1 (t), B 1,2 (t), B 2,1 (t), B 2,2 (t), B 3,1 (t) and B 3,2 (t). Although Figure 9 An example is shown where four pixels arranged in a 2x2 matrix are mapped to each block and the current block image data B(t) includes six block values ​​corresponding to the six blocks, but the embodiment is not limited thereto.

[0108] In an embodiment, each block value can be the average of the pixel values ​​of the pixels included in each block. For example, block value B 1,1 (t)=(i 1,1 (t)+i 1,2 (t)+i 1,3 (t)+i 1,4 (t)) / 4. Other block values ​​B can also be obtained as described above. 1,2 (t), B 2,1 (t), B 2,2 (t), B 3,1 (t) and B 3,2 (t).

[0109] like Figure 10AAs shown, at time t=1, the averaging unit 332 can generate a block value B by sampling the output image data i(1) in block units. 1,1 (1) B 1,2 (1) B 2,1 (1) B 2,2 (1) B 3,1 (1) and B 3,2 (1) Block image data B(1).

[0110] Similarly, at time t=2, the averaging unit 332 can generate a block value B by sampling the output image data i(2) in block units. 1,1 (2) B 1,2 (2) B 2,1 (2) B 2,2 (2) B 3,1 (2) and B 3,2 (2) Block image data B(2). At time t=3, the averaging unit 332 can generate block value B by sampling the output image data i(3) in block units. 1,1 (3) B 1,2 (3) B 2,1 (3) B 2,2 (3) B 3,1 (3) and B 3,2 (3) block image data B(3). At time t=4, the averaging unit 332 can generate block value B by sampling the output image data i(4) in block units. 1,1 (4) B 1,2 (4) B 2,1 (4) B 2,2 (4) B 3,1 (4) and B 3,2 (4) block image data B(4). At time t=5, the averaging unit 332 can generate block value B by sampling the output image data i(5) in block units. 1,1 (5) B 1,2 (5) B 2,1 (5) B 2,2 (5) B 3,1 (5) and B 3,2 (5) block image data B(5). At time t=6, the averaging unit 332 can generate block value B by sampling the output image data i(6) in block units. 1,1 (6) B 1,2 (6) B 2,1 (6) B 2,2 (6) B 3,1 (6) and B 3,2(6) block image data B(6).

[0111] As described above, the input time period for the output image data i(1), i(2), i(3), i(4), i(5) and i(6) can be the first time period T1. Therefore, the block image data B(1), B(2), B(3), B(4), B(5) and B(6) can be generated in each consecutive first time period T1.

[0112] refer to Figure 10B This shows the result of Figure 4 The first adder 334 in the process generates the current block accumulated data M(t).

[0113] For example, at time t=1, the first adder 334 can generate a block accumulation value M by adding the block image data B(1) generated from the averaging unit 332 and the previous block accumulation data (e.g., M(0)) stored in the second memory 340. 1,1 (1) M 1,2 (1) M 2,1 (1) M 2,2 (1) M 3,1 (1) and M 3,2 (1) Block accumulated data M(1). For example, at the initial operation time, the block accumulated value of the previous block accumulated data M(0) stored in the second memory 340 can be zero, so B(1) = M(1). In other words, B 1,1 (1) = M 1,1 (1), B 1,2 (1) = M 1,2 (1), B 2,1 (1) = M 2,1 (1), B 2,2 (1) = M 2,2 (1), B 3,1 (1) = M 3,1 (1) and B 3,2 (1) = M 3,2 (1).

[0114] At time t=2, the first adder 334 can generate a block accumulation value M by adding the block image data B(2) generated from the averaging unit 332 and the previous block accumulation data (e.g., M(1)) stored in the second memory 340. 1,1 (2) M 1,2 (2) M 2,1 (2) M 2,2 (2) M 3,1 (2) and M 3,2 (2) is the block accumulation data M(2). For example, M(2) = M(1) + B(2). In other words, M1,1 (2) = M 1,1 (1)+B 1,1 (2), M 1,2 (2) = M 1,2 (1)+B 1,2 (2), M 2,1 (2) = M 2,1 (1)+B 2,1 (2), M 2,2 (2) = M 2,2 (1)+B 2,2 (2), M 3,1 (2) = M 3,1 (1)+B 3,1 (2) and M 3,2 (2) = M 3,2 (1)+B 3,2 (2).

[0115] Similarly, at time t=3, the first adder 334 can generate a block accumulation value M by adding the block image data B(3) generated from the averaging unit 332 and the previous block accumulation data (e.g., M(2)) stored in the second memory 340. 1,1 (3) M 1,2 (3) M 2,1 (3) M 2,2 (3) M 3,1 (3) and M 3,2 (3) Block accumulation data M(3). At time t=4, the first adder 334 can generate a block accumulation value M by adding the block image data B(4) generated from the averaging unit 332 and the previous block accumulation data (e.g., M(3)) stored in the second memory 340. 1,1 (4) M 1,2 (4) M 2,1 (4) M 2,2 (4) M 3,1 (4) and M 3,2 (4) Block accumulation data M(4). At time t=5, the first adder 334 can generate a block accumulation value M by adding the block image data B(5) generated from the averaging unit 332 and the previous block accumulation data (e.g., M(4)) stored in the second memory 340. 1,1 (5) M 1,2 (5) M 2,1 (5) M 2,2 (5) M 3,1 (5) and M 3,2(5) is the block accumulation data M(5). At time t=6, the first adder 334 can generate a block accumulation value M by adding the block image data B(6) generated from the averaging unit 332 and the previous block accumulation data (e.g., M(5)) stored in the second memory 340. 1,1 (6) M 1,2 (6) M 2,1 (6) M 2,2 (6) M 3,1 (6) and M 3,2 (6) is the block accumulation data M(6). For example, M(3) = M(2) + B(3), M(4) = M(3) + B(4), M(5) = M(4) + B(5) and M(6) = M(5) + B(6).

[0116] As described above, the block image data B(1), B(2), B(3), B(4), B(5), and B(6) can be generated in each consecutive first time period T1, and therefore the block accumulation data M(1), M(2), M(3), M(4), M(5), and M(6) can also be generated in each consecutive first time period T1. Furthermore, the block accumulation data M(1), M(2), M(3), M(4), M(5), and M(6) generated from the first adder 334 can be stored in the second memory 340 in each consecutive first time period T1.

[0117] refer to Figure 10C and Figure 10D This shows the result of Figure 4 Region selector 336 in the middle selects a portion i of the current output image data i(t). x,y M(t) and the portion of the current block accumulated data M(t) X,Y The operation of (t) and the result of Figure 4 Combiner 338 in the middle generates the current pixel accumulated data Acc. x,y The operation of (t).

[0118] At time points t=1, t=2, t=3, t=4, and t=5, the block accumulation value stored in the second memory 340 may be insufficient to generate the current pixel accumulation data Acc. x,y (t), therefore the current pixel accumulated data Acc x,y (t) may not be generated.

[0119] like Figure 10C As shown, at time t=6, region selector 336 can select the portion i corresponding to the current block from the output image data i(6). x,y (6), and the portion M corresponding to the current block can be selected from the block accumulation data M(6). X,Y(6). The portion shown by the thick solid line represents the current block at time t=6. The selected portion i of the output image data i(6). x,y (6) may include the output pixel value i included in the output image data i(6). 5,3 (6) i 5,4 (6) i 6,3 (6) and i 6,4 (6), and the selected part M of the block accumulation data M(6) X,Y (6) May include block accumulation value M 3,2 (6).

[0120] At time t=6, combiner 338 can be based on the selection portion M included in the block accumulation data M(6). X,Y (6) Block accumulation value M 3,2 (6) to select the first weight w and the second weight 1-w, and can be done by selecting part i of the output image data i(6). x,y (6) Multiply by the first weight, by selecting the portion M of the block-accumulated data M(6). X,Y (6) Multiply by the second weight 1-w and generate the pixel accumulation value A by summing the two parts. 5,3 (6) A 5,4 (6) A 6,3 (6) and A 6,4 (6) pixel accumulation data Acc x,y (6). For example, Acc x,y (6)=w*i x,y (6)+(1-w)*M X,Y (6). In other words, A 5,3 (6)=w*i 5,3 (6)+(1-w)*M 3,2 (6), A 5,4 (6)=w*i 5,4 (6)+(1-w)*M 3,2 (6), A 6,3 (6)=w*i 6,3 (6)+(1-w)*M 3,2 (6) and A 6,4 (6)=w*i 6,4 (6)+(1-w)*M 3,2 (6).

[0121] Unlike the output image data i(6), block image data B(6), and block accumulation data M(6) corresponding to the entire screen, the pixel accumulation data Acc x,y(6) It can correspond to a portion of the screen (e.g., a block of the screen). The pixel accumulation data Acc generated from combiner 338 x,y (6) It can be output to and stored in the third memory 200, which is an external memory.

[0122] like Figure 10D As shown, at time t=6, the block accumulation data M(6) generated from the first adder 334 can be stored in the second memory 340, and the pixel accumulation data Acc is generated. x,y (6) at (or after) the block accumulation value M is included in the block accumulation data M(6) stored in the second memory 340. 1,1 (6) M 1,2 (6) M 2,1 (6) M 2,2 (6) M 3,1 (6) and M 3,2 (6) where M corresponds to the block accumulation value of the current block. 3,2 (6) Can be initialized or reset. Block accumulation value M 3,2 (6) Can be used to generate pixel accumulation data Acc x,y (6), and it is not needed afterward, so the block accumulation value M 3,2 (6) It can be reset or initialized for the next or subsequent accumulation operation.

[0123] refer to Figure 11A , Figure 11B and Figure 11C After the time point t=6, it is shown that... Figure 4 The operation of generating the current block image data B(t) by the average unit 332 in the middle, by Figure 4 The operation of the first adder 334 in generating the current block accumulated data M(t) is performed by... Figure 4 Region selector 336 in the middle selects a portion i of the current output image data i(t). x,y M(t) and the portion of the current block accumulated data M(t) X,Y The operation of (t) and the result of Figure 4 Combiner 338 in the middle generates the current pixel accumulated data Acc. x,y The operation of (t).

[0124] For reference Figure 9 , Figure 10A , Figure 10B , Figure 10C and Figure 10D The operation described is the same; at time t=7, the average unit 332 can generate a value including block value B. 1,1 (7) B 1,2 (7) B 2,1(7) B 2,2 (7) B 3,1 (7) and B 3,2 (7) block image data B(7). The first adder 334 can generate block accumulation value M. 1,1 (7) M 1,2 (7) M 2,1 (7) M 2,2 (7) M 3,1 (7) and M 3,2 (7) is the block accumulation data M(7). The block accumulation data M(7) can be stored in the second memory 340. The region selector 336 and the combiner 338 can generate a pixel accumulation value A. 1,1 (7) A 1,2 (7) A 2,1 (7) and A 2,2 (7) Pixel accumulation data Acc x,y (7), and the current block can correspond to the block accumulation value M. 1,1 (7) Position. Furthermore, in generating pixel accumulation data Acc... x,y (7) corresponds to the current block and is included in the block accumulation data M(7) stored in the second memory 340. 1,1 (7) It can be initialized.

[0125] Similarly, at time t=8, the average unit 332 can generate a value including block value B. 1,1 (8) B 1,2 (8) B 2,1 (8) B 2,2 (8) B 3,1 (8) and B 3,2 (8) block image data B(8). The first adder 334 can generate block accumulation value M. 1,1 (8) M 1,2 (8) M 2,1 (8) M 2,2 (8) M 3,1 (8) and M 3,2 (8) is the block accumulation data M(8). The block accumulation data M(8) can be stored in the second memory 340. The region selector 336 and the combiner 338 can generate a pixel accumulation value A. 1,3 (8) A 1,4 (8) A 2,3 (8) and A 2,4 (8) pixel accumulation data Acc x,y (8), and the current block can correspond to the block accumulation value M. 1,2 (8) Position. Furthermore, in generating pixel accumulation data Acc...x,y (8) corresponds to the current block and is included in the block accumulation data M(8) stored in the second memory 340. 1,2 (8) It can be initialized.

[0126] At time t=9, average unit 332 can generate block value B. 1,1 (9) B 1,2 (9) B 2,1 (9) B 2,2 (9) B 3,1 (9) and B 3,2 (9) block image data B(9). The first adder 334 can generate block accumulation value M. 1,1 (9) M 1,2 (9) M 2,1 (9) M 2,2 (9) M 3,1 (9) and M 3,2 (9) is the block accumulation data M(9). The block accumulation data M(9) can be stored in the second memory 340. The region selector 336 and the combiner 338 can generate a pixel accumulation value A. 3,1 (9) A 3,2 (9) A 4,1 (9) and A 4,2 (9) pixel accumulation data Acc x,y (9), and the current block can correspond to the block accumulation value M. 2,1 (9) Position. Furthermore, in generating pixel accumulation data Acc... x,y (9) corresponds to the current block and is included in the block accumulation data M(9) stored in the second memory 340. 2,1 (9) can be initialized.

[0127] At time t=10, average unit 332 can generate block value B. 1,1 (10) B 1,2 (10) B 2,1 (10) B 2,2 (10) B 3,1 (10) and B 3,2 (10) block image data B(10). The first adder 334 can generate block accumulation value M. 1,1 (10) M 1,2 (10) M 2,1 (10) M 2,2 (10) M 3,1 (10) and M 3,2(10) is the block accumulation data M(10). The block accumulation data M(10) can be stored in the second memory 340. The region selector 336 and the combiner 338 can generate a pixel accumulation value A. 3,3 (10) A 3,4 (10) A 4,3 (10) and A 4,4 (10) pixel accumulation data Acc x,y (10), and the current block can correspond to the block accumulation value M. 2,2 (10) position. Furthermore, in generating pixel accumulation data Acc... x,y (10) corresponds to the current block and is included in the block accumulation data M(10) stored in the second memory 340. 2,2 (10) can be initialized.

[0128] At time t=11, average unit 332 can generate a value including block value B. 1,1 (11) B 1,2 (11) B 2,1 (11) B 2,2 (11) B 3,1 (11) and B 3,2 (11) block image data B(11). The first adder 334 can generate block accumulation value M. 1,1 (11) M 1,2 (11) M 2,1 (11) M 2,2 (11) M 3,1 (11) and M 3,2 (11) Block accumulated data M(11). Block accumulated data M(11) can be stored in the second memory 340. Region selector 336 and combiner 338 can generate pixel accumulated value A. 5,1 (11) A 5,2 (11) A 6,1 (11) and A 6,2 (11) pixel accumulation data Acc x,y (11), and the current block can correspond to the block accumulation value M. 3,1 (11) position. Furthermore, in generating pixel accumulation data Acc... x,y (11) corresponds to the current block and is included in the block accumulation data M(11) stored in the second memory 340. 3,1 (11) can be initialized.

[0129] At time t=12, average unit 332 can generate block value B. 1,1 (12) B 1,2(12) B 2,1 (12) B 2,2 (12) B 3,1 (12) and B 3,2 (12) block image data B(12). The first adder 334 can generate block accumulated value M. 1,1 (12) M 1,2 (12) M 2,1 (12) M 2,2 (12) M 3,1 (12) and M 3,2 (12) Block accumulated data M(12). Block accumulated data M(12) can be stored in the second memory 340. Region selector 336 and combiner 338 can generate pixel accumulated value A. 5,3 (12) A 5,4 (12) A 6,3 (12) and A 6,4 (12) pixel accumulation data Acc x,y (12), and the current block can correspond to the block accumulation value M. 3,2 (12) Position. Furthermore, in generating pixel accumulation data Acc... x,y (12) corresponds to the current block and is included in the block accumulation data M(12) stored in the second memory 340. 3,2 (12) can be initialized.

[0130] As the above operation is repeated, the pixel accumulation value of the same pixel can be stored in the third memory 200 during the second time period T2. For example, as in... Figure 11B The block image data M(6), M(7), M(8), M(9), M(10), M(11), and M(12) shown are the same, with pixel accumulation data Acc. x,y (6) Acc x,y (7) Acc x,y (8) Acc x,y (9) Acc x,y (10) Acc x,y (11) and Acc x,y (12) can be generated in each consecutive first time period T1, and stored in the third memory 200 in each consecutive first time period T1, such as Figure 11C As shown. However, the pixel accumulation data Acc x,y (6) Acc x,y (7) Acc x,y (8) Acc x,y (9) Acc x,y (10) and Accx,y (11) may include pixel accumulation values ​​from different blocks, and the pixel accumulation data Acc x,y (6) and Acc x,y (12) May include pixel accumulation values ​​of the same block. As a result, the pixel accumulation data Acc of the same block generated from combiner 338 x,y (6) and Acc x,y (12) can be generated in the second time period T2 and stored in the third memory 200 in the second time period T2.

[0131] As mentioned above, the second time period T2 can be an integer multiple of the first time period T1. Although the embodiment is described based on the case of T2 = 6 * T1, the embodiment is not limited thereto.

[0132] refer to Figure 12 The diagram illustrates a first pixel accumulation value PADAT1 and a first compensation value CDAT1. The first pixel accumulation value PADAT1 can be included in multiple pixel accumulation data PADAT stored in the third memory 200, and can correspond to the first pixel among multiple pixels PX. The first compensation value CDAT1 can be included in multiple compensation data CDAT stored in the first memory 310, and can correspond to the first pixel.

[0133] As described above, the first pixel accumulated value PADAT1 and the first compensation value CDAT1 can correspond to or represent the amount of usage and / or degradation of the first pixel. For example, the amount of usage or degradation of the first pixel can be proportional to the emission level (or intensity) of the first pixel and proportional to the emission time of the first pixel. Therefore, the amount of usage and / or degradation of the first pixel can correspond to the accumulated amount of grayscale and / or time of using the first pixel.

[0134] The first compensation value CDAT1 can be a part of the first pixel accumulation value PADAT1. For example, the first compensation value CDAT1 can correspond to the most significant m bits (where m is a natural number) among the multiple bits b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, and b12 included in the first pixel accumulation value PADAT1. Although Figure 12 The example shows m=4, but the embodiment is not limited to this.

[0135] refer to Figure 13A and Figure 13B This illustrates the operation of storing multiple compensation data CDAT, which are part of the multiple pixel accumulated data PADAT, in the first memory 310.

[0136] In an embodiment, such as Figure 13AAs shown, when the display driver integrated circuit is powered on, such as when the power supply voltage PWR is applied to the components included in the display driver integrated circuit, multiple compensation data CDAT can be loaded from the third memory 200 and stored in the first memory 310.

[0137] In an embodiment, such as Figure 13B As shown, after multiple compensation data CDATs are loaded from the third memory 200 and stored in the first memory 310 upon power-on, the compensator 320 can provide a request signal REQ to the third memory 200. Based on the request signal REQ, multiple updated compensation data CDATs' can be loaded from the third memory 200 and stored in the first memory 310. While the display driver integrated circuit is operating, the multiple compensation data CDATs can be continuously updated; therefore, the compensator 320 can generate the request signal REQ to reflect the multiple updated compensation data CDATs'.

[0138] In this embodiment, the request signal REQ can be periodically generated in a third time period T3, which is longer than the second time period T2. In other words, multiple updated compensation data CDAT' can be loaded from the third memory 200 during the third time period and can be stored in the first memory 310 during the third time period.

[0139] In the display driver integrated circuit that compensates for the degradation of multiple pixels PX based on the cumulative compensation scheme according to the embodiment, the cumulative data PADAT of multiple pixels corresponding to the usage and / or degradation of the multiple pixels PX can be stored in a third memory 200, wherein the third memory 200 can be a non-volatile memory disposed outside the display driver integrated circuit. Therefore, the internal volatile memory with a relatively large capacity can be omitted, and power consumption and chip size can be minimized.

[0140] Furthermore, multiple compensation data CDATs, which are part of the multiple pixel accumulated data PADATs stored in the third memory 200, can be loaded and stored in the first memory 310, which can be a relatively small volatile memory disposed within the display driver integrated circuit. The compensation operation can be performed based on the multiple compensation data CDATs. Therefore, the first memory 310 can be implemented with a relatively small capacity, and the time for loading the multiple compensation data CDATs (e.g., the initial loading time) can be minimized.

[0141] Furthermore, to reflect frequent changes in the image, multiple block-accumulated data BADAT, which are accumulated image information of small size and low resolution, can be stored in a second memory 340, which may be another volatile memory disposed within the display driver integrated circuit, during the first time period T1. Additionally, multiple pixel-accumulated data PADAT, which are accumulated image information of large size and high resolution and generated based on multiple output image data OIMG and multiple block-accumulated data BADAT, can be stored in a third memory 200 during the second time period T2. The first time period T1 can be a relatively short time interval, and the second time period T2 can be a relatively long time interval. Therefore, the second memory 340 can be implemented with a relatively small capacity, and power consumption and chip size can be minimized without reducing compensation performance.

[0142] Figure 14 This is a flowchart illustrating a method for driving a display panel according to an embodiment.

[0143] refer to Figure 1 , Figure 3 and Figure 14 In the method of driving the display panel according to the embodiment, in function block S100, multiple compensation data CDAT for compensating for the degradation of multiple pixels PX are stored in the first memory 310.

[0144] In function block S200, multiple input image data IIMGs are generated for image display by compensating multiple input image data IIMGs based on multiple compensation data CDATs. Function block S200 can be executed by compensator 320.

[0145] In function block S300, multiple block image data can be generated by grouping multiple pixels PX into multiple blocks BLK and sampling multiple output image data OIMG in block units. In function block S400, multiple block accumulated data BADAT are generated in block units based on the multiple block image data. In function block S500, the multiple block accumulated data BADAT are stored in the second memory 340 during the first time period T1. Function blocks S300, S400, and S500 can be executed by accumulator 330 and can be referenced as described above. Figure 8A , Figure 8B , Figure 8C , Figure 9 , Figure 10A and Figure 10B Perform as described.

[0146] In function block S600, multiple pixel-accumulated data PADAT is generated in pixel units by synthesizing portions of multiple output image data OIMG and portions of multiple block-accumulated data BADAT. In function block S700, the multiple pixel-accumulated data PADAT is stored in third memory 200 during a second time period T2, which is longer than the first time period T1. Function blocks S600 and S700 can be executed by accumulator 330, and can be referenced as described above. Figure 6 , Figure 7 , Figure 10C , Figure 10D and Figure 11C Perform as described.

[0147] As those skilled in the art will understand, the concepts of this invention can be embodied in systems, methods, computer program products, and / or computer program products embodied in one or more computer-readable media having computer-readable program code embodied thereon. The computer-readable program code can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be any tangible medium that can contain or store a program used by or in connection with an instruction execution system, apparatus, or device. For example, a computer-readable medium can be a non-transitory computer-readable medium.

[0148] Figure 15 This is a block diagram illustrating an electronic system according to an embodiment.

[0149] refer to Figure 15 The electronic system 1000 may include a processor 1010, a memory device 1020, a connection interface 1030, an input / output (I / O) device 1040, a power supply 1050, a display device 1060, and a communication bus 1070. The electronic system 1000 may also include multiple ports for communication, a video card, a sound card, a memory card, a Universal Serial Bus (USB) device, and other electronic devices.

[0150] Processor 1010 controls the operation of electronic system 1000. Processor 1010 can execute an operating system and at least one application to provide an internet browser, games, videos, etc. Memory device 1020 can store data used for the operation of electronic system 1000. Connection interface 1030 can communicate with external devices and / or the system. I / O device 1040 can include input devices (such as a keyboard, keypad, mouse, touchpad, touchscreen, remote control, etc.) and output devices (such as a printer, speaker, etc.). Power supply 1050 can provide power for the operation of electronic system 1000.

[0151] Display device 1060 includes a display panel and a display driver integrated circuit. The display device 1060 and the display driver integrated circuit can be a display device and a display driver integrated circuit according to embodiments, respectively. The display driver integrated circuit may include an accumulator and a compensator 1062 for compensating for degradation of multiple pixels PX based on an accumulation compensation scheme, and may have, as referenced... Figures 3 to 14 The structure and operation described.

[0152] The present invention concept can be applied to various electronic devices and systems, such as display devices, that include such display driver integrated circuits. For example, the present invention concept can be applied to systems such as personal computers (PCs), server computers, data centers, workstations, mobile phones, smartphones, tablet computers, laptop computers, personal digital assistants (PDAs), portable multimedia players (PMPs), digital cameras, portable game consoles, music players, portable camcorders, video players, navigation devices, wearable devices, Internet of Things (IoT) devices, Internet of Things (IoE) devices, e-book readers, virtual reality (VR) devices, augmented reality (AR) devices, robotic devices, drones, and the like.

[0153] The foregoing is illustrative of the concepts of the present invention and is not to be construed as limiting the invention. Although some embodiments have been described for illustrative purposes, those skilled in the art will readily understand that many modifications are possible in the embodiments without departing from the novel teachings of this disclosure. Therefore, all such modifications are intended to be included within the scope of the embodiments defined in the claims. It should be understood that the foregoing is illustrative of various embodiments and is not to be construed as limiting to the specific embodiments disclosed, and modifications to the disclosed embodiments and other embodiments are intended to be included within the scope of the appended claims.

Claims

1. A display driver integrated circuit for driving a display panel including a plurality of pixels, comprising: a first memory configured to store a plurality of compensation data; a second memory configured to store a plurality of block accumulation data; a compensator configured to generate a plurality of output image data based on the plurality of compensation data; and an accumulator configured to group the plurality of pixels into a plurality of blocks, generate a plurality of block image data by sampling the plurality of output image data in a block unit, generate a plurality of block accumulation data in a block unit based on the plurality of block image data and store the plurality of block accumulation data into the second memory in a first period, and generate a plurality of pixel accumulation data in a pixel unit by synthesizing a portion of the plurality of output image data and a portion of the plurality of block accumulation data; wherein the plurality of pixel accumulation data is stored in a third memory in a second period longer than the first period, the plurality of compensation data is a portion of the plurality of pixel accumulation data stored in the third memory, and the third memory is located outside of the display driver integrated circuit.

2. The display driver integrated circuit according to claim 1, wherein: the plurality of compensation data is used to compensate for deterioration of the plurality of pixels, the plurality of output image data is generated by compensating a plurality of input image data based on the plurality of compensation data for image display.

3. The display driver integrated circuit according to claim 1, wherein: each of the plurality of block accumulation data corresponds to the plurality of blocks and includes a plurality of block accumulation values of the plurality of blocks, and the plurality of block accumulation data is generated for the plurality of blocks in the first period and stored in the second memory in the first period.

4. The display driver integrated circuit according to claim 2, wherein: each of the plurality of pixel accumulation data corresponds to one of the plurality of blocks and includes a plurality of pixel accumulation values of one of the plurality of blocks, and pixel accumulation data corresponding to the same block among the plurality of pixel accumulation data is generated for the same block in the second period and stored in the third memory in the second period, the plurality of pixel accumulation data is generated in the first period, and the second period is an integer multiple of the first period. the accumulator includes:

5. The display driver integrated circuit of claim 1, wherein, an averaging unit configured to group the plurality of pixels into the plurality of blocks and generate current block image data among the plurality of block image data by sampling current output image data among the plurality of output image data in a block unit; a first adder configured to generate current block accumulation data by adding the current block image data and previous block accumulation data among the plurality of block accumulation data; a region selector configured to select a portion of the current output image data corresponding to a current block and a portion of the current block accumulation data corresponding to the current block; and a second adder configured to generate the plurality of pixel accumulation data by adding the portion of the current output image data and the portion of the current block accumulation data. a combiner configured to generate current pixel accumulation data corresponding to the current block among the plurality of pixel accumulation data by synthesizing a selected portion of the current output image data and a selected portion of the current block accumulation data based on different weights.

6. The display driver integrated circuit of claim 5, wherein, The combiner includes: a weight selector configured to select a first weight and a second weight based on the selected portion of the current block accumulation data; a first multiplier configured to multiply the selected portion of the current output image data by the first weight; a second multiplier configured to multiply the selected portion of the current block accumulation data by the second weight; and a second adder configured to generate the current pixel accumulation data by adding an output of the first multiplier and an output of the second multiplier.

7. The display driver integrated circuit of claim 6, wherein, The first weight increases and the second weight decreases as a current block accumulation value included in the selected portion of the current block accumulation data increases.

8. The display driver integrated circuit of claim 6, wherein, The weight selector includes a predetermined lookup table (LUT).

9. The display driver integrated circuit of claim 5, wherein, The current block accumulation data generated by the first adder is stored in the second memory.

10. The display driver integrated circuit of claim 9, wherein, A current block accumulation value corresponding to the current block among block accumulation values included in the current block accumulation data stored in the second memory is initialized when the current pixel accumulation data is generated.

11. The display driver integrated circuit of claim 1, wherein, The compensator includes: a gain generator configured to generate a plurality of compensation gains based on the plurality of compensation data; and a multiplier configured to generate a plurality of current output pixel values included in a current output image data among the plurality of output image data by multiplying a plurality of current input pixel values included in a current input image data among the plurality of input image data by the plurality of compensation gains.

12. The display driver integrated circuit of claim 1, wherein, The plurality of block accumulation data, the plurality of pixel accumulation data, and the plurality of compensation data correspond to usage of the plurality of pixels.

13. The display driver integrated circuit of claim 2, wherein: the plurality of compensation data includes a plurality of compensation values of the plurality of pixels, the plurality of pixel accumulation data includes a plurality of pixel accumulation values of the plurality of pixels, and the plurality of compensation values correspond to high m bits of the plurality of pixel accumulation values, where m is a natural number.

14. The display driver integrated circuit of claim 2, wherein, The plurality of compensation data is loaded from the third memory and stored in the first memory when the display driver integrated circuit is powered on.

15. The display driver integrated circuit of claim 2, wherein, The plurality of compensation data is loaded from the third memory and stored in the first memory in a third period longer than the second period.

16. The display driver integrated circuit of claim 2, wherein: each of the first memory and the second memory includes a volatile memory, and the third memory includes a non-volatile memory.

17. The display driver integrated circuit of claim 1, further comprising: a data driver configured to generate a plurality of data voltages applied to the plurality of pixels based on the plurality of output image data; and a scan driver configured to generate a plurality of scan signals applied to the plurality of pixels.

18. A display apparatus comprising: ​ A display panel including a plurality of pixels; and A display driver integrated circuit configured to drive the display panel, the display driver integrated circuit including: a first memory configured to store a plurality of compensation data for compensating for degradation of the plurality of pixels; a compensator configured to generate a plurality of output image data for image display by compensating a plurality of input image data based on the plurality of compensation data; an accumulator configured to group the plurality of pixels into a plurality of blocks, generate a plurality of block image data by sampling the plurality of output image data in a block unit, generate a plurality of block accumulation data in a block unit based on the plurality of block image data, and generate a plurality of pixel accumulation data in a pixel unit by synthesizing a portion of the plurality of output image data and a portion of the plurality of block accumulation data; and a second memory configured to store the plurality of block accumulation data in a first period, and wherein the plurality of pixel accumulation data is stored in a third memory in a second period longer than the first period, the plurality of compensation data is a portion of the plurality of pixel accumulation data stored in the third memory, and the third memory is located outside of the display driver integrated circuit.

19. A method of driving a display panel including a plurality of pixels, the method including: storing a plurality of compensation data for compensating for degradation of the plurality of pixels in a first memory; generating a plurality of output image data for image display by compensating a plurality of input image data based on the plurality of compensation data; generating a plurality of block image data by grouping the plurality of pixels into a plurality of blocks and by sampling the plurality of output image data in a block unit; generating a plurality of block accumulation data in a block unit based on the plurality of block image data; storing the plurality of block accumulation data in a second memory in a first period; generating a plurality of pixel accumulation data in a pixel unit by synthesizing a portion of the plurality of output image data and a portion of the plurality of block accumulation data; and storing the plurality of pixel accumulation data in a third memory in a second period longer than the first period, the plurality of compensation data being a portion of the plurality of pixel accumulation data stored in the third memory, the third memory being an external memory. ​

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