Display panel and display device

Abstract

An embodiment of the present invention provides a display panel and a display device. The display area of the display panel includes an optical component setting area, and the optical component setting area includes a first light-emitting device; the display panel includes a substrate, and a first metal layer and a second metal layer that are arranged in different layers on the same side of the substrate; the display panel includes a plurality of pixel circuits, the pixel circuits include a first type of transistor and a second type of transistor, a first gate of the first type of transistor is located on the first metal layer, and a second gate of the second type of transistor is located on the second metal layer; the pixel circuits include a first pixel circuit, and the first pixel circuit is electrically connected to the first light-emitting device; the display panel further includes a functional metal located on the first metal layer, and the functional metal is insulated from the first gate of the first pixel circuit. The present invention can reasonably design the film layer structure of the display panel to improve the overall display uniformity of the display panel or improve the light transmittance of the optical component setting area.

Description

Technical Field

[0001] The present invention relates to the field of display technologies, and in particular, to a display panel and a display device. Background Art

[0002] In electronic products such as mobile phones and tablet computers, optical components such as front cameras and infrared sensing elements occupy a certain space on the front of the product, which affects the screen-to-body ratio. With the proposal of the concept of full-screen in the display field, major manufacturers have been making efforts in the research field of full-screen. Currently, it is generally believed that the under-screen optical component solution is a relatively good solution that can achieve a true full-screen. The optical components are arranged below the display area. When the optical components are enabled, ambient light penetrates the display screen and is utilized by the optical components; when the optical components are not enabled, the area corresponding to the optical components can normally display image information to ensure the integrity of the screen display.

[0003] When applying the under-screen optical component solution, it is necessary to specially design the film layer structure of the optical component setting area of the display panel to ensure that the overall display area has a good display effect and at the same time ensure the optical performance of the optical components. Summary of the Invention

[0004] Embodiments of the present invention provide a display panel and a display device, and reasonably design the film layer structure of the display panel to improve the overall display uniformity of the display panel or improve the light transmittance of the optical component setting area.

[0005] In a first aspect, an embodiment of the present invention provides a display panel. The display area of the display panel includes an optical component setting area, and the optical component setting area includes a first light-emitting device;

[0006] The display panel includes a substrate, and a first metal layer and a second metal layer that are arranged in different layers on the same side of the substrate;

[0007] The display panel includes a plurality of pixel circuits. The pixel circuits include a first type of transistor and a second type of transistor. The first gate of the first type of transistor is located on the first metal layer, and the second gate of the second type of transistor is located on the second metal layer; the pixel circuits include a first pixel circuit, and the first pixel circuit is electrically connected to the first light-emitting device;

[0008] The display panel further includes a functional metal located on the first metal layer, and the functional metal is insulated from the first gate of the first pixel circuit.

[0009] In a second aspect, an embodiment of the present invention further provides a display device, including the display panel provided in any embodiment of the present invention.

[0010] The display panel and the display device provided by the embodiments of the present invention have the following beneficial effects: In the display panel provided by the embodiments of the present invention, a first light-emitting device is arranged in the optical component setting area, and the first pixel circuit is electrically connected to the first light-emitting device. Then, the optical component setting area can display image information, ensuring the integrity of the image display on the display panel. The transistors of the pixel circuit include two types, and the gates of the two types of transistors are located in different metal layers. The transistor types can be differentially designed according to the functions of the transistors in the pixel circuit to improve the driving performance of the pixel circuit. The functional metal and the first gate of the first type of transistor are both located in the first metal layer, and the functional metal and the first gate are insulated from each other. The functional metal and the first gate are fabricated in the same process, realizing the utilization of the first metal layer and increasing the integration of the display panel. In some embodiments, the functional metal is connected to the transistors in the first pixel circuit, and the voltage drop of the transmitted voltage signal is reduced by using the functional metal, improving the brightness difference between the optical component setting area and other display areas, thereby enhancing the overall display uniformity of the display panel. In other embodiments, the functional metal is connected to the transistors in the first pixel circuit, and the functional metal serves as part of the signal lines in the display panel, enabling the circuit wiring in the first pixel circuit to be arranged more closely; when the first pixel circuit is arranged in the optical component setting area, the light transmittance of the optical component setting area can be increased; when the first pixel circuit is arranged in the transition area, the area of the transition area can be reduced, thereby reducing the proportion of the transition area and the optical component setting area in the overall display area. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative efforts.

[0012] Figure 1 Schematic diagram of a display panel provided by an embodiment of the present invention;

[0013] Figure 2 Schematic diagram of the film layer structure of a display panel provided by an embodiment of the present invention;

[0014] Figure 3 Schematic diagram of a pixel circuit in the display panel provided by an embodiment of the present invention;

[0015] Figure 4 Partial schematic diagram of the optical component setting area of a display panel provided by an embodiment of the present invention;

[0016] Figure 5 Partial schematic diagram of another display panel provided by an embodiment of the present invention;

[0017] Figure 6 Schematic diagram of a first pixel circuit in a display panel provided by an embodiment of the present invention;

[0018] Figure 7 is Figure 6 A cross-sectional schematic diagram at the position of the tangent line A-A';

[0019] Figure 8 Schematic diagram of a first pixel circuit in a display panel provided by an embodiment of the present invention;

[0020] Figure 9 is Figure 8 A cross-sectional schematic diagram at the position of the tangent line B-B';

[0021] Figure 10 Schematic diagram of a first pixel circuit in a display panel provided by an embodiment of the present invention;

[0022] Figure 11 Partial schematic diagram of an optical component setting area of another display panel provided by an embodiment of the present invention;

[0023] Figure 12 Schematic diagram of a display device provided by an embodiment of the present invention. Detailed implementation manners

[0024] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention. Without departing from the spirit or scope of the present invention, various modifications and variations can be made in the present invention, which is obvious to those skilled in the art. Therefore, the present invention is intended to cover the modifications and variations of the present invention that fall within the scope of the corresponding claims (the claimed technical solutions) and their equivalents.

[0025] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms "a", "the" and "said" used in the embodiments of the present invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0026] It should be noted that the embodiments provided by the embodiments of the present invention can be combined with each other without conflict.

[0027] Figure 1A schematic diagram of a display panel provided by an embodiment of the present invention is as follows. Figure 1 As shown, the display panel includes a display area AA. The display area AA includes an optical component setting area AA1. The display area AA includes a plurality of light-emitting devices. Among them, the optical component setting area AA1 includes a first light-emitting device ( Figure 1 not marked in the figure). When assembled into a display device, the optical component is disposed at a position corresponding to the optical component setting area AA1. In application, ambient light can penetrate the optical component setting area AA1 and be received by the optical component. Figure 1 In the figure, the shape, position, and number of the optical component setting area AA1 are only schematically shown and are not intended to limit the present invention.

[0028] The display panel includes a plurality of pixel circuits for driving the light-emitting devices in the display area AA to emit light. Figure 2 A schematic diagram of a film layer structure of a display panel provided by an embodiment of the present invention is as follows. Figure 2 As shown, the display panel includes a substrate 10, and a first metal layer 11 and a second metal layer 12 that are disposed in different layers on the same side of the substrate 10. Among them, the pixel circuit 2 may include a first type of transistor 1T and a second type of transistor 2T. In the embodiment of the present invention, the pixel circuit 2 includes two types of transistors, and the transistors are classified according to the film layer where their gates are located. The first gate 1g of the first type of transistor 1T is located in the first metal layer 11, and the second gate 2g of the second type of transistor 2T is located in the second metal layer 12.

[0029] It should be noted that Figure 2 in the figure, only the case where the first metal layer 11 is located on the side away from the substrate 10 of the second metal layer 12 is schematically shown. In some embodiments, the first metal layer 11 may be located on the side close to the substrate 10 of the second metal layer 12. Additionally, Figure 2 in the figure, it is schematically shown that both the first type of transistor 1T and the second type of transistor 2T are top-gate structures. In the embodiment of the present invention, the types of the transistors in the pixel circuit are not limited either. Each transistor may also be a bottom-gate structure, or some may be top-gate structures and some may be bottom-gate structures.

[0030] The display panel further includes a first semiconductor layer 13 and a second semiconductor layer 14 located on the substrate 10. Among them, the active layer of the first type of transistor 1T is located in the first semiconductor layer 13, and the active layer of the second type of transistor 2T is located in the second semiconductor layer 14. The active layers of the first type of transistor 1T and the second type of transistor 2T are located in different layers. In one embodiment, the first type of transistor 1T further includes a third gate 3g, and the first gate 1g and the third gate 3g are respectively located on both sides of the first semiconductor layer 13.

[0031] Figure 2Also shown is a light-emitting device 1, which includes a first electrode a, a light-emitting layer b, and a second electrode c stacked. The light-emitting device 1 is electrically connected to the pixel circuit 2 through a connection electrode 31.

[0032] In an embodiment of the present invention, the pixel circuit 2 includes a first pixel circuit. The first pixel circuit includes the above-mentioned first type of transistor 1T and second type of transistor 2T. The first pixel circuit is electrically connected to the first light-emitting device in the optical component setting area AA1. That is to say, the first pixel circuit is used to drive the first light-emitting device to emit light. The display panel further includes a functional metal located on the first metal layer 11, and the functional metal is insulated from the first gate 1g of the first pixel circuit.

[0033] In the display panel provided by the embodiment of the present invention, a first light-emitting device is provided in the optical component setting area, and the first pixel circuit is electrically connected to the first light-emitting device. Then, the optical component setting area can display image information, ensuring the integrity of the image display on the display panel. The transistors of the pixel circuit include two types, and the gates of the two types of transistors are located on different metal layers, which can perform differential design on the transistor types according to the functions of the transistors in the pixel circuit to improve the driving performance of the pixel circuit. The functional metal and the first gate of the first type of transistor are both located on the first metal layer, and the functional metal is insulated from the first gate. The functional metal and the first gate are fabricated in the same process, realizing the utilization of the first metal layer and increasing the integration of the display panel. In some embodiments, the functional metal is connected to the transistors in the first pixel circuit, and the functional metal is used to reduce the voltage drop of the transmitted voltage signal, improving the brightness difference between the optical component setting area and other display areas, thereby enhancing the overall display uniformity of the display panel. In other embodiments, the functional metal is connected to the transistors in the first pixel circuit, and the functional metal serves as part of the signal lines in the display panel, which can make the circuit wiring arrangement in the first pixel circuit more compact; when the first pixel circuit is located in the optical component setting area, the light transmittance of the optical component setting area can be increased; when the first pixel circuit is located in the transition area, the area of the transition area can be reduced, thereby reducing the proportion of the transition area and the optical component setting area in the overall display area.

[0034] In some embodiments, the first semiconductor layer 13 is a first metal oxide semiconductor layer, that is, the first semiconductor layer 13 includes a metal oxide semiconductor, such as indium gallium zinc oxide; the second semiconductor layer 14 is a second silicon semiconductor layer, that is, the second semiconductor layer 14 contains silicon, such as low-temperature polycrystalline silicon.

[0035] Figure 3 Schematic diagram of a pixel circuit in the display panel provided by the embodiment of the present invention, as Figure 3As shown, the pixel circuit includes a driving transistor Tm, a data writing transistor T1, a threshold compensation transistor T2, a gate reset transistor T3, an electrode reset transistor T4, a first light-emitting control transistor T5, a second light-emitting control transistor T6, and a storage capacitor Cst. Figure 3 Also shown are a first scan signal C1, a second scan signal C2, a third scan signal C3, a light-emitting control signal E, a power supply voltage signal P, a first reset signal Ref1, a second reset signal Ref2, and a data signal Data.

[0036] Among them, the gate of the driving transistor Tm is connected to the first node N1, the first pole of the driving transistor Tm is connected to the second node N2, the second pole of the driving transistor Tm is connected to the third node N3, and the driving transistor Tm is used to generate a driving current under the control of its gate voltage. The gate of the gate reset transistor T3 can receive the second scan signal C2, the first pole of the gate reset transistor T3 can be electrically connected to the second reset signal Ref2, the second pole of the gate reset transistor T3 can be connected to the first node N1, and the gate reset transistor T3 can be used to reset the gate of the driving transistor Tm. The gate of the data writing transistor T1 can receive the first scan signal C1, its first pole can receive the data signal Data, and its second pole can be connected to the second node N2. The gate of the threshold compensation transistor T2 can receive the third scan signal C3, its first pole can be connected to the third node N3, and its second pole can be connected to the first node N1. The data writing transistor T1 can be used to write the data signal to the gate of the driving transistor Tm, and the threshold compensation transistor T2 can be used to self-check and compensate the threshold voltage of the driving transistor Tm. The gates of the first light-emitting control transistor T5 and the second light-emitting control transistor T6 can both receive the light-emitting control signal E. The first pole of the first light-emitting control transistor T5 can be connected to the power supply voltage signal P, and the second pole of the first light-emitting control transistor T5 can be connected to the second node N2; the first pole of the second light-emitting control transistor T6 can be connected to the third node N3, and the second pole of the second light-emitting control transistor T6 can be connected to the fourth node N4. The gate of the electrode reset transistor T4 can receive the first scan signal C1, the first pole of the electrode reset transistor T4 can be connected to the first reset signal Ref1, the second pole of the electrode reset transistor T4 can be connected to the fourth node N4, the first electrode of the light-emitting device 1 can be connected to the fourth node N4, and the second electrode of the light-emitting device 1 can receive the second power supply signal ( Figure 3 not shown in the figure).

[0037] In one embodiment, the threshold compensation transistor T2 and the gate reset transistor T3 are both the first type of transistor 1T, and the remaining transistors are all the second type of transistor 2T. Since the active layers of the threshold compensation transistor T2 and the gate reset transistor T3 include metal oxide semiconductors, the leakage current of the threshold compensation transistor T2 and the gate reset transistor T3 in the off state is relatively small. When the pixel circuit is operating in the light-emitting stage, it can reduce the leakage current from the threshold compensation transistor T2 and the gate reset transistor T3 to the gate of the driving transistor Tm, stabilize the potential of the driving transistor gate, improve the problem of picture flicker in the display panel, and enhance the display effect.

[0038] In another embodiment, the threshold compensation transistor T2 is the first type of transistor 1T, and the remaining transistors in the pixel circuit are all the second type of transistor 2T.

[0039] In another embodiment, the gate reset transistor T3 is the first type of transistor 1T, and the remaining transistors in the pixel circuit are all the second type of transistor 2T.

[0040] In addition, the first pole of the electrode reset transistor T4 is connected to the first reset signal Ref1, and the first pole of the gate reset transistor T3 is connected to the second reset signal Ref2. Optionally, the first reset signal Ref1 and the second reset signal Ref2 respectively reset the first electrode of the light-emitting device 1 and the gate of the driving transistor Tm. The voltage of the first reset signal Ref1 is set to be less than the voltage of the second reset signal Ref2. By providing a relatively high reset voltage to the gate of the driving transistor Tm, the threshold capture of the gate of the driving transistor Tm can be made faster. When applied to high-frequency display or low-brightness (or gray-scale) display, the threshold capture time of the gate of the driving transistor Tm is shorter. And the faster the threshold capture of the gate of the driving transistor Tm, the more accurate the threshold capture can be, thus reducing display unevenness. At the same time, by providing a relatively low reset voltage to the first electrode of the light-emitting device 1, the problem of light-emitting device 1 stealing light can be reduced, improving the display effect of low gray-scale.

[0041] In some embodiments, the first pixel circuit is located in the optical component setting area. Figure 4 This is a partial schematic diagram of the optical component setting area of a display panel provided by an embodiment of the present invention. As Figure 4 shown, the first pixel circuit 201 is located in the optical component setting area AA1. The first light-emitting device includes a first red light-emitting device 101r, a first green light-emitting device 101g, and a first blue light-emitting device 101b. The first light-emitting devices of the three colors are arranged into a pixel unit, and the first pixel circuit 201 respectively connected to the first light-emitting devices of the three colors is correspondingly arranged below the pixel unit. Figure 4 The arrangement of the first light-emitting device 101 in

[0042] In some embodiments, Figure 5 is a partial schematic diagram of another display panel provided by an embodiment of the present invention. As Figure 5 shown, the display panel further includes a transition region AA2 and a normal display region AA3. The transition region AA2 is adjacent to the optical component setting region AA1, and the transition region AA2 is located between the optical component setting region AA1 and the normal display region AA3. The first pixel circuit 201 is located in the transition region AA2. A second light-emitting device 102 and a second pixel circuit 202 are arranged in the transition region AA2, and the second pixel circuit 202 is electrically connected to the second light-emitting device 102. A third light-emitting device 103 is arranged in the normal display region AA3, and a pixel circuit ( Figure 5 not shown in the figure) for driving the third light-emitting device 103 is also arranged in the normal display region AA3. In one embodiment, the setting density of the second light-emitting devices 102 in the transition region AA2 is the same as the setting density of the first light-emitting devices 101 in the optical component setting region AA1. In another embodiment, the setting density of the second light-emitting devices 102 in the transition region AA2 is greater than the setting density of the first light-emitting devices 101 in the optical component setting region AA1. In one embodiment, the setting density of the third light-emitting devices 103 in the normal display region AA3 is the same as the setting density of the first light-emitting devices 101 in the optical component setting region AA1, wherein, for the same color, the light-emitting area of the first light-emitting devices 101 may be smaller than the light-emitting area of the third light-emitting devices 103. In one embodiment, the setting density of the third light-emitting devices 103 in the normal display region AA3 is greater than the setting density of the first light-emitting devices 101 in the optical component setting region AA1.

[0043] In some embodiments, the second type of transistor 2T in the first pixel circuit includes a first functional transistor; during the working stage of the first pixel circuit, the first pole of the first functional transistor receives a constant voltage signal; wherein, the functional metal is electrically connected to the first pole of the first functional transistor. In one embodiment, the functional metal and the original signal line for transmitting the constant voltage signal, for example, in a parallel manner, are both connected to the first pole of the first functional transistor, so as to reduce the voltage drop of transmitting the constant voltage signal. In another embodiment, the functional metal replaces the original signal line for transmitting the constant voltage signal and is electrically connected to the first pole of the first functional transistor, which can make the circuit wiring layout in the first pixel circuit more compact.

[0044] In one embodiment, Figure 6 is a schematic diagram of the first pixel circuit in a display panel provided by an embodiment of the present invention. Figure 7 is Figure 6 a cross-sectional schematic diagram at the position of the tangent line A-A' in Figure 6As shown, the first functional transistor G1 is an electrode reset transistor T4, that is, the first functional transistor G1 is used to reset the first electrode of the first light-emitting device ( Figure 6 not marked in the figure), and the second pole of the first functional transistor G1 is connected to the first electrode of the first light-emitting device.

[0045] The display panel includes a first reset signal line Vref1, and the first reset signal line Vref1 is used to provide a first reset signal Ref1; the first reset signal Ref1 is a constant voltage signal, and the first pole of the first functional transistor G1 is electrically connected to the first reset signal line Vref1. Among them, the first reset signal line Vref1 and the functional metal M0 are located in different layers, and the functional metal M0 is electrically connected to the first reset signal line Vref1. Figure 6 The figure schematically shows that the functional metal M0 is electrically connected to the first reset signal line Vref1 through a first connection line L1.

[0046] It should be noted that in the present invention Figure 6 and the structures located in the same film layer in the following figures are filled with the same pattern.

[0047] This embodiment sets the functional metal M0 to be electrically connected to the first reset signal line Vref1, that is, the functional metal M0 is electrically connected to the first pole of the electrode reset transistor T4 in the first pixel circuit. The functional metal M0 can reduce the voltage drop of transmitting the first reset signal, improve the brightness difference between the optical component setting area and other display areas, and thus improve the overall display uniformity of the display panel.

[0048] Figure 6 The figure also schematically shows the data line Vdata, the first scan line S1, the light-emitting control line Emit, and the power supply voltage signal line PV1 of the display panel. Among them, the data line Vdata is used to provide a data signal, the first scan line S1 is used to provide a first scan signal C1, the light-emitting control line Emit is used to provide a light-emitting control signal E, and the power supply voltage signal line PV1 is used to provide a power supply voltage signal P. Figure 6 The figure also schematically shows the second scan lines S2-1 and S2-2, and the third scan lines S3-1 and S3-2. The second scan line is used to provide a second scan signal C2, and the third scan line is used to provide a third scan signal C3. Among them, the second scan lines S2-1 and S2-2 are located in different layers, and the third scan lines S3-1 and S3-2 are located in different layers. Optionally, the second scan line S2-1 and the third scan line S3-1 are located in the same layer, and the second scan line S2-2 and the third scan line S3-2 are located in the same layer. The setting of the second scan lines S2-1 and S2-2 enables the threshold compensation transistor T2 to form a structure with upper and lower double gates. Similarly, the gate reset transistor T3 also has a structure with upper and lower double gates.

[0049] Continue to refer to Figure 6 As shown, the first reset signal line Vref1 extends in the first direction x. The display panel further includes a first gate line X1 extending in the first direction x. The first gate line X1 is located in the first metal layer 11, and some line segments in the first gate line X1 are multiplexed as the first gate 1g of the first gate. In the embodiment of the present invention, the second scan line S2-1 and the third scan line S3-1 are both the first gate line X1. Some line segments in the second scan line S2-1 are multiplexed as the first gate 1g of the gate reset transistor T3, and some line segments in the third scan line S3-1 are multiplexed as the first gate 1g of the threshold compensation transistor T2. Combining Figure 7 Looking at it, the threshold compensation transistor T2 further includes a third gate 3g. Some line segments of the third scan line S3-2 are multiplexed as the third gate 3g of the threshold compensation transistor T2. The first gate 1g and the third gate 3g are respectively located on both sides of the first semiconductor layer 13, and the threshold compensation transistor T2 forms a structure with upper and lower double gates. Combining Figure 6 and Figure 7 It can be seen that the gate reset transistor T3 also includes a first gate 1g and a third gate 3g, and the gate reset transistor T3 has a structure with upper and lower double gates.

[0050] From Figure 6 it can be seen that two adjacent functional metals M0 in the second direction y are connected by a first connection line L1. The second direction y intersects with the first direction x; the first connection line L1 is insulatively crossed with the first gate line X1. By setting the first connection line L1, two adjacent functional metals M0 in the second direction y can transmit the same signal, and the functional metal M0 and the first gate line X1 are insulated from each other. Then the functional metal M0 and the first gate 1g are both located in the first metal layer 11, and the functional metal and the first gate are fabricated in the same process, realizing the utilization of the first metal layer and increasing the integration degree of the display panel.

[0051] In addition, the second light-emitting control transistor T6 is a second type of transistor 2T. From Figure 7 it can be seen that the second light-emitting control transistor T6 includes a second gate 2g, and the second gate 2g is located in the second metal layer 12.

[0052] Such as Figure 6As shown, the display panel further includes a second reset signal line Vref2 extending in the first direction x. The second reset signal line Vref2 is used to provide a second reset signal Ref2, and the second reset signal Ref2 is a constant voltage signal. In the first pixel circuit, the second functional crystal G2 is used to reset the gate of the driving transistor Tm, that is, the second functional transistor G2 is the gate reset transistor T3. The first pole of the second functional transistor G2 is electrically connected to the second reset signal line Vref2, and the second pole of the second functional transistor G2 is electrically connected to the gate of the driving transistor Tm. In this embodiment, the first reset signal line Vref1 and the second reset signal line Vref2 are provided in the circuit wiring for driving the first light-emitting device in the optical component setting area AA1 to emit light. The first reset signal line Vref1 provides the first reset signal Ref1, the second reset signal line Vref2 provides the second reset signal Ref2, the first pole of the electrode reset transistor T4 is connected to the first reset signal line Vref1, and the first pole of the gate reset transistor T3 is connected to the second reset signal line Vref2. During the operation of the first pixel circuit, the first electrode of the first light-emitting device is reset by using the first reset signal Ref1, and the gate of the driving transistor Tm is reset by using the second reset signal Ref2. By providing a relatively high reset voltage to the gate of the driving transistor Tm, the threshold capture of the gate of the driving transistor Tm can be made faster. When applied to high-frequency display or low-brightness (or gray-scale) display, the threshold capture time of the gate of the driving transistor Tm is shorter. And the faster the threshold capture of the gate of the driving transistor Tm is, the more accurate the threshold capture can be, thus reducing display unevenness. At the same time, by providing a relatively low reset voltage to the first electrode of the light-emitting device 1, the problem of light leakage of the light-emitting device can be reduced, and the low-gray-scale display effect can be improved. This embodiment can improve the display effect of the optical component setting area AA1.

[0053] Combined with Figure 6 and Figure 7As shown, the display panel further includes a third metal layer 15, a fourth metal layer 16, and a fifth metal layer 17. The third metal layer 15 is located on the side of the fourth metal layer 16 closer to the substrate 10; the fifth metal layer 17 is located on the side of the fourth metal layer 16 farther from the substrate 10. The first connection line L1 and the first reset signal line Vref1 are connected to each other and are both located in the fourth metal layer 16; the second reset signal line Vref2 is located in the third metal layer 15. Among them, the data line Vdata and the power supply voltage signal line PV1 are located in the fifth metal layer 17. In this embodiment, setting the first reset signal line Vref1 and the second reset signal line Vref2 with the same extension direction in different layers can reduce the total number of signal lines arranged in the same metal layer, which is beneficial to reducing the overall space occupied by the first pixel circuit. In the solution where the first pixel circuit is located in the optical component setting area AA1, the area of the light-transmitting area of the optical component setting area AA1 can be increased. In the solution where the first pixel circuit is located in the transition area, it is beneficial to reduce the area of the transition area, thereby reducing the proportion of the transition area and the optical component setting area in the overall display area.

[0054] In another embodiment, Figure 8 is a schematic diagram of a first pixel circuit in a display panel provided by an embodiment of the present invention. Figure 9 is Figure 8 a schematic cross-sectional view at the position of the mid-tangent B-B'.

[0055] As Figure 8 shown, the functional metal M0 is electrically connected to the first pole of the first functional transistor G1. The first functional transistor G1 is connected in series with the driving transistor Tm and is used to supply the power supply voltage signal to the first pole of the driving transistor Tm; that is, the first functional transistor G1 is the first light-emitting control transistor T5. The first pole of the first functional transistor G1 is electrically connected to the power supply voltage signal line PV1.

[0056] Combined with Figure 8 and Figure 9 it can be seen that the power supply voltage signal line PV1 and the functional metal M0 are located in different layers. Among them, the power supply voltage signal line PV1 is located in the fifth metal layer 17, and the functional metal M0 is located in the first metal layer 11. The functional metal M0 and the power supply voltage signal line PV1 are electrically connected through a via hole in the insulating layer. Figure 9 It is also shown in [the figure] that the first electrode plate of the storage capacitor Cst is located in the second metal layer 12, and the second electrode plate is located in the third metal layer 15. A fourth connection line L4 located in the fourth metal layer 16 is also provided in the display panel. The second pole of the threshold compensation transistor T2 is connected to the first electrode plate of the storage capacitor through the fourth connection line L4. The first electrode plate located in the second metal layer 12 is multiplexed as the gate of the driving transistor Tm.

[0057] In this embodiment, a functional metal M0 is electrically connected to a power supply voltage signal line PV1, so as to realize the electrical connection between the functional metal M0 and the first pole of the first light-emitting control transistor T5. The functional metal M0 can reduce the voltage drop of the transmitted power supply voltage signal, improve the brightness difference between the optical component setting area and other display areas, and thus improve the overall display uniformity of the display panel.

[0058] In another embodiment, Figure 10 FIG. is a schematic diagram of a first pixel circuit in a display panel provided by an embodiment of the present invention. Figure 10 Two first pixel circuits are shown in, as Figure 10 shown, the storage capacitor Cst of the first pixel circuit includes a first electrode plate B1 and a second electrode plate B2; the first electrode plate B1 is multiplexed as the gate of the driving transistor Tm; the second electrode plates B2 adjacent in the first direction x are electrically connected to each other; the adjacent second electrode plates B2 are electrically connected to each other to form a power supply voltage signal line PV1 extending in the first direction x. The display panel further includes a second connection line L2 and a third connection line L3; the functional metal M0 is electrically connected to the second electrode plate B2 through the second connection line L2, and the functional metal M0 is electrically connected to the first pole of the first functional transistor G1 through the third connection line L3. In one embodiment, the second connection line L2 and the third connection line L3 are located on the same layer and are connected to each other. In this embodiment, the second electrode plates B2 adjacent in the first direction x are electrically connected to each other to form a power supply voltage signal line PV1 extending in the first direction x, and the functional metal M0 is arranged to be electrically connected to the first pole of the first functional transistor G1. This embodiment can remove the original power supply voltage signal line extending in the second direction y, and use the adjacent second electrode plates B2 to be connected to each other to transmit the power supply voltage signal, ensuring the whole-surface transmission of the power supply voltage signal. This embodiment arranges the functional metal M0 for transmitting the power supply voltage signal on the first metal layer, realizes the utilization of the first metal layer, reduces the power supply voltage signal line extending in the second direction y, and can compress the width occupied by the first pixel circuit in the first direction x to a certain extent, thereby reducing the panel occupied by the first pixel circuit. In the scheme where the first pixel circuit is located in the optical component setting area AA1, the area of the light-transmitting area of the optical component setting area AA1 can be increased. In the scheme where the first pixel circuit is located in the transition area, it is beneficial to reduce the area of the transition area, thereby reducing the proportion of the transition area and the optical component setting area in the overall display area.

[0059] In one embodiment, the second connection line L2 and the third connection line L3 are located on the same layer as the fourth connection line L4. Combining the above Figure 7 and Figure 9Regarding the description of the metal layer in the display panel, the display panel further includes a third metal layer 15 and a fourth metal layer 16, and the third metal layer 15 is located on a side of the fourth metal layer 16 close to the substrate 10. The first electrode B1 is located on the second metal layer 12, the second electrode B2 is located on the third metal layer 15, and the second connection line L2 and the third connection line L3 are located on the fourth metal layer 16.

[0060] In another embodiment, Figure 11 A partial schematic diagram of an optical component arrangement area of another display panel provided by an embodiment of the present invention, Figure 11 Schematic diagram of top view, the top view direction is the same as the direction perpendicular to the substrate 10. Figure 11 It can be seen that in the direction perpendicular to the substrate, the functional metal M0 overlaps with at least part of the wiring gap in the first pixel circuit 21. The wiring gap refers to the space between two adjacent lines, wherein the two adjacent lines may be lines located in different film layers or lines located in the same film layer. In this embodiment, the functional metal M0 can be used as a light shielding layer, and is applied to the under-screen optical component solution. After the light penetrates the optical component setting area AA1, it is received by the optical component, and the wiring gap in the pixel circuit will cause the light to diffract and affect the performance of the optical component. The functional metal M0 and the first gate 1g are both located in the first metal layer 11. The functional metal M0 is used to make a light shielding layer to block at least part of the wiring gap in the first pixel circuit 21. In the solution where the first pixel circuit 21 is located in the optical component setting area AA1, when the light penetrates the optical component setting area AA1, the diffraction can be reduced and the optical performance of the optical component can be improved. Moreover, the functional metal M0 is manufactured by utilizing the original film layer in the display panel. The functional metal M0 and the first gate 1g can be manufactured in the same process, which simplifies the process and does not require an additional etching process for the light shielding layer.

[0061] In addition, it should be noted that Figure 11 The shape of the functional metal M0 is only schematically shown and is not intended to limit the present invention. In one embodiment, the edge of the functional metal M0 is a curve.

[0062] In one embodiment, Figure 7 The display panel film structure shown in FIG. 1 includes a second semiconductor layer 14, a second metal layer 12, a third metal layer 15, a first semiconductor layer 13, a first metal layer 11, a fourth metal layer 16 and a fifth metal layer 17 stacked in sequence on a substrate 10. In the embodiment of the present invention, the functional metal M0 is located in the first metal layer 11. When the functional metal layer M0 is made into a light shielding layer, the functional metal M0 needs to be graphically designed to avoid some vias in the first pixel circuit 21, such as Figure 11 A connecting via V1 between the fourth metal layer 16 and the second semiconductor layer 14 is shown in FIG.

[0063] An embodiment of the present invention further provides a display device. Figure 12 It is a schematic diagram of the display device provided by the embodiment of the present invention. As Figure 12 shown, the display device includes the display panel 100 provided by any embodiment of the present invention. The structure of the display panel 100 has been described in the above display panel embodiments and will not be repeated here. In the embodiment of the present invention, the display device can be any device with a display function such as a mobile phone, a tablet computer, a notebook computer, an e-reader, a television, a smart watch, etc.

[0064] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the scope of protection of the present invention.

[0065] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display panel, characterized in that, The display area of the display panel includes an optical component setting area, and the optical component setting area includes a first light-emitting device; The display panel includes a substrate, and a first metal layer and a second metal layer which are arranged in different layers on the same side of the substrate; The display panel includes a plurality of pixel circuits, the pixel circuits include a first type of transistor and a second type of transistor, a first gate of the first type of transistor is located on the first metal layer, and a second gate of the second type of transistor is located on the second metal layer; the pixel circuits include a first pixel circuit, and the first pixel circuit is electrically connected to the first light-emitting device; in the first pixel circuit, the second type of transistor further includes a driving transistor, and the driving transistor is used for generating a driving current; The display panel further includes a functional metal located on the first metal layer, the functional metal is at least located in the area where the first pixel circuit is located, and the first pixel circuit is located in the optical component setting area; the functional metal is insulated from the first gate of the first pixel circuit; In the first pixel circuit, the second type of transistor includes a first functional transistor, and the functional metal is electrically connected to a first pole of the first functional transistor; In a direction perpendicular to the substrate, the functional metal overlaps with some of the traces in the first pixel circuit, and the functional metal overlaps with at least some of the traces in the first pixel circuit with a gap.

2. The display panel according to claim 1, wherein In the working stage of the first pixel circuit, a first pole of the first functional transistor receives a constant voltage signal.

3. The display panel according to claim 2, wherein A second pole of the first functional transistor is connected to a first electrode of the first light-emitting device, and the first functional transistor is used for resetting the first electrode of the first light-emitting device; The display panel includes a first reset signal line, and the first reset signal line is used for providing a first reset signal; the first pole of the first functional transistor is electrically connected to the first reset signal line; The first reset signal line and the functional metal are located in different layers, and the functional metal is electrically connected to the first reset signal line.

4. The display panel according to claim 3, wherein The first reset signal line extends in a first direction, The display panel further includes a first gate line extending in the first direction, the first gate line is located on the first metal layer, and some line segments in the first gate line are multiplexed as the first gate; Two adjacent functional metals in a second direction are connected by a first connection line, and the second direction intersects with the first direction; The first connection line and the first gate line are insulated and cross each other.

5. The display panel according to claim 4, wherein The first pixel circuit further includes a second functional transistor, and the second functional transistor is used for resetting the gate of the driving transistor; The display panel further includes a second reset signal line extending in the first direction, and the second reset signal line is configured to provide a second reset signal; a first pole of the second functional transistor is electrically connected to the second reset signal line, and a second pole of the second functional transistor is electrically connected to a gate of the driving transistor.

6. The display panel according to claim 5, wherein the display panel further includes a third metal layer and a fourth metal layer, and the third metal layer is located on a side closer to the substrate than the fourth metal layer; the first connection line and the first reset signal line are connected to each other and are both located in the fourth metal layer; the second reset signal line is located in the third metal layer.

7. The display panel according to claim 2, wherein the first functional transistor is connected in series with the driving transistor and is configured to supply a power voltage signal to a first pole of the driving transistor; the display panel includes a power voltage signal line configured to provide the power voltage signal, and a first pole of the first functional transistor is electrically connected to the power voltage signal line; the power voltage signal line and the functional metal are located in different layers, and the functional metal is electrically connected to the power voltage signal line.

8. The display panel according to claim 2, wherein the first pixel circuit further includes a storage capacitor, and the storage capacitor includes a first electrode plate and a second electrode plate; the first electrode plate is multiplexed as a gate of the driving transistor; the second electrode plates adjacent to each other in the first direction are electrically connected to each other; the display panel further includes a second connection line and a third connection line; the functional metal is electrically connected to the second electrode plate through the second connection line, and the functional metal is electrically connected to a first pole of the first functional transistor through the third connection line.

9. The display panel according to claim 8, wherein the display panel further includes a third metal layer and a fourth metal layer, and the third metal layer is located on a side closer to the substrate than the fourth metal layer; the first electrode plate is located in the second metal layer, the second electrode plate is located in the third metal layer, and the second connection line and the third connection line are located in the fourth metal layer.

10. The display panel according to claim 1, wherein the display panel further includes a first metal oxide semiconductor layer and a second silicon semiconductor layer on the substrate; an active layer of the first type of transistor is located in the first metal oxide semiconductor layer, and an active layer of the second type of transistor is located in the second silicon semiconductor layer.

11. The display panel according to claim 1, wherein the display panel further includes a transition region adjacent to the optical component setting region, and the first pixel circuit is located in the transition region.

12. A display device, characterized in that, A display panel including any one of claims 1 to 11.

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