A method for byte sliding exclusive OR calculation of data stream

Through the single-byte XOR calculation method and parallel computing module connected in a loop, the high computational volume and hardware resource consumption of byte-byte sliding XOR calculation method in traditional data streams is solved, and efficient data XOR calculation is achieved.

CN114115806BActive Publication Date: 2025-06-13TOEC TECHNOLOGLY CO LTD
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Patent Information

Application Number
CN202111430677.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-11-29
Publication Date
2025-06-13
Estimated Expiration
2041-11-29

AI Technical Summary

Technical Problem

The byte-byte sliding XOR calculation method in traditional data streams requires repeated calculations multiple times, resulting in a large amount of computing and hardware resource consumption.

Method used

A single-byte XOR calculation method is used in a loop series, and parallel calculation is realized through N calculation submodules and 1 summary calculation module. The intermediate results are used for the next sliding calculation to avoid repeated calculations.

Benefits of technology

It saves computing volume and hardware resources, improves the ability of data XOR computing, and is suitable for hardware implementation.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a method for byte-sliding exclusive-or calculation of data streams. This method involves performing exclusive-or calculation on the original data byte by byte in a communication data stream. First, calculate the continuous sliding exclusive-or of multiple consecutive single bytes in a cyclic series to obtain an intermediate calculation result, and then based on this intermediate result, obtain the final calculation result through a summary calculation. The beneficial effects of the present invention are as follows: It realizes the byte-sliding exclusive-or calculation of data streams in a parallel manner, which is different from traditional software calculation implementations, is more suitable for hardware implementation of calculations, saves the amount of calculation, saves hardware resources, and improves the ability of data exclusive-or calculation.
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Description

Technical Field

[0001] The present invention relates to the field of communications, and particularly to a method for byte-sliding exclusive-OR calculation of data streams, specifically to the bitwise exclusive-OR calculation of consecutive bytes in a byte-sliding data stream in a communication protocol. Background Art

[0002] In a communication data stream, in some application scenarios, it is necessary to perform an exclusive-OR calculation on the original data byte by byte in a sliding manner. The traditional approach is to perform an exclusive-OR calculation for a specified byte length and then slide one byte and perform a new exclusive-OR calculation again. This approach requires a large amount of calculation and consumes a large amount of computing power resources. For example, when it is necessary to calculate the exclusive-OR result of any consecutive 20 bytes in the original data stream, the traditional approach is to calculate the result of the 1st to the 20th bytes, and then calculate the result of the 2nd to the 21st bytes, and so on. In the traditional calculation method, the intermediate result of the previous calculation does not provide any help for the next calculation, and multiple repeated calculations are required, resulting in a large amount of computing volume. When implemented in hardware, it is necessary to switch and select from 20 calculation results, consuming a lot of hardware resources. Summary of the Invention

[0003] The object of the present invention is to improve the problems existing in the above practical applications, and provide a method for byte-sliding exclusive-OR calculation of data streams. This method only needs to perform a cyclic concatenated single-byte exclusive-OR calculation on each single byte in the original input data stream. These intermediate calculation results can be used for the next sliding calculation. When implemented in hardware, there is no need to perform switching and selection, thus saving hardware resources.

[0004] The technical solution adopted by the present invention is: a method for byte-sliding exclusive-OR calculation of data streams. This method involves performing an exclusive-OR calculation on the original data byte by byte in a sliding manner in a communication data stream. First, calculate the consecutive sliding exclusive-OR of consecutive multiple cyclic concatenated single bytes to obtain an intermediate calculation result, and then based on this intermediate result, obtain the final calculation result through a summary calculation. The steps are as follows:

[0005] First, disassemble the multi-byte exclusive-OR calculation problem into an exclusive-OR calculation for each byte in the original data stream, and then combine consecutive multiple calculation results to calculate again to obtain the final exclusive-OR calculation result;

[0006] Specifically, the original input data is a consecutive byte data stream. For a given positive integer N, the final output is the exclusive-OR calculation result of any consecutive N bytes in the original data byte stream;

[0007] This method uses N completely identical computing sub-modules. The assignment signals of all the computing sub-modules are connected in a cyclic cascade manner. The original input data stream is input into all the computing sub-modules simultaneously. The outputs of all the computing sub-modules are connected to the summary computing module, and the summary computing module outputs the final computing result.

[0008] The computing method adopted by this method is composed of N computing sub-modules with completely identical internal structures and 1 summary computing module. Among them, the N computing sub-modules are connected in series in a cyclic cascade manner, that is, the output of each computing sub-module is connected to the input of the next-level computing sub-module, and the outputs of all the N computing sub-modules are connected in sequence from beginning to end until the output of the last Nth computing sub-module is connected to the input of the first computing sub-module;

[0009] The original input data stream is connected to all the N computing sub-modules simultaneously. Each computing sub-module outputs its own intermediate computing result, and these N intermediate computing results are connected to the input of the summary computing module;

[0010] Each computing sub-module only calculates the iterative exclusive OR calculation of data with a byte width. The specific calculation method is that the register latches one byte of the original input data stream, and performs an exclusive OR operation on this byte and the output intermediate computing result to obtain a new intermediate computing result for output, and this process is continuously repeated;

[0011] The summary computing module performs a summary calculation on the N input intermediate computing results and outputs the final computing result. The specific calculation method is that the summary computing module performs a bitwise exclusive OR calculation on the N input intermediate computing result data, and the result is output as the final computing result.

[0012] The beneficial effects of the present invention are as follows: The byte-sliding exclusive OR calculation of the data stream is realized in a parallel manner, which is different from the traditional software calculation implementation, is more suitable for hardware implementation of calculation, saves the calculation amount, saves the hardware resources, and improves the ability of data exclusive OR calculation. Description of the Drawings

[0013] Figure 1 is the flowchart of the implementation method of the present invention;

[0014] Figure 2 is the schematic diagram of the computing sub-module of the present invention;

[0015] Figure 3 is the schematic diagram of the summary computing module of the present invention. Detailed Embodiments

[0016] Corresponding to Figure 1 , the specific method implemented according to the introduction of each module one by one.

[0017] 1) Computing sub-module

[0018] Figure 1 The internal structures and implemented functions of all the computing sub-modules are exactly the same. The schematic diagram of the computing sub-module is as shown in Figure 2 . Each computing sub-module writes the byte content of the original input data byte stream input at this moment into the register only when the value of the assignment signal input to it is 1, and keeps the byte content stored in the register unchanged when the value of the assignment signal input to it is 0. The exclusive-OR computing module performs an exclusive-OR computation on its output computing intermediate result and the byte content currently stored in the register, and the result of the exclusive-OR computation is output as the new output computing intermediate result. And each computing sub-module passes the assignment signal input to it to cascade all the computing sub-modules in a loop. At any moment, there is exactly one computing sub-module among all the computing sub-modules whose input assignment signal is 1, while the input assignment signals of the remaining computing sub-modules are all 0. The assignment signal is sequentially passed in a loop level by level among all the computing sub-modules.

[0019] 2) Aggregation computing module

[0020] As shown in Figure 3 , the aggregation computing module performs an exclusive-OR computation byte by byte on the computing intermediate results from all the computing sub-modules, and the output of the exclusive-OR computation result is the final output computing result.

[0021] Example:

[0022] For example, in the data packets of Internet network communication, when it is necessary to slide byte by byte to find consecutive N bytes, it is necessary to first calculate the bitwise exclusive-OR result of all arbitrary consecutive N bytes in this data packet. For any given positive integer N, for the sake of example, let's assume N = 3 (the principle is the same when N is equal to any other positive integer, except that there are corresponding different numbers of computing sub-modules cascaded in a loop). For a communication input data byte stream with an 8-bit width, each input data is 8 bits (i.e., 1 byte). For the sake of example, let's assume its byte stream is "1A2B3C4D5E6F..." (using hexadecimal representation with the high bit in front, and the following data default to use this representation method and will not be repeated). Let's assume that among all the current computing sub-modules, only the input assignment signal value of computing sub-module 1 is 1 (the assignment signal is cascaded in a loop among all the computing sub-modules, and at each moment, especially only one of the computing sub-modules has an input assignment signal value of 1, while the input assignment signals of all other computing sub-modules are 0). Let's assume that the exclusive-OR computations in all the computing sub-modules are performed using the exclusive-OR computation defined in CRC16-CCITT in the international standard formulated by the Telecommunication Standardization Sector of the International Telecommunication Union (ITU) (it is also possible to use other CRC computations, but all the computing sub-modules must all use the same standard).

[0023] Since the given N = 3, there are a total of three calculation sub - modules (i.e., calculation sub - module 1, calculation sub - module 2, and calculation sub - module 3).

[0024] First, the data byte of the original data byte stream input to calculation sub - module 1 is "1A". At this time, the assignment signal input to calculation sub - module 1 is 1. So, calculation sub - module 1 writes "1A" into the register, and the calculation intermediate result obtained by the exclusive - or calculation circuit is "B37B" (according to the calculation of CRC16 - CCITT defined by the international standard, the exclusive - or calculation result of "1A" is "B37B". Since this is a basic operation defined by the public international standard, the specific exclusive - or calculation process will not be elaborated). And calculation sub - module 1 cascades the assignment signal to the next - level calculation sub - module (i.e., calculation sub - module 2). In the next two rounds of iterative calculations, since the assignment signal input to calculation sub - module 1 is 0, the value in the register of calculation sub - module 1 remains "1A" unchanged. So, the iterative calculation results of the exclusive - or calculation circuit are "ECB8" and "84A2" in sequence. Until the assignment signal passes through calculation sub - module 2 and calculation sub - module 3 in a cyclic cascade form and then loops back to the input of calculation sub - module 1, at this time, the data byte of the corresponding original data byte stream input is "4D". Calculation sub - module 1 repeats the above process cyclically and continues to output "9969", "7B90", "5FFC", etc. (After that, it is a cyclic repetition of this process. Only the beginning part is exemplified, and the subsequent output results are not fully listed).

[0025] When the input assignment signal received by calculation sub - module 2 is 1, the input original data byte is "2B". The structure, function, and behavior of calculation sub - module 2 are exactly the same as those of calculation sub - module 1. So, the outputs of calculation sub - module 2 are "9509", "DA1C", etc. (Similarly, only the beginning part is exemplified, and the subsequent output results are not fully listed). By the same token, the outputs of calculation sub - module 3 are "F7DF", "40F8", etc.

[0026] The intermediate calculation results output by all calculation sub-modules are connected to the summary calculation module, and the summary calculation module performs byte-by-byte exclusive OR calculation on all these intermediate calculation results. For example, the summary calculation module performs byte-by-byte exclusive OR calculation on "84A2" output by calculation sub-module 1, "DA1C" output by calculation sub-module 2, and "F7DF" output by calculation sub-module 3, and thus obtains "A961", which is the corresponding final output calculation result of the first N (N = 3) bytes "1A2B3C" at the very beginning of the original data byte stream. Similarly, the summary calculation module performs byte-by-byte exclusive OR calculation on "9969" output by calculation sub-module 1, "7637" output by calculation sub-module 2, and "40F8" output by calculation sub-module 3, and thus obtains "AFA6", which is the corresponding final output calculation result of the consecutive N (N = 3) bytes "2B3C4D" that slide one byte backward from the beginning of the original data byte stream. After that, this process is repeated in a loop, and the subsequent remaining output results are not fully listed.

Claims

1. A method for byte-sliding exclusive-or calculation of data stream, characterized in that, this method involves the exclusive-or calculation of sliding each byte of the original data in the communication data stream. First, calculate the consecutive sliding exclusive-or of multiple consecutive single-byte cyclic concatenations to obtain an intermediate calculation result, and then obtain the final calculation result through summary calculation based on this intermediate result. The steps are as follows: First, break down the multi-byte exclusive-or calculation problem into exclusive-or calculations for each byte in the original data stream, and then combine multiple consecutive calculation results for re-calculation to obtain the final exclusive-or calculation result; The original input data is a continuous byte data stream. For a given positive integer N, the final output is the exclusive-or calculation result of any consecutive N bytes in the original data byte stream; This method uses exactly N calculation sub-modules. The assignment signals of all calculation sub-modules are connected in a cyclic cascade manner. The original input data stream is input to all calculation sub-modules at the same time. The outputs of all calculation sub-modules are connected to the summary calculation module, and the summary calculation module outputs the final calculation result; Each calculation sub-module only calculates the iterative exclusive-or calculation of one-byte-width data. The specific calculation method is that a register latches one byte of the original input data stream, and performs exclusive-or operation on this byte and the output intermediate calculation result to obtain a new intermediate calculation result for output, and this process is continuously repeated; The summary calculation module performs summary calculation on the N input intermediate calculation results and outputs the final calculation result. The specific calculation method is that the summary calculation module performs bitwise exclusive-or calculation on the N input intermediate calculation result data, and the result is output as the final calculation result.

2. The method for byte-sliding exclusive-or calculation of data stream according to claim 1, characterized in that, the calculation method adopted by this method is composed of N calculation sub-modules with exactly the same internal structure and 1 summary calculation module. Among them, the N calculation sub-modules are connected in series in a cyclic cascade manner, that is, the output of each calculation sub-module is connected to the input of the next-level calculation sub-module, and the outputs of all N calculation sub-modules are connected in sequence from beginning to end until the output of the last Nth calculation sub-module is connected to the input of the first calculation sub-module; The original input data stream is connected to all N calculation sub-modules at the same time. Each calculation sub-module outputs its own intermediate calculation result, and these N intermediate calculation results are connected to the input of the summary calculation module.

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