Anti-attack block cipher encryption method for multi-scene application

Abstract

The application relates to an anti-attack block cipher encryption method for multi-scene application. A group of random numbers generated by a random number module is pre-stored in a register, two groups of round functions are designed to simultaneously encrypt plaintext, irrelevant data is encrypted by using an irrelevant key to interfere with the power consumption curve of the current chip when the plaintext is correctly encrypted, so that the power consumption curve obtained by an attacker contains irrelevant power consumption, the difficulty of power consumption curve analysis is increased, and a random pseudo round is inserted in the 10 rounds of normal operation to prevent a fault injection attack; when there is no attacker, the two groups of round functions are simultaneously used to simultaneously encrypt two groups of plaintext, and the encryption speed is improved.

Description

Technical Field

[0001] This invention belongs to the field of embedded microcontrollers and proposes a block cipher encryption method that can prevent attacks to a certain extent. Background Technology

[0002] With the widespread application of smart devices, data security during the encryption process has become a major concern. Defending against attacks during encryption is a crucial aspect of data security. Encryption algorithms undergo rigorous mathematical verification to confirm their irreversibility given the ciphertext. However, in practice, encryption processes are often accompanied by other vulnerabilities, which can be easily identified through simple analysis.

[0003] Along with the leakage of information during the encryption process, attackers have developed many attack methods such as power attacks and fault attacks. Therefore, defense during the encryption process is an important part of the overall defense process. Different defense methods exist for different attack methods, and some defense methods may introduce new vulnerabilities. This paper adopts interference and insertion methods to make it difficult for attackers to obtain effective information. Summary of the Invention

[0004] This invention relates to the design of an attack-resistant block cipher encryption scheme applicable to multiple scenarios. First, a set of random numbers generated by a random number generator (RNG) is pre-stored in a register. Two sets of round functions are designed to simultaneously encrypt plaintext. While the plaintext is being encrypted correctly, irrelevant data is encrypted with an irrelevant key to interfere with the current chip's power consumption curve. This causes the power consumption curve obtained by an attacker to include irrelevant power consumption, increasing the difficulty of power consumption curve analysis. Simultaneously, random pseudo-rounds are inserted into the normally operating 10-round AES encryption algorithm to prevent fault injection attacks. When there is no attacker, both sets of round functions can be used simultaneously to encrypt two sets of plaintext, improving encryption speed.

[0005] The technical solution adopted by the present invention to achieve the above objectives is: a block cipher encryption method for multi-scenario applications to prevent attacks. Before the encryption operation, the random number module writes several sets of random numbers into the register for use when there is no encryption or random number generation operation, and at the same time generates a signal that the random number is not empty. After the plaintext is written, the round key generation and encryption operation are performed simultaneously to interfere with the power consumption information of the encryption process.

[0006] When idle, the random number module writes a random number into the random number register to complete the preparation work before encryption and generates a non-empty data signal to the controller.

[0007] Enable anti-attack mode, enable encryption mode, and after writing plaintext, perform the first round of encryption and key expansion.

[0008] At the same time, unequal pseudo rounds are randomly inserted in the 10-round AES encryption process, and after the encryption is completed, the correct ciphertext and the interference ciphertext are simultaneously stored in the corresponding register, and the correct ciphertext is read;

[0009] When the anti-attack mode is not enabled, two plaintexts can be written and encrypted at the same time for different application scenarios.

[0010] The anti-attack block cipher encryption method for multiple scene applications comprises the following steps:

[0011] 1) The user writes plaintext into the plaintext register; the random number module writes random numbers into the random number register in the encryption control module and updates the random numbers in the idle state;

[0012] 2) When starting the encryption operation, the controller in the encryption control module reads a group of random numbers, inserts k pseudo rounds according to the value of the first group of random numbers, and ensures that the real encryption position is random;

[0013] 3) The controller writes plaintext, round key and random number into the round function A, round function B, key expansion A and key expansion B, respectively, and simultaneously starts the round function A, round function B, key expansion A and key expansion B, so that the power consumptions generated by the round function A, round function B, key expansion A and key expansion B interfere with each other, and after the current round encryption is completed, the current ciphertext and round key are written into an internal register, and the ciphertext and round key generated by the random number are written back to the random number register for next use;

[0014] 4) Return to step 3) to loop the round function encryption process multiple times, until the current plaintext encryption is completed, the ciphertext is written into the ciphertext register which can be read by the user, and one encryption operation is completed.

[0015] 4. The anti-attack block cipher encryption method for multiple scene applications according to claim 1, wherein for plaintext encryption, when the user writes the i th plaintext, the plaintext register is full, the plaintext is read into the controller after the operation starts, and the plaintext register is empty to continue writing the i+1 th plaintext;

[0016] When the i th plaintext encryption is completed, the ciphertext register becomes full, and the user reads it, at this time, the controller is performing encryption of the i+1 th plaintext, and returns to step 2) until all plaintexts of the user are encrypted.

[0017] 10-round serial operation is adopted, one round of encryption data is operated in one cycle, and the result of the previous round is written back to the round function for the next round operation.

[0018] The present application has the following beneficial effects and advantages:

[0019] 1. The present application adopts the linkage mode of random number module and encryption module, the random number module writes data to specific register in idle time, calls in encryption, prevents the influence of encryption speed due to slow data generation of random number module, enables the anti-attack control logic to automatically call random number after the preparation of random number, and the random number is applied in the encryption process.

[0020] 2. The present application adopts the design of two round function parallel operation, the design of one true and one false interferes the power consumption of chip, makes the attacker exist interference when collecting power consumption, and increases the attack difficulty; the pseudo round is inserted between each round function, so that the attacker increases the difficulty when performing fault injection.

[0021] 3. The present application can also be applied to other block cipher algorithm, in the implementation process, the block cipher algorithm such as AES and DES is designed in the same control logic to reduce the chip area consumption, and the same logic part can also be reused to further reduce the area consumption. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 The encryption algorithm structure diagram with anti-attack function of the present application. DETAILED DESCRIPTION

[0023] The present application will be described in detail below according to the drawings.

[0024] The design idea of the controller of the encryption algorithm with anti-attack function is as shown in the figure: Figure 1

[0025] ​The running process of the encryption algorithm is that the random number module writes data into the algorithm control register first, then the controller performs encryption operation until the operation is completed. The random number module (RNG) writes random numbers into the register in the encryption control module and updates when idle. After the user writes 128-bit plaintext into the register, when starting the encryption operation in the all-attack-proof mode, the controller reads one set of random numbers, determines to insert k pseudo rounds in the i-th round according to the value of the first set of 128-bit random numbers and according to the user setting, ensures that the real encryption position is random, writes the plaintext and round key into the round function A, round function B, key expansion A and key expansion B, and starts the round function A, round function B, key expansion A and key expansion B at the same time, so that the power consumption generated by them interferes with each other. After the current round encryption is completed, the current ciphertext and round key are written into the internal register, and the ciphertext and round key generated by the random number are written into the original register for next use, so as to prevent the encryption time from being greatly prolonged due to the slow generation of random numbers by the random number module. Then, the plaintext used each time is different, so as to prevent the power consumption interference from being the same due to repeated use, and the round function encryption process is repeated multiple times until the current plaintext encryption is completed, the ciphertext is written into the register that can be read by the user, and one encryption operation is completed. After the user writes the first plaintext, the plaintext register is full, and after the operation starts, the plaintext is read into the controller, the plaintext register becomes empty, and the second plaintext can be written. When the first plaintext encryption is completed, the ciphertext register becomes full, and the user reads it. At this time, the controller is performing encryption of the second plaintext, and the encryption process is repeated until the encryption of all plaintexts of the user is completed.

[0026] The round function includes byte substitution, row shift, column mixing and round key addition. The byte substitution includes an S-box, which stores 16x16 8-bit data. Since each byte in the S-box is mapped to its inverse in the finite field GF(2 8 ), the corresponding relationship between the input and output of the S-box can be calculated by the extended Euclidean algorithm and matrix transformation. This algorithm applies this way to realize the S-box, which has the advantage of reducing the chip area consumption caused by a large amount of data in the S-box. The row shift can be directly transformed, and then the column mixing is performed. The column mixing is realized by matrix multiplication after the row shift. Where the multiplication and addition between the matrix elements are the irreducible polynomials m(x) = x 8 +x 4 +x 3 +x+1 of Z2[x] to construct the binary operation of GF(2 8 ). Finally, the round key addition is performed to complete one round of encryption operation.

[0027] The control register contains pseudo round control enable, parallel operation interference enable, pseudo round number and the like. According to actual use, the user can start some functions, and in the case that the parallel operation interference enable is not started, the round function B can also be applied to the operation of the encryption algorithm, so that two groups of plaintexts can be encrypted at the same time, and the efficiency is increased.

[0028] In the application, the random number generated by the random number module and the encryption algorithm controller are applied to random insertion of pseudo rounds and interference, so that an attacker is difficult to collect correct power consumption and cannot determine the process of the chip at the position, and then cannot use power consumption analysis, fault attack and other means, and the attack difficulty is increased. In the design, a controller is not only mounted with a single encryption algorithm, but also connected with multiple block algorithms such as DES, AES and the like, and some functions are designed to be multiplexed, so that the chip area consumption of the control logic part is reduced, and the control logic of the application can be applied to different use environments in combination with different block algorithms according to different requirements.

Claims

1. A method for attack-resistant block cipher encryption for multi-scenario applications, characterized in that: Before the encryption operation, the random number module writes several groups of random numbers into the register for use when there is no encryption and random number operation, and generates a signal indicating that the random number is not empty, and simultaneously performs round key generation and encryption operation to interfere with the power consumption information of the encryption process; When idle, the random number module writes random numbers into the random number register to complete the preparation work before encryption and generate a data non-empty signal to the controller; When the anti-attack mode is enabled, the encryption mode is enabled, and the plaintext is written, the first round of encryption operation and key expansion are performed; Meanwhile, unequal pseudo rounds are randomly inserted in the 10-round AES encryption process, and after the encryption is completed, the correct ciphertext and the interference ciphertext are simultaneously stored in the corresponding register, and the correct ciphertext is read; When the anti-attack mode is not enabled, two plaintexts can be written at the same time for encryption to be used in different application scenarios; The method comprises the following steps: 1) The user writes plaintext into the plaintext register; the random number module writes random numbers into the random number register in the encryption control module and updates when idle; 2) When starting the encryption operation, the controller in the encryption control module reads one group of random numbers, and according to the value of the first group of random numbers, k pseudo rounds are inserted in the ith round to ensure that the real encryption position is random; 3) The controller writes plaintext, round key and random number into round function A, round function B, key expansion A and key expansion B respectively, and starts round function A, round function B, key expansion A and key expansion B at the same time, so that the power consumption generated by round function A, round function B, key expansion A and key expansion B interferes with each other, and after the current round encryption is completed, the current ciphertext and round key are written into an internal register, and the ciphertext and round key generated by the random number are written back to the random number register for next use; 4) Return to step 3) to loop the round function encryption process multiple times, until the current plaintext encryption is completed, the ciphertext is written into the ciphertext register which can be read by the user, and one encryption operation is completed.

2. The multi-scenario attack-resistant block cipher encryption method of claim 1, wherein, For plaintext encryption, when the user writes the ith plaintext, the plaintext register is full, and after the operation starts, the plaintext is read into the controller, and the plaintext register becomes empty to continue writing the i+1 plaintext; When the ith plaintext encryption is completed, the ciphertext register becomes full, and after the user reads, the controller is performing the encryption of the i+1 plaintext, and returns to step 2), until all plaintexts of the user are encrypted.

3. The multi-scenario attack-resistant block cipher encryption method of claim 1, wherein, 10 rounds of serial operation are adopted, one round of encryption data is operated in one cycle, and the result of the previous round is written back to the round function for the next round operation.

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