Surface acoustic wave device

By constructing a multi-layer structure on a piezoelectric substrate, the number of wiring layers and design freedom are increased, solving the problem of insufficient wiring layers in existing WLP-type elastic surface wave devices, and achieving stable characteristics and miniaturization.

CN114257205BActive Publication Date: 2026-06-09SANAN JAPAN TECH CORP

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SANAN JAPAN TECH CORP
Filing Date
2021-07-09
Publication Date
2026-06-09

AI Technical Summary

Technical Problem

The existing WLP-type elastic surface wave device has a limited number of wiring layers, making it difficult to achieve a wide and large-area grounding pattern design, which leads to unstable device characteristics.

Method used

IDT electrodes are formed on a piezoelectric substrate, and a multilayer structure is constructed through a support layer and a cover layer, including external connection terminals and internal wiring. The height of the external connection terminals is higher than the surface of the cover layer, and the internal wiring is lower than the surface of the cover layer, which increases the number of wiring layers and design freedom. Furthermore, the grounding wiring is made lower impedance through high impedance materials.

Benefits of technology

It enables more wiring layers and greater freedom in wiring design, improves the stability and characteristics of the device, and meets the requirements for miniaturization and low height.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN114257205B_ABST
    Figure CN114257205B_ABST
Patent Text Reader

Abstract

An elastic surface wave device includes: a piezoelectric substrate; an IDT electrode formed on the piezoelectric substrate and used to excite an elastic surface wave; an external connection pad formed on the piezoelectric substrate; an internal wiring pad formed on the piezoelectric substrate; a support layer formed on the piezoelectric substrate and formed in a region other than the IDT electrode; a cover layer formed on the support layer and sealing the IDT electrode; an external connection terminal electrically connected to the external connection pad and disposed in a through hole for external connection formed by the support layer and the cover layer and on the cover layer; and an internal wiring electrically connected to the internal wiring pad and disposed in a through hole for internal connection formed by the support layer and the cover layer. Wherein, from the surface of the cover layer, the height of the external connection terminal is higher than the height of the internal wiring. Thus, a WLP type elastic surface wave device with more layers of wiring than the existing one, improved freedom of wiring design, and stable characteristics due to the low impedance of the ground wiring can be provided.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to an elastic surface wave device, and more particularly to an elastic surface wave device with a wafer level package (WLP) structure. Background Technology

[0002] In the front-end modules of mobile communication terminals such as smartphones, surface wave devices are used as bandpass filters. In recent years, the modularization of the wireless components in portable information terminals such as mobile phones and smartphones has been continuously developing, demanding miniaturization and lower height.

[0003] Therefore, the packaging structure technology of surface wave devices has also been improved, and a WLP (Surface Plate Laying) that uses the chip of the surface wave device itself for packaging has been proposed. In the surface wave device, IDT (Interdigital Transducer) electrodes are formed on the piezoelectric substrate, and packaging is performed while ensuring that there is a hollow space above the IDT electrodes.

[0004] In WLP-type elastic surface wave devices, the piezoelectric substrate itself is used to form a hollow encapsulation.

[0005] Patent document 1WO2018 / 159111 discloses an example of a technology for a WLP-type elastic surface wave device.

[0006] As disclosed in Patent Document 1, the existing WLP-type elastic surface wave device uses the piezoelectric substrate itself for packaging instead of using a wiring substrate, which greatly limits the number of wiring layers.

[0007] Furthermore, in order to stabilize the characteristics of the elastic surface wave device, it is best to ensure that the wiring of its grounding pattern is wide and the area is large. However, in the existing WLP type elastic surface wave device structure, it is difficult to achieve this without increasing the size of the piezoelectric substrate itself. Summary of the Invention

[0008] To address the aforementioned problems, this invention provides a WLP-type elastic surface wave device, which has more wiring layers and a higher degree of freedom in wiring design than existing technologies, and exhibits stable characteristics due to the low impedance of the grounding wiring.

[0009] The elastic surface wave device of the present invention comprises:

[0010] Piezoelectric substrate;

[0011] An IDT electrode formed on the piezoelectric substrate and used to excite elastic surface waves;

[0012] External connection pads formed on the piezoelectric substrate;

[0013] Internal wiring pads formed on the piezoelectric substrate;

[0014] A support layer located on the piezoelectric substrate and formed in the region outside the IDT electrode;

[0015] A cover layer formed on the support layer and sealing the IDT electrode;

[0016] External connection terminals are electrically connected to the external connection pads and formed within the external connection through holes of the support layer and the cover layer, and on the cover layer; and

[0017] Internal wiring is electrically connected to the internal wiring pads and formed within the through-holes connecting the support layer and the cover layer.

[0018] When viewed from the surface of the cover layer, the height of the external connection terminal is greater than the height of the internal wiring.

[0019] In one embodiment of the present invention, the internal wiring is electrically connected to a plurality of internal wiring pads, and a wiring pattern is formed between the internal wiring pads, located on the piezoelectric substrate and intersecting the internal wiring in a three-dimensional manner.

[0020] In one embodiment of the invention, the internal wiring is formed at a position lower than the surface of the cover layer.

[0021] In one embodiment of the invention, the piezoelectric substrate is bonded to a support substrate formed of high-resistivity silicon, gallium arsenide, sapphire, polycrystalline alumina, or glass.

[0022] In one embodiment of the invention, the internal wiring is at a ground potential.

[0023] In one embodiment of the invention, the internal wiring is exposed outside the cover layer.

[0024] In one embodiment of the present invention, the external connection terminal is 50 μm to 65 μm above the surface of the cover layer.

[0025] In one embodiment of the present invention, the support layer and the cover layer are made of the same material.

[0026] In one embodiment of the invention, a raised metal layer is formed on the external connection pad and the internal wiring pad.

[0027] In one embodiment of the present invention, the lower protruding metal layer is formed on the sidewall of the opening of the external connection pad and the internal wiring pad.

[0028] The beneficial effects of the present invention are as follows: According to the elastic surface wave device of the present invention, a WLP-type elastic surface wave device can be provided with more wiring layers, greater freedom in wiring design, and stable characteristics due to the low impedance of the grounding wiring compared to existing devices. Attached Figure Description

[0029] Figure 1 This is a top view of the elastic surface wave device 1 of the present invention.

[0030] Figure 2 This is a cross-sectional view of the elastic surface wave device 1 of the present invention.

[0031] Figure 3 This is a cross-sectional view of the elastic surface wave device 1 of the present invention.

[0032] Figure 4 This is a cross-sectional view of the elastic surface wave device 1 of the present invention.

[0033] Figure 5 This is a diagram illustrating the manufacturing method of the elastic surface wave device 1 of the present invention.

[0034] Figure 6 This is a schematic top view of the elastic surface wave resonator that can be used in the elastic surface wave device 1 of the present invention.

[0035] Figure 7 This is a view of an example filter structure that can be used in the elastic surface wave device 1 of the present invention. Detailed Implementation

[0036] The specific embodiments of the present invention will be described below with reference to the accompanying drawings.

[0037] Figure 1 This is a top view of the elastic surface wave device 1 of the present invention.

[0038] Figure 1 This is a diagram showing the elastic surface wave device 1 as viewed from the mounting surface side. (See diagram below.) Figure 1 As shown, the elastic surface wave device 1 of this first embodiment includes an external connection terminal 15 and an internal wiring 16 located on the mounting surface side. Furthermore, a cover layer 13 covers the area outside the external connection terminal 15 and the internal wiring 16. The internal wiring 16 is exposed outside the cover layer 13. The area marked with a dashed line is the cavity region 10, a sealed space formed to allow the functional components of the elastic surface wave to mechanically actuate and be excited.

[0039] Figure 2 This is a cross-sectional view of the elastic surface wave device 1 of the present invention.

[0040] Figure 2 It is along Figure 1The structural cross-sectional view of the elastic surface wave device 1 is shown in section line AA. The elastic surface wave device 1 includes a piezoelectric substrate 3, and an IDT electrode 5, a wiring pattern 7, an external connection pad 9a, and an internal wiring pad 9b formed on one of the main surfaces of the piezoelectric substrate 3. Furthermore, the elastic surface wave device 1 includes external connection terminals 15 formed on the external connection pad 9a and internal wiring 16 formed on the internal wiring pad 9b.

[0041] The piezoelectric substrate 3 is a substrate made of a piezoelectric material. Examples of piezoelectric materials include lithium tantalate (LiTaO3), lithium niobate (LiNbO3), quartz crystal (SiO2), lithium tetraborate (Li2B4O7), zinc oxide (ZnO), potassium niobate (KNbO3), and lanthanum gallium silicate (La3Ga3SiO2). 14 (e.g., single crystals)

[0042] Furthermore, the elastic surface wave device 1 also includes a support layer 11, which is disposed in a region outside the region where the IDT electrode 5 is formed and outside the region where the external connection terminal 15 and the internal wiring 16 are formed. The cover layer 13 and the support layer 11 together seal the cavity region 10 where the IDT electrode 5 is formed, making the cavity region 10 a sealed space.

[0043] Furthermore, the elastic surface wave device 1 may also include a support substrate 17 formed on another main surface of the piezoelectric substrate 3. The support substrate 17 may be made of high-resistivity silicon, gallium arsenide, sapphire, polycrystalline alumina, or glass. However, the material of the support substrate 17 is not limited to these. The thickness of the support substrate 17 may be, for example, 200 μm.

[0044] The surface acoustic wave (SAW) device 1 can be any one of a filter, a resonator, a delay line, and a trap. Furthermore, the elastic wave excited by the IDT electrode 5 is either a Rayleigh wave or an SH wave. Further, if the SAW device 1 is a filter, it can be either a resonator-type filter or a transversal filter.

[0045] Figure 3 This is a cross-sectional view of the elastic surface wave device 1 according to the first embodiment of the present invention. Figure 3 It is along Figure 1 A cross-sectional view of section line BB.

[0046] like Figure 3 As shown, the internal wiring 16 is formed on an internal wiring pad 9b. Figure 3The internal wiring 16 shown is, for example, a ground potential. Figure 3 As shown, the internal wiring 16, compared to a typical wiring pattern, has lower wiring impedance and less loss due to its greater thickness. Furthermore, by releasing the heat from the piezoelectric substrate, it effectively improves the electrical withstand capability of the IDT electrode 5 of the elastic surface wave device 1. Moreover, although... Figure 3 The internal wiring 16 shown is formed at a position higher than the surface of the cover layer 13, but it can also be formed at a position lower than the surface of the cover layer 13.

[0047] Figure 4 This is a cross-sectional view of the elastic surface wave device 1 in the first embodiment of the present invention. Figure 4 It is along Figure 1 A cross-sectional view of section line BB, and is Figure 3 A schematic diagram of another embodiment of the elastic surface wave device 1 shown.

[0048] like Figure 4 As shown, the internal wiring 16 is electrically connected to a plurality of internal wiring pads 9b. Furthermore, a wiring pattern 70 intersecting the internal wiring 16 is formed on the piezoelectric substrate 3. Moreover, although... Figure 4 The internal wiring 16 shown is formed at the same height as the surface of the cover layer 13, but it can also be formed at a position higher or lower than the surface of the cover layer 13.

[0049] Figure 5 This is an explanatory diagram of the manufacturing method of the elastic surface wave device 1 in the first embodiment of the present invention.

[0050] In manufacturing the elastic surface wave device 1, firstly, as... Figure 5 As shown in (a), an IDT electrode 5, a wiring pattern 7, an external connection pad 9a, and an internal wiring pad 9b are formed on the upper surface of the piezoelectric substrate 3.

[0051] The IDT electrode 5, wiring pattern 7, external connection pad 9a, and internal wiring pad 9b are thin films made of conductive materials. The conductive material can be, for example, an aluminum (Al) alloy, such as an aluminum-copper (Al-Cu) alloy, or elemental aluminum (Al). Alternatively, the IDT electrode 5, wiring pattern 7, external connection pad 9a, and internal wiring pad 9b can also be thin films composed of multiple conductive materials stacked together.

[0052] The planar shape of the IDT electrode 5, as described later, is formed by at least a pair of comb-shaped electrodes arranged with their electrode fingers facing each other and interlocking. The IDT electrode 5 functions as an excitation electrode and can excite elastic surface waves on the piezoelectric substrate 3 according to the excitation signal applied to the pair of comb-shaped electrodes.

[0053] The surface acoustic wave (SAW) device 1 does not necessarily have to be composed of a single IDT electrode 5; it can also be composed of several IDT electrodes 5 connected in series or in parallel. If several IDT electrodes 5 are connected, a trapezoidal SAW filter, a lattice SAW filter, or a dual-mode SAW filter can be constructed.

[0054] The wiring pattern 7 is electrically connected to the IDT electrode 5. The wiring pattern 7 is also electrically connected to the external connection pad 9a and the internal wiring pad 9b.

[0055] The IDT electrode 5, the wiring pattern 7, the external connection pad 9a, and the internal wiring pad 9b are formed by patterning thin films formed by methods such as sputtering, evaporation, and chemical vapor deposition (CVD) into predetermined shapes using photolithography techniques such as stepper lithography and reactive ion etching (RIE).

[0056] When the IDT electrode 5, the wiring pattern 7, the external connection pad 9a, and the internal wiring pad 9b are formed by the above method, the IDT electrode 5, the wiring pattern 7, the external connection pad 9a, and the internal wiring pad 9b can be made of the same material and in the same process.

[0057] To confine the surface waves, reflector electrodes can be formed on the piezoelectric substrate 3. Viewed from the IDT electrode 5, the reflector electrodes are positioned along both propagation directions of the surface waves. With the reflector electrodes provided, both the reflector electrodes and the IDT electrode 5 can be formed from the same material and in the same process.

[0058] Next, as Figure 5 As shown in (b), a support layer 11 is formed in a region other than the region where the IDT electrode 5 is formed. The support layer 11 may be formed at least in the region other than the region where the IDT electrode 5 is formed, but may not be formed in the region where the external connection terminal 15 and the internal wiring 16 are formed.

[0059] The support layer 11 can also be formed by patterning the thin film formed on the piezoelectric substrate 3 using a general film forming method, or by attaching a separately prepared thin film to the piezoelectric substrate 3.

[0060] When the support layer 11 is formed using the aforementioned method, it can be formed, for example, by patterning and curing a thin film of photoresist using photolithography. In this case, the photoresist is, for example, a photosensitive resin such as an epoxy resin, a polyimide resin, a BCB (benzocyclobutene) resin, or an acrylic fiber resin.

[0061] The methods for forming the photoresist are represented by methods using photosensitive dry film and methods using photosensitive liquid photoresist. When using photosensitive dry film, a vacuum bonding device can be used to tightly bond the photosensitive dry film to the wafer or substrate surface of the elastic surface wave device.

[0062] When using a photosensitive dry film, a relatively thick support layer 11 with excellent adhesion, exceeding 10 μm in thickness, can be formed.

[0063] When using photosensitive liquid photoresist, it is formed by coating the photoresist liquid, for example, by spin coating or printing. Preferably, the photoresist is formed into a thin film by spin coating.

[0064] When photoresist is formed into a thin film by spin coating, even if the underlying structure has a height difference, the photoresist film can be formed without gaps between it and the underlying structure, and the support layer 11 with excellent adhesion can be formed.

[0065] The photoresist film formed in the above manner undergoes an exposure process and a development process to form a support layer 11 in the area outside the region where the IDT electrode 5 is formed. The thickness of the support layer 11 is, for example, 20 μm.

[0066] Next, a thin film-like cover layer 13 is formed on the upper surface of the support layer 11, and the support layer 11 is bonded to the cover layer 13. This allows the cover layer 13, which provides a sealed vibration space (cavity region 10), to be formed in the region where the IDT electrode 5 is formed.

[0067] In order to be placed on the upper surface of the support layer 11, the film is pressed and bonded by a laminating machine with rollers while controlling the temperature, and the temperature and pressure are appropriately controlled to bond the cover layer 13 to the upper surface of the support layer 11.

[0068] To bond the support layer 11 to the cover layer 13, the support layer 11 and the cover layer 13 can be heated or exposed to light, depending on the selected material. For example, if the material of the support layer 11 and the cover layer 13 is epoxy resin, it is preferable to heat the support layer 11 and the cover layer 13 to 100°C. The cover layer 13 formed by the above method can seal the IDT electrode 5 while forming the vibration space (cavity region 10), thus slowing down the oxidation of the IDT electrode 5. The thickness of the cover layer 13 can be, for example, between 20 μm and 45 μm.

[0069] If the support layer 11 and the cover layer 13 are made of the same material, they can be bonded together as a single unit. Because the interface between them is made of the same material, the bonding strength and the airtightness of the cover layer 13 are improved. In particular, when both materials are epoxy resins, heating to the range of 100°C to 200°C further promotes bonding, thus enhancing the bonding strength and the airtightness of the cover layer 13.

[0070] Next, the process for exposing the external connection pad 9a and the internal wiring pad 9b will be described. For example... Figure 5 As shown in (c), the external connection pad 9a and the internal wiring pad 9b are exposed by means of laser irradiation or cutting, for example, through the support layer 11 and the cover layer 13.

[0071] Next, although not shown in the figure, the cover layer 13 and the support layer 11 are cut by means of laser irradiation or cutting to form a three-dimensional space for forming internal wiring. As will be described later, when there is a wiring pattern 70 that intersects the internal wiring in a three-dimensional manner, the cover layer 13 or the support layer 11 is cut so that the wiring pattern 70 that intersects the internal wiring in a three-dimensional manner is not exposed.

[0072] Furthermore, without a wiring pattern 70 intersecting the internal wiring, the piezoelectric substrate 3 can be machined until it is exposed. When the internal wiring 16 is bonded to the piezoelectric substrate 3, it can improve heat dissipation and the electrical withstand capability of the IDT electrode 5. Moreover, the increased cross-sectional area of ​​the internal wiring 16 reduces losses caused by wiring impedance.

[0073] During the process of exposing the external connection pad 9a and the internal wiring pad 9b, physical damage can easily be caused to the surfaces of the external connection pad 9a and the internal wiring pad 9b. Therefore, in order to ensure wettability, connection strength and connection reliability with the external connection terminal 15 and the internal wiring 16, a metal layer called the Under Bump Metal (UBM) layer is usually formed on the external connection pad 9a and the internal wiring pad 9b.

[0074] Representative UBM layer formation methods include electroless plating and electrolytic plating. In electroless plating, a wafer or substrate exposing the external connection pads 9a and the internal wiring pads 9b is immersed in an electroless plating bath with controlled temperature and concentration for an appropriate period of time for cleaning, thereby forming a UBM layer on the external connection pads 9a and the internal wiring pads 9b.

[0075] In the electroplating process, UBM is formed using the following steps: A Ti (titanium) seed layer and a photoresist layer are formed on the entire surface of the wafer and substrate, exposing the external connection pads 9a and the internal wiring pads 9b. The photoresist layer is then patterned through an exposure and development process, exposing the three-dimensional wiring pads 9a and 9b, as well as the electroplating electrodes.

[0076] The wafer and substrate, after the photoresist layer is patterned, are immersed in an electrolytic plating bath in which the temperature and concentration are controlled, and an appropriate current is passed through them for an appropriate period of time to form a UBM layer.

[0077] Afterwards, the photoresist is removed, the electroplating seed layer in areas other than the UBM layer is etched, and the surface is cleaned to form a UBM layer on the three-dimensional wiring pad 9. Alternatively, if the UBM layer is formed by electroplating, a UBM layer may also be formed on the sidewalls of the openings of the external connection pad 9a and the internal wiring pad 9b, thereby increasing the bonding area between the external connection terminal 15 and the internal wiring 16, and improving connection strength and reliability.

[0078] The metals used in UBM layers, in electroless plating, are mainly layered structures of gold (Au), palladium (Pd), and nickel (Ni) from the surface, or layered structures of gold (Au) and nickel (Ni).

[0079] In electrolytic plating, the structure is similarly layered, starting from the surface and mainly consisting of gold (Au), nickel (Ni), and titanium (Ti) (seed layer), or a layered structure of gold (Au), nickel (Ni), copper (Cu), and titanium (Ti) (seed layer), or a layered structure of gold (Au), copper (Cu), and titanium (Ti) (seed layer).

[0080] Next, as Figure 5 As shown in (d), the external connection terminal 15 and the internal wiring 16 are formed by using a metal mask MM to fill solder paste HP. The metal composition of the solder paste is not limited and may contain lead or not.

[0081] The solder paste can be, for example, an alloy based on Sn-Pb, Sn-Cu, Sn-Ag, Sn-Bi, Sn-In, or Sn-Sb. The content of solder powder and flux in the solder paste can be, for example, 5% to 95% by mass of solder powder and 5% to 95% by mass of flux. In the first embodiment, a solder paste containing approximately 90% by mass of solder powder is used.

[0082] The metal mask MM is, for example, a metal plate formed of a metal such as stainless steel. In the region where the external connection terminal 15 is formed, an opening with a diameter between 100 μm and 120 μm is formed, for example. And in the region where the internal wiring 16 is formed, an opening with a diameter between 25 μm and 50 μm is formed, for example. Furthermore, the thickness of the metal mask MM can be, for example, 50 μm.

[0083] The width of the external connection terminal 15 can be, for example, between 50 μm and 100 μm. Furthermore, the internal wiring 16 can be appropriately designed with a desired wiring pattern. In the first embodiment, the width of the internal wiring 16 is 60 μm and the length is 200 μm. The internal wiring 16 is electrically connected to two internal wiring pads 9b.

[0084] Next, the metal mask MM is removed, reflow soldering is performed, flux is cleaned, and cross-sectioning is conducted to obtain the desired result. Figure 1 and Figure 2 The elastic surface wave device 1 is shown. Therefore, the external connection terminal 15 is 50 μm to 65 μm above the surface of the cover layer 13. Furthermore, the internal wiring 16 is 14 μm above the surface of the cover layer 13.

[0085] That is, when viewed from the surface of the cover layer 13, the height of the external connection terminal 15 is higher than the height of the internal wiring 16. Therefore, although the internal wiring 16 is exposed on the mounting surface, it will not short-circuit with the wiring on the mounting substrate even after the surface wave device 1 is installed. Thus, the internal wiring 16 of the surface wave device 1 can serve as practical wiring. According to the present invention, a smaller surface wave device with excellent isolation characteristics can be provided.

[0086] Compared to chip-level packaging structures that use piezoelectric substrates bonded to a substrate, WLP-type flexible surface wave devices, which significantly limit the number of wiring layers, have significant technical implications by expanding wiring options without increasing the size of the piezoelectric substrate or the number of layers in the packaging structure.

[0087] Therefore, as described in the elastic surface wave device 1 of the first embodiment above, since the internal wiring 16 is formed by utilizing the three-dimensional regions of the cover layer 13 and the support layer 11 to form internal connection through holes and external connection through holes, the wiring options can be expanded without increasing the size of the piezoelectric substrate or the number of layers in the packaging structure. Furthermore, the thickness of the internal wiring 16 in this invention is greater than that of a typical wiring pattern, thus allowing it to be used as a low-impedance wiring.

[0088] Next, the functional components of the elastic surface wave device 1 will be described. Figure 6 This is a schematic top view of an elastic surface wave resonator.

[0089] like Figure 6 As shown, an IDT 50 for exciting elastic surface waves and a reflector 52 are formed on a piezoelectric substrate 30. The IDT 50 has a pair of comb-shaped electrodes 50a arranged facing each other. The comb-shaped electrodes 50a have several electrode fingers 50b and several busbars 50c connecting the electrode fingers 50b. The reflector 52 is disposed on both sides of the IDT 50.

[0090] The IDT 50 and reflector 52 are, for example, thin films with a thickness between 150 nm and 400 nm. The IDT 50 and reflector 52 may include other metals, such as titanium, palladium, silver, or suitable metals, or alloys containing the aforementioned metals, or may be formed by these alloys. The IDT 50 and reflector 52 may also be multilayer metal structures composed of several stacked metal layers.

[0091] Figure 7 This is a view of an example filter structure that can be used in the elastic surface wave device 1 of the present invention.

[0092] like Figure 7As shown, an elastic surface wave resonator 53 composed of an IDT 50 and a reflector 52, and a first wiring pattern 54 are formed on the piezoelectric substrate 30.

[0093] The first wiring pattern 54 includes wiring that forms an input pad In, an output pad Out, and a ground pad GND. Furthermore, the first wiring pattern 54 is electrically connected to the surface wave resonator 53.

[0094] An insulator 56 is formed on the first wiring pattern 54. The insulator 56 may be, for example, made of polyimide. The film thickness of the insulator 56 may be, for example, 1000 nm.

[0095] A second wiring pattern 58 is formed on the insulator 56. The second wiring pattern 58 intersects the insulator 56 and the first wiring pattern 54 in a three-dimensional manner.

[0096] The surface wave resonator 53, the first wiring pattern 54, and the second wiring pattern 58 can be formed, for example, by suitable metals or alloys such as silver, aluminum, copper, titanium, and palladium. Furthermore, these metal patterns, such as the first wiring pattern 54 and the second wiring pattern 58, can be, for example, multilayer metal structures composed of several stacked metal layers. The thickness of the surface wave resonator 53, the first wiring pattern 54, and the second wiring pattern 58 is, for example, between 150 nm and 400 nm.

[0097] According to the above description of the elastic surface wave device of the present invention, a WLP-type elastic surface wave device can be provided, which has a greater number of wiring layers and a higher degree of freedom in wiring design than the prior art, and has stable characteristics due to the low impedance of the grounding wiring.

[0098] It should be noted that, of course, the present invention is not limited to the embodiments described above, but also includes all embodiments that can achieve the purpose of the present invention.

[0099] Furthermore, while at least one embodiment has been described above, it should be understood that various changes, modifications, or improvements will readily conceive of by those skilled in the art. These changes, modifications, or improvements are also part of this disclosure and fall within the scope of the invention. It should be understood that the embodiments of the methods or apparatus described herein are not limited to the architecture and arrangement of the constituent components described above or illustrated in the accompanying drawings. Methods and apparatus can be installed or implemented in other embodiments. The embodiments described are for illustrative purposes only and are not intended to be limiting. Moreover, the descriptions or terms used herein are for illustrative purposes only and are not intended to be limiting. The use of "comprising," "possessing," "having," "including," and variations thereof herein means to include the items listed below, their equivalents, and additional items. The term "or," or any term used in the description of "or," can be interpreted as meaning one, more than one, or all of the descriptive terms. References to front, back, left, right, top, bottom, upper, lower, and horizontal and vertical are for convenience of description and are not intended to limit the position and spatial configuration of any constituent component in the invention. Therefore, the above description and accompanying drawings are merely illustrative.

Claims

1. An elastic surface wave device, characterized in that: The elastic surface wave device includes Piezoelectric substrate; An IDT electrode formed on the piezoelectric substrate and used to excite elastic surface waves; External connection pads formed on the piezoelectric substrate; Internal wiring pads formed on the piezoelectric substrate; A support layer located on the piezoelectric substrate and formed in the region outside the IDT electrode; A cover layer formed on the support layer and sealing the IDT electrode; External connection terminals, electrically connected to the external connection pads and formed within the external connection through-holes in the support layer and the cover layer, and on the cover layer, are integrally formed from the same metal from the external connection pads via the UBM layer; and Internal wiring is electrically connected to the pads for internal wiring and formed in the through holes for internal connection between the support layer and the cover layer, and is integrally formed from the same metal through the pads for internal wiring via the UBM layer; When viewed from the surface of the cover layer, the height of the external connection terminal is greater than the height of the internal wiring; From a top view of the piezoelectric substrate, the maximum width of the internal wiring is greater than the maximum width of the external connection terminal; The internal wiring is electrically connected to a plurality of internal wiring pads, and a wiring pattern is formed between the internal wiring pads, located on the piezoelectric substrate and intersecting the internal wiring in a three-dimensional manner.

2. The elastic surface wave device according to claim 1, characterized in that: The internal wiring is formed at a position lower than the surface of the cover layer.

3. The elastic surface wave device according to claim 1, characterized in that: The piezoelectric substrate is bonded to a support substrate formed of high-resistivity silicon, gallium arsenide, sapphire, polycrystalline alumina, or glass.

4. The elastic surface wave device according to claim 1, characterized in that: The internal wiring is at ground potential.

5. The elastic surface wave device according to claim 1, characterized in that: The internal wiring is exposed in the cover layer.

6. The elastic surface wave device according to claim 1, characterized in that: The external connection terminal is 50μm to 65μm above the surface of the cover layer.

7. The elastic surface wave device according to claim 1, characterized in that: The support layer and the cover layer are made of the same material.

8. The elastic surface wave device according to claim 1, characterized in that: The external connection pads and the internal wiring pads form a raised metal layer.

9. The elastic surface wave device according to claim 8, characterized in that: The lower raised metal layer is formed on the sidewall of the opening of the external connection pad and the internal wiring pad.