A system architecture verification and evaluation method and device

Abstract

The present invention provides a system architecture verification and evaluation method and device, comprising: mapping a behavioral activity model expressed using the IDEF0 model in the system architecture into a DoDAF-based model, dynamically simulating the DoDAF-based model to complete the verification and evaluation of the logical content layer of the behavioral activity model in the system architecture; and using a graph theory-based verification method to abstractly map and convert the task resource flow model in the structural model in the system architecture into a complex network model and adjacency matrix, performing characteristic calculations on the complex network model and adjacency matrix, and completing the verification and evaluation of the performance and efficiency layer of the task resource flow model. This method verifies the correctness, feasibility, and rationality of the architecture design model results from different dimensions, ensuring the credibility of the model.

Description

Technical Field

[0001] The present invention relates to the technical field of system architecture, and in particular to a system architecture verification and evaluation method and device. Background Art

[0002] The top-level design of the system architecture includes design, modeling and simulation, verification and evaluation, and other aspects. Among them, design technology is the core supporting technology for the early top-level design of the system, providing direct design means and methods for the top-level design of the system. Modeling and simulation technology and verification and evaluation technology serve as auxiliary supporting technologies to assist in completing the system architecture design. In order to ensure the quality of the results of the top-level design of the system architecture, it is necessary to verify and evaluate the design results based on the early top-level design. The results of the system architecture design are a group of products with models as the core, including operational perspective models, information perspective models, capability perspective models, system perspective models, standard technology perspective models, etc. The verification technology of the top-level design of the system architecture is an indispensable part of the top-level design technology system. It provides verification methods and tools for the completeness, consistency, rationality and correctness of the top-level design results, and is to ensure the correct and orderly progress of each link in the top-level design process, thereby effectively supporting the detailed construction of each system in the system.

[0003] Currently, the verification of system architecture models mainly relies on expert review, document-based evaluation, indicator-based evaluation, formal evaluation, executable model-based verification, and simulation modeling-based verification. However, there is no systematic system architecture top-level design verification and evaluation method. Summary of the Invention

[0004] The present invention provides a system architecture verification and evaluation method and device to solve the verification problems such as model completeness, consistency, rationality and correctness in the model-based system architecture design process, and improve the credibility of model design.

[0005] The present invention provides a system architecture verification and evaluation method, comprising:

[0006] Map the behavioral activity model in the system architecture, which is expressed using the IDEF0 model, to a DoDAF-based model, and perform dynamic simulation on the DoDAF-based model to complete the verification and evaluation of the logical content layer of the behavioral activity model in the system architecture;

[0007] A verification method based on graph theory is used to abstractly map the task resource flow model in the structural model of the system architecture into a complex network model and adjacency matrix. The characteristics of the complex network model and the adjacency matrix are calculated to complete the verification and evaluation of the performance efficiency layer of the task resource flow model.

[0008] Optionally, mapping the behavior activity model expressed in the IDEF0 model in the system architecture to a DoDAF-based model includes:

[0009] Get the activity, input, control, and output elements of the IDEF0 model;

[0010] According to the activities, inputs, controls, and outputs, the sequence diagram and state machine diagram based on DODAF are obtained to obtain the DoDAF-based model.

[0011] Optionally, obtaining a DODAF-based sequence diagram and state machine diagram based on activity, input, control, and output elements includes:

[0012] Map activities and control elements to lifelines of sequence diagrams and behavioral executions of sequence diagrams;

[0013] Map input, output, and control elements to message events between lifelines in sequence diagrams;

[0014] Map activities and control elements to node states in the state machine diagram, and map input, output, and activity elements to entry, execution, and exit actions of the node states.

[0015] Optionally, the abstract mapping of the task resource flow model in the structural model in the system architecture into a complex network model and an adjacency matrix includes:

[0016] Obtaining an interaction relationship between any two nodes in a task resource flow model, wherein the interaction relationship includes: information interaction and no information interaction;

[0017] Map the nodes in the task resource flow model to nodes in the complex network;

[0018] According to all the interactive relationships of the task resource flow model, edges between nodes are established in the complex network;

[0019] According to whether there are edges between nodes in the complex network, the adjacency matrix and the connection probability adjacency matrix are established.

[0020] Optionally, for two nodes with information interaction in the task resource flow model, they have an edge when mapped in a complex network.

[0021] Another aspect of the present invention provides a system architecture verification and evaluation device, comprising:

[0022] The verification and evaluation module of the logical content layer is used to map the behavioral activity model expressed in the system architecture using the IDEF0 model to a DoDAF-based model, dynamically simulate the DoDAF-based model, and complete the verification and evaluation of the logical content layer of the behavioral activity model in the system architecture;

[0023] The verification and evaluation module of the performance and efficiency layer is used to adopt a verification method based on graph theory to abstractly map the task resource flow model in the structural model of the system architecture into a complex network model and adjacency matrix, perform characteristic calculations on the complex network model and adjacency matrix, and complete the verification and evaluation of the performance and efficiency layer of the task resource flow model.

[0024] Optionally, the verification and evaluation module of the logic content layer is specifically used to:

[0025] Get the activity, input, control, and output elements of the IDEF0 model;

[0026] According to the activities, inputs, controls, and outputs, the sequence diagram and state machine diagram based on DODAF are obtained to obtain the DoDAF-based model.

[0027] Optionally, the verification and evaluation module of the logic content layer is specifically used to:

[0028] Map activities and control elements to lifelines of sequence diagrams and behavioral executions of sequence diagrams;

[0029] Map input, output, and control elements to message events between lifelines in sequence diagrams;

[0030] Map activities and control elements to node states in the state machine diagram, and map input, output, and activity elements to entry, execution, and exit actions of the node states.

[0031] Optionally, the verification and evaluation module of the performance efficiency layer is specifically used to:

[0032] Obtaining an interaction relationship between any two nodes in a task resource flow model, wherein the interaction relationship includes: information interaction and no information interaction;

[0033] Map the nodes in the task resource flow model to nodes in the complex network;

[0034] According to all the interactive relationships of the task resource flow model, edges between nodes are established in the complex network;

[0035] According to whether there are edges between nodes in the complex network, the adjacency matrix and the connection probability adjacency matrix are established.

[0036] Optionally, for two nodes with information interaction in the task resource flow model, they have an edge when mapped in a complex network.

[0037] The architecture verification and assessment method and apparatus provided by this invention offer a comprehensive verification technology system and propose corresponding verification methods tailored to the verification and assessment framework. This method verifies the correctness, feasibility, and rationality of architectural design model results from different dimensions, ensuring the model's credibility. The results of this analysis method have already been applied in major projects such as a network information system design project. The results have been gradually disseminated to the military and other stakeholders, demonstrating broad application prospects and promising economic benefits. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 Validate the framework for the architecture;

[0039] Figure 2 Verify the ideas for the logical expression layer of a network information system;

[0040] Figure 3 Verify the triggering principle for the logical content layer of a network information system;

[0041] Figure 4 An abstract topology diagram of a network information system;

[0042] Figure 5 It is the node connection matrix of a network information system;

[0043] Figure 6 is the node connection probability matrix of a network information system;

[0044] Figure 7 This is a schematic diagram of the 100th evolution of a certain network information system. DETAILED DESCRIPTION

[0045] The method of the present invention is further described in detail below with reference to the accompanying drawings and embodiments of the present invention.

[0046] It should be noted that, in the absence of conflict, the embodiments and fault types in the present application can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0047] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components and / or combinations thereof.

[0048] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can, for example, be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0049] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used herein to describe the spatial positional relationship of a device or feature to other devices or features as shown in the figures. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figures. For example, if the device in the drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0050] The present invention provides a verification and evaluation method for system architecture design, which can verify the model results of the model-based system architecture expression results from the system design stage. According to the architecture design content, the method divides the scope of top-level design verification and evaluation into three levels: expression layer verification, logic content layer verification and performance efficiency layer verification. The three-level verification is a gradual process. The expression layer completes the most basic formal inspection and verification; the logic content layer verification refers to verifying whether the information expressed by the design results is correct and reasonable on the basis of the correct expression form; the performance efficiency layer verification is based on the use perspective. On the basis of the correct expression form and logical content, it verifies whether the design results meet the use requirements and performance level. Carrying out top-level design verification from these three levels can ensure that the verification system of the top-level design is complete from the hierarchical level, and can cover all research contents on the verification of the top-level design of the system architecture.

[0051] The problem to be solved by the present invention is: a new system architecture verification and evaluation technology adopts a three-level verification and evaluation structure, namely expression layer verification, logic content layer verification and performance efficiency layer verification, to solve the current problem of no complete system verification structure; the verification process adopts three steps for verification, namely determining the verification purpose, defining verification rules and system architecture verification, to ensure the effectiveness, rationality and completeness of the verification; in the logic content layer verification stage, for non-executable models, model conversion technology is adopted to complete the system architecture verification method based on executable models, and the feasibility, rationality and other analysis of the indicators required for verification are conveniently performed through dynamic software execution; the performance efficiency layer verification introduces a verification technology based on graph theory, and completes the verification and evaluation of relevant system characteristics by converting the model product into a complex network model.

[0052] The present invention mainly includes: a three-layer architecture verification and evaluation structure, architecture verification of an executable model based on model conversion, and characteristic verification of a complex network model based on information resource interaction model conversion.

[0053] Verify the content framework as Figure 1 As shown. According to the framework of the top-level design verification content of the system architecture, the relevant verification technology support is sorted out. In this method, the top-level design verification technology is carried out from two methods: static evaluation and dynamic verification. Static evaluation technology is mainly used for verification of the expression layer and the logical content layer, including technical approaches such as expert review, document-based evaluation, indicator-based evaluation and formal evaluation. Dynamic verification technology is mainly used for verification of the logical content layer and performance efficiency layer, including technical approaches such as graph theory-based verification, executable model-based architecture verification and simulation modeling-based architecture verification. According to the specific verification content, the appropriate verification technology is used in combination.

[0054] The specific steps of the system architecture top-level design verification process are as follows:

[0055] Step 1: Determine the purpose of verification

[0056] The purpose of top-level design verification is to clarify the specific reasons for conducting top-level design verification. The scope and method of verification are determined based on the content of the model output. The scope primarily refers to whether verification is performed at the expression level, logical content level, or performance and effectiveness level, and which models are verified.

[0057] Model results generally include structural models and behavioral activity models.

[0058] First, all structural models and behavioral activity models need to be verified at the expression level;

[0059] Secondly, the behavior activity model also requires verification of the logic content layer;

[0060] Finally, if the system represented by the structural model needs to be evaluated for performance and efficiency improvements, performance and efficiency layer verification is also required.

[0061] Step 2: Define validation rules

[0062] The verification process needs to be based on the corresponding verification rules. Determine the verification rules for system architecture verification to guide the subsequent verification.

[0063] Verification at the expression level determines whether the semantics of the description formed by basic grammatical elements are correct and reasonable, and whether there are any misunderstandings. Verification rules include grammatical rule verification, completeness verification, and consistency verification.

[0064] Logical content layer verification determines whether the system architecture contains contradictions, conflicts, or unreasonable content. This primarily involves verifying the correctness of behavioral logic. Verification rules include correctness verification, state reachability verification, and logical rationality verification. For example, the rules for model logical rationality are as follows: data cannot be assigned to data in a hierarchy, for example.

[0065] Performance and effectiveness layer verification primarily focuses on the performance and effectiveness of the system architecture, verifying whether the final system design meets design requirements and demand indicators. Verification rules primarily include quantitative system evaluation rules such as performance evaluation and feature evaluation. For example, the performance evaluation rules are as follows: Compared with the original system architecture, the system architecture model is compared to determine the improvement in attack probability and communication speed.

[0066] Step 3: Architecture Verification

[0067] System architecture verification mainly includes the verification of design results such as structural models and behavioral activity models. System architecture verification is carried out at three levels: expression layer, logical expression layer, and performance and efficiency layer.

[0068] According to the verification purpose and verification rules, static evaluation technical approaches such as expert review, document-based evaluation, indicator-based evaluation and formal evaluation are selected and used in combination with dynamic evaluation technical approaches such as graph theory-based verification, executable model-based architecture verification and simulation modeling-based architecture verification.

[0069] The verification and evaluation method for system architecture design of the present invention proposes a systematic and comprehensive verification and evaluation framework for the top-level design of the architecture to guide the verification implementation.

[0070] This method sorts out a relatively comprehensive verification technology system and proposes corresponding verification methods based on the verification and evaluation framework.

[0071] This method verifies the correctness, feasibility and rationality of the architecture design model results from different dimensions, and can ensure the credibility of the model.

[0072] The relevant results of this analysis method have been applied in major projects such as the design of a network information system. The relevant results have been gradually promoted to the military and stakeholders, and have broad application prospects and good economic benefits.

[0073] This paper takes the design and verification of a certain network information system architecture as an example. The specific steps of the verification process are as follows:

[0074] Step 1: Determine the purpose of verification

[0075] Based on a network information system's operational application scenario, an information perspective model was developed. The verification objective was to validate the information perspective model at the expression, logical content, and performance levels. Verification included the model's completeness, correctness, and operational performance.

[0076] Step 2: Define validation rules

[0077] Expression layer validation rules: Syntax rule verification, the model expression complies with IDEF0 syntax rules; completeness validation rules, the information architecture can cover the typical application styles of the network information system.

[0078] Logical content layer verification rules: Correctness verification, the rules and processes of the information activity model can conform to the actual usage scenarios.

[0079] Performance and efficiency layer verification rules: Performance verification: the model constructed from the information perspective can meet the requirements of evolvability, adaptability, and anti-destruction.

[0080] Step 3: Architecture Verification

[0081] (1) Expression layer verification

[0082] Verification at the expression layer adopts static verification - organizing users, analysts, developers and project managers to strictly review the top-level design results of the system and reconfirm the top-level design results of the system.

[0083] In this project, the expression layer verification carried out syntax verification of the main models, organized expert reviews for the information architecture results, and checked the model's expression method, naming rules, model association relationships, and attribute expressions.

[0084] (2) Logical content layer verification

[0085] Verification of the logical content layer utilizes dynamic verification—architecture verification based on executable models. Activity behavior models developed with architecture development tools (such as DoDAF-based activity diagrams and IDEF0-based activity flow charts) are dynamically run to facilitate analysis of the feasibility and rationality of indicators and to validate the methodology for evaluating the quality of architecture design. If the model is static and cannot be run, it is converted into an executable model for logical content verification.

[0086] The information architecture model in a network information system is rooted in the combat style. Therefore, the spatiotemporal logic of the combat scenario and the operational logic of the information architecture are inherently consistent. Through the joint simulation of the combat scenario and the information architecture, the rationality of the internal logical expression of the information architecture model is verified from the perspective of combat use. By analyzing the execution process and results of the executable model, the feasibility and logical consistency of the system architecture design results are verified. Figure 2 shown.

[0087] Events in the combat simulation environment and the system architecture design tool can be triggered. By establishing the association between the combat simulation environment events and the system architecture design tool events, the full process mutual drive between the use scenario and the activity model is completed. The triggering principle is shown in the figure below. Figure 3 shown.

[0088] Behavioral activity models are typically represented using the IDEF0 model. IDEF0 models lack executable functionality and cannot dynamically simulate the activity flows they represent. By mapping and analyzing the IDEF0 activity content, it can be mapped to an executable model based on DoDAF.

[0089] The specific steps of mapping are:

[0090] S11. Summarize the main elements of the IDEF0 model: activities, inputs, controls, and outputs;

[0091] S12, DODAF-based sequence diagram and state machine diagram mapping:

[0092] Map the four elements of activity, input, control, and output to executable sequence diagrams and state machine diagrams based on the DODAF operational perspective;

[0093] S13, Sequence diagram lifeline and behavior execution mapping based on DODAF:

[0094] Mapping IDEF0 model activities and controls to sequence diagram lifelines and sequence diagram behavior executions;

[0095] S14. Sequence diagram message event mapping based on DODAF:

[0096] Map inputs, outputs, and controls to message events between sequence diagram lifelines;

[0097] S15. Executable model conversion: mapping activities and controls to node states in the state machine diagram, and mapping inputs, outputs, and activities to state entry, execution, and exit actions, thereby completing the conversion of the executable model.

[0098] (3) Performance and efficiency layer verification

[0099] The performance and efficiency layer verification adopts dynamic verification - verification based on graph theory: by mapping each entity in the system architecture and its link relationship with other entities into nodes and edges in a complex network, a corresponding topological network graph model is created, and the problem of consistency verification of the relationship between demand elements is solved by abstracting the actual system and applying relevant graph theory methods.

[0100] Performance and effectiveness layer verification utilizes graph theory and complex network-related technologies. This abstracts the actual combat system into a network topology, describing and analyzing the performance and effectiveness of the actual combat system based on its characteristics. The advantage of studying actual networks through abstract graphs is that it allows for comparison of similarities and differences between different network topologies and the development of effective algorithms for studying network topology properties.

[0101] The model product is converted into a complex network model through abstract mapping of key information to complete the relevant verification analysis. The steps are as follows:

[0102] Establish combat nodes and interactive relationships between nodes:

[0103] Obtaining an interaction relationship between any two nodes in a task resource flow model, wherein the interaction relationship includes: information interaction and no information interaction;

[0104] S21. Constructing complex network nodes:

[0105] Map the nodes in the task resource flow model to nodes in the complex network;

[0106] S22. Set the edge metric information of the complex network:

[0107] According to all the interactive relationships of the task resource flow model, edges between nodes are established in the complex network;

[0108] S23. Establish an adjacency matrix:

[0109] According to whether there are edges between nodes in the complex network, an adjacency matrix is ​​established, such as Figure 5 As shown;

[0110] The adjacency matrix represents the nodes and the node connection status. The values ​​in the matrix are 0 and 1.

[0111] Figure 5 0 indicates that there is no information interaction between the column node and the row node, and 1 indicates that there is information interaction between the column node and the row node.

[0112] S24. Establish a node connection probability adjacency matrix:

[0113] The connection status of the combat nodes is used to establish a node connection probability adjacency matrix, such as Figure 6 shown.

[0114] The connection probability adjacency matrix represents the nodes and the node connection status, and the values ​​in the matrix are between 0 and 1.

[0115] Figure 6 The values ​​in the matrix represent the probability that column nodes and row nodes can exchange information.

[0116] This method evaluates system performance by establishing algorithms for system evolution, adaptability, and invulnerability, completing the verification of the performance and efficiency layer. The following uses system evolution evaluation as an example.

[0117] System evolution refers to changes in system architecture over time and in response to factors such as changes in the external environment. During the operation of a network information system, shifts in mission and functional requirements lead to changes in the composition and structure of various domains, which are reflected in the operational process of the information architecture. Information architecture evolution in a network information system is the most fundamental characteristic of system evolution. It describes the elements, drivers, and constraints of evolution based on the specific requirements of structural evolution.

[0118] Utilizing complex network theory and network information characteristics analysis results, we conduct network information system characteristics analysis and evaluation for typical combat concepts. The specific steps are as follows:

[0119] 1) Abstract typical scenarios into complex networks. This involves abstracting the physical nodes of typical scenarios into complex network nodes and abstracting information interaction relationships into edges of the complex network, thereby establishing a complex network model for typical scenarios.

[0120] According to the requirements of complex networks, the system nodes are classified and named, and the relationship between each node is reflected by a weighted undirected graph. According to the node connection relationship of the model information activity, the network topology structure obtained by abstraction is as follows Figure 4 As shown in Figure 2, a line represents a communication connection relationship between two entity nodes, and the weight value on the node is the mutual connection probability obtained based on the connection relationship between each node and expert knowledge.

[0121] After abstractly representing typical scenarios, the node connection matrix and node connection probability matrix of the corresponding system are formed, such as Figure 5 、 Figure 6 shown.

[0122] 2) Import the complex network model into the complex network characteristic analysis tool, analyze the evolution of the network model, and provide quantitative calculation results.

[0123] In order to complete the combat mission, the system sets an expected set of capabilities, performance levels, construction funds and construction period for the entire system, and defines these elements separately. Under the constraints of these elements, Figure 7 This is a schematic diagram of the system's evolution after 100 iterations. The upper left portion shows the evolution of average path length, the upper right portion shows the evolution of node clustering coefficient, and the lower portion shows the nodes and edges during the 100 iterations. After 100 iterations of network evolution, the network's complexity increases significantly. Calculation and statistics of the clustering coefficient distribution and average path length of all nodes in the system reveal that, while these parameters fluctuate somewhat as the system evolves, overall, the average path length of nodes increases with the system's evolution, while the distribution of the clustering coefficient of nodes is negatively correlated with the number of iterations. Observing and recording these relevant parameters during the system's evolution provides data support for further in-depth research on system characteristics and a reference for performance measurement and quantitative evaluation of complex systems.

[0124] For example, when verifying the logical content layer of the structural model in the system architecture, a static verification method can be used for verification.

[0125] For example, for other models in the structural model except the task resource flow model, performance efficiency layer verification is not performed.

[0126] The above description is merely an embodiment of the present invention and does not limit the present invention in any way. Any simple modification, change and equivalent structural change made to the above embodiment based on the technical essence of the present invention shall still fall within the scope of protection of the technical solution of the present invention.

Claims

1. A system architecture verification and evaluation method, characterized in that: include: Map the behavioral activity model in the system architecture, which is expressed using the IDEF0 model, to a DoDAF-based model, and perform dynamic simulation on the DoDAF-based model to complete the verification and evaluation of the logical content layer of the behavioral activity model in the system architecture; Using a graph-theory-based verification method, the task resource flow model in the structural model of the system architecture is abstractly mapped and converted into a complex network model and adjacency matrix. The characteristics of the complex network model and adjacency matrix are calculated to complete the performance and efficiency layer verification and evaluation of the task resource flow model. Verification at the expression level is to determine whether the semantics of the description formed by the basic grammatical elements are correct and reasonable, and whether there are any misunderstandings. Verification rules include grammatical rule verification, completeness verification, and consistency verification. Calculate properties of complex network models and adjacency matrices, including: Abstract typical scenarios into complex networks, including abstracting the combat entity nodes of typical scenarios into complex network nodes and abstracting the information interaction relationships into complex network edges, thereby establishing a complex network model for typical scenarios; According to the requirements of complex networks, the system nodes are classified and named, and the relationship between each node is reflected by a weighted undirected graph. Based on the node connection relationship of the model information activity, the network topology structure is abstracted. The connection line represents the communication connection relationship between two physical nodes. The weight value on the node is the mutual connection probability obtained based on the connection relationship of each node and expert knowledge. The complex network model is imported into the complex network characteristic analysis tool to analyze the evolution of the network model and provide quantitative calculation results.

2. The method according to claim 1, characterized in that The mapping of the behavioral activity model expressed in the IDEF0 model in the system architecture to a DoDAF-based model includes: Get the activity, input, control, and output elements of the IDEF0 model; According to the activities, inputs, controls, and outputs, the sequence diagram and state machine diagram based on DODAF are obtained to obtain the DoDAF-based model.

3. The method according to claim 2, characterized in that The method of obtaining DODAF-based sequence diagrams and state machine diagrams based on activity, input, control, and output elements includes: Map activities and control elements to lifelines of sequence diagrams and behavioral executions of sequence diagrams; Map input, output, and control elements to message events between lifelines in sequence diagrams; Map activities and control elements to node states in the state machine diagram, and map input, output, and activity elements to entry, execution, and exit actions of the node states.

4. The method according to claim 1, wherein The abstract mapping of the task resource flow model in the structural model in the system architecture into a complex network model and adjacency matrix includes: Obtaining an interaction relationship between any two nodes in a task resource flow model, wherein the interaction relationship includes: information interaction and no information interaction; Map the nodes in the task resource flow model to nodes in the complex network; According to all the interactive relationships of the task resource flow model, edges between nodes are established in the complex network; According to whether there are edges between nodes in the complex network, the adjacency matrix and the connection probability adjacency matrix are established.

5. The method according to claim 4, characterized in that For two nodes with information interaction in the task resource flow model, there is an edge when mapped in a complex network.

6. A system architecture verification and evaluation device, characterized in that: include: The verification and evaluation module of the logical content layer is used to map the behavioral activity model expressed in the system architecture using the IDEF0 model to a DoDAF-based model, dynamically simulate the DoDAF-based model, and complete the verification and evaluation of the logical content layer of the behavioral activity model in the system architecture; The performance and efficiency layer verification and evaluation module uses a graph-theory-based verification method to abstractly map the task resource flow model in the structural model of the system architecture into a complex network model and adjacency matrix. It then calculates the characteristics of the complex network model and adjacency matrix to complete the performance and efficiency layer verification and evaluation of the task resource flow model. Verification at the expression level is to determine whether the semantics of the description formed by the basic grammatical elements are correct and reasonable, and whether there are any misunderstandings. Verification rules include grammatical rule verification, completeness verification, and consistency verification. The verification and evaluation module of the performance and effectiveness layer is specifically used to abstract typical scenarios into complex networks, including abstracting the combat entity nodes of typical scenarios into complex network nodes and abstracting the information interaction relationships into the edges of the complex network, so as to establish a complex network model of the typical scenario; classifying and naming the system nodes in accordance with the requirements of the complex network, and using weighted undirected graphs to reflect the association relationship between each node; based on the node connection relationship of the model information activity, the network topology structure is obtained through abstraction, and the connection line represents the communication connection relationship between the two entity nodes, and the weight value on the node is the mutual connection probability obtained according to the connection relationship of each node and expert knowledge; the complex network model is imported into the complex network characteristic analysis tool to analyze the evolution of the network model and provide quantitative calculation results.

7. The device according to claim 6, characterized in that The verification and evaluation module of the logic content layer is specifically used to: Get the activity, input, control, and output elements of the IDEF0 model; According to the activities, inputs, controls, and outputs, the sequence diagram and state machine diagram based on DODAF are obtained to obtain the DoDAF-based model.

8. The device according to claim 7, characterized in that The verification and evaluation module of the logic content layer is specifically used to: Map activities and control elements to lifelines of sequence diagrams and behavioral executions of sequence diagrams; Map input, output, and control elements to message events between lifelines in sequence diagrams; Map activities and control elements to node states in the state machine diagram, and map input, output, and activity elements to entry, execution, and exit actions of the node states.

9. The device according to claim 6, characterized in that The verification and evaluation module of the performance efficiency layer is specifically used to: Obtaining an interaction relationship between any two nodes in a task resource flow model, wherein the interaction relationship includes: information interaction and no information interaction; Map the nodes in the task resource flow model to nodes in the complex network; According to all the interactive relationships of the task resource flow model, edges between nodes are established in the complex network; According to whether there are edges between nodes in the complex network, the adjacency matrix and the connection probability adjacency matrix are established.

10. The device according to claim 9, characterized in that For two nodes with information interaction in the task resource flow model, there is an edge when mapped in a complex network.

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